CN114900994B - Embedded circuit type circuit board and preparation method thereof - Google Patents

Abstract

The invention discloses an embedded circuit board and a preparation method thereof, wherein the preparation method of the embedded circuit board comprises: obtaining a board to be processed, wherein the circuit layer on one side of the board to be processed is far away from the One side of the processed plate is attached to the first conductive layer, and the other side of the circuit layer is wrapped by the dielectric layer of the plate to be processed; the first conductive layer corresponding to the pad in the circuit layer is removed; the pad is metallized Thinning until the thickness of the pad meets the preset requirements; removing the remaining first conductive layer to prepare a buried circuit board. The above method can increase the thickness of the pad, thereby ensuring the welding quality between the pad and the subsequent welding object.

Description

A kind of embedded circuit board and its preparation method

technical field

The invention relates to the technical field of printed circuit boards, in particular to an embedded circuit board and a preparation method thereof.

Background technique

ETS (Embedded Trace Substrate) product is an embedded circuit board, and its typical feature is that the embedded circuit is embedded in the dielectric layer.

The buried lines and pads of ETS products are embedded in the dielectric layer. During the micro-etching processes such as rapid etching and solder mask, the buried lines and pads form a certain level difference with the PP dielectric layer.

The height difference will affect the soldering effect of the pads, which may easily lead to poor soldering.

Contents of the invention

The invention provides an embedded circuit board and a preparation method thereof to solve the problem that the embedded circuit board is prone to poor welding.

In order to solve the above-mentioned technical problems, the present invention provides an embedded circuit board, comprising: obtaining the board to be processed, wherein one side of the board to be processed is attached to the first conductive layer, and the board to be processed The circuit layer formed on one side of the circuit layer is wrapped by the dielectric layer and the first conductive layer of the plate to be processed; the first conductive layer corresponding to the pad in the circuit layer is removed; the pad is metallized until the thickness of the pad meets the predetermined Design requirements; remove the remaining first conductive layer to prepare a buried circuit board.

Wherein, the step of removing the first conductive layer corresponding to the pad in the circuit layer includes: attaching a resist film to a first preset position of the first conductive layer, wherein the first preset position does not correspond to the pad; Etching the exposed first conductive layer to remove the first conductive layer corresponding to the pad in the wiring layer.

Wherein, the step of metallizing the pad until the thickness of the pad meets the preset requirements includes: pasting the anti-plating film on the second preset position of the first conductive layer, wherein the second preset position is not in contact with the pad Correspondingly, and the range of the second preset position is greater than the range of the first preset position; using the first conductive layer to metallize the exposed pad until the thickness of the pad meets the preset requirement.

Wherein, the step of removing the remaining first conductive layer to prepare the buried circuit board includes: removing the remaining first conductive layer by etching to expose the circuit layer to prepare the buried circuit board.

Wherein, the step of obtaining the plate to be processed includes: obtaining the substrate, wherein the first conductive layer is respectively formed on the opposite sides of the substrate; respectively preparing the first conductive layer on the opposite sides of the substrate includes at least sequentially stacking and A circuit board with two layers of circuit layers and one layer of dielectric layer attached together; dividing the substrate to obtain two boards to be processed.

Wherein, the step of preparing a circuit board including at least two circuit layers and a dielectric layer sequentially stacked and bonded on the first conductive layers on the opposite sides of the substrate respectively includes: respectively on the first conductive layers on the opposite sides of the substrate Prepare the first circuit layer; press the dielectric layer on the side of the first circuit layer away from the substrate, and prepare the second circuit layer on the side of the dielectric layer away from the substrate; repeat the pressing of the dielectric layer and the preparation of the circuit layer until The board meets the preset conditions.

Specifically, the dielectric layer and copper foil can be laminated on the side of the first circuit layer away from the substrate, and the second circuit layer can be prepared on the side of the dielectric layer away from the substrate; repeating the lamination of the dielectric layer and the preparation of the circuit layer until The thickness and performance of the circuit board meet the preset conditions.

Wherein, the step of obtaining the substrate includes: obtaining the substrate including the first conductive layer, the second conductive layer, the base layer, the second conductive layer and the first conductive layer which are sequentially stacked and arranged in a bonded manner; wherein, the first conductive layer and The corresponding second conductive layers are fixed by glue.

Wherein, the step of dividing the substrate to obtain two boards to be processed includes: separating the first conductive layer and the corresponding second conductive layer to obtain two boards to be processed.

Wherein, the thickness range of the first conductive layer is 2-8 microns; the thickness range of the second conductive layer is 13-23 microns.

In order to solve the above technical problems, the present invention also provides a printed circuit board. The embedded circuit board includes circuit layers and dielectric layers that are sequentially stacked and bonded; The side of the pad away from the buried circuit board is exposed, and the side of the exposed pad is not recessed in the dielectric layer.

The beneficial effect of the present invention is: different from the situation of the prior art, after the present invention obtains the plate to be processed, which is attached to the first conductive layer on one side, firstly removes the first conductive layer corresponding to the pad in the circuit layer. Conductive layer, and then metallize the pad until the thickness of the pad meets the preset requirements, and finally remove the remaining first conductive layer to prepare a buried circuit board, which can increase the thickness of the pad and improve the connection between the pad and the subsequent The contact area between the welding objects can ensure the welding quality between the pad and the subsequent welding objects.

Description of drawings

Fig. 1 is the schematic flow chart of an embodiment of the embedded circuit board of the present invention;

Fig. 2 is a schematic flow chart of another embodiment of the embedded circuit board of the present invention;

Fig. 3 is a schematic structural view of an embodiment of the substrate in the embodiment of Fig. 2;

Fig. 4 is a schematic structural view of an embodiment after the substrate build-up layer in the embodiment of Fig. 2;

Fig. 5 is a schematic structural view of an embodiment of the plate to be processed in step S21 in the embodiment of Fig. 2;

Fig. 6 is a schematic structural view of an embodiment of the plate to be processed in step S22 in the embodiment of Fig. 2;

Fig. 7 is a schematic structural view of an embodiment after the plate to be processed is covered with an anti-coating film in step S23 in the embodiment of Fig. 2;

FIG. 8 is a schematic structural view of an embodiment of the embedded circuit board of the present invention.

Detailed ways

The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

Please refer to FIG. 1 . FIG. 1 is a schematic flow chart of an embodiment of a method for manufacturing an embedded circuit board according to the present invention.

Step S11: Obtain the board to be processed, wherein one side of the board to be processed is attached to the first conductive layer, and the circuit layer formed on one side of the board to be processed is covered by the dielectric layer of the board to be processed and the first conductive layer. A conductive layer is wrapped.

Embedded circuit board refers to the type of circuit board in which the circuit is embedded in the dielectric layer. The application range of this type of circuit board is the same as that of conventional circuit boards. The embedded circuit board can include at least two Layer circuit layer and at least one dielectric layer.

The board to be processed is obtained, wherein one side of the board to be processed is attached to the first conductive layer, and the circuit layer formed on one side of the board to be processed is covered by the dielectric layer and the first conductive layer of the board to be processed Wrapping means that the circuit layer on one side of the board to be processed is embedded in the dielectric layer, and the side of the circuit layer away from the board to be processed is attached to the first conductive layer.

Step S12: removing the first conductive layer corresponding to the pad in the wiring layer.

The circuit layer formed on one side of the board to be processed includes pads and other circuit patterns, wherein the pads are used for welding with external structures, such as solder balls of chips, or leads of other electrical equipment, etc., which are not limited here .

In this step, the first conductive layer corresponding to the pad in the circuit layer is removed, and the first conductive layer corresponding to other circuit patterns in the circuit layer is reserved, so that the pad in the circuit layer is exposed, while other circuit patterns are covered by the first conductive layer. layer coverage.

In a specific application scenario, removing the first conductive layer may be performed by applying a dry film and etching. In another specific application scenario, removing the first conductive layer may be performed by using a water jet, mechanical milling or laser ablation on the first conductive layer corresponding to the pad. It is not limited here.

Step S13: performing metallization on the pad until the thickness of the pad meets the preset requirement.

Metallize the exposed pads to thicken the pads until the thickness of the pads meets preset requirements. Wherein, the preset requirement may include making the pad protrude from the dielectric layer by at least a first preset height or the overall height of the pad is at least a second preset height, so that the pad is not recessed in the dielectric layer after removing the remaining first conductive layer, The specific heights of the first preset height and the second preset height can be set based on actual needs, and are not limited here.

In a specific application scenario, the pad can be metallized by electroplating to thicken the pad. In another specific application scenario, the pad can also be thickened by welding the metal base outward on the pad. It is not limited here.

Step S14: removing the remaining first conductive layer to prepare a buried circuit board.

After the pad is thickened, the remaining first conductive layer is removed to expose other circuit patterns of the circuit layer, so as to prepare an embedded circuit board.

Through the above-mentioned steps, after the preparation method of the embedded circuit board of this embodiment obtains the plate to be processed, which is attached to the first conductive layer on one side, first removes the first part corresponding to the pad in the circuit layer. Conductive layer, and then metallize the pad until the thickness of the pad meets the preset requirements, and finally remove the remaining first conductive layer to prepare a buried circuit board, which can increase the thickness of the pad and improve the connection between the pad and the subsequent The contact area between the welding objects can ensure the welding quality between the pad and the subsequent welding objects.

Please refer to FIG. 2 . FIG. 2 is a schematic flowchart of another embodiment of the method for manufacturing a circuit board with embedded circuits according to the present invention.

Step S21: The substrate is obtained, wherein first conductive layers are respectively formed on opposite sides of the substrate, and on the first conductive layers on the opposite sides of the substrate are prepared respectively at least two layers of circuit layers stacked in sequence and bonded together. Divide the circuit board of the dielectric layer to obtain two boards to be processed.

A substrate is obtained, wherein the first conductive layers are respectively formed on opposite sides of the substrate. The substrate is used to support the preparation of embedded circuit boards.

In a specific embodiment, a substrate including a first conductive layer, a base layer, and a first conductive layer that are sequentially laminated and bonded can be obtained, wherein the base layer and the first conductive layer in this application scenario can be peeled off. .

In another specific embodiment, a substrate including a first conductive layer, a second conductive layer, a base layer, a second conductive layer, and a first conductive layer that are sequentially stacked and bonded can be obtained; wherein, the first conductive layer It is fixed with the corresponding second conductive layer by adhesive, so as to be peelable and fixed.

Please refer to FIG. 3 . FIG. 3 is a schematic structural diagram of an embodiment of the substrate in the embodiment of FIG. 2 .

The substrate 10 of this embodiment includes a first conductive layer 13 , a second conductive layer 12 , a base layer 11 , a second conductive layer 12 and a first conductive layer 13 which are sequentially stacked and attached.

Wherein, the substrate 10 may include a prepreg or a resin layer, the base layer 11 and the second conductive layer 12 are fixed by resin bonding, and the second conductive layer 12 and the first conductive layer 13 are fixed by gluing, so as to facilitate subsequent separation.

Wherein, the thickness range of the first conductive layer 13 is 2-8 microns, specifically can be 2 microns, 2.5 microns, 3 microns, 4.2 microns, 5 microns, 6 microns, 7 microns, 8 microns, etc.; and the second conductive layer The thickness of 12 is in the range of 13-23 microns, specifically 13 microns, 15 microns, 17 microns, 19 microns, 20 microns, 22 microns, 23 microns, etc. The thicker second conductive layer 12 is used to provide rigid support for the substrate 10, so as to prepare the plate to be processed on the substrate 10, and the first conductive layer 13 is used as a primer layer for circuit layer preparation on the substrate 10, For easy plating attachment.

In a specific application scenario, the step of preparing a circuit board including at least two circuit layers and a dielectric layer that are sequentially stacked and bonded on the first conductive layer on the opposite sides of the substrate may include: Prepare the first circuit layer on the first conductive layer on opposite sides of the substrate; press the dielectric layer on the side of the first circuit layer away from the substrate, and prepare the second layer of circuit layer on the side of the dielectric layer away from the substrate; repeat pressing Combine the dielectric layer and prepare the circuit layer until the circuit board meets the preset conditions.

Specifically, the dielectric layer and copper foil can be laminated on the side of the first circuit layer away from the substrate, and the second circuit layer can be prepared on the side of the dielectric layer away from the substrate; repeating the lamination of the dielectric layer and the preparation of the circuit layer until The thickness and performance of the circuit board meet the preset requirements. Wherein, the preset conditions of the thickness and performance of the circuit board are set based on actual requirements, and are not limited here.

In a specific application scenario, take the preparation of two circuit layers and one dielectric layer as an example: paste a dry film on the first conductive layer on opposite sides of the substrate, perform exposure and development, and then perform electroplating to A first circuit layer is prepared on the first conductive layer; after the first circuit layer is prepared, a dielectric layer is laminated on the side of the first circuit layer away from the first conductive layer. Wherein, when pressing the dielectric layer, since the dielectric layer will melt during high-temperature pressing, a layer of copper foil layer is provided on the side of the dielectric layer away from the first circuit layer to facilitate the pressing force. After lamination, the dielectric layer can be drilled and metallized first to prepare via holes, and then the same process is passed on the side of the dielectric layer away from the first layer of circuit layer: pasting dry film, and performing exposure and development , and then electroplating to prepare a second circuit layer on the side of the dielectric layer away from the first layer of circuit layer, thereby completing the layer-building step, wherein the copper foil layer used for lamination can also be used as a punching layer during the electroplating process. The bottom layer improves the preparation efficiency and quality of the second circuit layer. In other application scenarios, when more layer-adding steps are required, the layer-adding steps of each layer are similar to the above, and will not be repeated here.

After the build-up is completed, the first conductive layer and the corresponding second conductive layer are separated to obtain two boards to be processed. Wherein, one side of the board to be processed is attached to the first conductive layer, and the circuit layer formed on one side of the board to be processed is wrapped by the dielectric layer and the first conductive layer of the board to be processed.

Please refer to FIG. 4 . FIG. 4 is a schematic structural diagram of an embodiment after the build-up of the substrate in the embodiment of FIG. 2 .

On the first conductive layer 13 on at least one side of the built-up substrate 10 , a circuit layer and a dielectric layer are sequentially stacked and attached.

The board to be processed 100 can be obtained by separating the first conductive layer 13 and the corresponding second conductive layer 12 of the substrate.

Please refer to FIG. 5 . FIG. 5 is a schematic structural view of an embodiment of the plate to be processed in step S21 of the embodiment in FIG. 2 .

The board to be processed 100 in this embodiment includes a first conductive layer 13 , a first circuit layer 102 , a second circuit layer 103 , a dielectric layer 104 and a copper foil layer 1031 .

Wherein, the first conductive layer 13, the first circuit layer 102, the dielectric layer 104, the copper foil layer 1031 and the second circuit layer 103 are laminated and attached in sequence, wherein the dielectric layer 104 fills the space between the first circuit layers 102 gaps, and the dielectric layer 104 does not fill the gaps between the second circuit layers 103 .

The first circuit layer 102 and the second circuit layer 103 are electrically connected through via holes.

The copper foil layer 1031 is used for pressing the dielectric layer 104 when the dielectric layer 104 is pressed together, and also serves as a primer layer for electroplating when the second circuit layer 103 is prepared, so as to facilitate metal adhesion.

Step S22: Paste the resist film on the first preset position of the first conductive layer, wherein the first preset position does not correspond to the pad; etch the exposed first conductive layer to remove the The pad corresponds to the first conductive layer.

After obtaining the plate to be processed, paste the resist film on the first preset position of the first conductive layer, wherein the first preset position does not correspond to the pad, that is, paste the resist film on the first conductive layer The area other than the corresponding position of the pad is exposed, thereby exposing the first conductive layer corresponding to the position of the pad. Wherein, the position corresponding to the pad includes the pad and a line connected to the pad near the pad.

The exposed first conductive layer is etched to remove the first conductive layer corresponding to the pad in the circuit layer, thereby exposing the pad. After the etching is completed, the resist film is removed.

Please refer to FIG. 6 . FIG. 6 is a schematic structural view of an embodiment of the plate to be processed in step S22 of the embodiment in FIG. 2 .

The board to be processed 100 in this embodiment includes a first conductive layer 13 , a first circuit layer 102 , a second circuit layer 103 , a copper foil layer 1031 and a dielectric layer 104 . The board to be processed 100 in this embodiment is based on the board to be processed 100 in the embodiment of FIG. 4 , and the first conductive layer 13 exposes the positions corresponding to the pads 1021 in the first circuit layer 102 .

Step S23: Place the anti-plating film on the second preset position of the first conductive layer, wherein the second preset position does not correspond to the pad, and the range of the second preset position is larger than the range of the first preset position; The exposed pad is metallized by using the first conductive layer until the thickness of the pad meets a preset requirement.

Paste the anti-plating film on the second preset position of the first conductive layer, wherein the second preset position does not correspond to the pad, that is, the anti-plating film also exposes the corresponding position of the pad, but the range of the second preset position is greater than The range of the first preset position prevents a short circuit between the newly added metal and the first conductive layer during the subsequent metallization process, thereby improving the structural stability of the board. Wherein, the position corresponding to the pad includes the pad and a line connected to the pad near the pad.

Please refer to FIG. 7 . FIG. 7 is a schematic structural diagram of an embodiment after the plate to be processed is covered with an anti-coating film in step S23 of the embodiment in FIG. 2 .

In the plate to be processed 100 of this embodiment, on the basis of the plate to be processed in FIG. , so that the first conductive layer 13 is protected from the interference of the metallization process through the anti-plating film 301 in the subsequent metallization process, so as to avoid the occurrence of short circuit.

After the anti-plating film is covered, the exposed pad is metallized with the first conductive layer until the thickness of the pad meets the preset requirement. Among them, the preset requirement is generally that the thickness of the pad protrudes from the dielectric layer, so that the pad will not be recessed in the dielectric layer after subsequent etching, so as to ensure the reliability of welding between the pad and the external structure. The specific pad thickness required by the preset is set based on the actual situation, for example: 10 microns, 20 microns, 35 microns, etc., which are not specifically limited here.

After the electroplating is completed, the anti-plating film is removed.

Wherein, the metallization in this embodiment may include electroplating. During electroplating, the remaining first conductive layer may be used as a conductive tool during electroplating to conduct current to the pad or the line connected to the pad near the pad, thereby completing the Pad thickening.

Step S24: removing the remaining first conductive layer by etching to expose the circuit layer, so as to prepare a circuit board with embedded circuits.

After metallization, remove the remaining first conductive layer and the copper foil layer on the outside of the board that does not correspond to the circuit pattern by etching, expose the circuit layer on one side of the board, and make the circuit layers on the other side of the board independent of each other to prepare Buried circuit board.

Wherein, since the pad has been thickened in step S23, in this etching, the thickness of the pad will not be concave in the dielectric layer due to the pre-thickening, so that in the process of welding with the pad The welding quality will not be affected by the fact that the pad is recessed in the dielectric layer.

Since the circuit pattern of the second circuit layer is not thickened, it may be recessed in the dielectric layer, but the circuit pattern does not undertake the function of external welding, so the function of the circuit pattern is not affected.

After the first conductive layer is removed, ink solder resist can be applied to the opposite sides of the board, so as to provide insulation protection for the opposite sides of the board. Specifically, the exposed pad and other circuit patterns that require external connection can be exposed, and other positions that do not require external connection can be covered with ink.

Through the above-mentioned steps, after the preparation method of the embedded circuit board of this embodiment obtains the plate to be processed, which is attached to the first conductive layer on one side, first removes the first part corresponding to the pad in the circuit layer. Conductive layer, and then metallize the pad until the thickness of the pad meets the preset requirements, and finally remove the remaining first conductive layer to prepare a buried circuit board, which can increase the thickness of the pad and improve the connection between the pad and the subsequent The contact area between the welding objects can ensure the welding quality between the pad and the subsequent welding objects. Moreover, this embodiment retains part of the first conductive layer before metallization, and can use the remaining first conductive layer as a conductive tool during electroplating to conduct current to the pad or the line connected to the pad near the pad, thereby completing The thickening of the pad reduces the additional setup of the plating conductive device.

Please refer to FIG. 8 . FIG. 8 is a structural diagram of an embodiment of the embedded circuit board of the present invention. In this embodiment, the number of circuit layers is two for illustration. When the number of circuit layers is multi-layer, the structure is similar to that of this embodiment.

In the embedded circuit board 200 of this embodiment, the first circuit layer 201 , the dielectric layer 202 and the second circuit layer 203 are sequentially stacked and attached.

Wherein, the pad 2011 on the first circuit layer 201 on the side of the buried circuit board 200 is exposed on the side away from the buried circuit board 200, and the side of the exposed pad 2011 is not recessed in the dielectric layer 202 . Specifically, the exposed pad 2011 may be flush with the dielectric layer 202 , or the pad 2011 may protrude from the dielectric layer 202 .

The opposite sides of the embedded circuit board 200 are coated with a solder resist layer 204 , and the solder resist layer 204 covers part of the circuit layer for insulation protection.

Through the above structure, the embedded circuit board of this embodiment can increase the contact area between the pad and the subsequent welding object through the pad that is not recessed in the dielectric layer, thereby ensuring the welding between the pad and the subsequent welding object quality.

The above is only the embodiment of the present invention, and does not limit the patent scope of the present invention. Any equivalent structure or equivalent process conversion made by using the description of the present invention and the contents of the accompanying drawings, or directly or indirectly used in other related technologies fields, all of which are equally included in the scope of patent protection of the present invention.

Claims (8)

1. a preparation method of embedded circuit board, it is characterized in that, the preparation method of described embedded circuit board comprises: The board to be processed is obtained, wherein one side of the board to be processed is arranged in close contact with the first conductive layer, and the circuit layer formed on one side of the board to be processed is covered by the medium of the board to be processed layer and said first conductive layer wrapping; removing the first conductive layer corresponding to the pad in the circuit layer; performing metallization on the pad until the thickness of the pad meets preset requirements; removing the remaining first conductive layer to prepare the buried circuit board; Wherein, the step of removing the first conductive layer corresponding to the pad in the circuit layer includes: attaching a resist film to a first predetermined position of the first conductive layer, wherein the first predetermined position does not correspond to the pad; Etching the exposed first conductive layer to remove the first conductive layer corresponding to the pad in the circuit layer; Wherein, the step of metallizing the pad until the thickness of the pad meets preset requirements includes: Pasting the anti-plating film on the second preset position of the first conductive layer, wherein the second preset position does not correspond to the pad, and the range of the second preset position is larger than the first preset position a range of preset positions; Using the first conductive layer as an electroplating tool, conduct current to the exposed pad for electroplating until the thickness of the pad meets the preset requirement. 2. The method for preparing an embedded circuit board according to claim 1, wherein the step of removing the remaining first conductive layer to prepare the embedded circuit board comprises: The remaining first conductive layer is removed by etching to expose the circuit layer, so as to prepare the embedded circuit board. 3. The method for preparing an embedded circuit board according to claim 1, wherein the step of obtaining the plate to be processed comprises: A substrate is obtained, wherein a first conductive layer is respectively formed on opposite sides of the substrate; On the first conductive layers on the opposite sides of the substrate, respectively prepare circuit boards comprising at least two circuit layers and one layer of dielectric layer that are sequentially stacked and bonded; Dividing the substrate to obtain two plates to be processed. 4. The method for preparing an embedded circuit board according to claim 3, characterized in that the preparation of the first conductive layer on the opposite sides of the substrate includes at least two layers that are sequentially stacked and bonded. The steps of layering the circuit board of the circuit layer and the dielectric layer include: preparing a first circuit layer on the first conductive layer on opposite sides of the substrate; Pressing a dielectric layer on the side of the first circuit layer away from the substrate, and preparing a second circuit layer on the side of the dielectric layer away from the substrate; Pressing the dielectric layer and preparing the circuit layer are repeated until the circuit board meets the preset conditions. 5. The method for preparing an embedded circuit board according to claim 3, wherein the step of obtaining the substrate comprises: Obtaining a substrate comprising a first conductive layer, a second conductive layer, a base layer, a second conductive layer and a first conductive layer that are sequentially stacked and bonded; Wherein, the first conductive layer and the corresponding second conductive layer are fixed by glue. 6. The method for preparing an embedded circuit board according to claim 5, wherein the step of dividing the substrate and obtaining two boards to be processed comprises: The first conductive layer is separated from the corresponding second conductive layer to obtain two plates to be processed. 7. the preparation method of embedded circuit board according to claim 5, is characterized in that, The thickness range of the first conductive layer is 2-8 microns; The thickness of the second conductive layer is in the range of 13-23 microns. 8. An embedded circuit board, characterized in that, the embedded circuit board includes circuit layers and dielectric layers that are sequentially stacked and bonded; The pad on the circuit layer on one side of the buried circuit board is exposed on the side away from the buried circuit board, and the side of the exposed pad is not recessed in the dielectric layer; Wherein, the preparation method of the embedded circuit board includes: The board to be processed is obtained, wherein one side of the board to be processed is arranged in close contact with the first conductive layer, and the circuit layer formed on one side of the board to be processed is covered by the medium of the board to be processed layer and said first conductive layer wrapping; attaching a resist film to a first predetermined position of the first conductive layer, wherein the first predetermined position does not correspond to the pad; Etching the exposed first conductive layer to remove the first conductive layer corresponding to the pad in the wiring layer; Paste the anti-plating film on the second preset position of the first conductive layer, wherein the second preset position does not correspond to the pad, and the range of the second preset position is larger than the first a range of preset positions; Using the first conductive layer as an electroplating tool, conduct current to the exposed pad for electroplating until the thickness of the pad meets the preset requirement and remove the remaining first conductive layer to prepare the Buried circuit board.

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