CN114900994B

CN114900994B - Embedded circuit type circuit board and preparation method thereof

Info

Publication number: CN114900994B
Application number: CN202210406813.5A
Authority: CN
Inventors: 李小新; 熊佳; 魏炜
Original assignee: Guangzhou Guangxin Packaging Substrate Co ltd
Current assignee: Guangzhou Guangxin Packaging Substrate Co ltd
Priority date: 2022-04-18
Filing date: 2022-04-18
Publication date: 2023-03-28
Anticipated expiration: 2042-04-18
Also published as: CN114900994A

Abstract

The invention discloses an embedded circuit type circuit board and a preparation method thereof, wherein the preparation method of the embedded circuit type circuit board comprises the following steps: obtaining a plate to be processed, wherein one side, away from the plate to be processed, of the circuit layer on one side of the plate to be processed is attached to the first conductive layer, and the other sides of the circuit layer are wrapped by the dielectric layer of the plate to be processed; removing the first conductive layer corresponding to the bonding pad in the circuit layer; metallizing the bonding pad until the thickness of the bonding pad meets the preset requirement; and removing the residual first conductive layer to prepare the embedded circuit type circuit board. The method can improve the thickness of the bonding pad, and further guarantee the welding quality between the bonding pad and a subsequent welding object.

Description

Embedded circuit type circuit board and preparation method thereof

Technical Field

The invention relates to the technical field of printed circuit boards, in particular to a circuit board with embedded circuits and a preparation method thereof.

Background

The ETS (Embedded Trace Substrate) product is a circuit board with Embedded traces, and is typically characterized in that the Embedded traces are Embedded in a dielectric layer.

The embedded circuit and the bonding pad of the ETS product are embedded in the medium layer, and in the micro-etching processes of rapid etching, resistance welding and the like, the embedded circuit and the bonding pad and the PP medium layer form a certain height difference.

The height difference affects the welding effect of the bonding pad, and poor welding is easily caused.

Disclosure of Invention

The invention provides an embedded circuit type circuit board and a preparation method thereof, which aim to solve the problem that the embedded circuit type circuit board is easy to be poorly welded.

To solve the above technical problem, the present invention provides a circuit board with embedded circuits, including: obtaining a plate to be processed, wherein one side of the plate to be processed is attached to the first conductive layer, and a circuit layer formed on one side of the plate to be processed is wrapped by the dielectric layer and the first conductive layer of the plate to be processed; removing the first conductive layer corresponding to the bonding pad in the circuit layer; metallizing the bonding pad until the thickness of the bonding pad meets the preset requirement; and removing the residual first conductive layer to prepare the embedded circuit type circuit board.

The step of removing the first conductive layer corresponding to the bonding pad in the circuit layer comprises the following steps: attaching a corrosion resistant film to a first preset position of the first conductive layer, wherein the first preset position does not correspond to the bonding pad; and etching the exposed first conductive layer to remove the first conductive layer corresponding to the bonding pad in the circuit layer.

The step of metalizing the bonding pad until the thickness of the bonding pad meets the preset requirement comprises the following steps: attaching the anti-plating film to a second preset position of the first conducting layer, wherein the second preset position does not correspond to the bonding pad, and the range of the second preset position is larger than that of the first preset position; and metalizing the exposed bonding pad by using the first conducting layer until the thickness of the bonding pad meets the preset requirement.

Wherein, the step of removing the remaining first conductive layer to prepare the embedded circuit type circuit board comprises: and removing the residual first conductive layer by etching to expose the circuit layer so as to prepare the embedded circuit type circuit board.

The method comprises the following steps of obtaining a plate to be processed: obtaining a substrate, wherein first conducting layers are respectively formed on two opposite sides of the substrate; respectively preparing circuit boards at least comprising two circuit layers and a dielectric layer which are sequentially stacked and attached on the first conductive layers on the two opposite sides of the substrate; and dividing the substrate to obtain two plates to be processed.

Wherein, the step of preparing the circuit board including the at least two-layer circuit layer and the dielectric layer that stack gradually and laminating set up respectively on the first conducting layer of the relative both sides of base plate includes: respectively preparing a first circuit layer on the first conductive layers on two opposite sides of the substrate; pressing a dielectric layer on one side of the first circuit layer, which is far away from the substrate, and preparing a second circuit layer on one side of the dielectric layer, which is far away from the substrate; and repeatedly laminating the dielectric layer and preparing the circuit layer until the circuit board meets the preset condition.

Specifically, a dielectric layer and a copper foil can be laminated on one side of the first circuit layer, which is far away from the substrate, and a second circuit layer is prepared on one side of the dielectric layer, which is far away from the substrate; and repeatedly laminating the dielectric layer and preparing the circuit layer until the thickness and the performance of the circuit board meet preset conditions.

Wherein the step of acquiring the substrate comprises: obtaining a substrate comprising a first conductive layer, a second conductive layer, a base layer, a second conductive layer and a first conductive layer which are sequentially stacked and attached; and the first conductive layer and the corresponding second conductive layer are fixed by gluing.

The step of dividing the substrate to obtain two plates to be processed comprises the following steps: and separating the first conductive layer from the corresponding second conductive layer to obtain two plates to be processed.

Wherein the thickness range of the first conductive layer is 2-8 microns; the second conductive layer has a thickness in the range of 13-23 microns.

In order to solve the above technical problem, the present invention further provides a printed circuit board, wherein the embedded circuit board comprises a circuit layer and a dielectric layer which are sequentially stacked and attached; one side of the pad on the circuit layer at one side of the embedded circuit type circuit board, which is far away from the embedded circuit type circuit board, is exposed, and one side of the exposed pad is not recessed in the dielectric layer.

The invention has the beneficial effects that: different from the situation of the prior art, after a plate to be processed, one side of which is attached to the first conducting layer, is obtained, the first conducting layer corresponding to the bonding pad in the circuit layer is removed, then the bonding pad is metalized until the thickness of the bonding pad meets the preset requirement, and finally the remaining first conducting layer is removed to prepare the embedded circuit type circuit board, so that the thickness of the bonding pad can be increased, the contact area between the bonding pad and a subsequent welding object is increased, and the welding quality between the bonding pad and the subsequent welding object is further ensured.

Drawings

FIG. 1 is a schematic flow chart of an embodiment of a buried circuit board of the present invention;

FIG. 2 is a schematic flow chart of another embodiment of the embedded circuit board of the present invention;

FIG. 3 is a schematic diagram of the structure of one embodiment of the substrate of the embodiment of FIG. 2;

FIG. 4 is a schematic diagram illustrating a structure of a subsequent embodiment of the substrate build-up in the embodiment of FIG. 2;

FIG. 5 is a schematic structural diagram of an embodiment of a plate to be processed in step S21 in the embodiment of FIG. 2;

FIG. 6 is a schematic structural diagram of an embodiment of a plate to be processed in step S22 in the embodiment of FIG. 2;

FIG. 7 is a schematic structural diagram of the embodiment of FIG. 2 after the plate to be processed is covered with the plating resist in step S23;

fig. 8 is a schematic structural diagram of an embodiment of the embedded circuit board of the invention.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Referring to fig. 1, fig. 1 is a schematic flow chart illustrating a method for manufacturing a buried circuit board according to an embodiment of the present invention.

Step S11: the board to be processed is obtained, wherein one side of the board to be processed is attached to the first conducting layer, and the circuit layer formed on one side of the board to be processed is wrapped by the dielectric layer and the first conducting layer of the board to be processed.

The embedded circuit board refers to a circuit board of which the circuit is embedded into the dielectric layer, the application range of the circuit board is the same as that of a conventional circuit board, and the embedded circuit board can comprise at least two circuit layers and at least one dielectric layer which are sequentially stacked and attached.

The method comprises the steps of obtaining a plate to be processed, wherein one side of the plate to be processed is attached to the first conductive layer, the circuit layer formed on one side of the plate to be processed is wrapped by the dielectric layer and the first conductive layer of the plate to be processed, namely the circuit layer on one side of the plate to be processed is embedded into the dielectric layer, and one side, far away from the plate to be processed, of the circuit layer is attached to the first conductive layer.

Step S12: and removing the first conductive layer corresponding to the bonding pad in the circuit layer.

The circuit layer formed on one side of the board to be processed includes pads for soldering with an external structure, such as solder balls of a chip or leads of other electrical devices, and other circuit patterns, which are not limited herein.

In the step, the first conducting layer corresponding to the bonding pad in the circuit layer is removed, and the first conducting layers corresponding to other circuit patterns in the circuit layer are reserved, so that the bonding pad in the circuit layer is exposed, and the other circuit patterns are covered by the first conducting layer.

In a specific application scenario, the first conductive layer may be removed by attaching a dry film and etching. In another specific application scenario, the first conductive layer may be removed by performing water jet, mechanical milling, or laser ablation on the first conductive layer corresponding to the bonding pad. And are not limited herein.

Step S13: and metalizing the bonding pad until the thickness of the bonding pad meets the preset requirement.

And metalizing the exposed bonding pad, so as to thicken the bonding pad until the thickness of the bonding pad meets the preset requirement. The preset requirement may include that the pad protrudes from the dielectric layer by at least a first preset height or the overall height of the pad is at least a second preset height, so that the pad is not recessed in the dielectric layer after the remaining first conductive layer is removed, and specific heights of the first preset height and the second preset height may be set based on actual requirements, which is not limited herein.

In a specific application scenario, the bonding pad may be metalized by electroplating, so as to thicken the bonding pad. In another specific application scenario, the bonding pad may also be thickened by soldering a metal base on the bonding pad. And are not limited herein.

Step S14: and removing the residual first conductive layer to prepare the embedded circuit type circuit board.

And after the welding disc is thickened, removing the residual first conductive layer to expose other circuit patterns of the circuit layer so as to prepare the embedded circuit type circuit board.

Through the steps, according to the preparation method of the circuit board embedded with the circuit, after the plate to be processed, one side of which is attached to the first conducting layer, is obtained, the first conducting layer corresponding to the pad in the circuit layer is removed, then the pad is metalized until the thickness of the pad meets the preset requirement, and finally the remaining first conducting layer is removed to prepare the circuit board embedded with the circuit, so that the thickness of the pad can be increased, the contact area between the pad and a subsequent welding object is increased, and the welding quality between the pad and the subsequent welding object is further ensured.

Referring to fig. 2, fig. 2 is a schematic flow chart of another embodiment of a method for manufacturing a buried circuit board according to the present invention.

Step S21: obtaining a substrate, wherein first conducting layers are respectively formed on two opposite sides of the substrate, circuit boards at least comprising two circuit layers and dielectric layers which are sequentially stacked and attached are respectively prepared on the first conducting layers on the two opposite sides of the substrate, and dividing the substrate to obtain two plates to be processed.

And obtaining a substrate, wherein first conductive layers are respectively formed on two opposite sides of the substrate. The substrate is used for supporting the preparation of the embedded circuit type circuit board.

In a specific embodiment, a substrate including a first conductive layer, a base layer, and a first conductive layer that are sequentially stacked and attached to each other may be obtained, where the base layer and the first conductive layer in the application scenario are arranged in a peelable manner.

In another specific embodiment, a substrate including a first conductive layer, a second conductive layer, a base layer, a second conductive layer, and a first conductive layer, which are sequentially stacked and attached, may be obtained; the first conductive layer and the corresponding second conductive layer are fixed through gluing so as to be capable of being stripped and fixed.

Referring to fig. 3, fig. 3 is a schematic structural diagram of an embodiment of the substrate in the embodiment of fig. 2.

The substrate 10 of the present embodiment includes a first conductive layer 13, a second conductive layer 12, a base layer 11, a second conductive layer 12, and a first conductive layer 13, which are stacked and attached in this order.

The substrate 10 may include a prepreg or a resin layer, the base layer 11 and the second conductive layer 12 may be fixed by resin lamination, and the second conductive layer 12 may be fixed to the first conductive layer 13 by gluing, so as to facilitate subsequent separation.

The thickness of the first conductive layer 13 is in a range of 2-8 micrometers, and specifically may be 2 micrometers, 2.5 micrometers, 3 micrometers, 4.2 micrometers, 5 micrometers, 6 micrometers, 7 micrometers, 8 micrometers, and so on; and the thickness of the second conductive layer 12 ranges from 13 to 23 microns, specifically 13 microns, 15 microns, 17 microns, 19 microns, 20 microns, 22 microns, 23 microns, and the like. The thicker second conductive layer 12 is used to provide rigid support for the substrate 10 so as to prepare a board to be processed on the substrate 10, and the first conductive layer 13 is used as a primer layer for preparing a wiring layer on the substrate 10 so as to facilitate plating adhesion.

In a specific application scenario, the step of respectively preparing the circuit board including at least two circuit layers and one dielectric layer sequentially stacked and attached to the first conductive layers on the two opposite sides of the substrate may include: a first circuit layer can be respectively prepared on the first conductive layers on two opposite sides of the substrate; pressing a dielectric layer on one side of the first circuit layer, which is far away from the substrate, and preparing a second circuit layer on one side of the dielectric layer, which is far away from the substrate; and repeatedly laminating the dielectric layer and preparing the circuit layer until the circuit board meets the preset condition.

Specifically, a dielectric layer and a copper foil can be laminated on one side of the first circuit layer, which is far away from the substrate, and a second circuit layer is prepared on one side of the dielectric layer, which is far away from the substrate; and repeatedly laminating the dielectric layer and preparing the circuit layer until the thickness and the performance of the circuit board meet preset requirements. The preset conditions of the thickness and the performance of the circuit board are set based on actual requirements, and are not limited herein.

In a specific application scenario, two circuit layers and one dielectric layer are prepared as an example: attaching a dry film on the first conductive layer on two opposite sides of the substrate, exposing and developing, and electroplating to prepare a first circuit layer on the first conductive layer; and pressing a dielectric layer on one side of the first circuit layer, which is far away from the first conductive layer, after the first circuit layer is prepared. When the dielectric layer is pressed, because the dielectric layer is melted during high-temperature pressing, a copper foil layer is arranged on one side of the dielectric layer, which is far away from the first circuit layer, so that the pressing force is facilitated. After lamination, the dielectric layer may be first drilled and metallized to prepare a via hole, and then the same process is performed on the side of the dielectric layer away from the first circuit layer: and pasting a dry film, exposing and developing, and electroplating to prepare a second circuit layer on one side of the dielectric layer far away from the first circuit layer so as to finish the step of adding layers, wherein the copper foil layer used in the laminating process can also be used as a priming layer in the electroplating process, so that the preparation efficiency and quality of the second circuit layer are improved. In other application scenarios, when more layers of layer-adding steps are required, the layer-adding steps of each layer are similar to those described above, and are not described herein again.

And after the layer adding is finished, separating the first conducting layer from the corresponding second conducting layer to obtain two plates to be processed. Wherein, one side of waiting to process the plate sets up with the laminating of first conducting layer, and waits that the circuit layer that one side of processing the plate formed is wrapped up by the dielectric layer and the first conducting layer of waiting to process the plate.

Referring to fig. 4, fig. 4 is a schematic structural diagram of a subsequent embodiment of the substrate build-up in the embodiment of fig. 2.

A circuit layer and a dielectric layer are formed on the first conductive layer 13 on at least one side of the built-up substrate 10, and are sequentially stacked and bonded.

The plate 100 to be processed can be obtained by separating the first conductive layer 13 of the substrate from the corresponding second conductive layer 12.

Referring to fig. 5, fig. 5 is a schematic structural diagram of an embodiment of a plate to be processed in step S21 in the embodiment of fig. 2.

The board 100 to be processed in this embodiment includes a first conductive layer 13, a first circuit layer 102, a second circuit layer 103, a dielectric layer 104, and a copper foil layer 1031.

The first conductive layer 13, the first circuit layer 102, the dielectric layer 104, the copper foil layer 1031, and the second circuit layer 103 are sequentially stacked and attached, wherein the dielectric layer 104 fills the gaps between the first circuit layer 102, and the dielectric layer 104 does not fill the gaps between the second circuit layer 103.

The first wiring layer 102 and the second wiring layer 103 are electrically connected by a via hole.

The copper foil layer 1031 is used for pressing a plate when the dielectric layer 104 is pressed, and is also convenient to be used as a bottom layer for electroplating when the second circuit layer 103 is prepared, so that metal adhesion is convenient.

Step S22: attaching a corrosion resistant film to a first preset position of the first conductive layer, wherein the first preset position does not correspond to the bonding pad; and etching the exposed first conductive layer to remove the first conductive layer corresponding to the bonding pad in the circuit layer.

And after the plate to be processed is obtained, attaching the corrosion-resistant film to a first preset position of the first conducting layer, wherein the first preset position does not correspond to the pad, namely, the corrosion-resistant film is attached to the first conducting layer except the corresponding position of the pad, so that the first conducting layer corresponding to the pad is exposed. The position corresponding to the bonding pad comprises the bonding pad and a circuit which is connected with the bonding pad and is close to the bonding pad.

And etching the exposed first conductive layer to remove the first conductive layer corresponding to the bonding pad in the circuit layer so as to expose the bonding pad. After the etching is completed, the resist film is removed.

Referring to fig. 6, fig. 6 is a schematic structural diagram of an embodiment of a plate to be processed in step S22 in the embodiment of fig. 2.

The board 100 to be processed in this embodiment includes a first conductive layer 13, a first circuit layer 102, a second circuit layer 103, a copper foil layer 1031, and a dielectric layer 104. In the board 100 to be processed of the present embodiment, on the basis of the board 100 to be processed of the embodiment shown in fig. 4, the first conductive layer 13 exposes a position corresponding to the pad 1021 in the first circuit layer 102.

Step S23: the method comprises the following steps of (1) enabling an anti-plating film to be arranged at a second preset position where a first conducting layer is attached, wherein the second preset position does not correspond to a bonding pad, and the range of the second preset position is larger than that of the first preset position; and metallizing the exposed bonding pad by using the first conductive layer until the thickness of the bonding pad meets the preset requirement.

And attaching the anti-plating film to a second preset position of the first conducting layer, wherein the second preset position does not correspond to the bonding pad, namely the anti-plating film is exposed out of the position corresponding to the bonding pad, but the range of the second preset position is larger than that of the first preset position, so that the condition of short circuit between newly added metal and the first conducting layer in the subsequent metallization process is prevented, and the structural stability of the plate is further improved. The position corresponding to the bonding pad comprises the bonding pad and a circuit which is connected with the bonding pad and is close to the bonding pad.

Referring to fig. 7, fig. 7 is a schematic structural diagram of the embodiment after the plate to be processed is covered with the plating resist in step S23 in the embodiment of fig. 2.

On the basis of the board to be processed in fig. 5, in the board to be processed 100 of this embodiment, the plating-resistant film 301 is attached to the first conductive layer 13, and the coverage area of the plating-resistant film 301 is larger than the area of the first conductive layer 13, so that the plating-resistant film 301 protects the first conductive layer 13 from being interfered by a metallization process in a subsequent metallization process, and a short circuit is avoided.

And after the anti-coating film is covered, the exposed bonding pad is metallized by using the first conducting layer until the thickness of the bonding pad meets the preset requirement. The preset requirement is that the thickness of the bonding pad generally protrudes out of the dielectric layer, so that the bonding pad cannot be recessed into the dielectric layer after subsequent etching, and the reliability of welding between the bonding pad and an external structure can be guaranteed. The specific pad thickness that is preset to be required is set based on practical situations, for example: 10 microns, 20 microns, 35 microns, and the like, and the details are not limited herein.

And after the electroplating is finished, removing the plating resistant film.

The metallization of the embodiment may include electroplating, and during the electroplating, the remaining first conductive layer may be used as a conductive tool during the electroplating, so as to conduct current to the pad or a circuit connected to the pad near the pad, thereby completing the thickening of the pad.

Step S24: and removing the residual first conductive layer by etching to expose the circuit layer so as to prepare the embedded circuit type circuit board.

After metallization, the residual first conductive layer and the copper foil layer which is not corresponding to the circuit pattern on the outer side of the plate are removed through etching, the circuit layer on one side of the plate is exposed, and the circuit layers on the other side of the plate are mutually independent, so that the embedded circuit type circuit board is prepared.

Since the pad is thickened in step S23, the thickness of the pad is not recessed in the dielectric layer due to the previous thickening in the etching, so that the bonding quality is not affected by the pad being recessed in the dielectric layer in the bonding process with the pad.

And because the circuit pattern of the second circuit layer is not thickened and may be recessed in the dielectric layer, but the circuit pattern does not bear the function of external welding, the function of the circuit pattern is not affected.

After the first conducting layer is removed, ink resistance welding can be carried out on the two opposite sides of the plate, so that insulation protection is carried out on the two opposite sides of the plate. Specifically, the bonding pads and other circuit patterns needing external connection can be exposed, and other positions needing no external connection are covered by the ink.

Through the steps, according to the preparation method of the circuit board embedded with the circuit, after the plate to be processed, one side of which is attached to the first conducting layer, is obtained, the first conducting layer corresponding to the pad in the circuit layer is removed, then the pad is metalized until the thickness of the pad meets the preset requirement, and finally the remaining first conducting layer is removed to prepare the circuit board embedded with the circuit, so that the thickness of the pad can be increased, the contact area between the pad and a subsequent welding object is increased, and the welding quality between the pad and the subsequent welding object is further ensured. In addition, in the embodiment, a part of the first conductive layer is remained before metallization, and the remaining first conductive layer can be used as a conductive tool in electroplating to conduct current to the pad or a circuit connected with the pad near the pad, so that the pad is thickened, and extra arrangement of an electroplating conductive device is reduced.

Referring to fig. 8, fig. 8 is a schematic structural diagram of an embodiment of a circuit board with embedded wires according to the invention. The present embodiment is described with the number of the circuit layers being two, and the structure is similar to that of the present embodiment when the number of the circuit layers is multiple.

The embedded circuit board 200 of the present embodiment sequentially includes a first circuit layer 201, a dielectric layer 202, and a second circuit layer 203.

The side of the pad 2011 on the first circuit layer 201 on one side of the embedded circuit board 200, which is away from the embedded circuit board 200, is exposed, and one side of the exposed pad 2011 is not recessed in the dielectric layer 202. Specifically, the exposed pads 2011 may be flush with the dielectric layer 202, or the pads 2011 may protrude from the dielectric layer 202.

The two opposite sides of the embedded circuit board 200 are also covered with solder mask layers 204, and the solder mask layers 204 cover part of the circuit layers for insulation protection.

Through the structure, the embedded line type circuit board can improve the contact area between the bonding pad and a subsequent welding object through the bonding pad which is not concave in the dielectric layer, and further guarantee the welding quality between the bonding pad and the subsequent welding object.

The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes performed by the present specification and drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.

Claims

1. A method for manufacturing a circuit-embedded circuit board is characterized by comprising the following steps:

obtaining a plate to be processed, wherein one side of the plate to be processed is attached to a first conductive layer, and a circuit layer formed on one side of the plate to be processed is wrapped by a dielectric layer of the plate to be processed and the first conductive layer;

removing the first conducting layer corresponding to the bonding pad in the circuit layer;

metalizing the bonding pad until the thickness of the bonding pad meets a preset requirement;

removing the residual first conductive layer to prepare the embedded circuit type circuit board;

the step of removing the first conductive layer corresponding to the pad in the circuit layer includes:

attaching a corrosion resistant film to a first preset position of the first conductive layer, wherein the first preset position does not correspond to the bonding pad;

etching the exposed first conductive layer to remove the first conductive layer corresponding to the bonding pad in the circuit layer;

the step of metalizing the bonding pad until the thickness of the bonding pad meets a preset requirement comprises the following steps:

attaching an anti-plating film to a second preset position of the first conducting layer, wherein the second preset position does not correspond to the bonding pad, and the range of the second preset position is larger than that of the first preset position;

and conducting current to the exposed bonding pad by using the first conductive layer as an electroplating tool to carry out electroplating until the thickness of the bonding pad meets the preset requirement.

2. The method of manufacturing a circuit board according to claim 1, wherein the step of removing the remaining first conductive layer to manufacture the circuit board comprises:

and removing the rest of the first conductive layer by etching, and exposing the circuit layer to prepare the embedded circuit type circuit board.

3. The method for manufacturing a circuit board with embedded wires according to claim 1, wherein the step of obtaining the board to be processed comprises:

obtaining a substrate, wherein first conducting layers are respectively formed on two opposite sides of the substrate;

respectively preparing circuit boards at least comprising two circuit layers and a dielectric layer which are sequentially stacked and attached on the first conductive layers on the two opposite sides of the substrate;

and dividing the substrate to obtain two plates to be processed.

4. The method of claim 3, wherein the step of respectively forming a circuit board including at least two circuit layers and a dielectric layer sequentially stacked and attached to the first conductive layers on opposite sides of the substrate comprises:

respectively preparing a first circuit layer on the first conductive layers on the two opposite sides of the substrate;

pressing a dielectric layer on one side of the first circuit layer, which is far away from the substrate, and preparing a second circuit layer on one side of the dielectric layer, which is far away from the substrate;

and repeatedly pressing the dielectric layer and preparing the circuit layer until the circuit board meets the preset condition.

5. The method for manufacturing a buried wiring circuit board according to claim 3, wherein said step of obtaining the substrate includes:

obtaining a substrate comprising a first conductive layer, a second conductive layer, a base layer, a second conductive layer and a first conductive layer which are sequentially stacked and attached;

the first conducting layer and the corresponding second conducting layer are fixed through gluing.

6. The method of claim 5, wherein the step of dividing the substrate into two plates to be processed comprises:

and separating the first conducting layer from the corresponding second conducting layer to obtain two plates to be processed.

7. The method for producing a buried wiring circuit board according to claim 5,

the thickness range of the first conductive layer is 2-8 microns;

the second conductive layer has a thickness in the range of 13-23 microns.

8. The circuit board with the embedded circuit is characterized by comprising a circuit layer and a dielectric layer which are sequentially stacked and attached;

one side of a bonding pad on the circuit layer at one side of the embedded circuit type circuit board, which is far away from the embedded circuit type circuit board, is exposed, and one side of the exposed bonding pad is not recessed in the dielectric layer;

the preparation method of the embedded circuit type circuit board comprises the following steps:

and conducting current to the exposed bonding pad for electroplating by using the first conductive layer as an electroplating tool until the thickness of the bonding pad meets the preset requirement, and removing the residual first conductive layer to prepare the embedded circuit type circuit board.