CN114899100A - Preparation method of vertical-structure GaN-based HEMT chip on strippable substrate - Google Patents

Preparation method of vertical-structure GaN-based HEMT chip on strippable substrate Download PDF

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CN114899100A
CN114899100A CN202210509084.6A CN202210509084A CN114899100A CN 114899100 A CN114899100 A CN 114899100A CN 202210509084 A CN202210509084 A CN 202210509084A CN 114899100 A CN114899100 A CN 114899100A
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substrate
epitaxial wafer
gan
hemt
layer
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张子辰
张普润
凌润瑶
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Jiangsu Vocational College of Information Technology
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    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
    • H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/7806—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices involving the separation of the active layers from a substrate
    • H01L21/7813—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices involving the separation of the active layers from a substrate leaving a reusable substrate, e.g. epitaxial lift off
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
    • H01L29/7787—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT with wide bandgap charge-carrier supplying layer, e.g. direct single heterostructure MODFET
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    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Abstract

The invention relates to the technical field of vertical structure High Electron Mobility (HEMT) chips, in particular to a preparation method of a vertical structure GaN-based HEMT chip on a strippable substrate. The non-conductive peelable substrate is then replaced with a conductive substrate via a temporary substrate, and an electrode metal is evaporated on the conductive substrate as a drain. And etching the p-type GaN cap layer into a grid pattern by a standard photoetching process and an inductive coupling plasma etching process. Then evaporating and etching the surface of the epitaxial wafer to form a source electrode and a grid electrodeA polar pattern. Deposition of SiO between source and gate by plasma enhanced chemical vapor deposition 2 And finally, the GaN-based HEMT chip with the complete vertical structure is manufactured as a passivation layer.

Description

Preparation method of vertical-structure GaN-based HEMT chip on strippable substrate
Technical Field
The invention relates to the field of vertical structure High Electron Mobility (HEMT) chips, in particular to a preparation method of a vertical structure GaN-based HEMT chip on a strippable substrate.
Background
Si-based semiconductor power devices have been the main material of the semiconductor industry through decades of development. However, with the intensive development of various Si-based chips, chip performance has gradually approached the material limit. Therefore, third-generation semiconductor materials, such as GaN and SiC, have attracted much attention because of their characteristics, such as a large forbidden band width, high electron mobility, high thermal conductivity, and good high-frequency characteristics.
Two-dimensional electron gas (2 DEG) generated at a heterojunction of a High Electron Mobility Transistor (HEMT) chip prepared on the basis of a GaN material has the characteristics of high electron concentration, high saturation mobility and the like, so that the HEMT chip is expected to replace the traditional Si-based field effect transistor in the fields of high frequency, high voltage and high power.
The conventional HEMT device mainly adopts an AlGaN film epitaxially grown on a GaN film. The GaN film and the AlGaN film have spontaneous polarization effect, and the AlGaN film has piezoelectric polarization effect, so that two-dimensional electron gas is generated on the GaN side of the interface. After a source electrode, a grid electrode and a drain electrode are respectively prepared on the AlGaN film, when the grid voltage is higher than a threshold voltage, electrons flow from the source electrode to the drain electrode through a two-dimensional electron gas channel. A so-called lateral structure HEMT device. However, due to structural design reasons, the lateral HEMT device is inevitably affected by buffer layer leakage and gate-drain separation, resulting in a lower device breakdown voltage. Although the breakdown voltage can be improved by buffer layer structure optimization, gate field plate technology and other methods, the nature of the lateral structure of the HEMT chip is not changed, and the effect can only be reduced and cannot be completely avoided.
Disclosure of Invention
In view of the above situation, in order to overcome the defects of the prior art, the present invention aims to provide a method for manufacturing a vertical structure GaN-based HEMT chip on a peelable substrate, which has the advantages of low cost, simple process, small device size, high breakdown voltage, etc.
Firstly, growing HEMT epitaxial wafer on a strippable substrate, which comprises a GaN buffer layer grown on the strippable substrate, an undoped GaN layer grown on the GaN buffer layer, and an undoped G layer grown on the undoped GaN AlGaN barrier layer on the aN layer, and a p-type doped GaN cap layer grown on the AlGaN barrier layer. The peelable substrate has a (111) plane as an epitaxial plane. The thickness of the GaN buffer layer is 20-60 nm; the thickness of the non-doped GaN layer is 100-1000 nm; the thickness of the AlGaN barrier layer is 15-55 nm; the thickness of the p-type doped GaN cap layer is 10-40 nm, and the doping concentration is 1 multiplied by 10 18 cm -3 ~8×10 18 cm -3 。
Subsequently, a transfer support substrate is temporarily bonded to the surface of the p-type GaN substrate by means of gluing. And stripping the original non-conductive growth substrate by using thinning, etching or laser stripping methods, and exposing the GaN buffer layer. And then, sequentially evaporating Ni/Au alloy metal on the surface of the GaN buffer layer by using an electron beam evaporation technology, and then combining the conductive substrate to the surface of the GaN buffer layer in a high-temperature bonding mode. And finally, stripping the transfer support substrate by using a photoresist stripping technology so as to realize the replacement of the growth substrate of the HEMT epitaxial wafer, and finally evaporating electrode metal on the surface of the transferred epitaxial wafer substrate to be used as a drain electrode.
And then, preparing a grid pattern on the surface of the p-type GaN by standard photoetching processes such as photoresist uniformizing, photoetching and developing, and removing the p-type GaN film in the other uncovered area by using an inductively coupled plasma etching process. And then combining the standard photoetching process with an electron beam evaporation technology to respectively prepare a source electrode and a grid electrode on the surface of the chip. And finally, depositing a passivation layer between the source electrode and the grid electrode by combining a standard photoetching process and a chemical vapor deposition technology, and finally forming the complete GaN-based HEMT chip with the vertical structure.
The technical purpose of the invention is realized by the following technical scheme:
the preparation method of the vertical structure GaN-based HEMT chip on the strippable substrate comprises the following steps:
(1) growing an HEMT epitaxial wafer on a strippable substrate, wherein the HEMT epitaxial wafer comprises a GaN buffer layer grown on the strippable substrate, an undoped GaN layer grown on the GaN buffer layer, an AlGaN barrier layer grown on the undoped GaN layer, and a p-type doped GaN cap layer grown on the AlGaN barrier layer;
(2) putting the HEMT epitaxial wafer obtained in the step (1) into acetone, ethanol solution and deionized water in sequence for ultrasonic treatment, taking out, cleaning with deionized water, and drying with high-purity nitrogen;
(3) coating high-temperature bonding glue on the surface of the cleaned HEMT epitaxial wafer, aligning the epitaxial wafer coated with the glue with the temporary transfer support substrate, and placing the epitaxial wafer and the temporary transfer support substrate together under a bonding machine for high-temperature bonding;
(4) thinning the primary growth substrate by using a thinning machine, and then stripping the primary growth substrate by using a chemical etching or laser stripping technology according to different epitaxial growth substrates, and exposing the surface of the GaN buffer layer;
(5) preparing a conductive support substrate, evaporating Ni/Au metal on the surface of the exposed GaN buffer layer and the surface of the conductive substrate, placing the support substrate in a bonding machine for alignment, and bonding at high temperature;
(6) stripping the temporary transfer support substrate by using a degumming machine, sequentially placing the HEMT epitaxial wafer of the new substrate in acetone, ethanol solution and deionized water for ultrasonic treatment, cleaning the HEMT epitaxial wafer by using the deionized water after taking out, drying the HEMT epitaxial wafer by using high-purity nitrogen after cleaning, and exposing the surface of the p-type GaN cap layer;
(7) coating photoresist on the cleaned HEMT epitaxial wafer, then placing the epitaxial wafer coated with the photoresist in a photoetching machine for exposure, and finally soaking the exposed epitaxial wafer in a developing solution;
(8) etching a grid pattern on the surface of the p-type GaN cap layer by utilizing inductive coupling plasma etching;
(9) then coating photoresist on the surface of the p-type GaN cap layer, exposing in a photoetching machine, and putting the exposed epitaxial wafer into a developing solution;
(10) preparing an electrode for the HEMT epitaxial wafer: putting the HEMT epitaxial wafer coated with the photoresist into an electron beam evaporation device, vacuumizing an evaporation cavity, sequentially evaporating electrode metal, and annealing a chip after evaporation is finished;
(11) preparing grid and source electrode patterns on the surface of the p-type GaN cap layer by adopting a blue film stripping process, and evaporating a metal electrode on the back of the conductive substrate for preparing a drain electrode;
(12) plasma enhanced chemical vapor deposition on the surface of a p-type GaN substratePreparing a silicon dioxide passivation layer by a product method, and then using the steps of photoresist homogenizing, photoetching, developing and the like to prepare SiO on the electrode pattern on the surface of the chip 2 Exposing the film;
(13) using a wet etching method to expose the SiO 2 And etching off the substrate to finally obtain the vertical-structure GaN-based HEMT chip on the conductive substrate.
Further, the peelable substrate in the step (1) is a Si substrate or a sapphire substrate, and a (100) plane is used as an epitaxial plane; the thickness of the GaN buffer layer is 10-200 nm; the thickness of the non-doped GaN layer is 100-1000 nm; the thickness of the AlGaN barrier layer is 15-55 nm; the thickness of the p-type doped GaN cap layer is 10-40 nm, and the doping concentration is 1 multiplied by 10 18 cm -3 ~8×10 18 cm -3 。
In conclusion, the invention has the following beneficial effects:
(1) compared with a horizontal structure, the chip buffer layer is used as an electron drift motion channel, and the problem of horizontal leakage of the buffer layer is solved essentially.
(2) The drain electrode is positioned on the back surface of the chip, so that the idle breakdown voltage between the grid and the drain is effectively avoided, the breakdown voltage of the chip is effectively improved, and the size of the chip can be reduced.
(3) In the invention, electrons flow in the whole chip, and compared with a transverse structure which only flows in the horizontal direction, the chip power can be effectively improved, the channel temperature is reduced, and the chip reliability is improved.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, and are not to be considered limiting of the invention, in which:
fig. 1 is a schematic cross-sectional view of a vertical-structure HEMT chip prepared in example 1.
Detailed Description
The foregoing and other technical and scientific aspects, features and utilities of the present invention will be apparent from the following detailed description of the embodiments, which is to be read in connection with the accompanying drawings of fig. 1. The structural contents mentioned in the following embodiments are all referred to the attached drawings of the specification.
Exemplary embodiments of the present invention will be described below with reference to the accompanying drawings.
Example 1
The preparation method of the vertical structure GaN-based HEMT chip on the strippable substrate comprises the following steps:
(1) growing a HEMT epitaxial wafer on a (111) surface of a Si substrate by adopting a metal oxide chemical vapor deposition process, wherein the HEMT epitaxial wafer comprises a GaN buffer layer grown on the Si substrate, and the thickness of the GaN buffer layer is 20 nm; a non-doped GaN layer grown on the GaN buffer layer and having a thickness of 230 nm; an AlGaN barrier layer grown on the undoped GaN layer and having a thickness of 15 nm; a p-type doped GaN cap layer grown on the AlGaN barrier layer, with a thickness of 10 nm and a doping concentration of 1 × 10 18 cm -3 。
(2) And (3) sequentially placing the HEMT epitaxial wafer in acetone for 5 minutes, carrying out ultrasonic treatment in absolute ethyl alcohol for 5 minutes, carrying out ultrasonic treatment in deionized water for 5 minutes, taking out, cleaning with deionized water, and drying with high-purity nitrogen.
(3) And spin-coating high-temperature bonding glue on the surface of the cleaned HEMT epitaxial wafer, wherein the rotation speed is 3500 rpm. And aligning the epitaxial wafer coated with the glue with the temporary transfer support substrate, and placing the epitaxial wafer and the temporary transfer support substrate together under a bonding machine for high-temperature bonding.
(4) And thinning the primary long substrate by using a thinning machine, corroding the primary Si substrate by using a mixed solution of hydrofluoric acid, glacial acetic acid and nitric acid, and exposing the surface of the GaN buffer layer.
(5) Preparing an n-type doped Si (100) conductive substrate, evaporating Ni/Sn metal on the surface of the exposed GaN buffer layer and the surface of the conductive substrate, placing the conductive substrate in a bonding machine for alignment, and bonding at a high temperature of 250 ℃.
(6) And stripping the temporary transfer support substrate by using a degumming machine, and sequentially putting the HEMT epitaxial wafer of the new substrate in acetone, ethanol solution and deionized water for ultrasonic treatment for 5 minutes. And taking out, washing with deionized water, drying with high-purity nitrogen after washing, and exposing the surface of the p-type GaN cap layer.
(7) Coating photoresist on the cleaned HEMT epitaxial wafer, then placing the epitaxial wafer coated with the photoresist in a photoetching machine for exposure, and finally soaking the exposed epitaxial wafer in a developing solution;
(8) and etching a grid pattern on the surface of the p-type GaN cap layer by utilizing inductively coupled plasma etching.
(9) And then coating photoresist on the surface of the p-type GaN cap layer, exposing in a photoetching machine, and putting the exposed epitaxial wafer into a developing solution.
(10) Preparing an electrode for the HEMT epitaxial wafer: putting the HEMT epitaxial wafer coated with the photoresist into an electron beam evaporation device, vacuumizing an evaporation cavity, sequentially evaporating electrode metal Cr/Pt/Au, and annealing the chip after evaporation, wherein the annealing temperature is 400 ℃ and the annealing time is 2 minutes;
(11) and preparing grid and source electrode patterns on the surface of the p-type GaN cap layer by adopting a blue film stripping process. And evaporating metal Ti with the thickness of 500 nm on the back of the conductive substrate for preparing the drain electrode.
(12) And preparing a silicon dioxide passivation layer on the surface of the p-type GaN substrate by using a plasma enhanced chemical vapor deposition method, wherein the deposition thickness is 2000 nm. Then, the steps of photoresist uniformizing, photoetching, developing and the like are used for forming SiO on the electrode pattern on the surface of the chip 2 Exposing the film;
(13) using a wet etching method to expose the SiO 2 And etching to obtain the vertical-structure GaN-based HEMT chip on the conductive substrate.
As shown in fig. 1, the vertical structure GaN-based HEMT chip prepared in this embodiment includes a drain electrode 1, a Si (100) conductive substrate 2 on the drain electrode 1, a GaN buffer layer 3 on the Si (100) conductive substrate 2, an undoped GaN layer 4 on the GaN buffer layer 3, an AlGaN barrier layer 5 on the undoped GaN layer, a source electrode 6 and a p-type GaN cap layer 7 on the AlGaN barrier layer 5, and a gate electrode 8 on the p-type GaN cap layer 7.
Example 2
The preparation method of the vertical structure GaN-based HEMT chip on the strippable substrate comprises the following steps:
(1) by means of metal oxygenThe HEMT epitaxial wafer comprises a GaN buffer layer grown on a Si substrate, wherein the thickness of the GaN buffer layer is 40 nm; an undoped GaN layer grown on the GaN buffer layer and having a thickness of 430 nm; an AlGaN barrier layer grown on the undoped GaN layer and having a thickness of 20 nm; a p-type doped GaN cap layer grown on the AlGaN barrier layer, with a thickness of 16 nm and a doping concentration of 3 × 10 18 cm -3 。
(2) And (3) sequentially placing the HEMT epitaxial wafer in acetone for 3 minutes, carrying out ultrasonic treatment in absolute ethyl alcohol for 3 minutes, carrying out ultrasonic treatment in deionized water for 5 minutes, taking out, cleaning with deionized water, and drying with high-purity nitrogen.
(3) And spin-coating high-temperature bonding glue on the surface of the cleaned HEMT epitaxial wafer, wherein the rotation speed is 3000 rpm. And aligning the epitaxial wafer coated with the glue with the temporary transfer support substrate, and placing the epitaxial wafer and the temporary transfer support substrate together under a bonding machine for high-temperature bonding.
(4) And stripping the sapphire substrate by using a laser stripping technology, and exposing the surface of the GaN buffer layer.
(5) Preparing an n-type doped Si (100) conductive substrate, evaporating Ni/Sn metal on the surface of the exposed GaN buffer layer and the surface of the conductive substrate, placing the substrate in a bonding machine for alignment, and bonding at a high temperature of 280 ℃.
(6) And stripping the temporary transfer support substrate by using a degumming machine, and sequentially putting the HEMT epitaxial wafer of the new substrate in acetone, ethanol solution and deionized water for ultrasonic treatment, wherein the cleaning and ultrasonic treatment time is 3 minutes. And taking out, washing with deionized water, drying with high-purity nitrogen after washing, and exposing the surface of the p-type GaN cap layer.
(7) Coating photoresist on the cleaned HEMT epitaxial wafer, then placing the epitaxial wafer coated with the photoresist in a photoetching machine for exposure, and finally soaking the exposed epitaxial wafer in a developing solution;
(8) and etching a grid pattern on the surface of the p-type GaN cap layer by utilizing inductively coupled plasma etching.
(9) And then coating photoresist on the surface of the p-type GaN cap layer, exposing in a photoetching machine, and putting the exposed epitaxial wafer into a developing solution.
(10) Preparing an electrode for the HEMT epitaxial wafer: putting the HEMT epitaxial wafer coated with the photoresist into an electron beam evaporation device, vacuumizing an evaporation cavity, sequentially evaporating electrode metal Cr/Pt/Au, and annealing the chip after evaporation, wherein the annealing temperature is 350 ℃ and the annealing time is 3 minutes;
(11) and preparing grid and source electrode patterns on the surface of the p-type GaN cap layer by adopting a blue film stripping process. And (3) evaporating metal Ti with the thickness of 400 nm on the back of the conductive substrate for preparing the drain electrode.
(12) And preparing a silicon dioxide passivation layer on the surface of the p-type GaN substrate by using a plasma enhanced chemical vapor deposition method, wherein the deposition thickness is 2200 nm. Then, the steps of photoresist uniformizing, photoetching, developing and the like are used for forming SiO on the electrode pattern on the surface of the chip 2 Exposing the film;
(13) using a wet etching method to expose the SiO 2 And etching off the substrate to finally obtain the vertical-structure GaN-based HEMT chip on the conductive substrate.
Example 3
The preparation method of the vertical structure GaN-based HEMT chip on the strippable substrate comprises the following steps:
(1) growing a HEMT epitaxial wafer on a sapphire substrate by adopting a metal oxide chemical vapor deposition process, wherein the HEMT epitaxial wafer comprises a GaN buffer layer grown on a Si substrate, and the thickness of the GaN buffer layer is 50 nm; the non-doped GaN layer grows on the GaN buffer layer, and the thickness of the non-doped GaN layer is 530 nm; an AlGaN barrier layer grown on the undoped GaN layer and having a thickness of 25 nm; a p-type doped GaN cap layer grown on the AlGaN barrier layer, with a thickness of 20 nm and a doping concentration of 5 × 10 18 cm -3 。
(2) And (3) sequentially placing the HEMT epitaxial wafer in acetone for 6 minutes, carrying out ultrasonic treatment in absolute ethyl alcohol for 6 minutes, carrying out ultrasonic treatment in deionized water for 5 minutes, taking out, washing with the deionized water, and drying with high-purity nitrogen.
(3) And spin-coating high-temperature bonding glue on the surface of the cleaned HEMT epitaxial wafer, wherein the rotation speed is 3200 rpm. And aligning the epitaxial wafer coated with the glue with the temporary transfer support substrate, and jointly placing the epitaxial wafer and the temporary transfer support substrate under a bonding machine for high-temperature bonding.
(4) And stripping the sapphire substrate by using a laser stripping technology, and exposing the surface of the GaN buffer layer.
(5) Preparing an n-type doped Si (100) conductive substrate, evaporating Ni/Sn metal on the surface of the exposed GaN buffer layer and the surface of the conductive substrate, placing the conductive substrate in a bonding machine for alignment, and bonding at a high temperature of 270 ℃.
(6) And stripping the temporary transfer support substrate by using a degumming machine, and sequentially putting the HEMT epitaxial wafer of the new substrate in acetone, ethanol solution and deionized water for ultrasonic treatment for 6 minutes. And taking out, washing with deionized water, drying with high-purity nitrogen after washing, and exposing the surface of the p-type GaN cap layer.
(7) Coating photoresist on the cleaned HEMT epitaxial wafer, then placing the epitaxial wafer coated with the photoresist in a photoetching machine for exposure, and finally soaking the exposed epitaxial wafer in a developing solution;
(8) and etching a grid pattern on the surface of the p-type GaN cap layer by utilizing inductively coupled plasma etching.
(9) And then coating photoresist on the surface of the p-type GaN cap layer, exposing in a photoetching machine, and putting the exposed epitaxial wafer into a developing solution.
(10) Preparing an electrode for the HEMT epitaxial wafer: putting the HEMT epitaxial wafer coated with the photoresist into an electron beam evaporation device, vacuumizing an evaporation cavity, sequentially evaporating electrode metal Cr/Pt/Au, and annealing the chip after evaporation, wherein the annealing temperature is 330 ℃ and the annealing time is 2 minutes;
(11) and preparing grid and source electrode patterns on the surface of the p-type GaN cap layer by adopting a blue film stripping process. And evaporating metal Ti with the thickness of 700 nm on the back of the conductive substrate for preparing the drain electrode.
(12) And preparing a silicon dioxide passivation layer on the surface of the p-type GaN substrate by using a plasma enhanced chemical vapor deposition method, wherein the deposition thickness is 1500 nm. Then, the steps of photoresist uniformizing, photoetching, developing and the like are used for forming SiO on the electrode pattern on the surface of the chip 2 Exposing the film;
(13) using a wet processEtching method to expose SiO 2 And etching off the substrate to finally obtain the vertical-structure GaN-based HEMT chip on the conductive substrate.
The above embodiments are preferred embodiments of the present invention, but the present invention is not limited to the above embodiments, and any other changes, modifications, substitutions, combinations, and simplifications which do not depart from the spirit and principle of the present invention should be construed as equivalents thereof, and all such changes, modifications, substitutions, combinations, and simplifications are intended to be included in the scope of the present invention.

Claims (2)

1. The preparation method of the vertical structure GaN-based HEMT chip on the strippable substrate is characterized by comprising the following steps:
(1) growing an HEMT epitaxial wafer on a strippable substrate, wherein the HEMT epitaxial wafer comprises a GaN buffer layer grown on the strippable substrate, an undoped GaN layer grown on the GaN buffer layer, an AlGaN barrier layer grown on the undoped GaN layer, and a p-type doped GaN cap layer grown on the AlGaN barrier layer;
(2) putting the HEMT epitaxial wafer obtained in the step (1) into acetone, ethanol solution and deionized water in sequence for ultrasonic treatment, taking out, cleaning with deionized water, and drying with high-purity nitrogen;
(3) coating high-temperature bonding glue on the surface of the cleaned HEMT epitaxial wafer, aligning the epitaxial wafer coated with the glue with the temporary transfer support substrate, and placing the epitaxial wafer and the temporary transfer support substrate together under a bonding machine for high-temperature bonding;
(4) thinning the primary growth substrate by using a thinning machine, and then stripping the primary growth substrate by using a chemical etching or laser stripping technology according to different epitaxial growth substrates, and exposing the surface of the GaN buffer layer;
(5) preparing a conductive support substrate, evaporating Ni/Au metal on the surface of the exposed GaN buffer layer and the surface of the conductive substrate, placing the support substrate in a bonding machine for alignment, and bonding at high temperature;
(6) stripping the temporary transfer support substrate by using a degumming machine, sequentially placing the HEMT epitaxial wafer of the new substrate in acetone, ethanol solution and deionized water for ultrasonic treatment, cleaning the HEMT epitaxial wafer by using the deionized water after taking out, drying the HEMT epitaxial wafer by using high-purity nitrogen after cleaning, and exposing the surface of the p-type GaN cap layer;
(7) coating photoresist on the cleaned HEMT epitaxial wafer, then placing the epitaxial wafer coated with the photoresist in a photoetching machine for exposure, and finally soaking the exposed epitaxial wafer in a developing solution;
(8) etching a grid pattern on the surface of the p-type GaN cap layer by utilizing inductive coupling plasma etching;
(9) then coating photoresist on the surface of the p-type GaN cap layer, exposing in a photoetching machine, and putting the exposed epitaxial wafer into a developing solution;
(10) preparing an electrode for the HEMT epitaxial wafer: putting the HEMT epitaxial wafer coated with the photoresist into an electron beam evaporation device, vacuumizing an evaporation cavity, sequentially evaporating electrode metal, and annealing a chip after evaporation is finished;
(11) preparing grid and source electrode patterns on the surface of the p-type GaN cap layer by adopting a blue film stripping process, and evaporating a metal electrode on the back of the conductive substrate for preparing a drain electrode;
(12) preparing a silicon dioxide passivation layer on the surface of the p-type GaN substrate by using a plasma enhanced chemical vapor deposition method, and then using the steps of photoresist homogenizing, photoetching, developing and the like to form SiO on the electrode pattern on the surface of the chip 2 Exposing the film;
(13) using a wet etching method to expose the SiO 2 And etching off the substrate to finally obtain the vertical-structure GaN-based HEMT chip on the conductive substrate.
2. The method for manufacturing a vertical structure GaN-based HEMT chip on a peelable substrate according to claim 1, characterized in that: the peelable substrate in the step (1) is a Si substrate or a sapphire substrate, and a (100) plane is used as an epitaxial plane; the thickness of the GaN buffer layer is 10-200 nm; the thickness of the non-doped GaN layer is 100-1000 nm; the thickness of the AlGaN barrier layer is 15-55 nm; the thickness of the p-type doped GaN cap layer is 10-40 nm, and the doping concentration is 1 multiplied by 10 18 cm -3 ~8×10 18 cm -3 。
CN202210509084.6A 2022-05-10 2022-05-10 Preparation method of vertical-structure GaN-based HEMT chip on strippable substrate Withdrawn CN114899100A (en)

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