CN114895593B - Wake-up circuit, embedded single chip microcomputer and control method - Google Patents
Wake-up circuit, embedded single chip microcomputer and control method Download PDFInfo
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- CN114895593B CN114895593B CN202210514581.5A CN202210514581A CN114895593B CN 114895593 B CN114895593 B CN 114895593B CN 202210514581 A CN202210514581 A CN 202210514581A CN 114895593 B CN114895593 B CN 114895593B
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
- G05B19/0423—Input/output
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/21—Pc I-O input output
- G05B2219/21119—Circuit for signal adaption, voltage level shift, filter noise
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Abstract
The invention relates to a wake-up circuit, an embedded single chip microcomputer and a control method, and relates to the technical field of edge trigger wake-up circuits, wherein the wake-up circuit comprises a reset switch S1, a power supply VDD (voltage source device) end, a WKUP (voltage failure procedure) end, a KEY (KEY) end, an N-type MOS (metal oxide semiconductor) transistor Q1, a resistor R1, an N-type MOS transistor Q2, a resistor R2 and a resistor R3; the end of the power supply VDD is electrically connected with the N-type MOS tube Q1, one end of the N-type MOS tube Q1 is electrically connected with the resistor R1, and the other end of the N-type MOS tube Q1 is electrically connected with the N-type MOS tube Q2; the other two ends of the N-type MOS transistor Q2 are respectively connected with the resistor R3 and the ground, the other end of the resistor R3 is connected with the KEY end, the other end of the resistor R1 is connected with the WKUP end and the resistor R2, and the other end of the resistor R2 is grounded; one end of the reset switch S1 is electrically connected with the VDD end of the power supply, and the other end of the reset switch S1 is electrically connected with the KEY end. The advantages are that: the problems that the button switch is too single to wake up, the power consumption is high, and the applicability is poor are solved.
Description
Technical Field
The invention relates to the technical field of edge trigger wake-up circuits, in particular to a wake-up circuit, an embedded single chip microcomputer and a control method.
Background
The STM32 is a micro control chip which is mainstream on the market and has a very good power consumption control function. The sleep mode can be entered by an external interrupt or RTC when idle, resulting in lower power consumption. Since the low power mode can be entered, there is naturally a way to wake up from sleep page mode, and there are several ways to wake up STM32, which are WKUP pin rising edge, RTC alarm clock event, external reset of NRST pin, and IWDG reset. In practical applications, the WKUP pin rising edge wake-up is most widely used.
Typically, there is only one toggle button to control sleep and wake-up of the STM32, so that one toggle button can satisfy both sleep and wake-up conditions.
At present, the most common method for realizing dormancy and awakening by a switch button is to connect a WKUP pin and a dormancy IO port through a diode, pull down the WKUP by pressing the button switch to enable the dormancy IO port to obtain a low level signal to realize dormancy, and bounce the button switch to enable the WKUP to obtain a rising edge to awaken a chip.
As can be seen from the above-mentioned switch button controlled sleep-wake scheme, there are several problems:
1. after dormancy, the power consumption is large, after low-level dormancy, WKUP is in a constantly-pulled-down state, and extra power consumption always exists on a pull-up resistor of the pin.
2. The awakening mode is poor in single applicability, and other awakening modes such as communication awakening and other signal awakening cannot be achieved in the scheme.
The foregoing description is provided for general background information and does not necessarily constitute prior art.
Disclosure of Invention
The invention aims to provide a wake-up circuit, an embedded single chip microcomputer and a control method.
The invention provides a wake-up circuit which comprises a reset switch S1, a power supply VDD end, a WKUP end, a KEY end, an N-type MOS tube Q1, a resistor R1, an N-type MOS tube Q2, a resistor R2 and a resistor R3, wherein the reset switch S1 is connected with the power supply VDD end; the end of the power supply VDD is electrically connected with the N-type MOS tube Q1, one end of the N-type MOS tube Q1 is electrically connected with the resistor R1, and the other end of the N-type MOS tube Q1 is electrically connected with the N-type MOS tube Q2; the other two ends of the N-type MOS transistor Q2 are respectively connected with the resistor R3 and the ground, the other end of the resistor R3 is connected with the KEY end, the other end of the resistor R1 is connected with the WKUP end and the resistor R2, and the other end of the resistor R2 is grounded; one end of the reset switch S1 is electrically connected with the VDD end of the power supply, and the other end of the reset switch S1 is electrically connected with the KEY end.
Further, the S pole of the N-type MOS transistor Q1 is electrically connected to the VDD terminal, the D pole of the N-type MOS transistor Q1 is electrically connected to the resistor R1, the G pole of the N-type MOS transistor Q1 is electrically connected to the D pole of the N-type MOS transistor Q2, the G pole of the N-type MOS transistor Q2 is electrically connected to the resistor R3, and the S pole of the N-type MOS transistor Q2 is electrically connected to ground.
Furthermore, an ONWKUP terminal is electrically connected to a circuit of the N-type MOS transistor Q1 and the N-type MOS transistor Q2.
Furthermore, the ONWKUP end is connected with a collector of the optical coupling photosensitive triode, and an emitter of the optical coupling photosensitive triode is grounded; and two pins on one side of the light-emitting diode of the optocoupler U1 are connected with a CANH differential signal and a CANL differential signal.
Further, the reset switch S1 is grounded through a resistor R4.
Further, the reset switch S1 is a control sleep wake-up switch.
The invention also provides an embedded single chip microcomputer which comprises the wake-up circuit.
Further, the KEY end is an I0 port of the embedded single chip microcomputer, and the WKUP end is a WKUP pin of the embedded single chip microcomputer.
The invention also provides a control method which is applied to the wake-up circuit.
Further, the control method includes the steps of:
pressing a reset switch S1, enabling the voltage of a KEY end to be equal to the voltage of a power supply VDD end to be high level, and enabling the embedded single chip microcomputer to enter the sleep mode after N seconds;
pressing the reset switch S1 again for M seconds, wherein M is less than N, the N-type MOS tube Q2 is conducted, the G of the N-type MOS tube Q1 is at a low level, the N-type MOS tube Q1 is conducted, the voltage of the WKUP end is equal to x of a power supply VDD end (a resistor R1/a resistor R1+ a resistor R2), the WKUP end generates a rising edge, and the embedded single chip microcomputer is awakened;
and lifting the reset switch S1, disconnecting the N-type MOS tube Q1 and the N-type MOS tube Q2, wherein the KEY end is at a low level, and the WKUP end is at a low level.
The wake-up circuit provided by the invention controls the sleep and wake-up of the embedded single chip microcomputer by pressing the time length of the reset switch S1, has low power consumption, does not generate additional power consumption no matter the embedded single chip microcomputer is in sleep or wake-up, has stronger applicability and wide application, and can be externally connected with other circuits or control signals to ensure that the N-type MOS tube Q1 is conducted with the WKUP end to generate rising edge wake-up.
Drawings
Fig. 1 is a schematic diagram of a wake-up circuit according to embodiment 1 of the present invention.
Fig. 2 is a schematic flowchart of a control method provided in embodiment 1 of the present invention.
Fig. 3 is a schematic diagram of a communication wake-up circuit according to embodiment 2 of the present invention.
Reference numerals and components referred to in the drawings are as follows:
100. power supply VDD terminal
200. WKUP terminal
300. KEY terminal
400. ONWKUP terminal
Detailed Description
The following detailed description of embodiments of the present invention is provided in connection with the accompanying drawings and examples. The following examples are intended to illustrate the invention but are not intended to limit the scope of the invention.
The terms first, second, third, fourth and the like in the description and in the claims of the present invention are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order.
Example 1
Fig. 1 is a schematic diagram of a wake-up circuit according to embodiment 1 of the present invention. Referring to fig. 1, a wake-up circuit according to an embodiment of the present invention includes a reset switch S1, a power VDD terminal 100, a WKUP terminal 200, a KEY terminal 300, an N-type MOS transistor Q1, a resistor R1, an N-type MOS transistor Q2, a resistor R2, and a resistor R3; the power supply VDD end 100 is electrically connected with an N-type MOS tube Q1, one end of the N-type MOS tube Q1 is electrically connected with a resistor R1, and the other end of the N-type MOS tube Q1 is electrically connected with an N-type MOS tube Q2; the other two ends of the N-type MOS transistor Q2 are respectively connected with a resistor R3 and a ground, the other end of the resistor R3 is connected with a KEY end 300, the other end of the resistor R1 is connected with a WKUP end 200 and a resistor R2, and the other end of the resistor R2 is grounded; one end of the reset switch S1 is electrically connected with a power supply VDD end 100, and the other end is electrically connected with a KEY end 300; the reset switch S1 is grounded through a resistor R4.
Specifically, the S-pole of the N-type MOS transistor Q1 is electrically connected to the VDD terminal 100, the D-pole of the N-type MOS transistor Q1 is electrically connected to the resistor R1, the G-pole of the N-type MOS transistor Q1 is electrically connected to the D-pole of the N-type MOS transistor Q2, the G-pole of the N-type MOS transistor Q2 is electrically connected to the resistor R3, and the S-pole of the N-type MOS transistor Q2 is electrically connected to the ground.
It should be noted that in the wake-up circuit provided by the invention, the reset switch S1 is a wake-up switch for controlling sleep, and the sleep and wake-up of the embedded single chip microcomputer (STM 32) are controlled by pressing the reset switch S1 for a short time, so that the power consumption is low, no extra power consumption is generated when the circuit is either in sleep or in wake-up, and the circuit has stronger applicability and wide application.
The invention also provides an embedded single chip microcomputer which comprises the wake-up circuit. Specifically, the KEY end 300 is an I0 port of the embedded mcu, and the WKUP end 200 is a WKUP pin of the embedded mcu. The dormancy and the awakening of the embedded single chip microcomputer (STM 32) can be controlled through the reset switch S1.
Fig. 2 is a schematic flow chart of a control method provided in embodiment 1 of the present invention. Referring to fig. 2, the invention further provides a control method applied to the wake-up circuit.
Specifically, the control method comprises the following steps:
s100: when a reset switch S1 is pressed, the voltage of a KEY end 300 is equal to the voltage of a power supply VDD end 100, and the embedded single chip microcomputer enters a sleep mode after N seconds;
s200: pressing the reset switch S1 again for M seconds, wherein M is less than N, the N-type MOS tube Q2 is conducted, the G of the N-type MOS tube Q1 is at a low level, the N-type MOS tube Q1 is conducted, the voltage of the WKUP end 200 is equal to 100 x of the power supply VDD end (resistor R1/resistor R1+ resistor R2), the WKUP end 200 generates a rising edge, and the embedded single chip microcomputer is awakened;
s300: the reset switch S1 is lifted, the N-type MOS transistor Q1 and the N-type MOS transistor Q2 are disconnected, the KEY terminal 300 is at a low level, and the WKUP terminal 200 is at a low level.
The embedded single chip microcomputer can be controlled to sleep and awaken through the reset switch S1, the embedded single chip microcomputer enters the sleep mode when the KEY end 300 detects the high level of N seconds, and the WKUP end 200 detects the rising edge to enter the sleep mode.
Example 2
The wake-up circuit of this embodiment is substantially the same as the wake-up circuit of embodiment 1, except for an ONWKUP terminal 400;
fig. 3 is a schematic diagram of a communication wake-up circuit according to embodiment 2 of the present invention. Referring to fig. 3, the wake-up circuit of the present invention further includes an ONWKUP terminal 400, and the circuits of the N-type MOS transistor Q1 and the N-type MOS transistor Q2 are electrically connected to the ONWKUP terminal 400.
Furthermore, an ONWKUP end 400 is connected with a collector of the optocoupler photosensitive triode, and an emitter of the optocoupler photosensitive triode is grounded; two pins on one side of the light-emitting diode of the optocoupler U1 are connected with a CANH differential signal and a CANL differential signal.
The wake-up circuit ONWKUP terminal 400 provided in this embodiment may be externally connected to other circuits or control signals, so that the N-type MOS transistor Q1 is turned on the WKUP terminal 200 to generate rising edge wake-up.
Specifically, a rising edge can be generated by other signal ways after communication, two pins at one side of a light emitting diode of the optocoupler U1 are connected with differential signals such as CANH, CANL or 485A and 485B, an emitter at one end of the optocoupler photosensitive triode is grounded, and a collector is connected with an ONWKUP end 400; when two pins of the light-emitting diode of the optocoupler U1 have pressure difference generated by communication, the light-emitting diode is lightened, the phototriode is conducted, the ONWKUP end 400 is at low level, the N-type MOS tube Q1 is conducted, the WKUP end 200 generates a rising edge, and the embedded single chip microcomputer is awakened.
Based on the above description, the present invention has the following advantages:
1. the wake-up circuit provided by the invention controls the sleep and wake-up of the embedded single chip microcomputer by pressing the time length of the reset switch S1.
2. The wake-up circuit provided by the invention has low power consumption, and no extra power consumption is generated no matter the circuit is in a sleep state or is awakened.
3. The wake-up circuit provided by the invention has stronger applicability and wide application, and the ONWKUP end 400 can be externally connected with other circuits or control signals, so that the N-type MOS transistor Q1 is conducted with the WKUP end 200 to generate rising edge wake-up.
The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily think of the changes or substitutions within the technical scope of the present invention, and shall cover the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the appended claims.
Claims (7)
1. A wake-up circuit is characterized by comprising a reset switch S1, a power supply VDD terminal (100), a WKUP terminal (200), a KEY terminal (300), an N-type MOS tube Q1, a resistor R1, an N-type MOS tube Q2, a resistor R2 and a resistor R3;
the power supply VDD end (100) is electrically connected with the N-type MOS tube Q1, one end of the N-type MOS tube Q1 is electrically connected with the resistor R1, and the other end of the N-type MOS tube Q1 is electrically connected with the N-type MOS tube Q2;
the other two ends of the N-type MOS transistor Q2 are respectively connected with the resistor R3 and the ground, the other end of the resistor R3 is connected with the KEY end (300), the other end of the resistor R1 is connected with the WKUP end (200) and the resistor R2, and the other end of the resistor R2 is grounded;
one end of the reset switch S1 is electrically connected with the power supply VDD end (100), and the other end of the reset switch S1 is electrically connected with the KEY end (300);
the S electrode of the N-type MOS tube Q1 is electrically connected with the power supply VDD terminal (100), the D electrode of the N-type MOS tube Q1 is electrically connected with the resistor R1, the G electrode of the N-type MOS tube Q1 is electrically connected with the D electrode of the N-type MOS tube Q2, the G electrode of the N-type MOS tube Q2 is electrically connected with the resistor R3, and the S electrode of the N-type MOS tube Q2 is electrically connected with the ground;
the circuits of the N-type MOS tube Q1 and the N-type MOS tube Q2 are electrically connected with an ONWKUP end (400);
the ONWKUP end (400) is connected with a collector of the optocoupler photosensitive triode, and an emitter of the optocoupler photosensitive triode is grounded; two pins on one side of the light-emitting diode of the optocoupler U1 are connected with a CANH differential signal and a CANL differential signal.
2. Wake-up circuit according to claim 1, characterized in that the reset switch S1 is connected to ground via a resistor R4.
3. Wake-up circuit according to claim 1, characterized in that the reset switch S1 is a control sleep wake-up switch.
4. An embedded single-chip microcomputer, characterized in that it comprises a wake-up circuit according to any one of claims 1 to 3.
5. The embedded MCU of claim 4, wherein the KEY terminal (300) is an I0 port of the embedded MCU, and the WKUP terminal (200) is a WKUP pin of the embedded MCU.
6. A control method, characterized in that it is applied to the wake-up circuit of any one of claims 1 to 3.
7. The control method according to claim 6, characterized by comprising the steps of:
when a reset switch S1 is pressed, the voltage of a KEY end (300) is equal to the voltage of a power supply VDD end (100), and the embedded single chip microcomputer enters a sleep mode after N seconds;
pressing the reset switch S1 again for M seconds, wherein M is less than N, the N-type MOS tube Q2 is conducted, the G of the N-type MOS tube Q1 is at a low level, the N-type MOS tube Q1 is conducted, the voltage of the WKUP end (200) is equal to the voltage of a power supply VDD end (100) x (a resistor R1/a resistor R1+ a resistor R2), the WKUP end (200) generates a rising edge, and the embedded single chip microcomputer wakes up;
when the reset switch S1 is lifted, the N-type MOS tube Q1 and the N-type MOS tube Q2 are disconnected, the KEY end (300) is at a low level, and the WKUP end (200) is at a low level.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202210514581.5A CN114895593B (en) | 2022-05-12 | 2022-05-12 | Wake-up circuit, embedded single chip microcomputer and control method |
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| CN202210514581.5A CN114895593B (en) | 2022-05-12 | 2022-05-12 | Wake-up circuit, embedded single chip microcomputer and control method |
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| CN114895593A CN114895593A (en) | 2022-08-12 |
| CN114895593B true CN114895593B (en) | 2022-11-29 |
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Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101034305A (en) * | 2006-03-10 | 2007-09-12 | 鸿富锦精密工业（深圳）有限公司 | Computer automatic dormancy/awaking circuit |
| CN202435637U (en) * | 2011-12-30 | 2012-09-12 | 美的集团有限公司 | Zero-power-consumption standby control circuit of electromagnetic induction heating device |
| CN102868428B (en) * | 2012-09-29 | 2014-11-19 | 裴维彩 | Ultra-low power consumption standby bluetooth device and implementation method thereof |
| CN204790414U (en) * | 2015-06-08 | 2015-11-18 | 台衡精密测控(昆山)股份有限公司 | Singlechip starting circuit |
| CN210912030U (en) * | 2019-08-12 | 2020-07-03 | 宁德时代新能源科技股份有限公司 | Wake-up circuit and rechargeable device |
| CN213122670U (en) * | 2020-11-10 | 2021-05-04 | 苏州畅美智能科技有限公司 | Energy-saving dormancy circuit |
| CN112543017A (en) * | 2020-12-02 | 2021-03-23 | 广州朗国电子科技有限公司 | Long-connection circuit without influence on power consumption |
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