CN114884319B - Control circuit of voltage converter, integrated circuit chip and voltage conversion circuit - Google Patents
Control circuit of voltage converter, integrated circuit chip and voltage conversion circuit Download PDFInfo
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- CN114884319B CN114884319B CN202210767994.4A CN202210767994A CN114884319B CN 114884319 B CN114884319 B CN 114884319B CN 202210767994 A CN202210767994 A CN 202210767994A CN 114884319 B CN114884319 B CN 114884319B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
Abstract
The application relates to a voltage conversion technology, and provides a control circuit, an integrated circuit chip and a voltage conversion circuit of a voltage converter, wherein the control circuit comprises a fixed driving time generating circuit, a ripple generating circuit, an adding circuit, a comparison circuit and a driving circuit, the comparison circuit is accessed to superpose a voltage feedback signal of a ripple signal, the average value of the voltage feedback signal is equal to an accessed reference value, and the driving circuit drives the voltage converter to carry out power conversion on input voltage to eliminate output voltage of a direct current error. The addition of an operational amplifier and a compensation circuit is avoided, the circuit structure is simplified, and the system cost is reduced.
Description
Technical Field
The application belongs to the technical field of voltage conversion circuits, and particularly relates to a control circuit of a voltage converter, an integrated circuit chip and a voltage conversion circuit.
Background
At present, the existing method for eliminating the output error of the voltage conversion circuit eliminates the dc error by adding an error amplifier in the controller. The forward input end of the amplifier is a reference voltage, and the reverse input end of the amplifier is a feedback voltage. The amplifier has a certain gain. After the amplifier collects the input error, the error voltage to be eliminated is generated on the compensating circuit through amplification in a certain proportion. The three voltages of the feedback voltage, the error voltage and the ripple voltage are added and then compared with the reference voltage, so that the direct current error is eliminated. The larger the gain of the amplifier is, the more accurate the generated error voltage is, the closer the final feedback voltage is to the reference voltage, and the smaller the output error is. Accordingly, the compensation circuit is changed and complicated.
However, the amplifier of this circuit needs to have enough gain to eliminate the output error, and the amplifier needs an additional compensation circuit to stabilize the loop. Otherwise, the system will oscillate and fail to work normally. In addition, the boost circuit has a right half-plane zero, which causes difficulty in the design of the compensation circuit.
Disclosure of Invention
The application aims to provide a control circuit, an integrated circuit chip and a voltage conversion circuit of a voltage converter, and aims to solve the problems that an error amplifier needs to be added in a controller when the output error of the traditional voltage converter is eliminated, the amplifier needs to have enough gain and an additional compensation circuit to stabilize a loop, and the circuit is complex.
A first aspect of embodiments of the present application provides a control circuit for a voltage converter, the voltage converter having a switch node for coupling to an output or ground of the voltage converter, the control circuit comprising:
the fixed driving time generating circuit is used for configuring a first trigger signal with fixed on-off duration;
a ripple generation circuit, coupled to the switching node, configured to generate a ripple signal based on a voltage at the switching node;
the addition circuit is connected with the ripple generation circuit, is connected with a voltage feedback signal obtained by sampling the output of the voltage converter, and superimposes the ripple signal on the voltage feedback signal;
the comparison circuit is connected with the addition circuit and used for comparing the voltage feedback signal superposed with the ripple signal with a reference value and outputting a second trigger signal according to a comparison result, wherein the average value of the voltage feedback signal superposed with the ripple signal is equal to the reference value;
and the driving circuit is connected with the fixed driving time generating circuit and the comparison circuit and is provided with a driving end, and the driving end is used for generating a driving signal at the driving end according to the first trigger signal and the second trigger signal in each switching period so as to drive the voltage converter to carry out power conversion on the input voltage and provide an output voltage for eliminating the direct current error.
In one embodiment, the ripple generating circuit comprises an impedance circuit, a switch and a charging and discharging circuit;
the impedance circuit is used for being connected to the switch node and the charging and discharging circuit, the change-over switch is connected with the impedance circuit in parallel, a control end of the change-over switch is connected to the driving end, and the change-over switch is used for changing the charging or discharging impedance of the charging and discharging circuit by utilizing the driving signal to generate the ripple signal, so that the valley value of the ripple signal is 0.
In one embodiment, the charging and discharging circuit includes:
a first charging and discharging branch circuit, connected to the impedance circuit, for varying a charging or discharging speed with the impedance circuit based on the voltage of the switching node to provide a first ripple voltage;
the second charging and discharging branch circuit is connected to the switching node and is charged and discharged based on the voltage of the switching node to provide a second ripple voltage;
the subtraction circuit is connected with the first charge-discharge branch and the second charge-discharge branch and is used for performing subtraction operation on the first ripple voltage and the second ripple voltage to obtain and output the ripple signal.
In one embodiment, the first charging and discharging branch comprises a first resistor and a first capacitor, the first resistor and the first capacitor are connected to the impedance circuit and the ground terminal in series, and a connection node of the first resistor and the first capacitor is connected to the subtraction circuit as an output of the first charging and discharging branch.
In one embodiment, a ratio of the impedance circuit to the first resistor satisfies R1N/R1= T/(2 × R1 × C1), where R1N is a resistance value of the impedance circuit, R1 is a resistance value of the first resistor, C1 is a capacitance value of the first capacitor, and T is the switching period.
In one embodiment, the first charging and discharging branch is slower in charging speed than discharging speed;
the negative input end of the subtraction circuit is connected to the first charge-discharge branch, and the positive input end of the subtraction circuit is connected to the second charge-discharge branch, so as to perform subtraction operation on the first ripple voltage by using the second ripple voltage, and obtain and output the ripple signal.
In one embodiment, the first charging and discharging branch is charged faster than the discharging speed;
the positive input end of the subtraction circuit is connected to the first charge-discharge branch, and the negative input end of the subtraction circuit is connected to the second charge-discharge branch, so as to subtract the second ripple voltage from the first ripple voltage, thereby obtaining and outputting the ripple signal.
In one embodiment, the second charging and discharging branch comprises a second resistor and a second capacitor, a first end of the second resistor is used for being connected to the switch node, a second end of the second resistor and the second capacitor are connected in series to the ground, and a connection node of the second resistor and the second capacitor is connected to the subtraction circuit as an output of the second charging and discharging branch.
In one embodiment, the fixed driving time generation circuit includes: the circuit comprises a current source, a first switch, a third resistor, a second switch, a third capacitor and a comparator;
the input end of the current source and the first conducting end of the first switch are used for being connected to the output of the voltage converter, the output end of the current source is connected to the positive input end of the comparator, the second conducting end of the first switch is connected to the positive input end of the comparator through the third resistor, the first conducting end of the second switch and the first end of the third capacitor are connected to the positive input end of the comparator, the negative input end of the comparator is connected to a first voltage, and the first voltage is a difference value between the output voltage and the input voltage of the voltage converter.
In one embodiment, the switching period satisfies: t = R3 × C3, where T is the switching period, R3 is the resistance value of the third resistor, and C3 is the capacitance value of the third capacitor.
A second aspect of the embodiments of the present application provides an integrated circuit chip including the control circuit of the voltage converter described above.
A third aspect of the embodiments of the present application provides a voltage converting circuit, including a voltage converter having a switch node, where the switch node is configured to be coupled to an output or a ground terminal of the voltage converter, and the voltage converting circuit further includes the above-mentioned integrated circuit chip, where the integrated circuit chip is configured to control the voltage converter to perform power conversion.
Compared with the prior art, the embodiment of the application has the beneficial effects that:
the control circuit of the voltage converter adopts a novel ripple generating circuit, the average value of the ripple signal generated by the ripple generating circuit after being superposed on the voltage feedback signal is consistent with the reference value of the ripple signal, the direct current error of the output voltage of the voltage change circuit with fixed conduction time can be directly eliminated, an error amplifier and a compensating circuit thereof are not required to be additionally arranged to provide error voltage to be superposed on the voltage feedback signal and the ripple signal, the average value is consistent with the reference value, the circuit structure is simplified, and the miniaturization of a product is not required.
Drawings
Fig. 1 is a schematic diagram of a voltage conversion (boost) circuit according to an embodiment of the present disclosure;
fig. 2 is a schematic diagram of a voltage conversion (boost) circuit according to a second embodiment of the present application;
FIG. 3 is a schematic diagram of a control circuit in the voltage conversion circuit shown in FIG. 1;
FIG. 4 is a schematic diagram of a control circuit in the voltage converting circuit shown in FIG. 2;
fig. 5 is a working waveform of a fixed on-time boost control circuit according to an embodiment of the present disclosure;
fig. 6 is a schematic diagram of a ripple generating circuit according to an embodiment of the present disclosure;
fig. 7 is a schematic diagram of a ripple generating circuit according to a second embodiment of the present application;
fig. 8 is a schematic diagram of a fixed driving time generation circuit in a control circuit according to an embodiment of the present disclosure.
Detailed Description
In order to make the technical problems, technical solutions and advantageous effects to be solved by the present application clearer, the present application is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of and not restrictive on the broad application.
It will be understood that when an element is referred to as being "secured to" or "disposed on" another element, it can be directly on the other element or be indirectly on the other element. When an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or indirectly connected to the other element.
It will be understood that the terms "length," "width," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," and the like, refer to an orientation or positional relationship illustrated in the drawings for convenience in describing the present application and to simplify description, and do not indicate or imply that the referenced device or element must have a particular orientation, be constructed and operated in a particular orientation, and thus should not be construed as limiting the present application.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or to implicitly indicate the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.
Referring to fig. 1 and fig. 2, an embodiment of the present application provides a control circuit 100 of a voltage converter 200, where a basic topology of the voltage converter 200 may be a boost circuit (boost), a buck circuit (buck), or a buck-boost circuit (boost/buck). The architecture of the voltage converter 200 may include two types, as shown in fig. 1, where the first type includes at least an inductor L1, a main switching tube Q1, and a freewheeling diode D1; as shown in fig. 2, the second type includes at least an inductor L1, a main switching transistor Q1 and a freewheeling switching transistor Q2. The control circuit 100 of the present application is applicable to both of the above-mentioned architectures, and the following description may be based on one of the architectures, but should not be construed as limiting the present application.
The embodiments of the present application will be described with reference to a booster circuit. The voltage converter 200 has a switch node SW coupled to the output of the voltage converter 200 when the main switch Q1 (also called the down tube) is turned off and the freewheeling switch Q2 (also called the up tube) or the freewheeling diode D1 is turned on, the voltage at the switch node SW is the output voltage VOUT, and the inductor L1 releases energy to the capacitor C out Is charged to the load R LOAD Providing an output voltage VOUT; when the main switch tube Q1 is turned on and the freewheeling switch tube Q2 is turned off, the inductor L1 stores energy, the switch node SW is coupled to ground, and the voltage is zero.
Referring to fig. 3 and 4, the control circuit 100 includes a fixed driving time generating circuit 110, a ripple generating circuit 120, an adding circuit 130, a comparing circuit CMP1, and a driving circuit 140.
The fixed driving time generating circuit 110 is configured to configure a first trigger signal TH with a fixed on or off duration; the fixed on-off duration may be a fixed on-time duration of the main switching tube Q1 or the freewheeling switching tube Q2, or a fixed off-time duration of the main switching tube Q1 or the freewheeling switching tube Q2, which is specifically set according to different architectures of the control circuit 100 or different voltage converters 200.
The ripple generation circuit 120 is operatively coupled to the switch node SW and configured to generate a ripple signal Vrip based on a voltage at the switch node SW. The adder circuit 130 is connected to the ripple generating circuit 120, and has a feedback voltage input terminal for receiving a voltage feedback signal FB obtained from the output of the sampling voltage converter 200, and the adder circuit 130 superimposes the ripple signal Vrip on the voltage feedback signal FB.
The comparison circuit CMP1 is connected to the addition circuit 130, and is configured to compare the voltage feedback signal FB superimposed with the ripple signal Vrip with the reference value Vref, and output a second trigger signal TL according to the comparison result, where an average value of the voltage feedback signal FB superimposed with the ripple signal Vrip is equal to the reference value Vref (see fig. 5), so that an error amplifier and a compensation circuit thereof are not required to be additionally added to provide an error voltage to be superimposed on the voltage feedback signal FB and the ripple signal Vrip and equal to the reference value Vref, thereby simplifying a circuit architecture, saving material and manufacturing cost, and facilitating miniaturization and reliability of a product.
The driving circuit 140 is connected to the fixed driving time generating circuit 110 and the comparing circuit CMP1, and has driving terminals LSD, HSD for generating a driving signal at the driving terminal according to the first trigger signal TH and the second trigger signal TL in each switching period T to drive the voltage converter 200 to perform power conversion on the input voltage VIN to provide the output voltage VOUT with dc error removed.
Referring to fig. 1 and fig. 3, in an embodiment, the driving end of the driving circuit 140 may be a port LSD, which is suitable for the voltage converter 200 with the first architecture shown in fig. 1. In the example, the freewheeling switch transistor Q2 is an NMOS transistor, and the power conversion process includes: the driving circuit 140 generates a driving signal of a high level signal according to the first trigger signal TH to drive the main switching tube Q1 to turn off, so that the inductor L1 releases energy to provide an output voltage VOUT, and the voltage of the switching node SW is equal to the output voltage VOUT; the driving circuit 140 generates a driving signal of a low level signal according to the second trigger signal TL to drive the main switch Q1 to be turned on, the input voltage VIN charges the inductor L1, the switch node SW is coupled to the ground, and the voltage is zero.
Referring to fig. 2 and 4, in another embodiment, the driving terminals of the driving circuit 140 include a first driving terminal LSD and a second driving terminal HSD, and a voltage converter 200 of a second architecture is suitable to be used as shown in fig. 2. In the example, the follow current switch tube Q2 and the main switch tube Q1 are NMOS tubes, and the power conversion process includes: the driving circuit 140 generates a low level signal driving signal at the first driving terminal LSD and a high level signal driving signal at the second driving terminal HSD according to the first trigger signal TH, generates a high level signal driving signal at the first driving terminal LSD and a low level signal driving signal at the second driving terminal HSD according to the second trigger signal TL, and the driving signal at the first driving terminal LSD and the driving signal at the second driving terminal HSD are staggered in phase. When the follow current switch tube Q2 is switched on and the main switch tube Q1 is switched off, the inductor L1 releases energy to provide an output voltage VOUT, and the voltage of the switch node SW is equal to the output voltage VOUT; when the follow current switching tube Q2 is turned off and the main switching tube Q1 is turned on, the input voltage VIN charges the inductor L1, and the voltage of the switching node SW is zero.
In the embodiment of the present application, a fixed on-time of the main switching tube Q1 is taken as an example for description, please refer to fig. 5, where a time between a rising edge of the first trigger signal TH and a rising edge of the next second trigger signal TL is the fixed on-time of the main switching tube Q1, and can also be understood as a fixed off-time of the freewheeling switching tube Q2.
Referring to fig. 6 and 7, the ripple generating circuit 120 includes an impedance circuit R1N, a switch Q3, and a charging/discharging circuit 121; the impedance circuit R1N is used for being connected to the switch node SW and the charge and discharge circuit 121, the switch Q3 is connected in parallel with the impedance circuit R1N, the control end of the switch Q3 is connected to the driving end LSD/HSD, and the switch Q3 is used for changing the charging or discharging impedance of the charge and discharge circuit 121 based on the voltage of the switch node SW by using the driving signal of the driving end LSD/HSD to generate a ripple signal Vrip, so that the valley value (voltage) of the ripple signal is 0, and thus the average value (namely, the rectified dc voltage value) of the voltage feedback signal FB on which the ripple signal Vrip is superimposed is equal to the reference value Vref.
Referring to fig. 6, in an embodiment, the impedance circuit R1N includes, for example, a resistor, the switch Q3 includes, for example, an NMOS tube, and the control end (i.e., the gate of the NMOS tube) of the switch Q3 is connected to the driving end LSD/the first driving end LSD shown in fig. 1 to 4, and is turned on or off synchronously with the main switch Q1, so that the voltage of the switch node SW is charged by the impedance circuit R1N when the charge-discharge circuit 121 is charged, and is not passed through the impedance circuit R1N when discharging, the charging speed is slower than the discharging speed, and the valley value of the ripple signal is 0 by reasonable proportioning, thereby eliminating the error.
Referring to fig. 7, in another embodiment, the second driving terminal HSD shown in fig. 2 and 4 is connected to the control terminal of the switch Q3, and is turned on or off synchronously with the freewheeling switch Q2, so that the voltage of the switch node SW is not charged through the impedance circuit R1N during charging of the charging and discharging circuit 121, and is discharged through the impedance circuit R1N, the charging speed is faster than the discharging speed, and the valley value of the ripple signal is 0 through a reasonable ratio, thereby eliminating the error.
Referring to fig. 6 and fig. 7, specifically, the charging and discharging circuit 121 includes a first charging and discharging branch 122, a second charging and discharging branch 124, and a subtracting circuit 126.
The first charging and discharging branch 122 is configured to be connected to the impedance circuit R1N and the driving end LSD/HSD of the driving circuit 140, and change a charging or discharging speed by using the impedance circuit R1N based on the voltage of the switching node SW to provide a first ripple voltage V1; the second charging and discharging branch 124 is configured to be connected to the switch node SW, and charge and discharge based on the voltage of the switch node SW to provide a second ripple voltage V2; the subtracting circuit 126 is connected to the first charge-discharge branch 122 and the second charge-discharge branch 124, and is configured to subtract the first ripple voltage V1 and the second ripple voltage V2 to obtain and output a ripple signal Vrip.
In one embodiment, the driving end LSD/the first driving end LSD shown in fig. 1 to 4 is connected to the control end of the switch Q3, and is turned on or off synchronously with the main switch tube Q1, so that the voltage of the switch node SW is charged through the impedance circuit R1N when the first charging/discharging branch 122 is charged, and is not passed through the impedance circuit R1N when discharging, and the charging speed of the first charging/discharging branch 122 is slower than the discharging speed; the negative input end of the subtraction circuit 126 is connected to the first charge-discharge branch 122, and the positive input end is connected to the second charge-discharge branch 124, so as to perform subtraction operation on the first ripple voltage V1 by using the second ripple voltage V2 to obtain and output a ripple signal Vrip with a valley value of 0, that is, the lowest point =0 of V1-V2 is realized.
In one embodiment, the control terminal of the switch Q3 is connected to the second driving terminal HSD shown in fig. 2 and 4, and will be turned on or off synchronously with the freewheeling switch Q2, so that the voltage of the switch node SW will not be charged through the impedance circuit R1N during charging of the first charging/discharging branch 122, and will pass through the impedance circuit R1N during discharging, and the charging speed of the first charging/discharging branch 122 is faster than the discharging speed; a positive input end of the subtraction circuit 126 is connected to the first charge-discharge branch 122, and a negative input end is connected to the second charge-discharge branch 124, so as to subtract the second ripple voltage V2 from the first ripple voltage V1 to obtain and output a ripple signal Vrip with a valley value of 0, that is, to realize that the lowest point of V2-V1 =0.
Referring to fig. 6 and 7, in one embodiment, the first charging/discharging branch 122 includes a first resistor R1 and a first capacitor C1, the first resistor R1 and the first capacitor C1 are connected in series to the impedance circuit R1N and the ground, and a connection node of the first resistor R1 and the first capacitor C1 is connected to the subtraction circuit 126 as an output of the first charging/discharging branch 122. The second charging and discharging branch 124 includes a second resistor R2 and a second capacitor C2, a first end of the second resistor R2 is used for being connected to the switch node SW, a second end of the second resistor R2 and the second capacitor C2 are connected in series to the ground, and a connection node between the second resistor R2 and the second capacitor C2 is used as an output of the second charging and discharging branch 124 and is connected to the operational circuit.
Referring to fig. 6, when the control terminal of the switch Q3 is connected to the driving terminal LSD/the first driving terminal LSD shown in fig. 1 to 4, the output of the first charging/discharging branch 122 is connected to the positive input terminal of the subtraction circuit 126, and the output of the second charging/discharging branch 124 is connected to the negative input terminal of the subtraction circuit 126. Referring to fig. 7, when the control terminal of the switch Q3 is connected to the second driving terminal HSD shown in fig. 2 and 4, the output of the first charging/discharging branch 122 is connected to the negative input terminal of the subtraction circuit 126, and the output of the second charging/discharging branch 124 is connected to the positive input terminal of the subtraction circuit 126.
The ripple generating circuit 120 is mainly provided with a switch Q3 and an impedance circuit R1N for eliminating errors. The impedance circuit R1N needs to be matched with the resistor R1 to satisfy a certain design ratio.
Referring to fig. 2, 3, 5 and 6, when the main transistor Q1 of the second type of voltage converter 200 shown in fig. 2 is turned on and the freewheeling transistor Q2 is turned off, the switch Q3 in fig. 6 is turned on. The charge on the first capacitor C1 is discharged to the ground through the first resistor R1, and the generated ripple peak-to-peak value Δ V is:
ΔV=(V1N*T ON )/(R1 *C1)（1）
wherein V1N is a dc voltage (i.e. an average value of the output voltage VOUT) on the first capacitor C1, T ON The on time of the main switch tube Q1 in one switching period T, i.e. the fixed on time, is the same, R1 also represents the resistance value of the first resistor, and C1 also represents the capacitance value of the first capacitor.
When the freewheeling switch Q2 in fig. 2 is on and the main switch Q1 is off, the switch Q3 in fig. 6 is off. The voltage of the switch node SW (i.e., the output voltage VOUT) charges the first capacitor C1 through the first resistor R1 and the impedance circuit R1N, and a ripple peak-to-peak value Δ V is generated as follows:
ΔV=［ (VOUT-V1N)*T OFF ］/［(R1+R1N)* C1］（2）
wherein R1N also represents the resistance value of the impedance circuit, T OFF The main switching tube Q1 is turned off for a switching period T.
During one switching period T, the charging and discharging of the first capacitor C1 are balanced, and thus the values of equations (1) and (2) are equal. The dc voltage V1N across the first capacitor C1 can be expressed as:
V1N=(T OFF *K*VOUT )/［(R1N*T ON /R1 ) +T］（3）
as shown in fig. 5, in order to completely eliminate the output dc error, the dc voltage (i.e., average value) of the voltage feedback signal FB + the ripple signal Vrip needs to be the same as the reference value Vref, and therefore the valley value of the ripple signal Vrip needs to be 0 (i.e., the dc voltage of the ripple signal Vrip is 0.5 × Δ V).
Then the ratio of the resistance circuit R1N to the first resistor R1 satisfies:
R1N/R1=T/(2*R1*C1)（4）
the elimination of the dc offset can be realized.
In one embodiment, the fixed driving time generating circuit 110 includes: a current source I1, a first switch Q4, a third resistor R3, a second switch Q5, a third capacitor C3 and a comparator CMP2;
the input terminal of the current source I1 and the first conducting terminal of the first switch Q4 are used to be connected to the output of the voltage converter 200, the output terminal of the current source I1 is connected to the positive input terminal of the comparator CMP2, the second conducting terminal of the first switch Q4 is connected to the positive input terminal of the comparator CMP2 through the third resistor R3, the first conducting terminal of the second switch Q5 and the first terminal of the third capacitor C3 are connected to the positive input terminal of the comparator CMP2, the negative input terminal of the comparator CMP2 is connected to the first voltage V4, and the first voltage V4 is the difference between the output voltage VOUT and the input voltage VIN of the voltage converter 200, that is, V4= VOUT-VIN. The first switch Q4 and the second switch Q5 may adopt NMOS transistors.
Referring to fig. 2, 4, 5 and 8, a control terminal of the first switch Q4 is connected to the first driving terminal LSD, and a control terminal of the second switch Q5 is connected to the second driving terminal HSD. When the follow current switching tube Q2 is switched on and the main switching tube Q1 is switched off, the voltage V3 on the capacitor C3 is discharged to the ground by the second switch Q5; when the follow current switching tube Q2 is turned off and the main switching tube Q2 is turned on, the output voltage VOUT charges the capacitor C3 through the resistor R3 and the current source I1. Wherein the current of the current source I1 is equal to V3/R3.
When the voltage of V3 reaches V4, the fixed on-time of the main switching tube Q1 is over, the comparator CMP2 is turned over, the first trigger signal TH changes from low level to high level (generates a rising edge), the follow current switching tube Q2 is turned on through the rear stage driving circuit 140, and the main switching tube Q1 is turned off. During charging of capacitor C3, the voltage of V3 can be expressed according to equation (4):
V3=( VOUT*t ) / ( R3*C3 )（5）
wherein, R3 also represents the resistance of the third resistor, C3 also represents the capacitance of the third capacitor, T is the time for the output voltage VOUT to charge the capacitor C3 through the resistor R3, when the voltage V3 reaches V4, T is (1-D) × T, where D is T ON T, it follows that the switching period T of the voltage converter 200 is determined by the resistor R3 and the capacitor C3, i.e. the switching period T can be expressed as:
T=R3*C3 （6）
from equation (6), equation (4) can be further converted to:
R1N/R1 = (R3*C3)/ 2 (R1*C1 )（7）
therefore, as long as the matching of the resistors R3 and R1 with the impedance circuit R1N and the matching of the capacitor C1 with the capacitor C3 are realized, the formula (7) is a fixed value, and the dc errors under all the conditions of the input voltage VIN and the output voltage VOUT can be completely eliminated.
A second aspect of the embodiments of the present application provides an integrated circuit chip including the control circuit 100 of the voltage converter 200 described above.
And the integrated circuit chip comprises a switch control pin for connecting to the switch node SW, a driving pin for connecting to the main switch tube Q1 and connecting to the driving ends LSD and HSD, and a voltage feedback pin for accessing a voltage feedback signal FB and connecting to a voltage feedback end. The control circuit 100 is manufactured into an integrated circuit chip, the original control circuit can be directly reused, and only simple layout matching needs to be done, so that the advantages of almost no additional chip design cost and area overhead, and high realizability and reliability are achieved.
A third aspect of the embodiments of the present application provides a voltage converting circuit, which includes a voltage converter 200 having a switch node SW for coupling to an output or ground of the voltage converter 200, and the voltage converting circuit further includes the above-mentioned integrated circuit chip, which is used for controlling the voltage converter 200 to perform power conversion. The integrated circuit chip eliminates the output voltage error of the fixed on-time voltage conversion circuit by additionally introducing an impedance circuit R1N on the original ripple generating circuit and reasonably designing the switching time sequence of the ripple generating circuit 120, does not need to develop new hardware, and saves the system cost.
The above-mentioned embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present application and are intended to be included within the scope of the present application.
Claims (11)
1. A control circuit for a voltage converter having a switch node for coupling to an output of the voltage converter or to ground, the control circuit comprising:
the fixed driving time generating circuit is used for configuring a first trigger signal with fixed on-off duration;
a ripple generation circuit, coupled to the switching node, configured to generate a ripple signal based on a voltage at the switching node;
the addition circuit is connected with the ripple generation circuit, is connected with a voltage feedback signal obtained by sampling the output of the voltage converter, and superimposes the ripple signal on the voltage feedback signal;
the comparison circuit is connected with the addition circuit and used for comparing the voltage feedback signal superposed with the ripple signal with a reference value and outputting a second trigger signal according to a comparison result, wherein the average value of the voltage feedback signal superposed with the ripple signal is equal to the reference value;
the driving circuit is connected with the fixed driving time generating circuit and the comparison circuit and is provided with a driving end which is used for generating a driving signal at the driving end according to the first trigger signal and the second trigger signal in each switching period so as to drive the voltage converter to carry out power conversion on an input voltage and provide an output voltage for eliminating a direct current error;
the ripple generating circuit comprises an impedance circuit, a change-over switch and a charging and discharging circuit;
the impedance circuit is used for being connected to the switch node and the charging and discharging circuit, the change-over switch is connected with the impedance circuit in parallel, a control end of the change-over switch is connected to the driving end, and the change-over switch is used for changing the charging or discharging impedance of the charging and discharging circuit by utilizing the driving signal to generate the ripple signal, so that the valley value of the ripple signal is 0.
2. The control circuit of a voltage converter according to claim 1, wherein said charge and discharge circuit comprises:
a first charging and discharging branch circuit, connected to the impedance circuit, for varying a charging or discharging speed with the impedance circuit based on the voltage of the switching node to provide a first ripple voltage;
the second charging and discharging branch circuit is connected to the switching node and is charged and discharged based on the voltage of the switching node to provide a second ripple voltage;
and the subtraction circuit is connected with the first charge-discharge branch circuit and the second charge-discharge branch circuit and is used for carrying out subtraction operation on the first ripple voltage and the second ripple voltage to obtain and output the ripple signal.
3. The control circuit of the voltage converter according to claim 2, wherein the first charging and discharging branch comprises a first resistor and a first capacitor, the first resistor and the first capacitor are connected in series to the impedance circuit and the ground terminal, and a connection node of the first resistor and the first capacitor is connected to the subtraction circuit as an output of the first charging and discharging branch.
4. The control circuit of a voltage converter according to claim 3, wherein the ratio of the impedance circuit to the first resistance is such that: R1N/R1= T/(2 × R1 × C1), where R1N is a resistance value of the impedance circuit, R1 is a resistance value of the first resistor, C1 is a capacitance value of the first capacitor, and T is the switching period.
5. The control circuit of the voltage converter according to any one of claims 2 to 4, wherein the first charging and discharging branch is charged slower than discharged;
the negative input end of the subtraction circuit is connected to the first charge-discharge branch, and the positive input end of the subtraction circuit is connected to the second charge-discharge branch, and the subtraction circuit is used for performing subtraction operation on the first ripple voltage by using the second ripple voltage to obtain and output the ripple signal.
6. The control circuit of the voltage converter according to any one of claims 2 to 4, wherein the first charging/discharging branch is charged faster than discharged;
the positive input end of the subtraction circuit is connected to the first charge-discharge branch, and the negative input end of the subtraction circuit is connected to the second charge-discharge branch, so that the first ripple voltage is used for performing subtraction operation on the second ripple voltage to obtain and output the ripple signal.
7. The control circuit of the voltage converter according to any of claims 2 to 4, wherein the second charging/discharging branch comprises a second resistor and a second capacitor, a first end of the second resistor is used for being connected to the switch node, a second end of the second resistor and the second capacitor are connected in series to the ground, and a connection node of the second resistor and the second capacitor is connected to the subtraction circuit as an output of the second charging/discharging branch.
8. The control circuit of a voltage converter according to claim 1, wherein said fixed drive time generating circuit comprises: the circuit comprises a current source, a first switch, a third resistor, a second switch, a third capacitor and a comparator;
the input end of the current source and the first conducting end of the first switch are used for being connected to the output of the voltage converter, the output end of the current source is connected to the positive input end of the comparator, the second conducting end of the first switch is connected to the positive input end of the comparator through the third resistor, the first conducting end of the second switch and the first end of the third capacitor are connected to the positive input end of the comparator, the negative input end of the comparator is connected to a first voltage, and the first voltage is a difference value between the output voltage and the input voltage of the voltage converter.
9. The control circuit of a voltage converter according to claim 8, wherein the switching period satisfies: t = R3 × C3, where T is the switching period, R3 is the resistance value of the third resistor, and C3 is the capacitance value of the third capacitor.
10. An integrated circuit chip comprising the control circuit of the voltage converter of any of claims 1 to 9.
11. A voltage conversion circuit comprising a voltage converter having a switch node for coupling to an output of the voltage converter or to ground, the voltage conversion circuit further comprising the integrated circuit chip of claim 10, the integrated circuit chip for controlling the voltage converter for power conversion.
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| CN103023326A (en) * | 2012-12-11 | 2013-04-03 | 矽力杰半导体技术(杭州)有限公司 | Constant time control method, control circuit and switching regulator using same |
| CN106059290A (en) * | 2016-08-02 | 2016-10-26 | 成都芯源系统有限公司 | Multi-channel DC-DC converter and control circuit and method |
| CN111431405A (en) * | 2020-04-13 | 2020-07-17 | 矽力杰半导体技术(杭州)有限公司 | Voltage ripple control circuit and control method |
| CN111934547A (en) * | 2020-09-17 | 2020-11-13 | 深圳英集芯科技有限公司 | RBCOT architecture buck converter circuit, ripple compensation method and chip |
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| US7482791B2 (en) * | 2006-09-11 | 2009-01-27 | Micrel, Inc. | Constant on-time regulator with internal ripple generation and improved output voltage accuracy |
| US7482793B2 (en) * | 2006-09-11 | 2009-01-27 | Micrel, Inc. | Ripple generation in buck regulator using fixed on-time control to enable the use of output capacitor having any ESR |
| CN114389451A (en) * | 2020-10-21 | 2022-04-22 | 圣邦微电子（北京）股份有限公司 | Switch converter and control circuit and control method thereof |
| CN113162402B (en) * | 2021-04-26 | 2024-02-23 | 矽力杰半导体技术(杭州)有限公司 | Control circuit for switching converter |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103023326A (en) * | 2012-12-11 | 2013-04-03 | 矽力杰半导体技术(杭州)有限公司 | Constant time control method, control circuit and switching regulator using same |
| CN106059290A (en) * | 2016-08-02 | 2016-10-26 | 成都芯源系统有限公司 | Multi-channel DC-DC converter and control circuit and method |
| CN111431405A (en) * | 2020-04-13 | 2020-07-17 | 矽力杰半导体技术(杭州)有限公司 | Voltage ripple control circuit and control method |
| CN111934547A (en) * | 2020-09-17 | 2020-11-13 | 深圳英集芯科技有限公司 | RBCOT architecture buck converter circuit, ripple compensation method and chip |
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