CN111707857B - High-precision sampling method for output current of buck-boost converter - Google Patents
High-precision sampling method for output current of buck-boost converter Download PDFInfo
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Abstract
A high-precision sampling method for output current of a buck-boost converter belongs to the technical field of power management. When the buck-boost converter is in a boost mode, sampling current flowing through a first switch, and calculating output current of the buck-boost converter in the boost mode according to the sampled current of the first switch; when the buck-boost converter is in the buck mode, sampling the current flowing through the fourth switch, and calculating the output current of the buck-boost converter in the buck mode according to the sampled current of the fourth switch. According to different characteristics of the buck-boost converter in the boost mode and the buck mode, the output current sampling schemes in the boost mode and the buck mode are respectively designed, continuous and accurate output current can be obtained.
Description
Technical Field
The invention belongs to the field of power management in integrated circuit design and application, and relates to a sampling method of output current of a buck-boost converter, which can improve the output current limiting precision of the buck-boost converter when the buck-boost converter works in a boost interval.
Background
Fig. 8 is a control schematic diagram of a conventional buck-boost converter without output current limiting. The buck-boost converter can only realize a constant voltage mode, namely can only regulate different output voltages, and cannot realize constant current control (regulate different output currents). When the input voltage is higher than the output voltage, the chip automatically selects a BUCK (BUCK) control mode; when the input voltage is lower than the output voltage, the chip automatically selects a BOOST (BOOST) control mode. The main disadvantage of this buck-boost controller in pure constant voltage mode is the inability to support constant current control that outputs different currents.
In order to realize constant current control of different output currents, a conventional method is to connect an external sampling resistor r_ext in series to an output loop, and the control principle is shown in fig. 9. In this control mode, since the current flowing through the external sampling resistor r_ext is continuous regardless of whether the control mode is operated in the buck mode or the boost mode, the current can be relatively accurately sampled in both the boost mode and the buck mode by the external sampling resistor r_ext, and thus high-precision output current control can be realized in this mode. However, the method for connecting the external sampling resistor in series has the biggest defect that an external sampling resistor R_EXT needs to be additionally connected in series, and the sampling resistor needs high precision due to the high-precision output current limiting, so that high cost is brought; at the same time, due to the existence of the resistor, extra power is consumed on the resistor, and the efficiency of the system is reduced.
In order to realize the output current limiting function of the buck-boost converter and avoid the additional power loss and the cost increase caused by the series resistance at the output end, the conventional method is to obtain the output current by sampling the switching tube of the buck-boost converter. The 4-tube buck-boost converter structure is shown in fig. 1, and comprises four switching tubes Q1-Q4 and an inductor L1, and generally, when there is an output current limiting requirement, the output current is obtained by sampling the current of the switching tube Q4.
Specifically, the current limiting of the output of the buck-boost converter is realized by the current of the sampling switch tube Q4, the control schematic diagram is shown in fig. 10, and besides the conventional voltage loop, the current loop control is realized by adding the current of the sampling switch tube Q4. The basic principle of constant current control is: when the output current is gradually increased, the external sampling current passing through the switching tube Q4 is gradually increased, the voltage flowing through the current limiting resistor R1 is gradually increased, that is, the voltage of ILIM2 at the upper end of the current limiting resistor R1 in fig. 10 is gradually increased, when the voltage of ILIM2 is consistent with the voltage reference ref_cc of constant current control, the output current limiting loop starts to act, if the voltage of ILIM2 continues to be increased, the COMP voltage output by the whole loop is reduced, after the COMP voltage is reduced, the output current of the whole loop is reduced, and thus the sampling voltage of ILIM2 is also reduced. After the final current limiting loop has stabilized, the voltage of ILIM2 will be equal to ref_cc.
However, this control method has the disadvantage that when the input voltage VIN of the BUCK-boost converter is higher than the output voltage VOUT thereof, the chip operates in BUCK (BUCK) mode, and at this time, the switching tube Q1 and the switching tube Q2 are in ON or OFF (ON/OFF) states, the switching tube Q3 is in a normally OFF (OFF) state, and the switching tube Q4 is in a normally ON (ON) state, as shown in fig. 2, and at this time, the current of the output current-limiting sampling switching tube Q4 is consistent with the inductor current, which is a complete working cycle, as shown in fig. 3. Therefore, the conventional output current sampling method can obtain good output current limiting precision when the buck-boost converter works in the buck mode. However, when the input voltage VIN of the buck-BOOST converter is lower than the output voltage VOUT thereof, the chip operates in a BOOST (BOOST) mode, and the switching transistor Q3 and the switching transistor Q4 are in an ON or OFF (ON/OFF) state, the switching transistor Q2 is in a normally OFF (OFF) state, and the switching transistor Q1 is in a normally ON (ON) state, as shown in fig. 4. The output end upper tube, namely the switching tube Q4, is in a switching alternating state, so that output current cannot be continuously sampled, particularly when the boosting proportion is high, the working time of the output end upper tube is short, the sampling time of the switching tube Q4 is short, and in order to avoid sampling errors, a sampling shielding time of tens of ns is usually designed for each switching, so that the sampling errors are generated; because the shielding time is fixed, when the Q4 pipe is turned on for a shorter time, the larger the proportion of the shielding time to the turning on time is, the larger the sampling error is caused.
As shown in fig. 5, when the buck-BOOST converter works in a BOOST (BOOST) interval, the switching tube Q4 samples a current sampling waveform when the inductor current, where IL1 is a waveform of the inductor current at the output end, the VC1 signal is a control signal in the sampling amplifier of the switching tube Q4, the level of the signal directly reflects the magnitude of the output inductor current, the isns_q4 is a sampling output current signal of the sampling amplifier sampling the current of the switching tube Q4, and the HD2 signal is a signal for controlling the switching tube Q4 to be turned on and off; the solid line signal in the isns_q4 waveform is an ideal current sampling signal for sampling the switching transistor Q4, but in order to prevent the sampling circuit from abnormally operating the sampling current when the switching transistor Q4 is just turned on to cause false triggering of current protection, a sampling mask time of several tens ns is usually provided, and the dotted line part shown in fig. 5 is a true current sampling waveform. The sampling current is smaller than the actual switching tube Q4 current in the initial stage of the boost mode sampling the switching tube Q4. The sampling error in the initial stage is the difference between the solid line current and the dotted line current, and the sampling error has the same error amount in each period. When the chip works at a high boost ratio, the working time of the output switching tube Q4 is shortened (namely, the time for switching tube Q4 to be turned on is shortened), and the proportion of the sampling error to the total on time is obviously increased, so that the total current sampling error is increased, as shown in fig. 5. And finally, the accuracy of the output sampling current of the buck-boost converter is obviously deteriorated under the condition of high boost ratio.
Therefore, when the buck-boost converter works in the boost mode, if the conventional switching tube Q4 output current sampling method is still adopted, the current sampling error becomes large, and the final output current limiting precision becomes low.
Disclosure of Invention
Aiming at the defect that the output current sampling precision of the traditional buck-boost converter is obviously reduced when the buck-boost converter works in the boost mode, the invention provides a high-precision buck-boost converter output current sampling method, and particularly designs the output current sampling method when the buck-boost converter works in the boost mode, so that the sampling precision and the output current limiting precision of the output current can be improved when the buck-boost converter works in the boost mode.
The invention provides a method for sampling output current in a boost mode of a boost-buck converter, which comprises the following steps:
the high-precision output current sampling method in the boost mode of the buck-boost converter comprises an inductor, a first switch connected between a first end of the inductor and an input end of the buck-boost converter, a second switch connected between the first end of the inductor and a ground level, a third switch connected between the second end of the inductor and the ground level, and a fourth switch connected between the second end of the inductor and an output end of the buck-boost converter; when the voltage of the input end of the buck-boost converter is lower than the voltage of the output end of the buck-boost converter, the first switch is in a normally open state, the second switch is in a normally closed state, the third switch and the fourth switch are alternately turned on and off, and the buck-boost converter works in a boost mode;
the output current sampling method in the boost mode of the buck-boost converter comprises the following steps:
step one, sampling the current flowing through the first switch to obtain a sampling current ISNS_Q1;
and step two, calculating ISNS_Q1X (1-D1) to obtain output sampling current in the boost mode of the buck-boost converter, wherein (1-D1) is the proportion of the opening time of the fourth switch to one switching period.
Specifically, in order to realize output current limiting of the buck-boost converter, when the buck-boost converter works in a boost mode, the sampling current isns_q1 is converted into a first voltage on a current limiting resistor, and the first voltage is processed by a duty ratio control circuit to generate a filtering voltage, so that the filtering voltage is as close as possible to an external current limiting reference voltage when the output current limiting of the buck-boost converter is stable;
the duty ratio control circuit comprises an operational amplifier, a fifth switch, a sixth switch and a filtering module,
the non-inverting input end of the operational amplifier is connected with the first voltage, and the inverting input end of the operational amplifier is connected with the output end of the operational amplifier;
the fifth switch is connected between the output end of the operational amplifier and the input end of the filtering module, and the sixth switch is connected between the input end of the filtering module and the ground;
the control signal of the fifth switch is in phase with the control signal of the fourth switch, the control signal of the sixth switch is in phase with the control signal of the fourth switch, and when the fourth switch is closed, the fifth switch is closed, and the sixth switch is opened; when the fourth switch is opened, the fifth switch is opened, and the sixth switch is closed;
and the output end of the filtering module outputs the filtering voltage.
Specifically, the filtering module is a one-stage RC filtering structure, or a two-stage RC filtering structure, or a multi-stage RC filtering structure, wherein the two-stage RC filtering structure comprises a first filtering resistor, a second filtering resistor, a first filtering capacitor and a second filtering capacitor, one end of the first filtering resistor is used as an input end of the filtering module, the other end of the first filtering resistor is connected with one end of the second filtering resistor and is grounded after passing through the first filtering capacitor, and the other end of the second filtering resistor is used as an output end of the filtering module and is grounded after passing through the second filtering capacitor.
Specifically, the external current-limiting reference voltage is provided with a plurality of selectable voltage values, and the filtered voltage is enabled to be as close as possible to the voltage value of the selected external current-limiting reference voltage when the output current-limiting stability of the buck-boost converter is achieved through trimming of the external current-limiting reference voltage, so that the output current-limiting precision is improved as much as possible.
Based on the sampling method of the output current of the buck-boost converter in the boost mode, the invention also provides an output current sampling method of the buck-boost converter by combining different characteristics of the boost mode and the buck mode, and the currents of the fourth switch and the first switch are respectively sampled in the boost mode and the buck mode to calculate the output current, so that the sampling precision of the output current is improved, and the design flexibility is also improved.
The invention provides a technical scheme of an output current sampling method of a buck-boost converter, which comprises the following steps:
an output current sampling method of a buck-boost converter, wherein the buck-boost converter comprises an inductor, a first switch connected between a first end of the inductor and an input end of the buck-boost converter, a second switch connected between the first end of the inductor and a ground level, a third switch connected between the second end of the inductor and the ground level, and a fourth switch connected between the second end of the inductor and an output end of the buck-boost converter;
the output current sampling method of the buck-boost converter comprises the steps of sampling output current in the buck-boost mode of the buck-boost converter and sampling output current in the buck-boost mode of the buck-boost converter:
when the voltage of the input end of the buck-boost converter is lower than the voltage of the output end of the buck-boost converter, the first switch is in a normally open state, the second switch is in a normally closed state, the third switch and the fourth switch are alternately turned on and off, and the buck-boost converter works in a boost mode; sampling the current flowing through the first switch to obtain a sampling current ISNS_Q1, and calculating ISNS_Q1X (1-D1) to obtain an output sampling current of the buck-boost converter in a boost mode, wherein (1-D1) is the proportion of the opening time of the fourth switch to one switching period;
when the voltage of the input end of the buck-boost converter is higher than the voltage of the output end of the buck-boost converter, the fourth switch is in a normally open state, the third switch is in a normally closed state, the first switch and the second switch are alternately turned on and off, and the buck-boost converter works in a buck mode; and sampling the current flowing through the fourth switch to obtain a sampling current ISNS_Q4, and calculating ISNS_Q4 to obtain the output sampling current of the buck-boost converter in the buck mode.
Specifically, in order to realize output current limiting of the buck-boost converter, when the buck-boost converter works in a boost mode, the sampling current isns_q1 is converted into a first voltage on a current limiting resistor, when the buck-boost converter works in a buck mode, the sampling current isns_q4 is converted into a second voltage on the current limiting resistor, and the first voltage or the second voltage is processed by a duty ratio control circuit to generate a filtering voltage, so that the filtering voltage is as close as possible to an external current limiting reference voltage when the buck-boost converter outputs a stable current limiting;
the duty ratio control circuit comprises an operational amplifier, a fifth switch, a sixth switch and a filtering module,
the non-inverting input end of the operational amplifier is connected with the first voltage or the second voltage, and the inverting input end of the operational amplifier is connected with the output end of the operational amplifier;
the fifth switch is connected between the output end of the operational amplifier and the input end of the filtering module, and the sixth switch is connected between the input end of the filtering module and the ground;
the control signal of the fifth switch is in phase with the control signal of the fourth switch, the control signal of the sixth switch is in phase with the control signal of the fourth switch, and when the fourth switch is closed, the fifth switch is closed, and the sixth switch is opened; when the fourth switch is opened, the fifth switch is opened, and the sixth switch is closed;
and the output end of the filtering module outputs the filtering voltage.
Specifically, the filtering module is a one-stage RC filtering structure, or a two-stage RC filtering structure, or a multi-stage RC filtering structure, wherein the two-stage RC filtering structure comprises a first filtering resistor, a second filtering resistor, a first filtering capacitor and a second filtering capacitor, one end of the first filtering resistor is used as an input end of the filtering module, the other end of the first filtering resistor is connected with one end of the second filtering resistor and is grounded after passing through the first filtering capacitor, and the other end of the second filtering resistor is used as an output end of the filtering module and is grounded after passing through the second filtering capacitor.
Specifically, the external current-limiting reference voltage is provided with a plurality of selectable voltage values, and the filter voltage is enabled to be as close as possible to the voltage value of the selected external current-limiting reference voltage when the output current-limiting stability of the buck-boost converter is achieved through trimming of the external current-limiting reference voltage, so that the purpose of improving the output current-limiting precision as much as possible is achieved.
The working principle of the invention is as follows:
when the buck-boost converter is operating in the boost phase, it is in the on-off state for the fourth switch Q4, but is always in the on-off state for the first switch Q1, as shown in fig. 4. At this time, the current waveform of the first switch Q1 is identical to the inductor current waveform, so the method of sampling the current of the fourth switch Q4 in the conventional output current sampling method is improved, and the current of the first switch Q1 is sampled after the boost mode is switched, so that the current of the first switch Q1 is continuously sampled. Since the current of the first switch Q1 is continuous and has no switch, the sampled current is theoretically almost free from switch sampling error, similar to the current of the fourth switch Q4 when the BUCK-boost converter operates in BUCK (BUCK) mode, and since the sampled current is consistent with the inductor current, the current sampling precision is good, so the method for obtaining the inductor current by sampling the current of the first switch Q1 in boost mode is very accurate.
In the boost mode, the obtained sampling current isns_q1 of the first switch Q1 is the sampling current of the input current i_vin, and i_vin× (1-D1) is the final desired output current, so that the current of the output tube, i.e., the fourth switch Q4, is indirectly sampled by sampling the current of the first switch Q1. D1 is the duty cycle of the buck-boost converter in boost mode, i.e., the on duty cycle of the third switch Q3, (1-D1) is the on duty cycle of the fourth switch Q4, as shown in fig. 7. In the buck mode, the output sampling current is obtained by obtaining the sampling current isns_q4 of the fourth switch Q4, and since the sampled currents isns_q1 and isns_q4, and the duty ratio D1 are easily controllable and relatively accurate, the output sampling current limiting accuracy of the buck-boost converter is improved.
The beneficial effects of the invention are as follows: according to the output current sampling method, the output sampling current is obtained through the calculation of the input current of the sampling first switch in the boost mode, so that continuous and accurate output sampling current can be obtained, the problems of large current sampling error and low output current limiting precision in the boost mode caused by the fourth switch with alternating sampling switch states in the traditional output current sampling method are solved, the output sampling current limiting precision of the boost-buck converter is improved, particularly the output sampling current limiting precision in the boost mode is improved, and the output current limiting precision is further improved through trimming of external current limiting reference voltage; in addition, according to different characteristics of the buck-boost converter in the boost mode and the buck mode, the current of the first switch Q1 and the current of the fourth switch Q4 are respectively sampled in the boost mode and the buck mode to calculate the output current, so that the design flexibility is improved, and the final sampling precision and the output current limiting precision are improved.
Drawings
Fig. 1 is a schematic diagram of a buck-boost converter.
Fig. 2 is a control schematic diagram of the buck-boost converter operating in buck mode.
Fig. 3 is a waveform diagram of current sampling of the fourth switch Q4 when the buck-boost converter is in buck mode.
Fig. 4 is a control schematic diagram of the buck-boost converter operating in the boost mode.
Fig. 5 is a waveform diagram of sampling of the fourth switch Q4 when the buck-boost converter is operating in the boost mode.
Fig. 6 is a waveform diagram of the current sampling of the first switch Q1 when the buck-boost converter is operating in boost mode.
Fig. 7 is an operation waveform diagram of the third switch Q3 and the fourth switch Q4 when the buck-boost converter operates in the boost mode.
Fig. 8 is a control schematic diagram of a buck-boost converter in a pure constant voltage mode according to the prior art.
Fig. 9 is a schematic diagram of a prior art buck-boost converter control with output current limiting via an external sampling resistor.
Fig. 10 is a schematic diagram of a prior art buck-boost converter control with output current limiting achieved by sampling an internal switching tube Q4.
Fig. 11 is a schematic diagram of a buck-boost converter control according to the present invention that can improve the accuracy of the output current limit during boost mode operation.
Fig. 12 is a schematic diagram of a duty cycle control employed in an embodiment of the present invention.
FIG. 13 is a schematic diagram of a current limiting loop reference point voltage selection scheme employed in an embodiment of the present invention.
Detailed Description
The technical scheme of the invention is described in detail below with reference to the accompanying drawings and specific embodiments.
As shown in fig. 1, the buck-boost converter includes an inductor L1, a first switch Q1 connected between a first end of the inductor L1 and an input end of the buck-boost converter, a second switch Q2 connected between the first end of the inductor L1 and a ground level, a third switch Q3 connected between the second end of the inductor L1 and the ground level, and a fourth switch Q4 connected between the second end of the inductor L1 and an output end of the buck-boost converter.
When the input voltage VIN is lower than the output voltage VOUT, the buck-boost converter is in the boost mode, at this time, the second switch Q2 is turned off for a long period, the first switch Q1 is turned on for a long period, and the third switch Q3 and the fourth switch Q4 are in the normal switch states, as shown in fig. 4. Assuming that the duty cycle at which the third switch Q3 is turned on is D1, the on duty cycle at which the fourth switch Q4 operates is 1-D1 when the buck-boost converter is in the continuous mode. When in boost mode, the output voltage vout=vin/(1-D1). Since the buck-boost converter is in a switching state for the fourth switch Q4 when operating in the boost stage, but is always in a normally open state for the first switch Q1 (no switch is present at this time), the waveform of the sampling current isns_q1 of the first switch Q1 is identical to the waveform of the inductor current IL1 at this time, as shown in fig. 6, so unlike the conventional output current sampling method in which the current of the fourth switch Q4 is also sampled in the boost mode, the present invention proposes to switch the intermittent current of the fourth switch Q4 to the continuous current of the first switch Q1 in the boost mode, so that the current of the first switch Q1 can be continuously sampled, and the sampled current is theoretically free of switching sampling errors, so that the sampled inductor current is very accurate. At this time, the sampling current isns_q1 of the first switch Q1 is the sampling current of the input current i_vin, and the sampling circuit may be used to sample the current flowing through the first switch Q1 to obtain the sampling current isns_q1 proportional to the current flowing through the first switch Q1; also, since the duty cycle 1-D1 of the fourth switch Q4 in the boost operating mode is very easily obtained, as shown in fig. 7, isns_q1× (1-D1) is the final output sampling current by automatic calculation of the duty cycle control circuit. The ISNS_Q1 and the ISNS_Q1 are easy to control and relatively accurate, so that the output current sampling method provided by the invention indirectly realizes the current sampling of the fourth switch Q4 of the output tube through the sampling of the first switch Q1 in a boost mode, thereby improving the accuracy of the output sampling current.
When the input voltage VIN is higher than the output voltage VOUT, the buck-boost converter is in a buck mode, the fourth switch Q4 is opened for a long time, the third switch Q3 is turned off for a long time, and the first switch Q1 and the second switch Q2 are in a normal switch state; because the fourth switch Q4 is opened for a long time, the current of the fourth switch Q4 can be directly sampled to calculate the output current, and the specific method is as follows: the current through the fourth switch Q4 is sampled to obtain a sampled current isns_q4, and the output sampled current of the buck-boost converter in buck mode is obtained through isns_q4 (since the sampled Q4 current is continuous during buck mode operation, representing the output current, and therefore no further multiplication by the duty cycle is required here).
The output sampling current of the buck-boost converter obtained by the invention can be used for output current limiting, and as shown in fig. 11, the invention provides a high-precision output current limiting (especially suitable for operating in a boost mode) structural schematic diagram of the buck-boost converter. The current sampled by the external current of the switching tube Q1 and the current sampled by the external current of the switching tube Q4 flow into the current-limiting resistor R1, and C1 on the right side of the current-limiting resistor R1 is a current-limiting filter capacitor, so as to filter the ripple current flowing into the current-limiting resistor R1. When the input voltage VIN of the BUCK-boost converter is higher than the output voltage VOUT and the chip is in a BUCK (BUCK) mode, only the external current of the switching tube Q4 is sampled, at the moment, the switch S1 for controlling the switching tube Q4 to sample is closed, the switch S2 for controlling the switching tube Q1 to sample is opened, and thus, only the external current of the switching tube Q4 flows into the current limiting resistor R1 to sample current; when the input voltage VIN of the buck-BOOST converter is lower than the output voltage VOUT and the chip is in a BOOST (BOOST) mode, only the external current of the switching tube Q1 is sampled, and at this time, the switch S2 is closed, and the switch S1 is opened, so that the external current flowing into the current limiting resistor R1 is only the external current of the switching tube Q1.
The externally limited sampling current from the switching tube Q4 or the switching tube Q1 flows into the current limiting resistor R1 and the current limiting filter capacitor C1 to form a voltage ILIM2, that is, the sampling current isns_q1 is converted into a first voltage on the current limiting resistor R1, the sampling current isns_q4 is converted into a second voltage on the current limiting resistor R1, both the first voltage and the second voltage are denoted by ILIM2, the voltage ILIM2 is processed by the corresponding duty ratio control circuit, a stable filter voltage ilim2_fil can be obtained, the filter voltage ilim2_fil is approximately the same as the external current limiting reference ref_cc when the final external current limiting loop works stably, that is, if the input offset voltage (offset) of the operational amplifier gm_cc is temporarily ignored here, ilim2_fil=ref_cc is in the final steady state.
A schematic diagram of the duty control circuit (duty control) is shown in fig. 12. The working principle of the device is as follows: after the input voltage of ilim2 passes through an operational amplifier OP, a signal ilim2_fb is generated, and the offset voltage (offset) of the operational amplifier OP itself is ignored, at this time ilim2_fb=ilim2.
When the input voltage VIN of the BUCK-boost converter is higher than the output voltage VOUT and the chip is in BUCK (BUCK) mode, the switching transistor Q4 is normally open, i.e., normally open (at a fixed logic high level) for the signal ls_on2 shown in fig. 12, so that the signal ls_on2 shown in fig. 12 is at a normally logic high level and the fifth switch S3 is always turned off, and the signal ls_on2_z after the signal ls_on2 passes through an inverter INV1 is at a normally logic low voltage and the sixth switch S4 is always turned ON. At this time, the voltage of the signal ilim2_in IN fig. 12 is equal to ilim2_fb, and the signal ilim2_fil is obtained after the two-stage filter circuit consisting of the resistors RF1, RE2 and the capacitors CF1, CF2 IN the subsequent stage, and the fifth switch S3 and the sixth switch S4 are not switched, so ilim2_fil=ilim2_in=ilim2. That is, when the chip is in the buck mode, the ilim2 voltage obtained by current limiting is sampled from the outside of the switching tube Q4, and finally, the ilim2_fil voltage is still equal to the ilim2 voltage after passing through the duty cycle control circuit.
When the input voltage VIN of the buck-BOOST converter is lower than the output voltage VOUT, the chip is in BOOST (BOOST) mode, since the switching transistor Q4 is in the switching state, i.e., the switching state for the signal ls_on2 shown in fig. 12. Therefore, IN the boost mode, the signal ls_on2 shown IN fig. 12 is IN a switching state, when the switching tube Q4 is IN a closed state, and the switching tube Q3 is IN an off state, the signal ls_on2 is IN a logic high level, and at the same time, the fifth switch S3 is IN a closed state, the signal ls_on2 is IN a logic low level after the signal ls_on2 passes through the inverter INV1, that is, the sixth switch S4 is IN an off state, and at the same time ilim2_in=ilim2_fb; if the duty cycle of the switching transistor Q4 is (1-D1) for the entire duty cycle, the ratio of the time ilim2_in=ilim2_fb for one duty cycle is (1-D1); when the switching tube Q3 is IN the closed state and the switching tube Q4 is IN the off state, the signal ls_on2 is at a logic low level, and at this time, the fifth switch S3 is IN an off state, the signal ls_on2_z after the signal ls_on2 passes through the inverter INV1 is at a logic high level, that is, the sixth switch S4 is IN the closed state, and at this time, the signal ilim2_in is pulled to the ground through the sixth switch S4, so ilim2_in=0v, and if the duty ratio of the switching tube Q3 is D1, the proportion of the time ilim2_in=0v IN one duty cycle is D1. Therefore, when the chip is IN the boost state, the proportion of ilim2_in (1-D1) is equal to ilim2_fb and the proportion of D1 is equal to 0V IN a complete working period, and then ilim2_fil=ilim2_fb× (1-D1) =ilim2× (1-D1) is obtained after the chip is finally stabilized by the following filtering module, that is, when the chip is IN the boost mode, ilim2 voltage obtained by current limiting is sampled from the outside of the switching tube Q1, and finally ilim2_fil is equal to ilim2× (1-D1) after the chip is finally IN the duty ratio control circuit, and finally, when the external current limiting loop is stable, ref_cc=ilim2_fil=ilim2× (1-D1). The filtering module may be a one-stage RC filtering structure, or a two-stage RC filtering structure, or a multi-stage RC filtering structure, as long as the time constant of RC is large enough to ensure that the switch signal voltage of ilim2_in is filtered to be close to the DC voltage. As shown in fig. 12, the filtering module in this embodiment adopts a two-stage filtering circuit composed of a first filtering resistor RF1, a second filtering resistor RE2, a first filtering capacitor CF1, and a second filtering capacitor CF 2. According to fig. 4 and 6, it can be seen that when the chip is in a boost state, the switching tube Q1 is in a normally open state, ILIM2 voltage generated by sampling current outside the Q1 is very accurate, and the duty ratio (1-D1) for the filter control circuit is also very accurate, so that the accuracy of external output current limiting can be obviously improved when the system is in boost.
Before when the analysis of the current loop is active, the input offset voltage (offset) of the amplifier gm_cc shown in fig. 11 and the input offset voltage (offset) of the operational amplifier OP in the duty cycle control circuit shown in fig. 12 are omitted for understanding, and when the gate control signal HD2 of the switching transistor Q4 and the gate control signal LD2 of the switching transistor Q3 are used to drive the switching transistors Q4 and Q3, the selection of different dead time has a slight influence ON the operation time of the signal ls_on2 shown in fig. 11, which eventually results in some errors of ilim2_fil obtained after the system is stabilized, and these errors will have some influence ON the output current limiting precision. In order to further reduce the influence of the errors on the output current limiting precision, and to improve the output current limiting precision as much as possible, different current limiting reference voltage values can be selected for each chip according to the needs, and the schematic diagram of the working principle is shown in fig. 13, in this embodiment, the control of the 4 switch tube references can be realized by using a 2-to-4 decoder through the control of a two-bit trimming (trimming) signal trim_vref_cc <1:0>, and different output current limiting reference voltage values are selected, specifically, different output current limiting reference voltage values vref_cc1 to vref_cc4 are selected according to different input offset voltages and different dead time of each chip. Of course, the trimming signal can be controlled by 1 bit or multiple bits as required. The fewer the number of bits of the trimming signal is, the simpler the control circuit is, but the error of the final output current-limiting reference voltage value is slightly larger; the more bits the trimming signal is, the more complex the control circuit is, but the error of the final output current-limiting reference voltage value is slightly smaller.
In summary, according to the different characteristics of the buck-boost converter in the boost mode and the buck mode, the invention designs the sampling scheme of the output current respectively, and can obtain continuous and accurate sampling current during both boost and buck, thereby solving the problems of large current sampling error and low output current limiting precision in the boost mode in the traditional output current sampling method and improving the output sampling limiting precision and the design flexibility of the buck-boost converter. The invention also provides an application mode of using the obtained sampling current output by the buck-boost converter to output current limitation of the buck-boost converter, the sampling current ISNS_Q1 of Q1 is converted on a current limiting resistor R1 in a boost mode, the sampling current ISNS_Q4 of Q4 is converted on the current limiting resistor R1 in a buck mode, the voltage ILIM2 converted by the current limiting resistor R1 is processed by a duty ratio control circuit to generate a filter voltage ILIM2_FIL, and the filter voltage ILIM2_FIL is as close as possible to an external current limiting reference voltage REF_CC when the output current limitation of the buck-boost converter is stable.
Those of ordinary skill in the art can make various other specific modifications and combinations from the teachings of the present disclosure without departing from the spirit thereof, and such modifications and combinations remain within the scope of the present disclosure.
Claims (6)
1. The high-precision output current sampling method in the boost mode of the buck-boost converter comprises an inductor, a first switch connected between a first end of the inductor and an input end of the buck-boost converter, a second switch connected between the first end of the inductor and a ground level, a third switch connected between the second end of the inductor and the ground level, and a fourth switch connected between the second end of the inductor and an output end of the buck-boost converter; when the voltage of the input end of the buck-boost converter is lower than the voltage of the output end of the buck-boost converter, the first switch is in a normally open state, the second switch is in a normally closed state, the third switch and the fourth switch are alternately turned on and off, and the buck-boost converter works in a boost mode;
the output current sampling method in the boost mode of the buck-boost converter is characterized by comprising the following steps of:
step one, sampling the current flowing through the first switch to obtain a sampling current ISNS_Q1;
calculating ISNS_Q1X (1-1) to obtain output sampling current in a boost mode of the buck-boost converter, wherein (1-1) is the proportion of the opening time of the fourth switch to one switching period;
in order to realize output current limiting of the buck-boost converter, when the buck-boost converter works in a boost mode, the sampling current ISNS_Q1 is converted into a first voltage on a current limiting resistor, and the first voltage is processed by a duty ratio control circuit to generate a filtering voltage, so that the filtering voltage is as close as possible to an external current limiting reference voltage when the output current limiting of the buck-boost converter is stable;
the duty ratio control circuit comprises an operational amplifier, a fifth switch, a sixth switch and a filtering module,
the non-inverting input end of the operational amplifier is connected with the first voltage, and the inverting input end of the operational amplifier is connected with the output end of the operational amplifier;
the fifth switch is connected between the output end of the operational amplifier and the input end of the filtering module, and the sixth switch is connected between the input end of the filtering module and the ground;
the control signal of the fifth switch is in phase with the control signal of the fourth switch, the control signal of the sixth switch is in phase with the control signal of the fourth switch, and when the fourth switch is closed, the fifth switch is closed, and the sixth switch is opened; when the fourth switch is opened, the fifth switch is opened, and the sixth switch is closed;
and the output end of the filtering module outputs the filtering voltage.
2. The method for sampling output current in a boost mode of a high-precision buck-boost converter according to claim 1, wherein the filtering module is a one-stage RC filtering structure, or a two-stage RC filtering structure, or a multi-stage RC filtering structure, and the two-stage RC filtering structure includes a first filtering resistor, a second filtering resistor, a first filtering capacitor and a second filtering capacitor, one end of the first filtering resistor is used as an input end of the filtering module, the other end of the first filtering resistor is connected to one end of the second filtering resistor and is grounded after passing through the first filtering capacitor, and the other end of the second filtering resistor is used as an output end of the filtering module and is grounded after passing through the second filtering capacitor.
3. The method for sampling output current in a boost mode of a high-precision buck-boost converter according to claim 1 or 2, wherein the external current limiting reference voltage is provided with a plurality of selectable voltage values, and the filtered voltage is made as close as possible to the voltage value of the selected external current limiting reference voltage when the buck-boost converter output current limiting is stable by trimming the external current limiting reference voltage.
4. The high-precision buck-boost converter output current sampling method comprises an inductor, a first switch connected between a first end of the inductor and an input end of the buck-boost converter, a second switch connected between the first end of the inductor and a ground level, a third switch connected between the second end of the inductor and the ground level, and a fourth switch connected between the second end of the inductor and an output end of the buck-boost converter;
the method is characterized in that the method for sampling the output current of the buck-boost converter comprises the steps of sampling the output current of the buck-boost converter in the boost mode and sampling the output current of the buck-boost converter in the buck mode:
when the voltage of the input end of the buck-boost converter is lower than the voltage of the output end of the buck-boost converter, the first switch is in a normally open state, the second switch is in a normally closed state, the third switch and the fourth switch are alternately turned on and off, and the buck-boost converter works in a boost mode; sampling the current flowing through the first switch to obtain a sampling current ISNS_Q1, and calculating ISNS_Q1× (1-1) to obtain an output sampling current of the buck-boost converter in a boost mode, wherein (1-1) is the proportion of the opening time of the fourth switch to one switching period;
when the voltage of the input end of the buck-boost converter is higher than the voltage of the output end of the buck-boost converter, the fourth switch is in a normally open state, the third switch is in a normally closed state, the first switch and the second switch are alternately turned on and off, and the buck-boost converter works in a buck mode; sampling the current flowing through the fourth switch to obtain a sampling current ISNS_Q4, and calculating ISNS_Q4 to obtain an output sampling current of the buck-boost converter in a buck mode;
in order to realize output current limiting of the buck-boost converter, when the buck-boost converter works in a boost mode, the sampling current ISNS_Q1 is converted into a first voltage on a current limiting resistor, when the buck-boost converter works in a buck mode, the sampling current ISNS_Q4 is converted into a second voltage on the current limiting resistor, and the first voltage or the second voltage is processed by a duty ratio control circuit to generate a filtering voltage, so that the filtering voltage is as close as possible to an external current limiting reference voltage when the buck-boost converter output current limiting is stable;
the duty ratio control circuit comprises an operational amplifier, a fifth switch, a sixth switch and a filtering module,
the non-inverting input end of the operational amplifier is connected with the first voltage or the second voltage, and the inverting input end of the operational amplifier is connected with the output end of the operational amplifier;
the fifth switch is connected between the output end of the operational amplifier and the input end of the filtering module, and the sixth switch is connected between the input end of the filtering module and the ground;
the control signal of the fifth switch is in phase with the control signal of the fourth switch, the control signal of the sixth switch is in phase with the control signal of the fourth switch, and when the fourth switch is closed, the fifth switch is closed, and the sixth switch is opened; when the fourth switch is opened, the fifth switch is opened, and the sixth switch is closed;
and the output end of the filtering module outputs the filtering voltage.
5. The method for sampling output current of a high-precision buck-boost converter according to claim 4, wherein the filtering module is a one-stage RC filtering structure, or a two-stage RC filtering structure, or a multi-stage RC filtering structure, wherein the two-stage RC filtering structure comprises a first filtering resistor, a second filtering resistor, a first filtering capacitor and a second filtering capacitor, one end of the first filtering resistor is used as an input end of the filtering module, the other end of the first filtering resistor is connected with one end of the second filtering resistor and is grounded after passing through the first filtering capacitor, and the other end of the second filtering resistor is used as an output end of the filtering module and is grounded after passing through the second filtering capacitor.
6. The method according to claim 4 or 5, wherein the external current limiting reference voltage is set to a plurality of selectable voltage values, and the filtered voltage is made as close as possible to the selected voltage value of the external current limiting reference voltage when the output current limiting of the buck-boost converter is stable by trimming the external current limiting reference voltage.
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| CN101499717A (en) * | 2009-02-17 | 2009-08-05 | 浙江大学 | Controlling method and apparatus for four switch step-up step-down DC-DC converter |
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