CN113114030B - Ramp injection circuit and error compensation method thereof in switching power supply - Google Patents
Ramp injection circuit and error compensation method thereof in switching power supply Download PDFInfo
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- CN113114030B CN113114030B CN202110391755.9A CN202110391755A CN113114030B CN 113114030 B CN113114030 B CN 113114030B CN 202110391755 A CN202110391755 A CN 202110391755A CN 113114030 B CN113114030 B CN 113114030B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
- H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/06—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider
- H02M3/07—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
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Abstract
The ramp injection circuit and the error compensation method thereof in the switching power supply, wherein the ramp voltage generation module comprises a capacitor and a charging current generation unit, and the charging current generation unit is used for generating a charging current related to the difference value of the output voltage and the reference voltage of the switching power supply; the ramp voltage generation module is controlled by a control signal, when the control signal is in a first state, the capacitor is charged by using the charging current so that the voltage on the capacitor is increased, and when the control signal is in a second state, the capacitor is discharged so that the voltage drop on the capacitor is zero; the error compensation module is used for generating a compensation voltage proportional to the reference voltage, and subtracting the compensation voltage from the voltage on the capacitor to obtain a final ramp voltage. When the invention is applied to the switching power supply, the reference voltage is superposed on the voltage on the capacitor and subtracted by the compensation voltage to be used as the final comparison reference, so that the comparison reference is constant, the output voltage of the switching power supply is kept constant under the conditions of different duty ratios, and the error caused by the ramp voltage is eliminated.
Description
Technical Field
The invention belongs to the technical field of power electronics, and relates to a ramp injection circuit, in particular to a ramp injection circuit with an error compensation function and a method for performing error compensation in a switching power supply by using the ramp injection circuit.
Background
With the development of technology, in order to meet market demands, the requirements on the switching power supply are higher and higher, and the switching power supply is generally required to have the advantages of high response speed and the like. The switching power supply with fixed on-time can integrate a ramp wave injection circuit in order to simplify peripheral devices and reduce output ripples. As shown in fig. 1, in a conventional fixed on-time switching power supply with an internally integrated ramp injection circuit, the ramp injection circuit generates a ramp voltage Vripple, which is superimposed on a reference voltage Vref, and then the ramp voltage Vripple is compared with a feedback voltage Vfb of an output voltage Vout of the switching power supply, and PWM is performed according to the comparison result.
Fig. 2 shows a common ramp injection circuit, which charges a capacitor 201 with a fixed charging current to generate a ramp voltage Vripple, but in this structure, the injected ramp waves are different under different duty ratios, and as shown in fig. 3, (b), (c), and (d) in fig. 3 are respectively the case where the ramp voltage Vripple corresponding to three different duty ratios is superposed with a reference voltage Vref and then compared with a feedback voltage Vfb, and (a) in fig. 3 is a schematic diagram of drawing (b), (c), and (d) in fig. 3, it can be seen that the ramp voltages Vripple corresponding to three different duty ratios are different, resulting in different superposed values of Vripple and Vref, and thus resulting in a change of the feedback voltage Vfb.
Since the switching power supply output voltage Vout is (Vfb) ((R1 + R2)/R1) ((Vref + Vripple) ((R1 + R2)/R1, the feedback voltage Vfb differs and the switching power supply output voltage Vout also differs for different duty ratios. It is obvious that the conventional ramp injection circuit causes the switching power supply to introduce an output error, and a ramp injection circuit capable of compensating the output error is required.
Disclosure of Invention
Aiming at the problem of output error introduced by ramp voltage in a switching power supply internally integrated with a ramp injection circuit, the invention provides the ramp injection circuit, which adopts charging current related to the difference value of the output voltage of the switching power supply and reference voltage to replace the traditional fixed current to charge a capacitor to obtain initial ramp voltage, and subtracts compensation voltage proportional to the reference voltage from the initial ramp voltage to obtain final ramp voltage.
The technical scheme of the ramp wave injection circuit provided by the invention is as follows:
a ramp injection circuit comprises a ramp voltage generation module and an error compensation module,
the ramp voltage generation module comprises a capacitor and a charging current generation unit, and the charging current generation unit is used for generating charging current related to the difference value of the output voltage of the switching power supply and the reference voltage; the ramp voltage generation module is controlled by a control signal, when the control signal is in a first state, the capacitor is charged by the charging current so that the voltage on the capacitor rises, and when the control signal is in a second state, the capacitor is discharged so that the voltage drop on the capacitor is zero;
the error compensation module is used for generating a compensation voltage proportional to the reference voltage, and the ramp injection circuit subtracts the compensation voltage from the voltage on the capacitor to obtain a final ramp voltage.
Specifically, the ramp voltage generation module comprises a first switch and a second switch, one end of the first switch is connected with one end of the capacitor and one end of the second switch, the other end of the first switch and the other end of the capacitor are grounded, and the other end of the second switch is connected with the charging current; the first switch and the second switch are controlled by the control signal, when the control signal is in a first state, the second switch is controlled to be connected and the first switch is controlled to be disconnected, and when the control signal is in a second state, the second switch is controlled to be disconnected and the first switch is controlled to be connected.
Specifically, the charging current generating unit includes an error amplifier and a transconductance amplifier, two input ends of the error amplifier are respectively connected to the sampling value of the output voltage of the switching power supply and the reference voltage, an output end of the error amplifier is connected to the input end of the transconductance amplifier, and the output end of the transconductance amplifier outputs the charging current.
Specifically, the transconductance amplifier comprises a first amplifier, a first NMOS transistor, a first PMOS transistor, a second PMOS transistor and a first resistor, wherein a positive input end of the first amplifier is connected with an output end of the error amplifier, a negative input end of the first amplifier is connected with a source electrode of the first NMOS transistor and is grounded through the first resistor, and an output end of the first amplifier is connected with a gate electrode of the first NMOS transistor; the grid electrode of the second PMOS tube is connected with the grid electrode and the drain electrode of the first PMOS tube and the drain electrode of the first NMOS tube, the source electrode of the second PMOS tube is connected with the source electrode of the first PMOS tube and is connected with a power supply, and the drain electrode of the second PMOS tube outputs the charging current.
Specifically, the error compensation module comprises a second amplifier, a second resistor, a third resistor, a fourth resistor and a fifth resistor, the second resistor and the third resistor are connected in series and in parallel between the reference voltage and the ground, and the series point of the second resistor and the third resistor is connected with the positive input end of the second amplifier; the fourth resistor and the fifth resistor are connected in series and in parallel between the output end of the second amplifier and the ground, and the series point of the fourth resistor and the fifth resistor is connected with the negative input end of the second amplifier; the output of the second amplifier generates the compensation voltage.
The ramp injection circuit provided by the invention is applied to a switching power supply to eliminate output errors, and the technical scheme is as follows:
the switching power supply uses a signal obtained by superposing a reference voltage with a ramp voltage as a comparison reference for comparison with a feedback voltage of an output voltage of the switching power supply, generates a pulse width modulation signal according to a comparison result and controls the working duty ratio of a switching device in the switching power supply, wherein the ramp voltage is related to the working duty ratio of the switching device in the switching power supply, and when the working duty ratios of the switching devices in the switching power supply are different, the superposed ramp voltage is also different, so that the comparison reference is changed;
the method for compensating the error of the ramp voltage in the switching power supply comprises the following steps:
generating a charging current related to a difference value of a feedback voltage and a reference voltage of the output voltage of the switching power supply;
step two, a switch device in the switch power supply comprises an upper power tube and a lower power tube which are connected in series and in parallel between a power supply and the ground, a control signal is generated according to a signal of a series point of the upper power tube and the lower power tube, when the control signal is at a low level, the charging current is enabled to charge a capacitor so that the voltage on the capacitor rises, and when the control signal is at a high level, the capacitor is controlled to discharge so that the voltage on the capacitor is reduced to zero;
and thirdly, taking a signal obtained by superposing the reference voltage on the capacitor and subtracting a compensation voltage proportional to the reference voltage as a final comparison reference for comparison with a feedback voltage of the output voltage of the switching power supply, so that the comparison reference is constant, and the error caused by the ramp voltage is eliminated.
Specifically, a feedback voltage of the output voltage of the switching power supply and a reference voltage are input into an error amplifier to obtain an error voltage, and the error voltage is converted into a current signal through a transconductance amplifier to obtain the charging current.
In particular, when
Directly using the reference voltage as the compensation voltage, wherein gmIs the transconductance of said transconductance amplifier, VddIs the voltage value, T, of the power supplyswIs the duty cycle of the switching power supply, C is the capacitance value of the capacitor, VrefIs the voltage value of the reference voltage.
The invention has the beneficial effects that: the ramp injection circuit provided by the invention charges the capacitor by using the current related to the difference value of the output voltage of the switching power supply and the reference voltage to generate initial ramp voltage, and compensates by using the voltage proportional to the reference voltage, thereby realizing the compensation of the error generated on the system by the traditional ramp voltage; the invention is applied to the switching power supply, can keep the output voltage of the switching power supply constant under the condition of different duty ratios, and eliminates the output error of the switching power supply.
Drawings
The following description of various embodiments of the invention may be better understood with reference to the following drawings, which schematically illustrate major features of some embodiments of the invention. These figures and examples provide some embodiments of the invention in a non-limiting, non-exhaustive manner. For purposes of clarity, the same reference numbers will be used in different drawings to identify the same or similar elements or structures having the same function.
Fig. 1 is a schematic diagram of a switching power supply of a conventional integrated ramp injection circuit.
Fig. 2 is a schematic diagram of a conventional circuit for generating a ramp voltage.
Fig. 3 is a waveform diagram of a key signal under different duty cycles in a switching power supply of a conventional integrated ramp injection circuit, where (b) (c) (d) are a waveform diagram of a signal Vref + Vripple generated by controlling a control signal Vsw under three duty cycles and superimposed with a reference voltage Vref, and a waveform diagram of a corresponding feedback voltage Vfb, and the diagram (a) is a comparison diagram integrating the three cases.
Fig. 4 is a schematic diagram of a ramp injection circuit applied in a switching power supply according to the present invention.
Fig. 5 is a waveform diagram of the key signal at different duty cycles in the ramp injection circuit according to the present invention, where (b) (c) (d) are waveforms of an initial ramp voltage Vripple generated by the control signal Vsw under three duty cycles and a waveform diagram of a feedback voltage of the output voltage of the switching power supply compared with the reference voltage Vref after superimposing the initial ramp voltage Vripple and subtracting the compensation voltage Vec, and the diagram (a) is a comparison diagram integrating the three cases.
Fig. 6 is a specific circuit diagram of a ramp injection circuit according to an embodiment of the present invention.
Fig. 7 is a waveform diagram of a key signal at different duty cycles in a ramp injection circuit according to the present invention, wherein (b) (c) (d) are waveforms of an initial ramp voltage Vripple and a compensation voltage Vec generated under the control of a control signal Vsw at three duty cycles, respectively, and (a) is a comparison diagram integrating the three cases.
Fig. 8 is a circuit diagram of an implementation of a ramp injection circuit according to an embodiment of the present invention to implement a transconductance amplifier.
Fig. 9 is a circuit diagram of a ramp injection circuit according to a first implementation of the error compensation module in an embodiment of the present invention.
Fig. 10 is a circuit diagram of a second implementation of the ramp injection circuit according to the present invention, which implements the error compensation module in the embodiment.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in detail with reference to the accompanying drawings. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It is to be noted that, in the present invention, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. For example, the first state and the second state of the control signal may be interchanged, and the first state may represent a high level, and the second state may represent a low level, or the first state may represent a low level, and the second state may represent a high level, which does not affect the implementation of the technical solution of the present invention.
The invention provides a ramp injection circuit, which comprises a ramp voltage generation module and an error compensation module, wherein as shown in fig. 6, the ramp voltage generation module comprises a capacitor 201 and a charging current generation unit, the traditional ramp injection circuit charges the capacitor by using a fixed current, but the charging current generation unit generates a current related to the difference value between the output voltage of a switching power supply and a reference voltage as a charging current; as shown in fig. 6, a specific implementation structure of the charging current generation unit is provided, where the charging current generation unit includes an error amplifier 204 and a transconductance amplifier 205, two input terminals of the error amplifier 204 are respectively connected to a sampling value of the output voltage Vout of the switching power supply (for example, a feedback voltage Vfb obtained by dividing the output voltage Vout of the switching power supply by a voltage dividing resistor) and a reference voltage Vref, an output terminal of the error amplifier 204 is connected to an input terminal of the transconductance amplifier 205, and an output terminal of the transconductance amplifier 205 outputs a charging current. Since the error amplifier 204 is virtually short, Vfb is Vref and Vfb is Vref + Vripple-Vec when stable, and therefore Vripple is Vec when stable, the error introduced by the ramp wave is compensated.
As shown in fig. 8, an implementation structure of the transconductance amplifier 205 is provided, where the transconductance amplifier includes a first amplifier 301, a first NMOS transistor 303, a first PMOS transistor 304, a second PMOS transistor 305, and a first resistor 302, a positive input end of the first amplifier 301 is connected to an output end of the error amplifier, a negative input end of the first amplifier is connected to a source of the first NMOS transistor 303 and grounded after passing through the first resistor 302, and an output end of the first amplifier is connected to a gate of the first NMOS transistor 303; the gate of the second PMOS transistor 305 is connected to the gate and the drain of the first PMOS transistor 304 and the drain of the first NMOS transistor 303, the source thereof is connected to the source of the first PMOS transistor 304 and the power supply, and the drain thereof outputs the charging current.
The ramp voltage generation module is controlled by the control signal Vsw to charge and discharge the capacitor 201, and charges the capacitor 201 by using the charging current when the control signal Vsw is in a first state so as to increase the voltage on the capacitor 201, and discharges the capacitor 201 when the control signal Vsw is in a second state so as to reduce the voltage drop on the capacitor 201 to zero.
In some embodiments, the control is implemented by switches, as shown in fig. 6, the ramp voltage generation module includes a first switch 203 and a second switch 202, one end of the first switch 203 is connected to one end of the capacitor 201 and one end of the second switch 202, the other end of the first switch 203 and the other end of the capacitor 201 are grounded, and the other end of the second switch 202 is connected to the charging current; the first switch and the second switch are controlled by a control signal Vsw, when the control signal Vsw is in a first state, the second switch 202 is controlled to be switched on, the first switch 203 is controlled to be switched off, and the charging current charges the capacitor 201 to enable the voltage of the capacitor 201 to rise; when the control signal Vsw is in the second state, the second switch 202 is controlled to be turned off, the first switch 203 is controlled to be turned on, and the voltage on the capacitor 201 is discharged to zero.
The voltage on the capacitor 201 is used as an initial ramp voltage Vripple, the initial ramp voltage Vripple is aligned with the control signal Vsw, the error compensation module 206 is used for generating a compensation voltage Vec proportional to the reference voltage Vref, and a signal obtained by subtracting the compensation voltage Vec from the initial ramp voltage Vripple is used as a final ramp voltage.
Two implementation structures of the error compensation module 206 are shown in fig. 9 and 10, and as shown in fig. 9, the error compensation module includes a second amplifier 400, a second resistor 403, a third resistor 404, a fourth resistor 401 and a fifth resistor 402, the second resistor 403 and the third resistor 404 are connected in series and parallel between the reference voltage Vref and ground, and the series point is connected to the positive input terminal of the second amplifier 400; the fourth resistor 401 and the fifth resistor 402 are connected in series and in parallel between the output terminal of the second amplifier 400 and the ground, and the series point is connected with the negative input terminal of the second amplifier 400; the output of the second amplifier 400 generates the compensation voltage Vec. The structure shown in fig. 10 eliminates the voltage dividing resistor in the structure of fig. 9, and realizes different ratios between the compensation voltage Vec and the reference voltage Vref.
When the capacitance of capacitor 201 and the transconductance of transconductance amplifier 205 are set to appropriate values (i.e., the values are set to be appropriate)
) Then, the reference voltage Vref may be directly output as the compensation voltage Vec, where gmIs the transconductance of a transconductance amplifier, VddFor the voltage value of the power supply, TswFor the duty cycle of the switching power supply, C is the capacitance of the capacitor, VrefIs the voltage value of the reference voltage.
The invention can be applied to the switching power supply, and is particularly suitable for the switching power supply with fixed on-time because the switching power supply with fixed on-time (including fixed off-time) often has the requirement of ramp wave injection in order to reduce output ripple waves. When the present invention is applied to a switching power supply with a fixed on-time, a control signal may be generated according to the voltage Vsw at the connection point of the upper power transistor 106 and the lower power transistor 107 in the switching power supply, for example, the voltage Vsw at the connection point of the upper power transistor 106 and the lower power transistor 107 in the switching power supply is directly taken as the control signal Vsw in the embodiment shown in fig. 5, so that the first state of the control signal Vsw in this embodiment is a low level and the second state is a high level, as shown in fig. 3 and 7, the voltage value of the initial ramp voltage Vripple when the control signal Vsw is the low level linearly increases, and the voltage value of the initial ramp voltage Vripple when the control signal Vsw is the high level is zero. Of course, for other applications, the first state of the control signal Vsw may be not only low but also high, and the second state of the corresponding control signal Vsw may also be not only high but also low.
In the switching power supply, an upper power tube 106 and a lower power tube 107 are connected in series and in parallel between a power supply and the ground, a gate drive signal of the upper power tube 106 and the lower power tube 107 is controlled by a PWM pulse width modulation module 101, the conventional switching power supply integrated with a ramp wave circuit uses a reference voltage Vref superposed with a ramp wave voltage Vripple as a comparison reference, and then the reference voltage is compared with a feedback voltage Vfb of an output voltage of the switching power supply, the PWM pulse width modulation module 101 is adjusted according to a comparison result, because the ramp wave voltage Vripple is generated according to a voltage Vsw at a connection part of the upper power tube 106 and the lower power tube 107, the ramp wave voltage Vripple is related to a working duty ratio of a switching device in the switching power supply, and when the working duty ratios of the switching device in the switching power supply are different, the superposed ramp wave voltage Vripple is also different, so that the comparison reference is changed. The invention utilizes the feedback voltage Vfb and the reference voltage Vref to generate a charging current to charge a capacitor to obtain an initial ramp voltage Vripple, then utilizes the compensation voltage Vec related to the reference voltage Vref to compensate the initial ramp voltage Vripple, and uses a signal obtained by subtracting the compensation voltage Vec from the initial ramp voltage Vripple as a final ramp voltage to be used in a switching power supply for control, thereby utilizing the compensation voltage Vec to compensate the error generated on a system by the ramp peak voltage of the initial ramp voltage Vripple.
When the invention is applied to a switching power supply, the initial ramp voltage Vripple may be connected to one positive input terminal of the comparator 102, and the compensation voltage Vec may be connected to one negative input terminal of the comparator 102, as shown in fig. 4, the other positive input terminal of the comparator 102 is connected to the reference voltage Vref, and the other negative input terminal of the comparator 102 is connected to the feedback voltage Vfb obtained by dividing the output voltage by the resistor, so that the reference voltage Vref is superposed on the initial ramp voltage Vripple and the signal obtained by subtracting the compensation voltage Vec is used as a new comparison reference to be compared with the feedback voltage Vfb.
As shown in fig. 5, the waveform diagram is obtained by comparing a new comparison reference Vref + Vripple-Vec with the feedback voltage Vfb, in fig. 5, (b), (c), (d) are the comparison conditions of the new comparison reference Vref + Vripple-Vec and the feedback voltage Vfb corresponding to three different duty ratios, respectively, in fig. 5, (a) is a schematic diagram obtained by drawing together the three conditions (b), (c), and (d) in fig. 5, it can be seen that the ramp wave voltages Vripple corresponding to the three different duty ratios are different, but the comparison result of the new comparison reference obtained by combining the compensation voltage Vec and the feedback voltage Vfb is the same, so the feedback voltages Vfb corresponding to the different duty ratios are the same, the output voltage Vout of the switching power supply is also the same, and the compensation for the ramp wave voltage induced error is realized.
In summary, under the control of the control signal, the ramp voltage generating module of the present invention generates a charging current related to the output voltage of the switching power supply to charge the capacitor, so as to generate an initial ramp voltage Vripple aligned with the control signal, and the error compensation module is used to generate a dc voltage as a compensation voltage to compensate the error of the initial ramp voltage Vripple.
Claims (8)
1. A ramp injection circuit is characterized by comprising a ramp voltage generation module and an error compensation module;
the ramp voltage generation module comprises a capacitor and a charging current generation unit, and the charging current generation unit is used for generating charging current related to the difference value of the output voltage of the switching power supply and the reference voltage; the ramp voltage generation module is controlled by a control signal, when the control signal is in a first state, the capacitor is charged by the charging current so that the voltage on the capacitor rises, and when the control signal is in a second state, the capacitor is discharged so that the voltage drop on the capacitor is zero;
the error compensation module is used for generating a compensation voltage proportional to the reference voltage, and the ramp injection circuit subtracts the compensation voltage from the voltage on the capacitor to obtain a final ramp voltage.
2. The ramp injection circuit according to claim 1, wherein the ramp voltage generation module comprises a first switch and a second switch, one end of the first switch is connected to one end of the capacitor and one end of the second switch, the other end of the first switch and the other end of the capacitor are grounded, and the other end of the second switch is connected to the charging current; the first switch and the second switch are controlled by the control signal, when the control signal is in a first state, the second switch is controlled to be connected and the first switch is controlled to be disconnected, and when the control signal is in a second state, the second switch is controlled to be disconnected and the first switch is controlled to be connected.
3. The ramp injection circuit according to claim 1 or 2, wherein the charging current generating unit comprises an error amplifier and a transconductance amplifier, two input terminals of the error amplifier are respectively connected to the sampled value of the output voltage of the switching power supply and the reference voltage, an output terminal of the error amplifier is connected to an input terminal of the transconductance amplifier, and an output terminal of the transconductance amplifier outputs the charging current.
4. The ramp injection circuit according to claim 3, wherein the transconductance amplifier comprises a first amplifier, a first NMOS transistor, a first PMOS transistor, a second PMOS transistor and a first resistor, a positive input terminal of the first amplifier is connected to an output terminal of the error amplifier, a negative input terminal of the first amplifier is connected to a source of the first NMOS transistor and grounded through the first resistor, and an output terminal of the first amplifier is connected to a gate of the first NMOS transistor; the grid electrode of the second PMOS tube is connected with the grid electrode and the drain electrode of the first PMOS tube and the drain electrode of the first NMOS tube, the source electrode of the second PMOS tube is connected with the source electrode of the first PMOS tube and is connected with a power supply, and the drain electrode of the second PMOS tube outputs the charging current.
5. The ramp injection circuit according to claim 1, 2 or 4, wherein the error compensation module comprises a second amplifier, a second resistor, a third resistor, a fourth resistor and a fifth resistor, the second resistor and the third resistor are connected in series and in parallel between the reference voltage and the ground, and the series point of the second resistor and the third resistor is connected with the positive input end of the second amplifier; the fourth resistor and the fifth resistor are connected in series and in parallel between the output end of the second amplifier and the ground, and the series point of the fourth resistor and the fifth resistor is connected with the negative input end of the second amplifier; the output of the second amplifier generates the compensation voltage.
6. The switching power supply uses a signal obtained by superposing a reference voltage with a ramp voltage as a comparison reference for comparison with a feedback voltage of an output voltage of the switching power supply, generates a pulse width modulation signal according to a comparison result and controls the working duty ratio of a switching device in the switching power supply, wherein the ramp voltage is related to the working duty ratio of the switching device in the switching power supply, and when the working duty ratios of the switching devices in the switching power supply are different, the superposed ramp voltage is also different, so that the comparison reference is changed;
the method for compensating the error of the ramp voltage in the switching power supply is characterized by comprising the following steps of:
generating a charging current related to a difference value of a feedback voltage and a reference voltage of the output voltage of the switching power supply;
step two, a switch device in the switch power supply comprises an upper power tube and a lower power tube which are connected in series and in parallel between a power supply and the ground, a control signal is generated according to a signal of a series point of the upper power tube and the lower power tube, when the control signal is at a low level, the charging current is enabled to charge a capacitor so that the voltage on the capacitor rises, and when the control signal is at a high level, the capacitor is controlled to discharge so that the voltage on the capacitor is reduced to zero;
and thirdly, taking a signal obtained by superposing the reference voltage on the capacitor and subtracting a compensation voltage proportional to the reference voltage as a final comparison reference for comparison with a feedback voltage of the output voltage of the switching power supply, so that the output voltage of the switching power supply is constant, and the error caused by the ramp voltage is eliminated.
7. The method as claimed in claim 6, wherein the feedback voltage of the output voltage of the switching power supply and the reference voltage are inputted into an error amplifier to obtain an error voltage, and the error voltage is converted into a current signal by a transconductance amplifier to obtain the charging current.
8. The method of claim 7, wherein the step of compensating for the ramp voltage error is performed in a switching power supply
Directly using the reference voltage as the compensation voltage, wherein
Is the transconductance of the transconductance amplifier and,
is the voltage value of the power supply source,
is the duty cycle of the switching power supply,
is the value of the capacitance of the capacitor,
is the voltage value of the reference voltage.
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| CN114531015A (en) * | 2022-01-21 | 2022-05-24 | 绍兴圆方半导体有限公司 | Conduction time timing circuit of multiphase power supply and multiphase power supply |
| CN114900040B (en) * | 2022-05-27 | 2024-06-25 | 杭州唯美地半导体有限公司 | Self-adaptive on-time circuit with intermittent current mode and fixed frequency |
| CN114825877B (en) * | 2022-05-27 | 2024-06-25 | 杭州唯美地半导体有限公司 | Reduce no-load ripple's self-adaptation on-time circuit |
| CN116723605B (en) * | 2023-08-10 | 2023-10-31 | 上海芯龙半导体技术股份有限公司 | Compensation circuit of LED power supply and LED power supply |
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| CN102611306A (en) * | 2012-03-27 | 2012-07-25 | 成都芯源系统有限公司 | Switch converter and control circuit and control method thereof |
| CN109412397A (en) * | 2018-09-12 | 2019-03-01 | 长安大学 | A kind of secondary slope compensation circuit of pulse-width-modulated current mode switch power supply |
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| US8395367B2 (en) * | 2009-08-05 | 2013-03-12 | Upi Semiconductor Corporation | DC-DC converter with a constant on-time pulse width modulation controller |
| CN103683908B (en) * | 2013-12-19 | 2015-11-25 | 矽力杰半导体技术(杭州)有限公司 | Switching power source control circuit, Switching Power Supply and control method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102611306A (en) * | 2012-03-27 | 2012-07-25 | 成都芯源系统有限公司 | Switch converter and control circuit and control method thereof |
| CN109412397A (en) * | 2018-09-12 | 2019-03-01 | 长安大学 | A kind of secondary slope compensation circuit of pulse-width-modulated current mode switch power supply |
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