CN114882844A - Display panel and display device - Google Patents

Display panel and display device Download PDF

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Publication number
CN114882844A
CN114882844A CN202210538705.3A CN202210538705A CN114882844A CN 114882844 A CN114882844 A CN 114882844A CN 202210538705 A CN202210538705 A CN 202210538705A CN 114882844 A CN114882844 A CN 114882844A
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China
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display panel
signal
signal line
light emitting
emitting unit
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CN202210538705.3A
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CN114882844B (en
Inventor
杨程
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Hubei Changjiang New Display Industry Innovation Center Co Ltd
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Hubei Changjiang New Display Industry Innovation Center Co Ltd
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3266—Details of drivers for scan electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Electroluminescent Light Sources (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

The invention provides a display panel and a display device, comprising: the display device comprises a first display area, a second display area and a first pixel, wherein the first pixel is positioned in the first display area and comprises a first pixel circuit and a first light-emitting unit; a second pixel located in the second display region, the second pixel including a second pixel circuit and a second light emitting unit; a first signal line for transmitting a first signal to a first input terminal of the first pixel circuit; wherein the cathode of the second light emitting unit is electrically connected to the first signal line. According to the invention, the first signal line is multiplexed, so that the frame width of the display panel is reduced, and the display uniformity of the display panel is improved.

Description

Display panel and display device
Technical Field
The present invention relates to the field of electronic devices, and more particularly, to a display panel and a display device.
Background
With the development of science and technology, more and more electronic devices with display functions are widely applied to daily life and work of people, bring great convenience to the daily life and work of people, and become an indispensable important tool for people at present. The main component of the electronic device that implements the display function is the display panel.
In order to meet the increasing demands of people, electronic equipment has a full-screen function. In the prior art, a full screen is generally realized through a camera technology under a screen, that is, a transparent display area is arranged at a position of the camera corresponding to the screen, so that a camera shooting function is ensured while the full screen is realized.
Among the prior art, correspond the screen position at the camera and set up transparent display area, not only can lead to the transparent display area that the camera corresponds different with other display area's display effect, the circuit that corresponds because of this transparent display area walks the line different and lead to the frame great with other display area's circuit moreover and walks the line, is unfavorable for realizing narrow frame.
Disclosure of Invention
In view of the above, to solve the above problems, the present invention provides a display panel and a display device, and the technical solution is as follows:
a display panel is provided with a first display area and a second display area, and a first pixel is arranged in the first display area and comprises a first pixel circuit and a first light-emitting unit;
a second pixel located in the second display region, the second pixel including a second pixel circuit and a second light emitting unit;
a first signal line for transmitting a first signal to a first input terminal of the first pixel circuit;
wherein the cathode of the second light emitting unit is electrically connected with the first signal line.
The application also provides a display device which comprises the display panel.
In the display panel and the display device provided by the technical scheme of the application, the first signal line realizes transmission of a first signal to the first input end of the first pixel circuit, and is electrically connected with the cathode of the second light-emitting unit, so that multiplexing of the first signal line of the first pixel and the second pixel is realized, the number of the signal lines of the display panel is reduced, the frame width of the display panel is further reduced, and the display uniformity of the display panel is improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 7 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 8 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 9 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 10 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 11 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 12 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 13 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 14 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 15 is a schematic partial cross-sectional view of a display panel according to an embodiment of the invention;
fig. 16 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 17 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 18 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 19 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 20 is a schematic circuit diagram of a portion of an esd protection circuit according to an embodiment of the present invention;
fig. 21 is a schematic structural diagram of a display device according to the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
With the development of display technologies, different regions of a display panel often bear different functions, and the light emitting colors of the light emitting units in the different regions, the distribution density of the light emitting units, and the number of the light emitting units driven by the pixel circuit may also be different.
Because the power signal received by the pixel unit has very important influence on the driving current received by the light emitting unit and the uniformity of the display effect, the power signal received by the first display area and/or the second display area can be independently adjusted in the scheme defined in the application, thereby providing a basis for respectively realizing different functions for the first display area and the second display area on the premise of ensuring the uniform display effect.
In the conventional wiring of the display panel, the first display area and the second display area require two independent signal lines to provide the required power signals for the first display area and the second display area respectively, which may also result in a larger frame area of the display panel, which is not favorable for the narrow frame design of the display panel.
Based on this, referring to fig. 1, fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present invention, where the display panel includes a first display area AA and a second display area BB, and a first pixel 11 located in the first display area AA and a second pixel 12 located in the second display area BB, and optionally the second display area BB may be an area where pixel arrangement density or pixel area in the display panel is reduced, for example, an area where an off-screen sensor is disposed, such as an area where a camera or an off-screen fingerprint sensor is disposed, where light transmittance of the second display area BB needs to be greater than light transmittance of the first display area AA.
The first display area AA at least partially surrounds the second display area BB, and the shape of the boundary of the second display area BB is not limited in the present application, and is described by taking a square as an example.
Referring to fig. 2, fig. 2 is a schematic structural diagram of another display panel according to an embodiment of the present invention, where the first pixel 11 includes a first pixel circuit 111 and a first light emitting unit 112, and the second pixel 12 includes a second pixel circuit 121 and a second light emitting unit 122, as shown in fig. 2, the display panel further includes a first signal line L1, the first signal line L1 is configured to transmit a first signal VA to a first input terminal of the first pixel circuit 111, and the first signal line L1 is further electrically connected to a cathode of the second light emitting unit 122 and transmits the first signal VA to a cathode of the second light emitting unit 122.
It can be seen that in the present application, by multiplexing the first signal line L1, the first signal VA can be transmitted to the first input terminal of the first pixel circuit 111, and the first signal VA can also be used as a power supply signal electrically connected to the cathode of the second light emitting unit 122 in the second pixel circuit 121; the first signal VA is different from the cathode signal of the first light-emitting unit 112, and the adjustment of the power signal received by the second display area BB is also realized, so that the uniformity of the display effect finally presented by the display panel is better, and since the first display area AA and the second display area BB multiplex the first signal line L1, no additional signal routing is required to be arranged, the frame size of the display panel can be obviously reduced, and the narrow frame design of the display panel is more facilitated.
Optionally, in another embodiment of the present invention, referring to fig. 3, fig. 3 is a schematic structural diagram of another display panel provided in the embodiment of the present invention, and the first signal line L1 is coupled to an anode of the first light emitting unit 112.
In this embodiment, the first signal VA transmitted on the first signal line L1 can be used as the anode reset signal Vref1 of the first light emitting unit 112, and is used to perform a reset process on the anode of the first light emitting unit 112, so as to ensure the light emitting performance of the first light emitting unit 112, and further improve the display effect of the display panel.
That is, the anode reset signal Vref1 of the first light emitting cell 112 in the first display area AA is simultaneously used as a power supply signal of the second light emitting cell 122 in the second display area BB in the present application.
It should be noted that the first signal line L1 is coupled to the anode of the first light emitting unit 112 through the first pixel circuit 111.
Optionally, in another embodiment of the invention, referring to fig. 4, fig. 4 is a schematic structural diagram of another display panel provided in the embodiment of the invention, and the first signal line L1 is coupled to the gate of the first driving transistor M1 of the first pixel circuit 111.
In this embodiment, as shown in fig. 4, the first pixel circuit 111 includes at least a first driving transistor M1, and the first driving transistor M1 is coupled to the anode of the first light emitting unit 112 for providing a driving current for the first light emitting unit 112, and the first light emitting unit 112 emits light in response to the driving current.
The first signal line L1 is coupled to the gate of the first driving transistor M1, and it can be understood that the first signal VA transmitted on the first signal line L1 can be used as the gate reset signal Vref2 of the first driving transistor M1, and is used to perform a reset process on the gate of the first driving transistor M1, so as to ensure the stability of the driving current provided by the first driving transistor M1, and further improve the display effect of the display panel.
That is, the gate reset signal Vref2 of the first driving transistor M1 in the first display area AA is simultaneously used as a power supply signal of the second light emitting cell 122 in the second display area BB in the present application.
Note that, in fig. 4, the first signal line L1 is connected to the gate of the first driving transistor M1 through the transistor M2, and the anode reset signal Vref1 of the first light-emitting unit 112 is transmitted to the anode of the first light-emitting unit 112 through the transistor M3.
Optionally, in another embodiment of the present invention, referring to fig. 5, fig. 5 is a schematic structural diagram of another display panel provided in the embodiment of the present invention, in which the first signal line L1 is coupled to an anode of the first light emitting unit 112, and the first signal line L1 is coupled to a gate of the first driving transistor M1 of the first pixel circuit 111.
In this embodiment, the first signal VA transmitted on the first signal line L1 is used as the anode reset signal Vref1 of the first light emitting unit 112 and the gate reset signal Vref2 of the first driving transistor M1 at the same time, where Vref1 is Vref2 or Vref, for performing the reset process on the anode of the first light emitting unit 112 and performing the reset process on the gate of the first driving transistor M1, that is, in the first pixel circuit 111, by one signal trace, the double reset of the first light emitting unit 112 and the first driving transistor M1 is realized, and the first signal line L1 is multiplexed again and also used as the power supply signal of the second light emitting unit 122 in the second display area BB.
Optionally, in another embodiment of the invention, as shown in fig. 2 to 5, the display panel further includes a first power signal line L0, the first power signal line L0 is electrically connected to the cathode of the first light emitting unit 112, and is used for providing the first power signal VEE to the cathode of the first light emitting unit 112.
That is to say, in the present application, the first power signal line L0 is provided to the cathode of the first light emitting unit 112 in the first pixel circuit 111 located in the first display area AA, and the first signal line L1 is provided to the cathode of the second light emitting unit 122 in the second pixel circuit 121 located in the second display area BB, so that it is obviously also implemented to adjust the power signals received by the first display area AA and the second display area BB, thereby ensuring that the uniformity of the display effect finally presented by the display panel is better, and since the first signal line L1 is multiplexed by the first display area AA and the second display area BB, no additional signal routing is required, obviously, the frame size of the display panel can also be reduced, and the narrow frame design of the display panel is more facilitated.
Wherein, the voltage of the first signal VA is V1; the first power signal line L0 is used for transmitting a first power signal VEE, which has a voltage V2.
Wherein V1 is less than V2, and I V2-V1I is not less than 0.5V.
Specifically, when the first signal line L1 is coupled to the anode of the first light emitting unit 112, it is necessary to ensure that V1 is greater than V2 in order to avoid the first light emitting unit 112 from being stolen during the non-light emitting period, and when V2-V1 is greater than or equal to 0.5V, the first light emitting unit 112 can be ensured to be effectively reset on the premise that the first light emitting unit 112 is not stolen, the light emitting performance of the first light emitting unit 112 is ensured, and the display effect of the display panel is further improved.
Optionally, in another embodiment of the present invention, referring to fig. 6, fig. 6 is a schematic structural diagram of another display panel provided in the embodiment of the present invention, where the display panel further includes a second signal line L2, and the second signal line L2 is used for transmitting a second signal VGL.
The second signal line L2 is coupled to the gate of the second driving transistor T1 of the second pixel circuit 121, and the second signal line L2 is coupled to the anode of the second light emitting unit 122.
In this embodiment, as shown in fig. 6, the second pixel circuit 121 includes at least a second driving transistor T1, and the second driving transistor T1 is coupled to an anode of the second light emitting unit 122 for providing a driving current for the second light emitting unit 122, and the second light emitting unit 122 emits light in response to the driving current.
The second signal VGL transmitted on the optional second signal line L2 is used as an anode reset signal of the second light emitting unit 122 and a gate reset signal of the second driving transistor T1, and is used to perform a reset process on the anode of the second light emitting unit 122 and perform a reset process on the gate of the second driving transistor T1, that is, a signal trace is used in the second pixel circuit 121, so that a dual reset of the second light emitting unit 122 and the second driving transistor T1 is realized.
In fig. 6, the second signal line L2 is connected to the gate of the second driving transistor T1 through the transistor T2, and to the anode of the second light emitting unit 122 through the transistor T3.
Optionally, the voltage of the first signal VA is V1, and the voltage of the second signal VGL is V3.
Wherein V3 is less than V1, and I V3-V1I is not less than 1V.
Specifically, since the cathode of the second light emitting unit 122 is electrically connected to the first signal line L1, and receives the first signal VA as a power signal, where VA is Vref in fig. 6 as an example, and the anode of the second light emitting unit 122 is coupled to the second signal line L2, and receives the second signal VGL as an anode reset signal of the second light emitting unit 122, it is necessary to ensure that V3 is less than V1 in order to avoid the second light emitting unit 122 from being stolen during a non-light emitting period, and when i V3-V1 i is greater than or equal to 1V, it is ensured that the second light emitting unit 122 realizes effective reset of the second light emitting unit 122 and effective reset of the second driving transistor T1, and the light emitting performance of the second light emitting unit 122 and stability of the driving current provided by the second driving transistor T1 can be ensured, thereby improving the display effect of the display panel.
Optionally, in another embodiment of the present invention, referring to fig. 7, fig. 7 is a schematic structural diagram of another display panel provided in the embodiment of the present invention, where the display panel further includes a third signal line L3, and the third signal line L3 is used for transmitting a third signal Vref 3.
The first signal line L1 is coupled to the anode of the first light emitting unit 112, the third signal line L3 is coupled to the gate of the first driving transistor M1 of the first pixel circuit 111, and the third signal line L3 is coupled to the gate of the second driving transistor T1 of the second pixel circuit 121.
In this embodiment, the first signal VA transmitted on the first signal line L1 is used as the anode reset signal Vref1 of the first light emitting unit 112 for performing a reset process on the anode of the first light emitting unit 112; the third signal Vref3 transmitted on the third signal line L3 is used as a gate reset signal of the first driving transistor M1, and is used for performing a reset process on the gate of the first driving transistor M1, that is, in this embodiment of the present application, two signal traces are used to transmit the reset signals required by the anode of the first light emitting unit 112 and the gate of the first driving transistor M1, respectively.
Further, the multiplexing third signal line L3 is coupled to the gate of the second driving transistor T1 of the second pixel circuit 121 in the second display area BB, so as to reset the gate of the second driving transistor T1; that is to say, the third signal line L3 is multiplexed, and the third signal Vref3 transmitted on the third signal line L3 is simultaneously used as the gate reset signal of the first driving transistor M1 and the gate reset signal of the second driving transistor T1, so that one signal trace can be omitted, the number of traces required by the display panel can be reduced, the wiring difficulty can be simplified, and the narrow frame design of the display panel is facilitated.
The voltage of the first signal VA is V1, and the voltage of the third signal Vref3 is V4, where V1 > V4.
Specifically, under the condition that the voltage for resetting the anode of the first light emitting unit 112 is greater than the voltage for resetting the gate of the first driving transistor M1, both effective resetting of the first light emitting unit 112 and effective resetting of the first driving transistor M1 can be realized, so that the light emitting performance of the first light emitting unit 112 and the stability of the driving current provided by the first driving transistor M1 are ensured, and the display effect of the display panel is further improved.
For example, V1 may be-3.5V, V2 may be-4.5V, and setting the voltage of the first signal VA higher is beneficial to improve the uniformity and smear improvement of the display panel under low-brightness display.
Optionally, in another embodiment of the present invention, referring to fig. 8, fig. 8 is a schematic structural diagram of another display panel provided in the embodiment of the present invention, a voltage of the first signal VA is V1, where, in fig. 8, VA is taken as Vref as an example, a cathode of the first light emitting unit 112 is connected to the first power signal VEE, a voltage of the first power signal VEE is V2, an anode of the first light emitting unit 112 is coupled to the second power signal VDD1, a voltage of the second power signal VDD1 is V5, an anode of the second light emitting unit 122 is coupled to the third power signal VDD2, and a voltage of the third power signal VDD2 is V6.
Wherein I V6-V1I > I V5-V2I.
At this time, the anode of the first light emitting unit 112 and the anode of the second light emitting unit 122 receive different power signals to improve the uniformity of the display effect of the first display area AA and the second display area BB.
Further, in the existing design, the first display area AA and the second display area BB use two sets of VDD and VEE traces, that is, the first display area AA uses VDD1 and VEE1, and the second display area BB uses VDD2 and VEE2, but both sets of VDD and VEE traces all affect the IC (Integrated Circuit) support, the bezel size and the pixel size during the layout design of the display panel, so in the embodiment of the present invention, referring to fig. 9, fig. 9 is a structural schematic diagram of another display panel provided in the embodiment of the present invention, the VGH signal is used as VDD2 of the second display area BB, that is, VGH is VDD2, the Vref signal in the first pixel Circuit 111 in the first display area AA is used as VEE2 of the second display area BB, that is, VEE2 is Vref, and 2 > VDD1, VEE2 < VEE1, and this design does not need to set up additional VDD and VEE signal multiplexing of the second display area BB, for better IC support, the design influence on the frame size and/or the pixel size is smaller, and after the second display area BB adopts VDD different from the first display area AA, although the pixel density of the second display area BB is reduced, because VDD2 is greater than VDD1 and VEE2 is less than VEE1, that is, VDD2 of the second display area BB is increased and the voltage difference between the two ends of the second light emitting unit 122 is increased, so that the driving current received by the second light emitting unit 122 is increased, so that the luminance of the second light emitting unit 122 in the second display area BB is increased, and the display difference between the first display area AA and the second display area BB is reduced, thereby improving the display quality.
Alternatively, the VGH signal may be led out through a gate driving circuit in the display panel.
VEE1 in fig. 9 is the same as VEE in the other drawings, that is, VEE1 ═ VEE.
Alternatively, referring to fig. 10, fig. 10 is a schematic structural diagram of another display panel according to an embodiment of the present invention, in which an anode of the first light emitting unit 112 is coupled to the second power signal line L4, and an anode of the second light emitting unit 122 is coupled to the second power signal line L4.
At this time, the anode of the first light emitting unit 112 and the anode of the second light emitting unit 122 are connected to the same power signal line for receiving the same power signal VDD.
Optionally, in another embodiment of the present invention, referring to fig. 11, fig. 11 is a schematic structural diagram of another display panel provided in the embodiment of the present invention, referring to fig. 12, fig. 12 is a schematic structural diagram of another display panel provided in the embodiment of the present invention, the first pixel circuit 111 further includes a transistor M4, a transistor M5, a transistor M6, a transistor M7, and a capacitor Cst1, and the first driving transistor M1, the transistor M2, and the transistor M3 are combined to form a first pixel circuit of 7T1C to control an operating state of the first light emitting unit 112.
In fig. 4 to 8 and 10, only some transistors in the first pixel circuit 111 and/or the second pixel circuit 121 are illustrated, and in order to describe the connection relationship of the signal lines and the signal transmission relationship more clearly, the transistors, the capacitors, and other components in some pixel circuits are omitted and are not fully illustrated.
Alternatively, as shown in fig. 11 and 12, the second pixel circuit 112 further includes a transistor T4, a transistor T5, a transistor T6, a transistor T7, and a capacitor Cst2, and combines the second driving transistor T1, the transistor T2, and the transistor T3 to form a second pixel circuit of 7T1C, so as to control the operating state of the second light emitting unit 122.
It should be noted that fig. 11 illustrates an example in which the light emitting unit and the driving transistor of each of the first pixel circuit 111 and the second pixel circuit 121 receive the same reset signal Vref, and fig. 12 illustrates an example in which the light emitting unit and the driving transistor of each of the first pixel circuit 111 and the second pixel circuit 121 receive different reset signals.
The voltage of Vref can be-3.5V to-5V, the voltage of VEE can be-3V, the voltage of VGL can be-7V, the voltage of Vref1 can be-4.5V, and the voltage of Vref2 can be-3.5V.
Optionally, in another embodiment of the present invention, referring to fig. 13, fig. 13 is a schematic structural diagram of another display panel provided in the embodiment of the present invention, where the display panel further includes: a non-display area CC at least partially surrounding the second display area BB, the second signal line L2 being located in the non-display area CC; it is understood that the non-display area CC is a frame area of the display panel.
The display panel includes a signal input terminal 10, the signal input terminal 10 being electrically connected to the first signal line L1; the non-display area CC includes a first side CC1 and a second side CC2 oppositely disposed in a first direction, the distance between the second side CC2 and the signal input terminal 10 is greater than the distance between the first side CC1 and the signal input terminal 10, and the first direction X is parallel to the plane of the display panel.
Along the first direction X, the second display area BB is located between the first side CC1 and the second side CC2, the second signal line L2 includes a first portion L21, and the first portion L21 is located on the first side CC 1.
Alternatively, referring to fig. 14, fig. 14 is a schematic structural diagram of another display panel according to an embodiment of the present invention, wherein the first portion L21 is located on the second side CC 2.
Specifically, the non-display area CC includes a first side CC1 and a second side CC2, the first side CC1 may be understood as a side of the top of the display panel, and the second side CC2 may be understood as a side of the bottom of the display panel.
The signal input terminal 10 on the display panel is a terminal bound with an IC (Integrated Circuit) on the display panel, and the signal input terminal 10 is used to connect a signal trace with the IC, so as to transmit a signal, thereby controlling the operation of many functions of the display panel.
Optionally, the IC includes, but is not limited to, a driving IC for controlling the operation of the display panel.
Based on the distance between second display area BB and first side CC1 and second side CC2 in first direction X, assuming that second display area BB is closer to first side CC1, first portion L12 may be preferably disposed at a side closer to first side CC1, and then the distance between second display area BB and second signal line L2 may be shortened to simplify the wiring difficulty.
Alternatively, as shown in fig. 13 and 14, the first portion L21 of the second signal line L2 is electrically connected to the second pixels 12 in the second display area BB through the first wiring L4, the first wiring L4 extending in the first direction X.
Further, referring to fig. 15, fig. 15 is a schematic partial cross-sectional view of a display panel according to an embodiment of the present invention, in order to avoid a problem of signal interference between a signal transmitted on a first signal line L1 and a signal transmitted on a first wiring L4, in an embodiment of the present invention, a first signal line L1 and a first wiring L4 are located on different conductive layers, so as to ensure stability of a signal transmitted on a first signal line L1 and stability of a signal transmitted on a first wiring L4, so as to improve display performance of the display panel as a whole, where T denotes a transistor, and Q denotes a light emitting unit; in fig. 15, a structure in which the light emitting unit Q is an OLED light emitting unit is illustrated as an example, and the light emitting unit may be an LED light emitting unit or a quantum dot light emitting unit in the embodiment of the present application.
As shown in fig. 15, the display panel includes: a substrate 101, a buffer layer 102 on a side of the substrate 101, an active layer poly on a side of the buffer layer 102 facing away from the substrate 101, a dielectric layer 103 on a side of the active layer poly facing away from the substrate 101, a first metal layer M1 on a side of the dielectric layer 103 facing away from the substrate 101, a first insulating layer 104 on a side of the first metal layer M1 facing away from the substrate 101, a metal layer MC on a side of the first insulating layer 104 facing away from the substrate 101, a second insulating layer 105 on a side of the metal layer MC facing away from the substrate 101, a second metal layer M2 on a side of the second insulating layer 105 facing away from the substrate 101, a third insulating layer 106, a fourth insulating layer 107 and a fifth insulating layer 108 on a side of the second metal layer M2 facing away from the substrate 101, a third metal layer M3 on a side of the fifth insulating layer 108 facing away from the substrate 101, a sixth insulating layer 109 on a side of the third metal layer M3 facing away from the substrate 101, and a planarization layer 110 on a side of the sixth insulating layer 109 facing away from the substrate 101, and a pixel defining layer 111 on a side of the planarization layer 110 facing away from the substrate 101.
The first signal line L1 is located on the metal layer MC, and the first wiring L4 is located on the second metal layer M2; it should be noted that, when the first signal line L1 transmits a reset signal to the driving transistor and/or the light emitting cell, the horizontal trace thereof may be located on the metal layer MC, and the vertical trace thereof may be located on the second metal layer M2.
Optionally, in another embodiment of the present invention, referring to fig. 16, fig. 16 is a schematic structural diagram of another display panel provided in the embodiment of the present invention, where the display panel further includes: a plurality of second wires L4, a transition line L5, and at least one third wire L6, wherein the number of the second wires L4 is greater than the number of the third wires L6.
The plurality of second wires L4 extend in the first direction X, and a first end of the second wire L4 is connected to the first portion L21 of the second signal line L2, and a second end is connected to a transition line L5, and a transition line L5 extends in the second direction Y, which intersects the first direction X.
At least one third wiring line L6 is disposed around the second display area BB, and the third wiring line L6 is connected to the transition line L5.
Specifically, as shown in fig. 16, the signals transmitted through the second signal line L2 are led out through the plurality of second wires L4, so that the problem of voltage drop when the signals are led out through only one second wire L4 can be avoided, and the stability of the signals transmitted through the second signal line L2 to the second pixels 12 in the second display area BB is further improved, so as to improve the light emitting performance of the second light emitting units 122 in the second pixels 12.
It should be noted that, in fig. 16, four second wires L4 and one third wire L6 are taken as an example for explanation, in this case, the third wire L6 is located in the first display area AA and is only arranged around the boundary of the second display area BB to be connected to the second pixel circuit 121, and in order to ensure the light transmittance of the second display area BB, the third wire L6 may be electrically connected to the second light emitting unit 122 through some transparent wires L7, for example, the transparent wire L7 may be an ITO wire.
Further, in the embodiment of the present invention, the second wire L4, the transition line L5, and the third wire L6 are all routed through the area between the first pixels 11 in the first display area AA, so that the light emitted from the first light-emitting unit 121 in the first display area AA is not affected.
Note that, in fig. 16, the first pixel circuit 111 and the first light-emitting unit 112 are not illustrated, and only the first pixel 11 is illustrated.
Optionally, in another embodiment of the present invention, referring to fig. 17, fig. 17 is a schematic structural diagram of another display panel provided in the embodiment of the present invention, where the display panel includes a non-display area CC at least partially surrounding a second display area BB, and the second signal line L2 is located in the non-display area CC. It is understood that the non-display area CC is a frame area of the display panel.
The display panel includes a signal input terminal 10, the signal input terminal 10 being electrically connected to a first signal line L1; the non-display area CC includes a third side CC3 and a fourth side CC4 oppositely disposed in a third direction Z, wherein the third direction Z is parallel to the plane of the display panel, and the third direction Z is parallel to the second direction Y.
The second signal line L2 includes a second portion L22 and a third portion L23, one of the second portion L22 and the third portion L23 is located at a third side, and the other is located at a fourth side.
Specifically, of the third and fourth sides CC3 and CC4 included in the non-display area CC, the third side CC3 may be understood as one side of the left side of the display panel, and the fourth side CC may be understood as one side of the right side of the display panel.
As shown in fig. 17, the second portion L22 is electrically connected to the second pixels 12 in the second display area BB through fifth wiring L8, and the third portion L23 is electrically connected to the second pixels 12 in the second display area BB through sixth wiring L9.
Alternatively, the first end of the fifth wiring line L8 is connected to the second portion L22, and the second end may be disposed around the second display area BB; similarly, the first end of the sixth wiring L9 is connected to the third section L23, and the second end is disposed around the second display area BB; as shown in fig. 17, the fifth wiring L8 and the sixth wiring L9 respectively surround a half region of the second display area BB, and the second pixel 12 located in the second display area BB is further connected to the fifth wiring L8 and the sixth wiring L9 through the transparent wiring L7, so that the second pixel 12 is connected to the second signal line L2 while ensuring the light transmittance of the second display area BB.
In fig. 17, only one fifth wire L8 and one sixth wire L9 are illustrated as an example, and the number of the fifth wires and the sixth wires may be plural.
Optionally, in another embodiment of the present invention, referring to fig. 18, fig. 18 is a schematic structural diagram of another display panel provided in the embodiment of the present invention, where the display panel includes:
a first driver circuit 13, the first driver circuit 13 providing a control signal to the first pixel circuit 111 and/or the second pixel circuit 121; the second signal line L2 is coupled to an input terminal of the first driving circuit 13.
Specifically, the first driving circuit 13 is located in the non-display region CC, and the first driving circuit 13 is located on the third side CC3 in fig. 18 and connected to the second portion L22 of the second signal line L2 for example, in the display panel, the first driving circuit 13 may be a gate driving circuit in the display panel, for example, a light emission control circuit for controlling pixels to Emit light, that is, an Emit circuit generally defined, for providing a required light emission control signal for the first pixel circuit 111 and/or the second pixel circuit 121, that is, an Emit signal shown in fig. 11 and 12, and the second signal line L2 is simultaneously coupled to an input terminal of the first driving circuit 13 and is electrically connected to the second pixel 12 in the second display region BB. In some alternative embodiments, the first driving circuit 13 may also be a scan (scan) circuit.
Alternatively, referring to fig. 19, fig. 19 is a schematic structural diagram of another display panel according to an embodiment of the present invention, where the second signal line L2 includes a fourth portion L24 and a fifth portion L25, the fourth portion L24 is electrically connected to the second pixel 12, and the fifth portion L25 is electrically connected to the first driving circuit 13; the fourth section L24 and the fifth section L25 include a voltage stabilization module 14 therebetween.
Specifically, in order to avoid the influence of the signal transmitted on the second signal line L2 on the first driving circuit 13, in the present application, the voltage stabilizing module 14 is disposed between the second pixel 12 and the first driving circuit 13, so that the stability of the signal transmitted to the second pixel 12 is ensured, and the influence on the operation of the first driving circuit 13 is also avoided, so as to improve the display performance of the display panel as a whole.
Optionally, the voltage stabilizing module 14 includes a first resistor, and the first resistor includes an active layer material of a transistor in the first pixel circuit 111.
Alternatively, referring to fig. 20, fig. 20 is a schematic diagram of a partial circuit structure of an esd protection circuit according to an embodiment of the present invention, where the voltage stabilizing module 14 includes an esd protection circuit, the fourth portion L24 is electrically connected to an input terminal IN of the esd protection circuit, and the fifth portion L25 is electrically connected to an output terminal of the esd protection circuit.
It should be noted that, the first resistor and the electrostatic protection circuit may be disposed between the fourth portion L24 and the fifth portion L25 at the same time, or only one of them may be disposed separately, which only needs to ensure the stability of the signal transmitted to the second pixel 12 and avoid affecting the operation of the first driving circuit 13.
Optionally, based on all the above embodiments of the present invention, in another embodiment of the present invention, a display device is further provided, referring to fig. 21, and fig. 21 is a schematic structural diagram of the display device provided in the present invention.
The display device 100 includes the display panel according to the above embodiments of the present application.
The display device 100 includes, but is not limited to, a display device such as a mobile phone or a flat panel, and the display device has at least the same technical effects as the display panel.
The display panel and the display device provided by the present invention are described in detail above, and the principle and the embodiment of the present invention are explained in detail herein by applying specific examples, and the description of the above examples is only used to help understanding the method and the core idea of the present invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.
It should be noted that in the description of the present application, it is to be understood that the terms "upper", "lower", "top", "bottom", "inner", "outer", and the like, indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, are only used for convenience in describing the present application and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be configured and operated in a specific orientation, and thus, should not be construed as limiting the present application. When a component is referred to as being "connected" to another component, it can be directly connected to the other component or intervening components may also be present.
It is further noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that an article or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such article or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in an article or device that comprises the element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (19)

1. A display panel includes a first display region and a second display region,
a first pixel located in the first display region, the first pixel including a first pixel circuit and a first light emitting unit;
a second pixel located in the second display region, the second pixel including a second pixel circuit and a second light emitting unit;
a first signal line for transmitting a first signal to a first input terminal of the first pixel circuit;
wherein the cathode of the second light emitting unit is electrically connected to the first signal line.
2. The display panel according to claim 1,
the first signal line is coupled with an anode of the first light emitting unit; and/or the first signal line is coupled to a gate of a first driving transistor of the first pixel circuit.
3. The display panel according to claim 2, further comprising:
a first power signal line electrically connected to a cathode of the first light-emitting unit;
the voltage of the first signal is V1; the first power signal line is used for transmitting a first power signal, and the voltage of the first power signal is V2;
wherein V1 is less than V2, and I V2-V1I is not less than 0.5V.
4. The display panel according to claim 1, further comprising:
a second signal line for transmitting a second signal;
the second signal line is coupled to a gate of a second driving transistor of the second pixel circuit, and the second signal line is coupled to an anode of the second light emitting unit.
5. The display panel according to claim 4, wherein the voltage of the first signal is V1, and the voltage of the second signal is V3;
wherein V3 is less than V1, and I V3-V1I is not less than 1V.
6. The display panel according to claim 4, comprising a non-display area at least partially surrounding the second display area, the second signal line being located in the non-display area;
the display panel includes a signal input terminal electrically connected with the first signal line; the non-display area comprises a first side and a second side which are oppositely arranged in a first direction, the distance between the second side and the signal input terminal is larger than that between the first side and the signal input terminal, and the first direction is parallel to the plane of the display panel;
the second display area is located between the first side and the second side along the first direction, and the second signal line includes a first portion located at the first side or a first portion located at the second side.
7. The display panel according to claim 6, wherein a first portion of the second signal line is electrically connected to the second pixel through a first wiring extending in the first direction, and wherein the first signal line and the first wiring are located in different conductive layers.
8. The display panel according to claim 6, characterized in that the display panel further comprises: a plurality of second wirings, a transition line, and at least one third wiring;
the plurality of second wires extend along the first direction, first ends of the second wires are connected with the second signal wires, second ends of the second wires are connected with the transition lines, the transition lines extend along a second direction, and the second direction is crossed with the first direction;
at least one third wiring is disposed around the second display region, and the third wiring is connected to the transition line.
9. The display panel according to claim 4, comprising a non-display area at least partially surrounding the second display area, the second signal line being located in the non-display area;
the display panel includes a signal input terminal electrically connected with the first signal line; the non-display area comprises a third side and a fourth side which are oppositely arranged in a third direction, and the third direction is parallel to the plane of the display panel;
the second signal line includes a second portion and a third portion, one of the second portion and the third portion is located on the third side, and the other is located on the fourth side.
10. The display panel according to claim 4, comprising:
a first driving circuit that provides a control signal to the first pixel circuit and/or the second pixel circuit; the second signal line is coupled to an input terminal of the first driving circuit.
11. The display panel according to claim 10,
the second signal line includes a fourth portion electrically connected to the second pixel and a fifth portion electrically connected to the first driving circuit; and a voltage stabilizing module is arranged between the fourth part and the fifth part.
12. The display panel according to claim 11, wherein the voltage regulator block comprises a first resistor comprising an active layer material of a transistor in the first pixel circuit.
13. The display panel of claim 11, wherein the voltage regulator module comprises an esd protection circuit, the fourth portion is electrically connected to an input of the esd protection circuit, and the fifth portion is electrically connected to an output of the esd protection circuit.
14. The display panel according to claim 1, characterized by further comprising:
a third signal line for transmitting a third signal;
the first signal line is coupled to an anode of the first light emitting unit, the third signal line is coupled to a gate of the first driving transistor of the first pixel circuit, and the third signal line is coupled to a gate of the second driving transistor of the second pixel circuit.
15. The display panel according to claim 14, wherein the voltage of the first signal is V1, and the voltage of the third signal is V4, where V1 > V4.
16. The display panel of claim 1, wherein the voltage of the first signal is V1, the cathode of the first light emitting unit is connected to a first power signal, the voltage of the first power signal is V2, the anode of the first light emitting unit is coupled to a second power signal, the voltage of the second power signal is V5, the anode of the second light emitting unit is coupled to a third power signal, and the voltage of the third power signal is V6;
wherein I V6-V1I > I V5-V2I.
17. The display panel according to claim 16, wherein an anode of the first light emitting unit is coupled to a second power signal line, and wherein an anode of the second light emitting unit is coupled to the second power signal line.
18. The display panel according to claim 1, wherein the first display region at least partially surrounds the second display region, and wherein a light transmittance of the second display region is greater than a light transmittance of the first display region.
19. A display device comprising a display panel as claimed in claims 1-18.
CN202210538705.3A 2022-05-18 2022-05-18 Display panel and display device Active CN114882844B (en)

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