CN114880880A - SGT MOSFET device optimization design method - Google Patents
SGT MOSFET device optimization design method Download PDFInfo
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Abstract
The invention relates to the technical field of semiconductor devices, and discloses an optimized design method of an SGT MOSFET device. The method can accurately analyze the trend of the on-resistance of the device changing along with the structural parameters, and has certain reference value for guiding the development of the device.
Description
Technical Field
The invention relates to the technical field of semiconductor devices, in particular to an optimized design method of an SGT MOSFET device.
Background
With the rise of mobile phone fast charging, electric vehicles, brushless motors and lithium batteries, the demand of medium-voltage MOSFETs is more and more vigorous. The SGT MOSFET, which is a representative of the medium-voltage MOSFET, is widely used as a switching device in a motor drive system, an inverter system, and a power management system, and is a core power control unit.
The SGT MOSFET utilizes a charge coupling effect to change the electric field of a device from triangular distribution to approximately rectangular distribution, and under the condition of adopting the specification of epitaxial materials with the same doping concentration, the device can obtain higher breakdown voltage and lower on-resistance. The introduction of the shielding grid structure can reduce the Miller capacitance of the MOSFET by more than 10 times, and the lower value is achieved, so that the SGT MOSFET is beneficial to reducing the loss of the device in application.
Because of the unique structure of the SGT MOSFET, the on-resistance is mainly determined by the device structure, the cell density, the chip area, and other factors, and how to reduce the on-resistance becomes the key point of the power device design. In the actual design process, a large number of simulation verifications are usually carried out with the specific on-resistance as a target, when the requirement of breakdown voltage is met, the smaller the specific on-resistance of the device is better, but how to select the device parameters in the initial stage of re-simulation can only be tried by continuously adjusting the structure parameters, and finally, a relatively optimized device structure is obtained.
Disclosure of Invention
In order to solve the problems and the defects in the prior art, the invention provides an optimized design method of an SGT MOSFET device, which is based on the physical structure of the SGT MOSFET, establishes a specific on-resistance model of the device, calculates related parameters, draws a curve chart of the specific on-resistance of the SGT MOSFET device along with the change of the platform area width and the groove width, and finally obtains the platform area width and the groove width of the SGT MOSFET device when the specific on-resistance is optimal from the curve chart.
In order to achieve the above object, the technical solution of the present invention is as follows:
an SGT MOSFET device optimization design method comprises the following steps:
acquiring the on-resistance of the SGT MOSFET device, and establishing a specific on-resistance model of the SGT MOSFET device according to the acquired on-resistance;
verifying a specific on-resistance model of the SGT MOSFET device by adopting simulation software;
and drawing a curve chart of the specific on-resistance of the SGT MOSFET device along with the change of the platform area width and the groove width, and selecting the platform area width and the groove width when the device has the optimal specific on-resistance as the structural design parameters of the SGT MOSFET device according to the curve chart.
Further, the obtaining the on-resistance of the SGT MOSFET device and establishing a specific on-resistance model of the SGT MOSFET device according to the obtained on-resistance includes:
the on-resistance of an SGT MOSFET device is composed of a source contact resistance, a source body resistance, a channel resistance, a drift region resistance, a substrate resistance and a drain contact resistance, and then
Wherein the content of the first and second substances,is the on-resistance of the SGT MOSFET device,is a resistance of the source contact, and,is the source region body contact resistance,in order to be the channel resistance,in order to be the resistance of the drift region,is a resistance of the substrate and is,is a drain contact resistance;
defining the on-resistance in unit area as the specific on-resistance of SGT MOSFET device, and the unit area can accommodateThe number of cells isSince the cells are connected in parallel, the specific on-resistance of the SGT MOSFET device is
then, the calculation expression of the specific on-resistance model of the SGT MOSFET device is as follows
Wherein the content of the first and second substances,is the specific on-resistance of the SGT MOSFET device;source contact specific on-resistance;the source region specific on-resistance;is the channel specific on-resistance;is the drift region specific on-resistance;substrate specific on-resistance;is a drain contactSpecific on-resistance.
Further, the calculation process of the source contact specific on-resistance is specifically as follows:
the contact resistance to the N + source region in the cell structure of the SGT MOSFET device is determined by the contact resistivity and the junction depth of the N + source region, and the calculation expression is as follows
Wherein the content of the first and second substances,in order to achieve a contact resistance ratio,is the junction depth of the N + source region,is the effective width of the channel;
the specific on-resistance is defined as the product of the source contact resistance multiplied by the cell area
For the stripe-shaped cells, the cell area is as follows
Wherein the content of the first and second substances,is the mesa region width of the SGT MOSFET device;is the trench width of the SGT MOSFET device;
in an SGT MOSFET device, the source is formed by two N + source regions connected in parallel, so the source contact specific on-resistance is
Further, the calculation process of the source region specific on-resistance is specifically as follows:
the current enters the source region from the contact hole and flows through the source region before reaching the channel, and the square resistor of the source region body resistor is diffused by the N + source regionAnd N + source region lateral lengthThe decision, calculation expression is as follows
the length of the N + source region is determined by the following calculation expression
Wherein the content of the first and second substances,for the mesa width of an SGT MOSFET device,is the contact hole width;
the specific on-resistance is defined as the product of the contact resistance of the source region and the cell area
For the stripe-shaped cells, the cell area is as follows
Wherein the content of the first and second substances,is the trench width of the SGT MOSFET device;
in an SGT MOSFET device, two source regions are contained in each cell, so that the source region has a body specific on-resistance of
Further, the calculation process of the channel specific on-resistance is specifically as follows:
the channels in the SGT MOSFET device structure are formed on two longitudinal side walls of a gate2 structure, and each channel contributes to resistance
Wherein the content of the first and second substances,is the channel length;electron mobility of the channel region;is unit area gate oxide capacitance;is the gate-source voltage;is a device thresholdA value voltage;is the effective width of the channel;
calculating the capacitance of the gate oxide layer per unit area and the channel length by the following calculation expression
Wherein the content of the first and second substances,is a vacuum dielectric constant;is the relative dielectric constant of silicon dioxide;is the thickness of the gate oxide layer;junction depth of the Pbody area;is N + source junction depth;
is defined by specific on-resistance, which is obtained by multiplying channel resistance by cell area
For the stripe-shaped cells, the cell area is as follows
Wherein the content of the first and second substances,for the mesa width of an SGT MOSFET device,is the trench width of the SGT MOSFET device;
in an SGT MOSFET device, two channels exist in the cross section of each structure, and current flows from a source electrode to a drift region, so that the specific on-resistance of the channel is
Further, the calculation process of the specific on-resistance of the drift region is specifically as follows:
assuming that the current flowing out of the channel region enters the drift region at a certain divergence angleExtending toward the drain region, passing through the rectangular drift region and then at the bottom of the trenchThe angle is expanded towards the substrate and finally the current directly flows towards the substrate, so that when the current flows in the whole drift region, the drift region is divided into the following four parts
(a) The first part
Wherein the content of the first and second substances,is unit area gate oxide capacitance;is the gate-source voltage;is the device threshold voltage;is the electron charge amount;doping concentration of the Pbody area;
current flows from the channel regionThe angle is expanded towards the drift region until the drift region is filled with current, and the resistance of the part flowing out of the channel is as follows:
wherein the content of the first and second substances,in order to be the resistivity of the drift region,for the length of the first part of the drift region over which current flows,is the cross-sectional area of current flow through the first portion of the drift region;
when current flows through the first portion of the drift region, its resistance changes as the distance the current flows downward increases, at a depth ofAt a position where the current flow cross-sectional width is
In a first part of the drift region through which current flows, a depth differential unitThe resistance of the thickness is as follows
a first part of drift region through which current flows and the specific on-resistance of which passes through the pairAndthe product of the resistances is multiplied by the area of the cell, and the resistance is composed of the left and right symmetrical parallel connection, for the strip-shaped cell, the cell areaThen the specific on-resistance of the first part of the drift region is
Wherein the content of the first and second substances,is the mesa region width of the SGT MOSFET device;is the trench width of the SGT MOSFET device;
(b) the second part
The current flows in the whole drift region and spreads towards the substrate, and the partial resistance is
Wherein the content of the first and second substances,in order to be the resistivity of the drift region,for the length of the source field plate region over which current flows after flowing through the first portion of the drift region,is the cross-sectional area of current flow through the second portion of the drift region;
the length of the current flowing into the source field plate region after the current flows through the first part of the drift region and the cross-sectional area of the current flowing through the second part of the drift region are obtained through the following calculation expressions
Wherein the content of the first and second substances,is the mesa region width of the SGT MOSFET device;junction depth of the Pbody area;is the depth of the groove;
a second part of drift region through which current flows and the specific on-resistance of which is the cell resistance of the partMultiplied by the cell area, for a stripe cell, the cell areaThen the specific on-resistance of the second part of the drift region is
Wherein the content of the first and second substances,is the trench width of the SGT MOSFET device;
(c) third part
When current flows through the third portion of the drift region, its resistance changes with increasing distance that the current flows downward, at a depth ofAt a position where the current flow cross-sectional width is
Wherein the content of the first and second substances,is the mesa region width of the SGT MOSFET device;
in a third part of the drift region through which current flows, a depth differential unitThe resistance of the thickness is as follows
A third partial drift region through which current flows and of which the specific on-resistance passesAndthe product of resistance between the two is multiplied by the cell area, and for the strip-shaped cells, the cell area is obtainedThen the specific on-resistance of the third part of the drift region is
Wherein the content of the first and second substances,for the mesa width of an SGT MOSFET device,for the trench width of an SGT MOSFET device,is the drift region resistivity;
(d) fourth section
Current is supplied toFlowing towards the substrate after an angular expansion, the partial resistance being
Wherein the content of the first and second substances,in order to be the resistivity of the drift region,for the current to flow through the third portion and into the substrateThe front flow is through the length of the rectangular area,the cross-sectional area of the drift region of the fourth part through which current flows;
the length of the rectangular region which is flowed through before the current enters the substrate after flowing through the third part and the cross-sectional area of the drift region of the fourth part which is flowed through by the current are obtained by the following calculation expressions
Wherein the content of the first and second substances,is the epitaxial layer thickness of the device;
a fourth part drift region through which current flows, the specific on-resistance of which is the cell resistance of the partMultiplied by the cell area, for a stripe cell, the cell areaThen the specific on-resistance of the fourth part of the drift region is
Finally, the total on-resistance of the drift region is the sum of the on-resistances of the four parts, i.e.
Further, the calculation process of the substrate specific on-resistance is specifically as follows:
when the current passes through the bottom of the drift region and then rapidly diffuses to the whole heavily doped substrate, the current passing through the substrate can be assumed to enter a uniform cross-section area, and the cell resistance of the substrateIs composed of
Wherein the content of the first and second substances,is the resistivity of the substrate and is,in order for the cell current to flow through the thickness of the substrate,is the cross-sectional area of the cell current flowing through the substrate;is the substrate thickness;
the specific on-resistance of the substrate is obtained by multiplying the cell resistance of the substrate by the cell area, and for the strip-shaped cells, the cell areaThen there is a substrate specific on-resistance of
Further, the drain contact resistance is obtained by the following calculation expression
Wherein, the first and the second end of the pipe are connected with each other,in order to achieve a contact resistance ratio,for the mesa width of an SGT MOSFET device,is the trench width of the SGT MOSFET device;
defined by the specific on-resistance, the drain contact specific on-resistance is the product of the drain contact resistance times the cell area, for a stripe cell, the cell areaThen the drain contact specific on-resistance ends up being
Further, the verification of the specific on-resistance model of the SGT MOSFET device by using the simulation software means that the specific on-resistance model of the SGT MOSFET device is verified by using the Silvaco software, and the divergence angle is finally determinedAndthe value of the angle.
The invention has the beneficial effects that:
the physical model of the specific on-resistance of the SGT MOSFET device provided by the invention can accurately analyze the trend of the on-resistance changing along with the structural parameters, particularly the optimization design relation of the platform width and the groove width specific on-resistance, and has a certain reference value for guiding the development of the device.
Drawings
The foregoing and following detailed description of the invention will be apparent when read in conjunction with the following drawings, in which:
FIG. 1 is a flow chart of the method of the present invention;
FIG. 2 is a graph of resistance distribution for an SGT MOSFET device;
FIG. 3 is a current profile of an SGT MOSFET device;
FIG. 4 is a SGT MOSFET emulation device structure;
fig. 5 is a 60V SGTMOSFET specific on-resistance curve with mesa width and trench width.
Detailed Description
In order to make those skilled in the art better understand the technical solution of the present invention, the technical solution for achieving the object of the present invention will be further described by several specific examples, and it should be noted that the technical solution claimed in the present invention includes, but is not limited to, the following examples. All other embodiments, which can be obtained by a person skilled in the art without making any inventive step based on the embodiments of the present invention, shall fall within the scope of protection of the present invention.
With the rise of mobile phone fast charging, electric vehicles, brushless motors and lithium batteries, the demand of medium-voltage MOSFETs is more and more vigorous. The SGT MOSFET, which is a representative of the medium-voltage MOSFET, is widely used as a switching device in a motor drive system, an inverter system, and a power management system, and is a core power control unit.
Because of the unique structure of the SGT MOSFET, the on-resistance is mainly determined by the device structure, the cell density, the chip area, and other factors, and how to reduce the on-resistance becomes the key point of the power device design. In the actual design process, a large number of simulation verifications are usually carried out with the specific on-resistance as a target, when the requirement of breakdown voltage is met, the smaller the specific on-resistance of the device is better, but how to select the device parameters in the initial stage of re-simulation can only be tried by continuously adjusting the structure parameters, and finally, a relatively optimized device structure is obtained.
Based on the above, the embodiment of the invention provides an optimized design method of an SGT MOSFET device, which includes establishing a physical model of the specific on-resistance of the SGT MOSFET device, performing simulation verification on the model by using simulation software, drawing a curve chart of the specific on-resistance of the SGT MOSFET device along with the change of the platform area width and the trench width according to a simulation result, and obtaining the platform area width and the trench width of the SGT MOSFET device at the time of the optimal specific on-resistance according to the chart. The optimization design method provided by the invention can accurately analyze the trend of the on-resistance changing along with the structural parameters, particularly the optimization design relation of the platform width and the groove width to the on-resistance, and has a certain reference value for guiding the development of the devices.
The embodiment provides an SGT MOSFET device optimization design method, which is shown in fig. 1 with reference to the description, and mainly includes the following steps:
s101, firstly, obtaining the on-resistance of the SGT MOSFET device, and establishing a specific on-resistance model of the SGT MOSFET device according to the obtained on-resistance.
In this embodiment, it should be noted that, referring to the description of fig. 2 and 3, the on-resistance of the SGT MOSFET device is shownContact resistance by sourceSource region bulk resistanceChannel resistanceDrift region resistanceSubstrate resistorAnd drain contact resistanceThe calculation expression of the on-resistance of the SGT MOSFET device is as follows
Defining the on-resistance in unit area as the specific on-resistance of the SGT MOSFET device, and the number of the cells which can be accommodated in unit area isAnd each unit cell is in parallel connection, the specific on-resistance of the SGT MOSFET device is
according to the two calculation expressions, the on-resistance of the SGT MOSFET device can be finally obtained as follows
Further, by simplifying the above calculation expression, the calculation expression of the specific on-resistance model of the SGT MOSFET device is as follows
Wherein the content of the first and second substances,is the specific on-resistance of the SGT MOSFET device;source contact specific on-resistance;the source region specific on-resistance;is the channel specific on-resistance;is the drift region specific on-resistance;substrate specific on-resistance;drain contact specific on-resistance.
Further, in this embodiment, the calculation process of the source contact specific on-resistance is specifically as follows:
the contact resistance to the N + source region in the cell structure of an SGT MOSFET device is determined primarily by the contact resistivity and the junction depth of the N + source region, considering the contact area, there is
Wherein the content of the first and second substances,in order to achieve a contact resistance ratio,is the junction depth of the N + source region,is the effective width of the channel;
further, in SGT MOSFET devices, the source contact specific on-resistanceCan pass through source contact resistanceAnd area of cellObtained by multiplication, i.e.
For a stripe cell, the cell area is
Wherein the content of the first and second substances,is the mesa region width of the SGT MOSFET device;is the trench width of the SGT MOSFET device;
considering two N + source regions in parallel, the source contact specific on-resistance is ultimately the
In this embodiment, it should be noted that the contact resistivity is determined by the work function of the contact metal and the surface doping concentration of the N + source region. In the power device structure, the common method is to use a low barrier height contact metal to increase the doping concentration of the N + source region to be higher than 5 x 10 19 cm 3 Ensure contact resistivity less than 1 x 10 -5 Ω·cm 2 The metal semiconductor becomes ohmic contactThereby avoiding a severe impact on the overall on-resistance of the SGT MOSFET.
Further, in this embodiment, the calculation process of the source area specific on-resistance is specifically as follows:
the current enters the source region from the contact hole and flows through the source region before reaching the channel, and the square resistor of the source region body resistor is diffused by the N + source regionAnd N + source region lateral lengthIt was decided that the specific calculation expression is as follows
the length of the N + source region is related to the cell manufacturing process window, and the length is determined by the following calculation expression
Wherein the content of the first and second substances,for the mesa width of an SGT MOSFET device,is the contact hole width;
the source region specific on-resistance can be defined by the specific on-resistanceIs a bulk resistor of a source regionAnd area of cellObtained by multiplication, i.e.
For the stripe-shaped cells, the cell area is as follows
In the SGT MOSFET device, each unit cell comprises two source regions, so that the specific on-resistance of the source region is finally obtained by combining the formula
Further, in this embodiment, the channel specific on-resistance calculation process specifically includes the following steps:
referring to the description of fig. 2, the channels in the SGT MOSFET device structure are formed on the two longitudinal sidewalls of the gate2 structure, so that the resistance contributed by each channel is
Wherein the content of the first and second substances,is the channel length;electron mobility of the channel region;is unit area gate oxide capacitance;is the gate-source voltage;is the device threshold voltage;is the effective width of the channel;
the unit area gate oxide layer capacitance and the channel length are obtained by the following two calculation expressions
Wherein, the first and the second end of the pipe are connected with each other,is a vacuum dielectric constant;is the relative dielectric constant of silicon dioxide;is the thickness of the gate oxide layer;junction depth of the Pbody area;is N + source junction depth;
specific on-resistance of channel contribution in SGT MOSFET devicesCan be controlled by channel resistanceAnd area of cellObtained by multiplication, i.e.
For the stripe-shaped cells, the cell area is as follows
Wherein the content of the first and second substances,for the mesa width of an SGT MOSFET device,is the trench width of the SGT MOSFET device;
in the SGT MOSFET device, two channels exist in the cross section of each structure, and current flows from a source electrode to a drift region, and the specific on-resistance of the channels can be obtained by combining the formula
Further, in this embodiment, the calculation process of the specific on-resistance of the drift region is specifically as follows:
firstly, it is assumed that the current flowing out of the channel region enters the drift region at a certain divergence angleExtending toward the drain region, passing through the rectangular drift region and then at the bottom of the trenchThe angle is expanded towards the substrate and finally flows directly towards the substrate, thenWhen the flow flows in the whole drift region, the drift region is divided into the following four parts
(a) The first part
Wherein the content of the first and second substances,is unit area gate oxide capacitance;is the gate-source voltage;is the device threshold voltage;is the electron charge amount;doping concentration of the Pbody area;
current flows from the channel regionThe angle is expanded towards the drift region until the drift region is filled with current, and the resistance of the part after flowing out of the channel is
Wherein the content of the first and second substances,in order to be the resistivity of the drift region,for the length of the first part of the drift region over which current flows,is the cross-sectional area of current flow through the first portion of the drift region;
since the partial area is a trapezoid with a narrow upper part and a wide lower part, the cross-sectional areaIs carried alongThe variable of the change is performed by adopting an integral mode when the partial resistance is obtained, and the method comprises the following specific steps:
when current flows through the first part of the drift region, the resistance of the drift region changes with the distance of the current flowing downwards in the current flowing mode, and the depth isAt a position where the current flow cross-sectional width is
In a first part of the drift region through which current flows, the depth differential unitThe resistance of the thickness is as follows
the first part of drift region through which current flows has a specific on-resistanceAndthe resistance integral between and multiplied by the cell area, for a stripe cell, the cell areaMeanwhile, the partial resistance is formed by bilaterally symmetrical parallel connection, so that the specific on-resistance of the first part of the drift region is
Wherein the content of the first and second substances,is the mesa region width of the SGT MOSFET device;is the trench width of the SGT MOSFET device.
(b) The second part
The current flows in the whole drift region and spreads towards the substrate, and the part of the resistance is
Wherein the content of the first and second substances,in order to be the resistivity of the drift region,for the length of the source field plate region over which current flows after flowing through the first portion of the drift region,for current to flow through the drift regionThe cross-sectional area of the portion;
the length of the current flowing into the source field plate region after the current flows through the first part of the drift region and the cross-sectional area of the current flowing through the second part of the drift region are obtained through the following calculation expressions respectively
Wherein the content of the first and second substances,is the mesa region width of the SGT MOSFET device;junction depth of the Pbody area;is the depth of the groove;
a second part of drift region through which current flows and the specific on-resistance of which is the cell resistance of the partAnd area of cellMultiplication is carried out to obtain the cell area of the strip-shaped cellsThen the specific on-resistance of the second part of the drift region is
Wherein the content of the first and second substances,is the trench width of the SGT MOSFET device.
(c) Third part
When current flows through the third part of the drift region, the resistance of the drift region changes with the distance of the current flowing downwards in the current flowing mode, and the depth isAt a position where the current flow cross-sectional width is
Wherein the content of the first and second substances,is the mesa region width of the SGT MOSFET device;
in a third part of the drift region through which current flows, the depth differential unitThe resistance of the thickness is as follows
A third partial drift region through which current flows and of which the specific on-resistance can be determined by the pairAndthe resistance integral between and multiplied by the cell area, for a stripe cell, the cell areaThen the specific on-resistance of the third part of the drift region is
Wherein the content of the first and second substances,for the trench width of an SGT MOSFET device,is the drift region resistivity.
(d) Fourth section
Current is supplied toFlowing towards the substrate after an angular expansion, the partial resistance being
Wherein the content of the first and second substances,in order to be the resistivity of the drift region,for the length of the rectangular area through which current flows before entering the substrate after flowing through the third portion,the cross-sectional area of the drift region of the fourth part through which current flows;
the length of the current flowing through the rectangular region and the cross-sectional area of the drift region of the fourth part through which the current flows before the current flows into the substrate after flowing through the third part are respectively obtained through the following calculation expressions
Wherein the content of the first and second substances,is the epitaxial layer thickness of the device;
a fourth part drift region through which current flows, the specific on-resistance of which is the cell resistance of the partAnd area of cellMultiplication is carried out to obtain the cell area of the strip-shaped cellsThen the specific on-resistance of the fourth part of the drift region is
Finally, the total on-resistance of the drift region is the sum of the on-resistances of the four parts, i.e.
Further, in this embodiment, the calculation process of the substrate specific on-resistance is specifically as follows:
when the current passes through the bottom of the drift region and then rapidly diffuses to the whole heavily doped substrate, the current passing through the substrate can be assumed to enter a uniform cross-section area, and the cell resistance of the substrateIs composed of
Wherein the content of the first and second substances,is the resistivity of the substrate and is,in order for the cell current to flow through the thickness of the substrate,is the cross-sectional area of the cell current flowing through the substrate;is the substrate thickness;
the specific on-resistance of the substrate is defined as the cell resistanceAnd area of cellObtained by multiplication, for a stripe-shaped cell, its cell areaThen there is a substrate specific on-resistance of
Further, in the present embodiment, the drain contact resistance is obtained by the following calculation expression
Wherein, the first and the second end of the pipe are connected with each other,in order to achieve a contact resistance ratio,for the mesa width of an SGT MOSFET device,is the trench width of the SGT MOSFET device;
the specific on-resistance is defined as the drain contact resistanceAnd area of cellAre multiplied by each other to obtain
In this embodiment, it should be noted that the current needs to pass through the drain contact resistor between the drain metal and the substrate before reaching the drain, and since the drain contact current flows uniformly, a resistance value smaller than that of the drain contact terminal can be obtainedIdeal resistance and therefore drain contact resistance is usually neglected.
And S102, verifying the established specific on-resistance model of the SGT MOSFET device by adopting simulation software.
In the present embodiment, it should be noted that the divergence angle is specifically introduced by the present inventionAndtherefore, the method adopts Silvaco software to verify the established specific on-resistance model of the SGT MOSFET device and determine the divergence angleAndand the value of the angle, thereby determining a calculation expression of the specific on-resistance of the whole drift region, and finally determining a calculation expression of a specific on-resistance model of the whole device.
And S103, drawing a curve chart of the specific on-resistance of the SGT MOSFET along with the change of the platform area width and the groove width according to the final calculation expression of the specific on-resistance model of the SGT MOSFET, obtaining the platform area width and the groove width of the SGT MOSFET at the time of the optimal specific on-resistance by combining the process flow conditions (namely within the process condition allowable range) formulated by a chip manufacturing factory according to the drawn chart, and taking the platform area width and the groove width as guide parameters during the device design.
In this embodiment, the computational expression of the specific on-resistance model of the SGT MOSFET device is a mathematical relationship relating the device mesa region width and the trench width.
In this embodiment, the horizontal axis of the graph is the mesa width of the SGT MOSFET device and the vertical axis is the specific on-resistance of the device. When a curve chart is drawn, the width of a groove of the SGT MOSFET device is fixed to be unchanged, the specific on-resistance of the device is calculated under the condition of different platform area widths, so that a curve is obtained, then the groove width is converted, so that a plurality of curves are obtained in the chart, and the drawing of the curve chart of the SGT MOSFET device specific on-resistance changing along with the platform area width and the groove width is completed; after the chart is drawn, the mesa region width and the trench width corresponding to the value of the lowest point are selected as design structure parameters of the SGT MOSFET device in all curves according to the process flow conditions (i.e., within the allowable range of the device processing process conditions) formulated by the chip manufacturing factory for guiding the production and processing of the device. Therefore, in the present invention, when an SGT MOSFET device is actually designed and produced, the mesa region width and the trench width corresponding to the optimal specific on-resistance of the device need not only meet the requirement of the optimal specific on-resistance of the device, but also the two parameters need to be within the allowable range of the process flow conditions set by the chip manufacturing factory, that is, under the parameter conditions, the device can not only reach the optimal specific on-resistance, but also be successfully manufactured. The process flow conditions established by a chip manufacturing plant are related to the level and capability of the chip manufacturing plant.
Further, according to the SGT MOSFET device specific on-resistance physical model established as above, the specific on-resistance value of the 60V SGT MOSFET is calculated and verified in the further embodiment of the present invention.
Referring to the specification, fig. 4, a device structure with a voltage of 60V is simulated by simulation software, and a current flowing out of a channel region is seen in the figure and enters a drift region at a certain divergence angleExtend to the drain region in view ofThe angle is very small and the doping concentration of the SGT MOSFET drift region is high, so it can be approximated that current flows throughout the rectangular drift region. The current flowing out from the channel region flows to the drain region after entering the drift region and flows to the bottom of the trenchThe angle is extended towards the substrate and is obtained by simulation and experience,And finally directly to the substrate.
The resistance of the whole drift region of the device obtained by combining the analysis can be simplified into three parts for calculation, and the calculation modes of the resistance of other regions of the device are unchanged. When in use,When the current flows through the first partial region of the drift region, the first partial region is not trapezoidal any more, but is changed into a rectangular region, the first partial resistance and the second partial resistance of the drift region through which the current flows can be calculated in a combined mode, and the combined resistance calculation expression is as follows
Further, the length and area of the current flowing through the merging portion are obtained by the following calculation expression
The specific on-resistance of the combined part is obtained by multiplying the cell resistance by the cell area
The specific on-resistance of the original third partial region of the drift region through which the current flows is changed to
The specific on-resistance of the original fourth partial region of the drift region through which the current flows is changed to
Therefore, the specific on-resistance of the whole drift region is finally added to the above three parts as follows
Referring to the specification, fig. 5 is a graph of the specific on-resistance of a 60V SGT MOSFET as a function of trench width and mesa width. As can be seen from fig. 5, under the process flow conditions defined by the chip manufacturing factory (i.e., within the allowable range of the process conditions), the mesa width of the deviceWidth of trenchThere is an optimum value to make the specific on-resistance of the device minimum at this time, so that during design, the mesa region width and the trench width of the device are respectively 1.15 and 0.75, and finally the specific on-resistance value and the percentage of the device in each region are obtained as shown in table 1 below.
Finally, verifying the structural parameters again through a semiconductor simulation tool Silvaco, and simulatingAndthe structure of the device simulates that 10V starting voltage is added at two ends of a grid source, and the total specific on-resistance of the device is 14 mohm.mm 2 when 0.1V bias voltage is added at a drain, which is similar to the specific on-resistance value 13.3 mohm.mm 2 obtained by calculation by using a physical model.
The foregoing is directed to the preferred embodiment of the present invention, which is not intended to be exhaustive or to limit the invention to the precise form disclosed, and all modifications and equivalents of the above-described embodiment may be resorted to, falling within the scope of the invention.
Claims (9)
1. An SGT MOSFET device optimization design method is characterized by comprising the following steps:
acquiring the on-resistance of the SGT MOSFET device, and establishing a specific on-resistance model of the SGT MOSFET device according to the acquired on-resistance;
verifying a specific on-resistance model of the SGT MOSFET device by adopting simulation software;
and drawing a curve chart of the specific on-resistance of the SGT MOSFET device along with the change of the platform area width and the groove width, and selecting the platform area width and the groove width when the device has the optimal specific on-resistance as the structural design parameters of the SGT MOSFET device according to the curve chart.
2. The SGT MOSFET device optimization design method according to claim 1, wherein the obtaining the on-resistance of the SGT MOSFET device and establishing the SGT MOSFET device specific on-resistance model according to the obtained on-resistance comprises:
the on-resistance of an SGT MOSFET device is composed of a source contact resistance, a source body resistance, a channel resistance, a drift region resistance, a substrate resistance and a drain contact resistance, and then
Wherein the content of the first and second substances,is the on-resistance of the SGT MOSFET device,is a resistance of the source contact, and,is the source region body contact resistance,in order to be the channel resistance,in order to be the resistance of the drift region,is a resistance of the substrate and is,is a drain contact resistance;
defining the on-resistance in a unit area as the specific on-resistance of the SGT MOSFET device, and the number of cells which can be accommodated in the unit area asSince the cells are connected in parallel, the specific on-resistance of the SGT MOSFET device is
then, the calculation expression of the specific on-resistance model of the SGT MOSFET device is as follows
Wherein the content of the first and second substances,is the specific on-resistance of the SGT MOSFET device;source contact specific on-resistance;the source region specific on-resistance;is the channel specific on-resistance;is the drift region specific on-resistance;substrate specific on-resistance;drain contact specific on-resistance.
3. The SGT MOSFET device optimization design method of claim 2, wherein the source contact specific on-resistance calculation process is specifically as follows:
the contact resistance to the N + source region in the cell structure of the SGT MOSFET device is determined by the contact resistivity and the junction depth of the N + source region, and the calculation expression is as follows
Wherein the content of the first and second substances,in order to achieve a contact resistance ratio,is the junction depth of the N + source region,is the effective width of the channel;
the specific on-resistance is defined as the product of the source contact resistance multiplied by the cell area
For the stripe-shaped cells, the cell area is as follows
Wherein the content of the first and second substances,is the mesa region width of the SGT MOSFET device;is the trench width of the SGT MOSFET device;
in an SGT MOSFET device, the source is formed by two N + source regions connected in parallel, so the source contact specific on-resistance is
4. The SGT MOSFET device optimization design method according to claim 2, wherein the source region body-to-body ratio on-resistance calculation process is specifically as follows:
the current enters the source region from the contact hole and flows through the source region before reaching the channel, and the square resistor of the source region body resistor is diffused by the N + source regionAnd N + source region lateral lengthThe decision, calculation expression is as follows
the length of the N + source region is determined by the following calculation expression
Wherein the content of the first and second substances,for the mesa width of an SGT MOSFET device,is the contact hole width;
the specific on-resistance is defined as the product of the contact resistance of the source region and the cell area
For the stripe-shaped cells, the cell area is as follows
Wherein the content of the first and second substances,is the trench width of the SGT MOSFET device;
in an SGT MOSFET device, two source regions are contained in each cell, so that the source region has a body specific on-resistance of
5. The SGT MOSFET device optimization design method according to claim 2, wherein the channel specific on-resistance calculation process is specifically as follows:
the channels in the SGT MOSFET device structure are formed on two longitudinal side walls of a gate2 structure, and each channel contributes to resistance
Wherein the content of the first and second substances,is the channel length;electron mobility of the channel region;is unit area gate oxide capacitance;is the gate-source voltage;is the device threshold voltage;is the effective width of the channel;is a vacuum dielectric constant;is the relative dielectric constant of silicon dioxide;is the thickness of the gate oxide layer;junction depth of the Pbody area;is N + source junction depth;
is defined by specific on-resistance, which is obtained by multiplying channel resistance by cell area
For the stripe-shaped cells, the cell area is as follows
Wherein, the first and the second end of the pipe are connected with each other,for the mesa width of an SGT MOSFET device,is the trench width of the SGT MOSFET device;
in an SGT MOSFET device, two channels exist in the cross section of each structure, and current flows from a source electrode to a drift region, so that the specific on-resistance of the channel is
6. The SGT MOSFET device optimization design method according to claim 2, wherein the drift region specific on-resistance calculation process is specifically as follows:
assuming that the current flowing out of the channel region enters the drift region at a certain divergence angleExtending toward the drain region, passing through the rectangular drift region and then at the bottom of the trenchThe angle is expanded towards the substrate and finally the current directly flows towards the substrate, so that when the current flows in the whole drift region, the drift region is divided into the following four parts
(a) The first part
Wherein the content of the first and second substances,is unit area gate oxide capacitance;is the gate-source voltage;is the device threshold voltage;is the electron charge amount;doping concentration of the Pbody area;
current flows from the channel regionThe angle is expanded towards the drift region until the drift region is filled with current, and the resistance of the part flowing out of the channel is as follows:
wherein the content of the first and second substances,in order to be the resistivity of the drift region,for the length of the first part of the drift region over which current flows,for current to flow throughA cross-sectional area of the first portion of the drift region;
when current flows through the first portion of the drift region, its resistance changes as the distance the current flows downward increases, at a depth ofAt a position where the current flow cross-sectional width is
In a first part of the drift region through which current flows, a depth differential unitThe resistance of the thickness is as follows
a first part of drift region through which current flows and the specific on-resistance of which passes through the pairAndthe product of the resistances is multiplied by the area of the cell, and the resistance is composed of the left and right symmetrical parallel connection, for the strip-shaped cell, the cell areaThen the specific on-resistance of the first part of the drift region is
Wherein the content of the first and second substances,is the mesa region width of the SGT MOSFET device;is the trench width of the SGT MOSFET device;
(b) the second part
The current flows in the whole drift region and spreads towards the substrate, and the partial resistance is
Wherein the content of the first and second substances,in order to be the resistivity of the drift region,for the length of the source field plate region over which current flows after flowing through the first portion of the drift region,for the current to flow through the cross-sectional area of the second part of the drift region,is the mesa region width of the SGT MOSFET device;junction depth of the Pbody area;is the depth of the groove;
a second part of drift region through which current flows and the specific on-resistance of which is the cell resistance of the partMultiplied by the cell area, for a stripe cell, the cell areaThen the specific on-resistance of the second part of the drift region is
Wherein the content of the first and second substances,is the trench width of the SGT MOSFET device;
(c) third part
When current flows through the third portion of the drift region, its resistance changes with increasing distance that the current flows downward, at a depth ofAt a position where the current flow cross-sectional width is
Wherein the content of the first and second substances,is the mesa region width of the SGT MOSFET device;
in a third part of the drift region through which current flows, a depth differential unitThe resistance of the thickness is as follows
A third partial drift region through which current flows and of which the specific on-resistance passesAndthe product of resistance between the two is multiplied by the cell area, and for the strip-shaped cells, the cell area is obtainedThen the specific on-resistance of the third part of the drift region is
Wherein the content of the first and second substances,for the trench width of an SGT MOSFET device,is the drift region resistivity;
(d) fourth section
Current is supplied toFlowing towards the substrate after an angular expansion, the partial resistance being
Wherein the content of the first and second substances,in order to be the resistivity of the drift region,for the length of the rectangular area through which current flows before entering the substrate after flowing through the third portion,the cross-sectional area of the drift region of the fourth part through which current flows;is the epitaxial layer thickness of the device;
a fourth part drift region through which current flows, the specific on-resistance of which is the cell resistance of the partMultiplied by the cell area, for a stripe cell, the cell areaThen the specific on-resistance of the fourth part of the drift region is
Finally, the total on-resistance of the drift region is the sum of the on-resistances of the four parts, i.e.
7. The method of claim 2, wherein the calculation of the substrate specific on-resistance is as follows:
when the current passes through the bottom of the drift region and then rapidly diffuses to the whole heavily doped substrate, the current passing through the substrate can be assumed to enter a uniform cross-section area, and the cell resistance of the substrateIs composed of
Wherein the content of the first and second substances,is the resistivity of the substrate and is,in order for the cell current to flow through the thickness of the substrate,is the cross-sectional area of the cell current flowing through the substrate;is the substrate thickness;
the specific on-resistance of the substrate is obtained by multiplying the cell resistance of the substrate by the cell area, and for the strip-shaped cells, the cell areaThen there is a substrate specific on-resistance of
8. The method of claim 2, wherein the drain contact resistance is obtained by the following computational expression
Wherein the content of the first and second substances,in order to achieve a contact resistance ratio,for the mesa width of an SGT MOSFET device,is the trench width of the SGT MOSFET device;
defined by the specific on-resistance, the drain contact specific on-resistance is the product of the drain contact resistance times the cell area, for a stripe cell, the cell areaThen the drain contact specific on-resistance ends up being
9. The SGT MOSFET device optimization design method of claim 6, wherein the verifying the SGT MOSFET device specific on-resistance model by using simulation software means that the SGT MOSFET device specific on-resistance model is verified by using Silvaco software, and finally the divergence angle is determinedAndthe value of the angle.
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