CN114867195A - Multilayer circuit board and preparation process and application thereof - Google Patents
Multilayer circuit board and preparation process and application thereof Download PDFInfo
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- CN114867195A CN114867195A CN202210677429.9A CN202210677429A CN114867195A CN 114867195 A CN114867195 A CN 114867195A CN 202210677429 A CN202210677429 A CN 202210677429A CN 114867195 A CN114867195 A CN 114867195A
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- 239000010410 layer Substances 0.000 claims abstract description 393
- 239000002131 composite material Substances 0.000 claims abstract description 160
- 239000012792 core layer Substances 0.000 claims abstract description 105
- 239000011347 resin Substances 0.000 claims abstract description 100
- 229920005989 resin Polymers 0.000 claims abstract description 100
- 239000002002 slurry Substances 0.000 claims abstract description 91
- 229910052751 metal Inorganic materials 0.000 claims abstract description 75
- 239000002184 metal Substances 0.000 claims abstract description 75
- 238000000034 method Methods 0.000 claims abstract description 61
- 238000009413 insulation Methods 0.000 claims abstract description 3
- 239000000758 substrate Substances 0.000 claims description 62
- 239000010931 gold Substances 0.000 claims description 51
- 229910052737 gold Inorganic materials 0.000 claims description 51
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 49
- 239000000919 ceramic Substances 0.000 claims description 42
- 238000003825 pressing Methods 0.000 claims description 37
- 238000012545 processing Methods 0.000 claims description 36
- 238000011049 filling Methods 0.000 claims description 29
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- 239000003292 glue Substances 0.000 claims description 23
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 19
- 229910052709 silver Inorganic materials 0.000 claims description 19
- 239000004332 silver Substances 0.000 claims description 19
- 230000001680 brushing effect Effects 0.000 claims description 18
- 238000000227 grinding Methods 0.000 claims description 14
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- 238000004519 manufacturing process Methods 0.000 claims description 9
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- 238000009713 electroplating Methods 0.000 description 17
- 239000000126 substance Substances 0.000 description 14
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- 238000005530 etching Methods 0.000 description 10
- 238000007747 plating Methods 0.000 description 10
- 229910000679 solder Inorganic materials 0.000 description 10
- 238000005553 drilling Methods 0.000 description 7
- BSIDXUHWUKTRQL-UHFFFAOYSA-N nickel palladium Chemical compound [Ni].[Pd] BSIDXUHWUKTRQL-UHFFFAOYSA-N 0.000 description 7
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Images
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
- H05K1/0298—Multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0313—Organic insulating material
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/09—Use of materials for the conductive, e.g. metallic pattern
- H05K1/092—Dispersed materials, e.g. conductive pastes or inks
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/107—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by filling grooves in the support with conductive material
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Dispersion Chemistry (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
The invention provides a multilayer circuit board and a preparation process and application thereof. The multilayer circuit board comprises a first metal layer, a first multilayer composite layer, a core layer and a second metal layer which are sequentially stacked; the multilayer circuit board comprises a through hole/blind hole, and the through hole/blind hole penetrates through the first multilayer composite layer or the through hole/blind hole penetrates through the first multilayer composite layer and the core layer; the through holes/blind holes are filled with conductive slurry A; the first multilayer composite layer is comprised of at least 3 composite layers; the composite layer comprises an insulation resin layer and a circuit layer which are attached to each other. In the invention, the dry process replaces the traditional wet process to prepare the circuit layer, and the prepared multilayer circuit board has better conductivity, weldability and smoothness.
Description
Technical Field
The invention belongs to the technical field of printed circuit boards, and particularly relates to a multilayer circuit board and a preparation process and application thereof.
Background
With the advent of the 5G era, the industry has made higher demands on miniaturization, high integration, stability and reliability of signal transmission of electronic products. Printed Circuit Boards (PCBs) as carriers for electrical connection in electronic products are being developed in manufacturing technology, interconnection technology, and the like.
CN108055784A discloses a method for manufacturing a circuit board. The manufacturing method comprises the step of manufacturing the inner layer and/or outer layer circuit by using a positive process, wherein the positive process comprises the following steps: (1) sequentially carrying out film pasting, exposure and development processes to form a circuit pattern on the circuit board; (2) plating copper on the circuit pattern on the circuit board to form a copper electroplating layer; (3) then carrying out chemical nickel deposition treatment, and depositing a nickel layer on the surface of the electroplated copper layer; (4) and sequentially carrying out film stripping and etching treatment to etch a circuit on the circuit board. This technical scheme changes the traditional tin-plating behind the electrocoppering into sinking nickel, through sinking the nickel process deposit the even nickel layer of one deck thickness behind outer circuit figure copper facing, has avoided the special protective layer thickness (tin thickness) deviation that brings of figure distribution, but need use a large amount of chemical liquid to carry out surface treatment at the copper facing technology to lead to industrial waste water's emission, serious polluted environment.
CN105208777A discloses a method for manufacturing a circuit board with a back-drilled hole. The manufacturing method comprises the following steps: s1, coating a dry film on the circuit board with a copper layer and a back drilling hole on the surface, exposing the needed copper circuit and the back drilling hole after exposure and development; s2, plating copper in the back drilled hole and the exposed copper circuit, plating the copper to the required copper layer thickness, and then plating the tin to the required tin layer thickness; s3, removing the dry film on the surface of the circuit board, and exposing the surface copper in the dry film area; s4 covering the mouth of the back drilled hole with an etching-resistant film; s5, etching the surface copper of the dry film area corresponding to the surface of the circuit board; s6 removing the anti-etching film covering the back-drilled hole; s7 removing the tin layer in the back drilling hole of the circuit board and the exposed copper circuit surface. Although the technical scheme improves the electroplating quality by increasing the hole-covering process of the back drilling hole of the circuit board, a large amount of industrial wastewater is discharged in the electroplating process, and the environment is seriously polluted.
CN101400212A discloses a method for manufacturing a local area high frequency circuit printed wiring board by a semi-additive method. The method comprises the following steps: (1) embedding a Rogers plate in a region of a common plate with requirements on high-frequency characteristics; (2) mixing and pressing with other common plates; (3) polishing and flattening the joint of the Rogers plate and the common plate; (4) and depositing copper on the surfaces of Rogers and common plates and electroplating to generate a layer of flat copper foil. According to the technical scheme, the high-frequency material Rogers plate is pressed into a region with a requirement on high-frequency characteristics by an embedded pressing method, and then a layer of copper is plated on the common surface of the Rogers and the common FR-4 by a semi-additive method for wiring so as to realize effective connection of electric signals, however, a circuit layer protrudes out of an insulating layer and is easily subjected to side etching.
From the above, the existing PCB preparation process has some problems that it is not negligible, for example, a large amount of chemical liquid is needed for surface treatment in the copper dissolving and copper plating process during the circuit board preparation process, thereby causing the discharge of industrial waste water and serious environmental pollution; in addition, in the process of preparing the circuit board by an additive method or a semi-additive method, the circuit layer protrudes out of the insulating resin layer, so the circuit layer is easy to be etched laterally, and meanwhile, ink and the like are required to be used for forming a solder mask layer for ensuring flatness, but the solder mask layer has a large dielectric constant, so that signal transmission is slowed down, and loss is increased.
Therefore, how to provide a preparation process for preparing a circuit layer of a circuit board by replacing the traditional wet method and avoid the use of chemical liquid medicine, thereby realizing green environmental protection; meanwhile, the phenomenon of circuit side etching is reduced, the use of solder resist ink is avoided, and the loss in the transmission process is reduced, which becomes a technical problem to be solved urgently at present.
Disclosure of Invention
Aiming at the defects of the prior art, the invention aims to provide a multilayer circuit board and a preparation process and application thereof. According to the invention, through the design of the multilayer circuit board structure and the dry process instead of the traditional wet process, the circuit layer is prepared, and the prepared multilayer circuit board has better conductivity, weldability and flatness.
In order to achieve the purpose, the invention adopts the following technical scheme:
in a first aspect, the present invention provides a multilayer circuit board, including a first metal layer, a first multilayer composite layer, a core layer, and a second metal layer, which are sequentially stacked;
the multilayer circuit board comprises a through hole/blind hole, and the through hole/blind hole penetrates through the first multilayer composite layer or the through hole/blind hole penetrates through the first multilayer composite layer and the core layer;
the through holes/blind holes are filled with conductive slurry;
the first multilayer composite layer is comprised of at least 3 composite layers;
the composite layer comprises an insulation resin layer and a circuit layer which are attached to each other.
According to the invention, through the design of the multilayer circuit board structure and the design of the multilayer circuit layers, the requirements of use conditions can be met, and through the design of the first metal layer and the second metal layer, the multilayer circuit board has lower contact resistance, further has good conductivity, and simultaneously improves the welding performance, corrosion resistance and extreme environment resistance of the multilayer circuit board.
In the first multilayer composite layer between the first metal layer and the core layer, the side of the insulating resin layer away from the circuit layer in each composite layer is close to the core layer, and the side of the circuit layer away from the insulating resin layer is close to the first metal layer.
The following is a preferred technical solution of the present invention, but not a limitation to the technical solution provided by the present invention, and the object and advantageous effects of the present invention can be better achieved and achieved by the following preferred technical solution.
In a preferred embodiment of the present invention, the wiring layer is embedded in a side of the insulating resin layer away from the core layer.
Preferably, the side of the circuit layer far away from the core layer is flush with the side of the insulating resin layer far away from the core layer.
Preferably, at least 1 composite layer is disposed between the core layer and the second metal layer.
In the composite layer between the second metal layer and the core layer, one side of the insulating resin layer, which is far away from the circuit layer, is close to the core layer, and one side of the circuit layer, which is far away from the insulating resin layer, is close to the second metal layer.
It should be noted that, if at least 1 composite layer is disposed between the core layer and the second metal layer, the through holes/blind holes in the multilayer circuit board penetrate through the composite layer between the core layer and/or the second metal layer.
Meanwhile, if 2 or more composite layers are provided between the core layer and the second metal layer, the plurality of composite layers between the core layer and the second metal layer are referred to as a second multilayer composite layer.
Preferably, the number of the composite layers in the multilayer circuit board is 5 to 50, and for example, the number of the composite layers may be 5, 10, 15, 20, 25, 30, 35, 40, 45 or 50.
In a preferred embodiment of the present invention, the core layer is selected from any one of a ceramic substrate, a BT resin substrate, a polyester substrate, and a polyimide substrate.
Preferably, the core layer has a coefficient of thermal expansion < 40ppm K -1 For example, it may be 20 ppm. K -1 、22ppm·K -1 、24ppm·K -1 、26ppm·K -1 、28ppm·K -1 、30ppm·K -1 、32ppm·K -1 、36ppm·K -1 Or 39 ppm. K -1 And the like.
Preferably, the core layer has a thickness of 10 to 1000 μm, and may be, for example, 10 μm, 50 μm, 100 μm, 200 μm, 400 μm, 600 μm, 800 μm, or 1000 μm.
Preferably, the dielectric loss of the core layer is 0.003 to 0.1, and may be, for example, 0.003, 0.005, 0.01, 0.02, 0.03, 0.04, 0.05, 0.06, 0.07, 0.08, 0.09, or 0.1.
In a preferred embodiment of the present invention, the insulating resin layer has a thermal expansion coefficient of less than 40ppm · K -1 For example, it may be 20 ppm. K -1 、22ppm·K -1 、24ppm·K -1 、26ppm·K -1 、28ppm·K -1 、30ppm·K -1 、32ppm·K -1 、36ppm·K -1 Or 39 ppm. K -1 And the like.
The thickness of the insulating resin layer is preferably 10 to 100 μm, and may be, for example, 10 μm, 20 μm, 30 μm, 40 μm, 50 μm, 60 μm, 70 μm, 80 μm, 90 μm, or 100 μm.
Preferably, the dielectric loss of the insulating resin layer is 0.003 to 0.1, and may be, for example, 0.003, 0.005, 0.01, 0.02, 0.03, 0.04, 0.05, 0.06, 0.07, 0.08, 0.09, or 0.1.
In the invention, the insulating resin layer and the core layer with specific thermal expansion coefficient ranges are selected to ensure that the insulating resin layer and the core layer have relatively close thermal expansion coefficients, so that the problems of deformation, warping and incapability of using of the multilayer circuit board caused by overlarge difference of the thermal expansion coefficients can be avoided.
In the present invention, the insulating resin layer may be selected from any one of an insulating adhesive film and an insulating dielectric adhesive film, and exemplarily, the insulating dielectric adhesive film may be prepared according to CN110591591A, the insulating adhesive film may be prepared according to CN113088039A, CN113831875A, CN114181652A or CN114231221A, and a material having similar characteristics to the insulating adhesive film and the insulating dielectric adhesive film, such as NBF adhesive film produced in china, adhesive film product of japanese gourmet powder, adhesive film product of japanese water chemistry, adhesive film product of japanese solar ink, and the like, may also be used.
As a preferable technical scheme of the invention, the circuit layer is prepared from conductive paste B.
Preferably, the conductive paste a and the conductive paste B are each independently selected from any one of a silver-containing conductive paste, a copper-containing conductive paste, or a gold-containing conductive paste, or a combination of at least two thereof.
Preferably, the thicknesses of the first metal layer and the second metal layer are respectively and independently selected from 0.5-5 μm, and can be 0.5 μm, 1 μm, 2 μm, 3 μm, 4 μm or 5 μm, for example.
In a second aspect, the present invention provides a process for producing a multilayer wiring board as described in the first aspect, the process comprising the steps of:
(1) pressing an insulating resin layer on any side of the core layer, and forming a through hole/blind hole and a groove on one side of the insulating resin layer away from the core layer through laser processing;
(2) filling conductive paste A and conductive paste B in the through hole/blind hole and the groove obtained in the step (1) respectively, and sintering at low temperature to form the through hole/blind hole filled with the conductive paste A and a composite layer;
(3) pressing another insulating glue film layer on one side, far away from the core layer, of the composite layer obtained in the step (2), forming a through hole/blind hole and a groove on one side, far away from the core layer, of the insulating resin layer through laser processing, filling the through hole/blind hole and the groove with conductive slurry A and conductive slurry B respectively, and sintering at a low temperature to form the through hole/blind hole and the composite layer filled with the conductive slurry A;
(4) repeating the step (3) to obtain a through hole/blind hole filled with the conductive paste A and a first multilayer composite layer;
(5) and respectively forming a first metal layer and a second metal layer on one side of the first multilayer composite layer far away from the core layer and one side of the core layer far away from the first multilayer composite layer to obtain the multilayer circuit board.
In the step (2), after the groove formed in the step (1) is filled with the conductive paste B, the circuit layer is formed by low-temperature sintering, and the circuit layer is embedded into the side of the insulating resin layer away from the core layer to jointly form the composite layer.
Meanwhile, the positions of the through holes/blind holes formed by laser drilling in the step (3) are the same as the positions of the through holes/blind holes formed by laser drilling in the step (1).
According to the invention, the groove pattern is constructed on the insulating resin layer through laser processing, the conductive slurry B is added for sintering to obtain the circuit layer, the dry process replaces the traditional wet process to prepare the circuit layer, and the conductive slurry B replaces copper plating, so that the use of a large amount of chemical liquid in the wet process can be avoided, and the green environmental protection is realized; in addition, the circuit layer is completely embedded in the insulating resin layer, so that the side etching phenomenon can be effectively reduced, meanwhile, the insulating resin layer is completely coated, the use of solder resist ink can be avoided, the dielectric loss is effectively reduced, and the loss in the transmission process is reduced.
As a preferred embodiment of the present invention, the temperature of the pressing in the step (1) is 100 to 150 ℃, and may be, for example, 100 ℃, 105 ℃, 110 ℃, 115 ℃, 120 ℃, 125 ℃, 130 ℃, 135 ℃, 140 ℃, 145 ℃ or 150 ℃.
Preferably, the pressure of the pressing in step (1) is 0.1 to 10MPa, and may be, for example, 0.1MPa, 0.2MPa, 0.5MPa, 1MPa, 2MPa, 3MPa, 4MPa, 5MPa, 6MPa, 7MPa, 8MPa, 9MPa, or 10 MPa.
Preferably, the step (2) further comprises a post-treatment step after the conductive paste is filled.
Preferably, the post-treatment method comprises the following steps: and removing the redundant conductive paste A and the redundant conductive paste B on the surface of the insulating resin layer by a brushing process.
Preferably, the temperature of the low-temperature sintering in the step (2) is 120 to 150 ℃, and may be, for example, 120 ℃, 125 ℃, 130 ℃, 135 ℃, 140 ℃, 145 ℃ or 150 ℃.
Preferably, the time of the low-temperature sintering in the step (2) is 30-60 min, for example, 30min, 35min, 40min, 45min, 50min, 55min or 60 min.
As a preferred embodiment of the present invention, the temperature of the pressing in the step (3) is 100 to 150 ℃, and may be, for example, 100 ℃, 105 ℃, 110 ℃, 115 ℃, 120 ℃, 125 ℃, 130 ℃, 135 ℃, 140 ℃, 145 ℃ or 150 ℃.
Preferably, the pressure of the pressing in step (3) is 0.1 to 10MPa, and may be, for example, 0.1MPa, 0.2MPa, 0.5MPa, 1MPa, 2MPa, 3MPa, 4MPa, 5MPa, 6MPa, 7MPa, 8MPa, 9MPa, or 10 MPa.
Preferably, the temperature of the low-temperature sintering in the step (3) is 120 to 150 ℃, and may be, for example, 120 ℃, 125 ℃, 130 ℃, 135 ℃, 140 ℃, 145 ℃ or 150 ℃.
Preferably, the time of the low-temperature sintering in the step (3) is 30-60 min, for example, 30min, 35min, 40min, 45min, 50min, 55min or 60 min.
As a preferred embodiment of the present invention, the preparation methods of the first metal layer and the second metal layer in step (5) are independently selected from electroplating thick gold or electroless nickel-palladium-gold.
Preferably, a pretreatment step is further included before forming the second metal layer.
Preferably, the pretreatment method comprises the following steps: through laser processing, forming through holes/blind holes on one side of the core layer, which is far away from the first multilayer composite layer, filling the through holes/blind holes with conductive slurry A, sintering at low temperature, and forming the through holes/blind holes filled with the conductive slurry A on the core layer.
It should be noted that the positions of the laser-drilled through holes/blind holes in the pretreatment, the positions of the laser-drilled through holes/blind holes in the step (1), and the positions of the laser-drilled through holes/blind holes in the step (3) are the same (the same below). Through the pretreatment step, through holes/blind holes penetrating through the first multilayer composite layer and the core layer can be formed in the multilayer circuit board provided by the invention; without the pretreatment step, the through-hole/blind-hole penetrates the first multilayer composite layer.
In the invention, if no composite layer is arranged between the core layer and the second metal layer in the multilayer circuit board, the preparation process of the multilayer circuit board comprises the following steps:
(1) pressing an insulating resin layer on any side of the core layer under the conditions of 100-150 ℃ and 0.1-10 MPa, and forming through holes/blind holes and grooves on one side, far away from the core layer, of the insulating resin layer through laser processing;
(2) filling the conductive paste A and the conductive paste B in the through holes/blind holes and the grooves obtained in the step (1), removing the redundant conductive paste A and the redundant conductive paste B on the surface of the insulating resin layer through a brushing process, and sintering at the low temperature of 120-150 ℃ for 30-60 min to form the through holes/blind holes and a composite layer filled with the conductive paste A;
(3) pressing another insulating adhesive film layer on one side, far away from the core layer, of the composite layer obtained in the step (2) under the conditions of 100-150 ℃ and 0.1-10 MPa, forming a through hole/blind hole and a groove on one side, far away from the core layer, of the insulating resin layer through laser processing, filling the through hole/blind hole and the groove with conductive slurry A and conductive slurry B respectively, removing redundant conductive slurry A and conductive slurry B on the surface of the insulating resin layer through a rubbing process, and sintering at the low temperature of 120-150 ℃ for 30-60 min to form the through hole/blind hole and the composite layer filled with the conductive slurry A;
(4) repeating the step (3) to obtain a through hole/blind hole filled with the conductive paste A and a first multilayer composite layer;
(5) forming a first metal layer on one side of the first multilayer composite layer, which is far away from the core layer, by electroplating thick gold or chemical nickel palladium gold;
and forming a second metal layer on one side of the core layer, which is far away from the first multilayer composite layer, by electroplating thick gold or chemical nickel palladium gold to obtain the multilayer circuit board.
Through the preparation process, the through holes/blind holes in the prepared multilayer circuit board penetrate through the first multilayer composite layer; if a through hole/blind via is required to penetrate the first multilayer composite layer and the core layer, replacing step (5) with step (5'):
step (5') forming a first metal layer on one side of the first multilayer composite layer away from the core layer by electroplating thick gold or electroless nickel palladium gold;
forming a through hole/blind hole on one side of the core layer, which is far away from the first multilayer composite layer, by laser processing, filling the through hole/blind hole with conductive slurry A, sintering at a low temperature, forming the through hole/blind hole filled with the conductive slurry A on the core layer, and then forming a second metal layer on one side of the core layer, which is far away from the first multilayer composite layer, by electroplating thick gold or chemical nickel-palladium gold, thereby obtaining the multilayer circuit board.
In the steps (1) and (3), laser processing is performed to form through holes/blind holes only in the insulating resin layer; and (5') laser processing to form through holes/blind holes in the core layer.
In the invention, if at least 1 composite layer is arranged between the core layer and the second metal layer in the multilayer circuit board, the preparation process of the multilayer circuit board comprises the following steps:
(S1) pressing an insulating resin layer on one side of a core layer at the temperature of 100-150 ℃ and the pressure of 0.1-10 MPa, forming a through hole/blind hole and a groove on one side, far away from the core layer, of the insulating resin layer through laser processing, respectively filling conductive paste A and conductive paste B into the through hole/blind hole and groove, removing redundant conductive paste A and conductive paste B on the surface of the insulating resin layer through a grinding and brushing process, and sintering at the low temperature of 120-150 ℃ for 30-60 min to form the through hole/blind hole and a composite layer filled with the conductive paste A;
(S2) pressing an insulating resin layer on the other side of the core layer at the same time under the conditions of 100-150 ℃ and 0.1-10 MPa, forming a through hole/blind hole and a groove on one side, far away from the core layer, of the insulating resin layer through laser processing, filling conductive slurry A and conductive slurry B into the through hole/blind hole and groove, removing redundant conductive slurry A and conductive slurry B on the surface of the insulating resin layer through a grinding and brushing process, sintering at the low temperature of 120-150 ℃ for 30-60 min, and forming a through hole/blind hole filled with the conductive slurry A and a composite layer on the other side of the core layer;
(S3) pressing an insulating glue film layer on one side, far away from the core layer, of one composite layer obtained in the step (2) under the conditions of 100-150 ℃ and 0.1-10 MPa, forming a through hole/blind hole and a groove on one side, far away from the core layer, of the insulating resin layer through laser processing, filling the through hole/blind hole and the groove with conductive slurry A and conductive slurry B, removing redundant conductive slurry A and conductive slurry B on the surface of the insulating resin layer through a rubbing process, and sintering at the low temperature of 120-150 ℃ for 30-60 min to form the through hole/blind hole and the composite layer filled with the conductive slurry A;
(S4) pressing an insulating glue film layer on one side, far away from the core layer, of the other composite layer obtained in the step (2) under the conditions of 100-150 ℃ and 0.1-10 MPa, forming a through hole/blind hole and a groove on one side, far away from the core layer, of the insulating resin layer through laser processing, filling the through hole/blind hole and the groove with conductive slurry A and conductive slurry B, removing redundant conductive slurry A and conductive slurry B on the surface of the insulating resin layer through a rubbing process, and sintering at the low temperature of 120-150 ℃ for 30-60 min to form the through hole/blind hole and the composite layer filled with the conductive slurry A;
(S5) repeating the step (S3) resulting in a via/blind via filled with conductive paste a and a first multilayer composite layer, optionally repeating the step (S4) resulting in a via/blind via filled with conductive paste a and a second multilayer composite layer;
(S6) respectively forming a first metal layer and a second metal layer on the side of the first multilayer composite layer far away from the core layer and the side of the second multilayer composite layer far away from the core layer by electroplating thick gold or chemical nickel palladium gold to obtain the multilayer circuit board.
Through the preparation process, the through holes/blind holes in the prepared multilayer circuit board penetrate through the first multilayer composite layer and the second multilayer composite layer; if a through-hole/blind-hole penetration through the first multilayer composite layer, the second multilayer composite layer and the core layer is required, the step (S2) is replaced with the following step (S2'):
(S2') pressing an insulating resin layer on the other side of the core layer at the same time under the conditions of 100-150 ℃ and 0.1-10 MPa, forming a through hole/blind hole and a groove on one side, far away from the core layer, of the insulating resin layer through laser processing, simultaneously forming the through hole/blind hole on the core layer and the insulating resin layer in the laser processing process, filling the through hole/blind hole and the groove with conductive slurry A and conductive slurry B respectively, removing the redundant conductive slurry A and conductive slurry B on the surface of the insulating resin layer through a grinding and brushing process, and sintering at the low temperature of 120-150 ℃ for 30-60 min to form the core layer filled with the conductive slurry A, the through hole/blind hole filled with the conductive slurry A and a composite layer filled with the conductive slurry B.
In a third aspect, the present invention provides a use of the multilayer wiring board according to the first aspect in a PCB.
Compared with the prior art, the invention has the following beneficial effects:
(1) according to the invention, the groove pattern is constructed on the insulating resin layer through laser processing, the conductive slurry B is added for low-temperature sintering to obtain the circuit layer, the dry process replaces the traditional wet process to prepare the circuit layer, and the conductive slurry replaces copper plating, so that the use of a large amount of chemical liquid in the wet process can be avoided, and the green environmental protection is realized.
(2) The circuit layer of the composite layer is completely embedded in the insulating resin layer, so that the side etching phenomenon can be effectively reduced, and meanwhile, the insulating resin layer is completely coated, so that the use of solder resist ink can be avoided, the dielectric loss is effectively reduced, and the loss in the signal transmission process is reduced.
(3) The first metal layer and the second metal layer formed by electroplating thick gold or chemical nickel palladium gold have lower contact resistance, the prepared multilayer circuit board has good conductivity, and the dielectric loss is lower than 0.011-0.013; meanwhile, the prepared multilayer circuit board has excellent welding performance, high corrosion resistance and high extreme environment resistance.
(4) According to the invention, through selection of materials of the core layer and the insulating resin layer, the prepared multilayer circuit board has a flat appearance and no warping phenomenon, and the thermal expansion coefficient of the multilayer circuit board is smaller and is 19-22 ppm.K -1 。
Drawings
Fig. 1 is a schematic sectional view of a multilayer wiring board provided in embodiment 1 of the present invention at a via/blind hole;
FIG. 2 is a schematic view of the preparation process in step (S1) of example 1 of the present invention;
fig. 3 is a schematic cross-sectional view of the circuit board prepared in the step (S2) of example 1 of the present invention at a via/blind via;
fig. 4 is a schematic cross-sectional view of the circuit board prepared in the step (S3) of example 1 of the present invention at a via/blind via;
fig. 5 is a schematic cross-sectional view of the circuit board prepared in the step (S4) of example 1 of the present invention at a via/blind via;
fig. 6 is a schematic cross-sectional view of the circuit board prepared in the step (S5) of example 1 of the present invention at a via/blind via;
the multilayer composite structure comprises a substrate, a first metal layer, a second metal layer, a core layer, a first multilayer composite layer, a second metal layer, a through hole/blind hole, a second multilayer composite layer, a first metal layer, a second metal layer, a circuit layer, a second metal layer, a third metal layer, a fourth metal layer, a fifth metal layer, a sixth multilayer composite, a sixth metal layer, a sixth, a sixth metal layer, a sixth metal layer, a sixth, a sixth metal layer, a sixth, a sixth.
Detailed Description
The technical scheme of the invention is further explained by the specific implementation mode in combination with the attached drawings. It should be understood by those skilled in the art that the examples are only for the understanding of the present invention and should not be construed as the specific limitations of the present invention.
Some of the component sources in the following examples and comparative examples are as follows:
ceramic substrate: rogers4350, Rogers4003, Rogers, usa;
BT resin substrate: mitsubishi gas chemical, HL832NSF LCA;
insulating adhesive film (1): prepared according to CN 113088039A;
insulating glue film (2): prepared according to CN 114231221A;
insulating adhesive film (3): prepared according to CN 114181652A;
silver-containing conductive paste: dupont, LT133, USA;
copper-containing conductive paste: prepared according to CN 106605270A;
gold-containing conductive paste: prepared according to CN 109087723A.
Example 1
The present embodiment provides a multilayer circuit board and a manufacturing process thereof, where a schematic structural diagram of the multilayer circuit board is shown in fig. 1, and the multilayer circuit board includes a first metal layer 1, a first multilayer composite layer 2, a core layer 3, a second multilayer composite layer 6, and a second metal layer 4, which are sequentially stacked;
the multilayer circuit board comprises a through hole/blind hole 5, the through hole/blind hole 5 penetrates through the first multilayer composite layer 2 and the second multilayer composite layer 6, and copper-containing conductive slurry is filled in the through hole/blind hole 5;
the first multilayer composite layer 2 consists of 3 composite layers 21, and the second multilayer composite layer 6 consists of 3 composite layers 21;
the composite layer 21 comprises an insulating resin layer 211 and a circuit layer 212, the circuit layer 212 is embedded in one side of the insulating resin layer 211, which is far away from the core layer 3, the side of the circuit layer 212, which is far away from the core layer 3, is flush with the side of the insulating resin layer 211, which is far away from the core layer 3, and the circuit layer 212 is prepared from copper-containing conductive slurry;
the core layer 3 is a ceramic substrate (Rogers4350) with a thickness of 250 μm; the insulating resin layer 211 is an insulating adhesive film (1) having a thickness of 40 μm.
The preparation process of the multilayer circuit board comprises the following steps:
(S1) pressing an insulating glue film (1) on one side of a ceramic substrate (ROGERS4350) at 100 ℃ and 10MPa, forming a through hole/blind hole 5 and a groove 7 on one side, far away from the ceramic substrate (ROGERS4350), of the insulating glue film (1) through laser processing, filling copper-containing conductive slurry into the through hole/blind hole, removing the redundant copper-containing conductive slurry on the surface of the insulating resin layer through a brushing process, and sintering at the low temperature of 150 ℃ for 30min to form the through hole/blind hole 5 filled with the copper-containing conductive slurry and a composite layer 21 (the preparation flow schematic diagram is shown in FIG. 2);
(S2) pressing an insulating glue film (1) on the other side of the ceramic substrate (ROGERS4350) at 100 ℃ and 10MPa, forming a through hole/blind hole 5 and a groove 7 on one side of the insulating glue film (1) far away from the ceramic substrate (ROGERS4350) through laser processing, filling copper-containing conductive slurry into the through hole/blind hole, removing the redundant copper-containing conductive slurry on the surface of the insulating resin layer through a brushing process, sintering at the low temperature of 150 ℃ for 30min, and forming the through hole/blind hole 5 filled with the copper-containing conductive slurry and a composite layer 21 (shown in figure 3) on the other side of the ceramic substrate (ROGERS 4350);
(S3) pressing an insulating glue film (1) on one side, away from the ceramic substrate (ROGERS4350), of the composite layer 21 obtained in the step (2) under the conditions of 100 ℃ and 10MPa, forming a through hole/blind hole 5 and a groove 7 on one side, away from the ceramic substrate (ROGERS4350), of the insulating glue film (1) through laser processing, filling copper-containing conductive slurry into the through hole/blind hole 5 and the groove 7, removing the redundant copper-containing conductive slurry on the surface of the insulating glue film (1) through a grinding and brushing process, and sintering at the low temperature of 150 ℃ for 30min to form the through hole/blind hole 5 and the composite layer 21 filled with the copper-containing conductive slurry (as shown in FIG. 4);
(S4) pressing an insulating glue film (1) on one side, away from the ceramic substrate (ROGERS4350), of the other composite layer 21 obtained in the step (2) under the conditions of 100 ℃ and 10MPa, forming a through hole/blind hole 5 and a groove 7 on one side, away from the ceramic substrate (ROGERS4350), of the insulating glue film (1) through laser processing, filling copper-containing conductive slurry into the through hole/blind hole 5 and the groove 7, removing the redundant copper-containing conductive slurry on the surface of the insulating glue film (1) through a grinding and brushing process, and sintering at the low temperature of 150 ℃ for 30min to form the through hole/blind hole 5 and the composite layer 21 (shown in figure 5) filled with the copper-containing conductive slurry;
(S5) repeating the step (S3) to obtain the through/blind via 5 and the first multilayer composite layer 2 filled with the copper-containing conductive paste, and repeating the step (S4) to obtain the through/blind via and the second multilayer composite layer 6 filled with the copper-containing conductive paste (as shown in fig. 6);
(S6) forming a first metal layer 1 having a thickness of 5 μm and a second metal layer 4 having a thickness of 5 μm on the side of the first multilayer composite layer 2 remote from the ceramic substrate (ROGERS4350) and the side of the second multilayer composite layer 6 remote from the ceramic substrate (ROGERS4350), respectively, by plating thick gold to obtain the multilayer wiring board.
Example 2
The embodiment provides a multilayer circuit board and a preparation process thereof, wherein the multilayer circuit board comprises a first metal layer, a first multilayer composite layer, a core layer, a second multilayer composite layer and a second metal layer which are sequentially overlapped;
the multilayer circuit board comprises a through hole/blind hole, the through hole/blind hole penetrates through the first multilayer composite layer and the second multilayer composite layer, and silver-containing conductive paste is filled in the through hole/blind hole;
the first multilayer composite layer consists of 25 composite layers, and the second multilayer composite layer consists of 25 composite layers;
the composite layer comprises an insulating resin layer and a circuit layer, the circuit layer is embedded in one side of the insulating resin layer, which is far away from the core layer, the side of the circuit layer, which is far away from the core layer, is flush with the side of the insulating resin layer, which is far away from the core layer, and the circuit layer is prepared from silver-containing conductive slurry;
the core layer is a BT resin substrate with the thickness of 700 mu m; the insulating resin layer is an insulating glue film (3) with the thickness of 100 mu m.
The preparation process of the multilayer circuit board comprises the following steps:
(S1) pressing an insulating glue film (3) on one side of a BT resin substrate at 150 ℃ and 0.1MPa, forming a through hole/blind hole and a groove on one side, far away from the BT resin substrate, of the insulating glue film (3) through laser processing, filling silver-containing conductive paste into the groove, removing the redundant silver-containing conductive paste on the surface of the insulating resin layer through a grinding and brushing process, and sintering at the low temperature of 150 ℃ for 30min to form the through hole/blind hole filled with the silver-containing conductive paste and a composite layer;
(S2) pressing an insulating adhesive film (3) on the other side of the BT resin substrate under the conditions of 150 ℃ and 0.1MPa, forming a through hole/blind hole and a groove on one side, far away from the BT resin substrate, of the insulating adhesive film (3) through laser processing, filling silver-containing conductive slurry into the groove, removing the redundant silver-containing conductive slurry on the surface of the insulating resin layer through a grinding and brushing process, sintering at the low temperature of 150 ℃ for 30min, and forming a through hole/blind hole and a composite layer filled with the silver-containing conductive slurry on the other side of the BT resin substrate;
(S3) pressing an insulating adhesive film (3) on one side, far away from the BT resin substrate, of one composite layer obtained in the step (2) at the condition of 150 ℃ and 0.1MPa, forming a through hole/blind hole and a groove on one side, far away from the BT resin substrate, of the insulating adhesive film (3) through laser processing, filling silver-containing conductive paste into the through hole/blind hole and the groove, removing the redundant silver-containing conductive paste on the surface of the insulating adhesive film (3) through a grinding and brushing process, and sintering at the low temperature of 120 ℃ for 60min to form the through hole/blind hole and the composite layer filled with the silver-containing conductive paste;
(S4) pressing an insulating adhesive film (3) on one side, away from the BT resin substrate, of the other composite layer obtained in the step (2) at the condition of 150 ℃ and 0.1MPa, forming a through hole/blind hole and a groove on one side, away from the BT resin substrate, of the insulating adhesive film (3) through laser processing, filling silver-containing conductive slurry into the through hole/blind hole and the groove, removing the redundant silver-containing conductive slurry on the surface of the insulating adhesive film (3) through a grinding and brushing process, and sintering at the low temperature of 120 ℃ for 60min to form the through hole/blind hole and the composite layer filled with the silver-containing conductive slurry;
(S5) repeating the step (S3) to obtain a through hole/blind via filled with a silver-containing conductive paste and a first multilayer composite layer, and repeating the step (S4) to obtain a through hole/blind via filled with a silver-containing conductive paste and a second multilayer composite layer;
(S6) forming a first metal layer having a thickness of 5 μm and a second metal layer having a thickness of 5 μm on the side of the first multilayer composite layer remote from the BT resin substrate and the side of the second multilayer composite layer remote from the BT resin substrate, respectively, by electroless nickel palladium gold, to obtain the multilayer wiring board.
Example 3
The embodiment provides a multilayer circuit board and a preparation process thereof, wherein the multilayer circuit board comprises a first metal layer, a first multilayer composite layer, a core layer, a second multilayer composite layer and a second metal layer which are sequentially stacked;
the multilayer circuit board comprises a through hole/blind hole, the through hole/blind hole penetrates through the first multilayer composite layer and the second multilayer composite layer, and the through hole/blind hole is filled with gold-containing conductive slurry;
the first multilayer composite layer consists of 5 composite layers, and the second multilayer composite layer consists of 5 composite layers;
the composite layer comprises an insulating resin layer and a circuit layer, the circuit layer is embedded in one side of the insulating resin layer, which is far away from the core layer, the side of the circuit layer, which is far away from the core layer, is flush with the side of the insulating resin layer, which is far away from the core layer, and the circuit layer is prepared from gold-containing conductive slurry;
the core layer is a ceramic substrate (Rogers4003) with the thickness of 1000 μm; the insulating resin layer is an insulating glue film (2) with the thickness of 100 mu m.
The preparation process of the multilayer circuit board comprises the following steps:
(S1) pressing an insulating adhesive film (2) on one side of a ceramic substrate (ROGERS4003) at 120 ℃ and under the condition of 1MPa, forming a through hole/blind hole and a groove on one side, far away from the ceramic substrate (ROGERS4003), of the insulating adhesive film (2) through laser processing, filling gold-containing conductive slurry into the through hole/blind hole and the groove, removing the redundant gold-containing conductive slurry on the surface of the insulating resin layer through a scrubbing process, and sintering at the low temperature of 150 ℃ for 30min to form the through hole/blind hole and a composite layer filled with the gold-containing conductive slurry;
(S2) pressing an insulating adhesive film (2) on the other side of the ceramic substrate (ROGERS4003) at the temperature of 120 ℃ and under the pressure of 1MPa, forming a through hole/blind hole and a groove on one side, far away from the ceramic substrate (ROGERS4003), of the insulating adhesive film (2) through laser processing, filling gold-containing conductive slurry into the through hole/blind hole and the groove, removing the redundant gold-containing conductive slurry on the surface of the insulating resin layer through a scrubbing process, sintering at the low temperature of 150 ℃ for 30min, and forming a through hole/blind hole and a composite layer filled with the gold-containing conductive slurry on the other side of the ceramic substrate (ROGERS 4003);
(S3) pressing an insulating adhesive film (2) on one side, far away from the ceramic substrate (ROGERS4003), of the composite layer obtained in the step (2) at the temperature of 120 ℃ and under the pressure of 1MPa, forming a through hole/blind hole and a groove on one side, far away from the ceramic substrate (ROGERS4003), of the insulating adhesive film (2) through laser processing, filling gold-containing conductive slurry into the through hole/blind hole and the groove, removing the redundant gold-containing conductive slurry on the surface of the insulating adhesive film (2) through a grinding and brushing process, and sintering at the low temperature of 130 ℃ for 40min to form the through hole/blind hole and the composite layer filled with the gold-containing conductive slurry;
(S4) pressing an insulating adhesive film (2) on one side, away from the ceramic substrate (ROGERS4003), of the other composite layer obtained in the step (2) under the conditions of 120 ℃ and 1MPa, forming a through hole/blind hole and a groove on one side, away from the ceramic substrate (ROGERS4003), of the insulating adhesive film (3) through laser processing, filling gold-containing conductive slurry into the through hole/blind hole and the groove, removing the redundant gold-containing conductive slurry on the surface of the insulating adhesive film (2) through a grinding and brushing process, and sintering at the low temperature of 130 ℃ for 40min to form the through hole/blind hole and the composite layer filled with the gold-containing conductive slurry;
(S5) repeating the step (S3) to obtain a through hole/blind hole filled with the gold-containing conductive paste and a first multilayer composite layer, and repeating the step (S4) to obtain a through hole/blind hole filled with the gold-containing conductive paste and a second multilayer composite layer;
(S6) forming a first metal layer having a thickness of 3 μm and a second metal layer having a thickness of 3 μm on the side of the first multilayer composite layer remote from the ceramic substrate (ROGERS4003) and the side of the second multilayer composite layer remote from the ceramic substrate (ROGERS4003), respectively, by electroplating thick gold to obtain the multilayer wiring board.
Example 4
The embodiment provides a multilayer circuit board and a preparation process thereof, wherein the multilayer circuit board comprises a first metal layer, a first multilayer composite layer, a core layer and a second metal layer which are sequentially stacked;
the multilayer circuit board comprises a through hole/blind hole, the through hole/blind hole penetrates through the first multilayer composite layer, and the through hole/blind hole is filled with gold-containing conductive slurry;
the first multilayer composite layer consists of 10 composite layers;
the composite layer comprises an insulating resin layer and a circuit layer, the circuit layer is embedded in one side of the insulating resin layer, which is far away from the core layer, the side of the circuit layer, which is far away from the core layer, is flush with the side of the insulating resin layer, which is far away from the core layer, and the circuit layer is prepared from gold-containing conductive slurry;
the core layer is a ceramic substrate (Rogers4003) with the thickness of 1000 μm; the insulating resin layer is an insulating glue film (2) with the thickness of 10 mu m.
The preparation process of the multilayer circuit board comprises the following steps:
(1) pressing an insulating adhesive film (2) on any side of a ceramic substrate under the conditions of 110 ℃ and 5MPa, and forming a through hole/blind hole and a groove on one side, far away from the ceramic substrate, of the insulating adhesive film (2) through laser processing;
(2) filling gold-containing conductive slurry in the through hole/blind hole and the groove obtained in the step (1), removing the redundant gold-containing conductive slurry on the surface of the insulating adhesive film (2) by a grinding and brushing process, and sintering at a low temperature of 130 ℃ for 40min to form the through hole/blind hole and a composite layer filled with the gold-containing conductive slurry;
(3) pressing another insulating adhesive film (2) on one side, far away from the ceramic substrate, of the composite layer obtained in the step (2) under the conditions of 110 ℃ and 5MPa, forming a through hole/blind hole and a groove on one side, far away from the ceramic substrate, of the insulating adhesive film (2) through laser processing, filling gold-containing conductive slurry into the through hole/blind hole and the groove, removing redundant gold-containing conductive slurry on the surface of the insulating adhesive film (2) through a grinding and brushing process, and sintering at the low temperature of 130 ℃ for 40min to form the through hole/blind hole and the composite layer filled with the gold-containing conductive slurry;
(4) repeating the step (3) to obtain a through hole/blind hole filled with the gold-containing conductive slurry and a first multilayer composite layer;
(5) forming a first metal layer with the thickness of 3 mu m on one side of the first multilayer composite layer away from the ceramic substrate by electroplating thick gold;
and forming a second metal layer with the thickness of 3 mu m on one side of the ceramic substrate, which is far away from the first multilayer composite layer, by electroplating thick gold to obtain the multilayer circuit board.
Comparative example 1
The multilayer circuit board comprises a first metal layer, a solder mask layer, a first multilayer composite layer, a core layer and a second metal layer which are sequentially stacked;
the core layer is a ceramic substrate (Rogers4350) with the thickness of 250 μm;
the first multilayer composite layer comprises 10 composite layers;
the composite layer comprises an insulating resin layer and a line layer arranged on the surface of one side of the insulating resin layer, wherein the insulating resin layer is an insulating glue film (2), and the thickness of the insulating resin layer is 40 mu m.
(1) Pressing an insulating glue film (2) on any side of a ceramic substrate (ROGERS4350) at the temperature of 110 ℃ and under the pressure of 5MPa, and forming a through hole/blind hole on one side of the insulating glue film (2) far away from the ceramic substrate (ROGERS4350) through laser processing;
(2) through a semi-additive method, sequentially performing drilling dirt removal, chemical copper plating, pattern transfer, pattern electroplating and blind hole filling, film removal and flash etching, and obtaining a circuit layer on one side of the insulating layer adhesive film (2) far away from the core layer, thereby obtaining a composite layer;
(3) pressing another insulating adhesive film (2) on one side of the composite layer obtained in the step (2) far away from the ceramic substrate (ROGERS4350) under the conditions of 110 ℃ and 5MPa, forming a through hole/blind hole on one side of the insulating adhesive film (2) far away from the ceramic substrate (ROGERS4350) through laser processing, and obtaining another composite layer through a semi-additive method;
(4) repeating the step (3) to obtain a first multilayer composite layer;
(5) forming a solder mask layer on the side of the first multilayer composite layer away from the ceramic substrate (Rogers4350) by coating solder mask ink (LE-600, Tantan corporation);
(6) forming a first metal layer with the thickness of 0.3 mu m on the side of the first multilayer composite layer far away from the ceramic substrate (Rogers4350) by electroplating thin gold;
and forming a second metal layer with the thickness of 0.3 mu m on the side of the ceramic substrate (Rogers4350) far away from the first multilayer composite layer by electroplating thin gold to obtain the multilayer circuit board.
The performance of the multilayer wiring boards provided in the above examples and comparative examples was tested by the following methods:
dielectric loss: the multilayer wiring board was cut into 2mm × 80mm test pieces (3 pieces), and the dielectric loss of each test piece was measured by a cavity resonance perturbation method at a measurement frequency of 5.8GHz and a measurement temperature of 23 ℃ using "HP 8362B" of agilent technologies ltd, and the average value of the 3 test pieces was determined.
Coefficient of thermal expansion: the multilayer wiring board was cut into a test piece having a width of about 6mm and a length of about 15mm, and subjected to thermomechanical analysis using a thermomechanical analyzer (mayer toledo, "TMA SDTA2 +") under the conditions of a preload force of 0.02N, a temperature rise range of 25 ℃ to 260 ℃, and a temperature rise rate of 10 ℃/min, to obtain a thermal expansion coefficient in the range of 25 ℃ to 150 ℃.
Appearance evaluation: the multilayer wiring board obtained was observed for completeness, cracking and warpage.
And (3) testing the weldability: the weldability test was carried out according to the standard IPC J-STD-003B.
The results of the performance tests of the multilayer wiring boards provided in the above examples and comparative examples are shown in table 1 below:
TABLE 1
As can be seen from the content in Table 1, according to the invention, through the design of the multilayer circuit board structure and the selection of materials, the groove pattern is further constructed on the insulating resin layer through laser processing, the conductive slurry is added for low-temperature sintering to obtain the circuit layer, the circuit layer is prepared through the dry process, the prepared multilayer circuit board has the advantages of low dielectric loss of 0.011-0.013, excellent welding performance of the prepared multilayer circuit board, smooth appearance of the prepared multilayer circuit board, no warping phenomenon and small thermal expansion coefficient of 19-22 ppm K -1 。
If a wet process is selected to prepare the multilayer circuit board (comparative example 1), a large amount of chemical liquid medicine is used in the process of preparing the multilayer circuit board, the multilayer circuit board is not environment-friendly, the circuit layer is attached to the surface of the insulating resin layer and is easily subjected to side etching, meanwhile, a solder mask layer needs to be formed by using ink and the like to ensure flatness, but the dielectric constant of the solder mask layer is large, so that signal transmission is slowed, and the performance of the prepared multilayer circuit board is poor.
The applicant states that the present invention is illustrated by the above embodiments to show the detailed structural features and the detailed process flow of the present invention, but the present invention is not limited to the above detailed structural features and the detailed process flow, that is, the present invention is not meant to be implemented by relying on the above detailed structural features and the detailed process flow. It should be understood by those skilled in the art that any modification of the present invention, equivalent substitutions of the raw materials of the product of the present invention, addition of auxiliary components, selection of specific modes, etc., are within the scope and disclosure of the present invention.
Claims (10)
1. A multilayer circuit board is characterized by comprising a first metal layer, a first multilayer composite layer, a core layer and a second metal layer which are sequentially stacked;
the multilayer circuit board comprises a through hole/blind hole, and the through hole/blind hole penetrates through the first multilayer composite layer or the through hole/blind hole penetrates through the first multilayer composite layer and the core layer;
the through holes/blind holes are filled with conductive slurry A;
the first multilayer composite layer is comprised of at least 3 composite layers;
the composite layer comprises an insulation resin layer and a circuit layer which are attached to each other.
2. The multilayer wiring board of claim 1, wherein the wiring layer is embedded in a side of the insulating resin layer remote from the core layer;
preferably, one side of the circuit layer far away from the core layer is flush with one side of the insulating resin layer far away from the core layer;
preferably, at least 1 composite layer is arranged between the core layer and the second metal layer;
preferably, the number of the composite layers in the multilayer circuit board is 5-50.
3. The multilayer wiring board according to claim 1 or 2, wherein the core layer is selected from any one of a ceramic substrate, a BT resin substrate, a polyester substrate, or a polyimide substrate;
preferably, the core layer has a coefficient of thermal expansion < 40ppm K -1 ；
Preferably, the thickness of the core layer is 10-1000 μm;
preferably, the dielectric loss of the core layer is 0.003-0.1.
4. The multilayer wiring board according to any one of claims 1 to 3, wherein the coefficient of thermal expansion of the insulating resin layer is < 40 ppm-K -1 ；
Preferably, the thickness of the insulating resin layer is 10 to 100 μm;
preferably, the dielectric loss of the insulating resin layer is 0.003 to 0.1.
5. The multilayer wiring board of any of claims 1-4, wherein the wiring layer is prepared from conductive paste B;
preferably, the conductive paste a and the conductive paste B are each independently selected from any one of or a combination of at least two of a silver-containing conductive paste, or a gold-containing conductive paste;
preferably, the thicknesses of the first metal layer and the second metal layer are respectively and independently selected from 0.5-5 μm.
6. A process for the production of a multilayer wiring board according to any one of claims 1 to 5, comprising the steps of:
(1) pressing an insulating resin layer on any side of the core layer, and forming a through hole/blind hole and a groove on one side of the insulating resin layer away from the core layer through laser processing;
(2) filling conductive paste A and conductive paste B in the through hole/blind hole and the groove obtained in the step (1) respectively, and sintering at low temperature to form the through hole/blind hole filled with the conductive paste A and a composite layer;
(3) pressing another insulating glue film layer on one side, far away from the core layer, of the composite layer obtained in the step (2), forming a through hole/blind hole and a groove on one side, far away from the core layer, of the insulating resin layer through laser processing, filling the through hole/blind hole and the groove with conductive slurry A and conductive slurry B respectively, and sintering at a low temperature to form the through hole/blind hole and the composite layer filled with the conductive slurry A;
(4) repeating the step (3) to obtain a through hole/blind hole filled with the conductive paste A and a first multilayer composite layer;
(5) forming a first metal layer on one side of the first multilayer composite layer away from the core layer;
and forming a second metal layer on one side of the core layer, which is far away from the first multilayer composite layer, so as to obtain the multilayer circuit board.
7. The preparation process according to claim 6, wherein the temperature of the pressing in the step (1) is 100-150 ℃;
preferably, the pressure of the pressing in the step (1) is 0.1-10 MPa;
preferably, the step (2) further comprises a post-treatment step after the conductive paste is filled;
preferably, the post-treatment method comprises the following steps: removing the redundant conductive paste A and the redundant conductive paste B on the surface of the insulating resin layer by a grinding and brushing process;
preferably, the temperature of the low-temperature sintering in the step (2) is 120-150 ℃;
preferably, the low-temperature sintering time in the step (2) is 30-60 min.
8. The preparation process according to claim 6 or 7, wherein the temperature of the pressing in the step (3) is 100-150 ℃;
preferably, the pressure of the pressing in the step (3) is 0.1-10 MPa;
preferably, the temperature of the low-temperature sintering in the step (3) is 120-150 ℃;
preferably, the low-temperature sintering time in the step (3) is 30-60 min.
9. The process according to any one of claims 6 to 8, wherein the first metal layer and the second metal layer in step (5) are each independently selected from the group consisting of gold-plated thick gold or electroless nickel-palladium-gold;
preferably, a pretreatment step is further included before forming the second metal layer;
preferably, the pretreatment method comprises the following steps: through laser processing, forming through holes/blind holes on one side of the core layer, which is far away from the first multilayer composite layer, filling the through holes/blind holes with conductive slurry A, sintering at low temperature, and forming the through holes/blind holes filled with the conductive slurry A on the core layer.
10. Use of a multilayer circuit board according to any one of claims 1 to 5 in a PCB.
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| US20110240346A1 (en) * | 2010-03-31 | 2011-10-06 | Samsung Electro-Mechanics Co., Ltd. | Heat-radiating substrate and manufacturing method thereof |
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| JP2002151844A (en) * | 2000-11-09 | 2002-05-24 | Nippon Pillar Packing Co Ltd | Multilayer circuit substrate and method of manufacturing the same |
| US20110240346A1 (en) * | 2010-03-31 | 2011-10-06 | Samsung Electro-Mechanics Co., Ltd. | Heat-radiating substrate and manufacturing method thereof |
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