CN114815423B - Display panel manufacturing method - Google Patents
Display panel manufacturing method Download PDFInfo
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- CN114815423B CN114815423B CN202210475496.2A CN202210475496A CN114815423B CN 114815423 B CN114815423 B CN 114815423B CN 202210475496 A CN202210475496 A CN 202210475496A CN 114815423 B CN114815423 B CN 114815423B
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 31
- 239000004973 liquid crystal related substance Substances 0.000 claims abstract description 74
- 230000005684 electric field Effects 0.000 claims abstract description 28
- 239000000758 substrate Substances 0.000 claims description 57
- 238000000034 method Methods 0.000 claims description 20
- 230000001678 irradiating effect Effects 0.000 claims description 6
- 230000000007 visual effect Effects 0.000 abstract description 10
- 238000010586 diagram Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 229920000642 polymer Polymers 0.000 description 2
- 230000032683 aging Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1337—Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/137—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells characterised by the electro-optical or magneto-optical effect, e.g. field-induced phase transition, orientation effect, guest-host interaction or dynamic scattering
- G02F1/13775—Polymer-stabilized liquid crystal layers
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- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Mathematical Physics (AREA)
- Liquid Crystal (AREA)
- Spectroscopy & Molecular Physics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
Abstract
The application provides a manufacturing method of a display panel; the manufacturing method of the display panel comprises the steps of manufacturing a voltage division wiring electrically connected with the sub-pixel electrode, and applying preset voltage to the voltage division wiring when the liquid crystal in the display panel is subjected to alignment treatment, so that the electric field driving force of the sub-pixel electrode to the liquid crystal is different from that of the main pixel electrode to the liquid crystal, a design that the pretilt angle of the liquid crystal in the sub-pixel is different from that of the liquid crystal in the main pixel is formed, the liquid crystal in the whole display panel is arranged in a diversified mode, and the visual angle of the display panel is improved.
Description
Technical Field
The application relates to the technical field of display, in particular to a manufacturing method of a display panel.
Background
PSVA (Polymer Stabilized Vertically Aligned) liquid crystal display with stable vertical arrangement of polymer has low product cost, high production yield and good aging performance, and is widely applied to display products such as televisions. However, with the continuous development of display technology and the improvement of consumer demand for quality, the problem of poor viewing angle of PSVA products is increasingly highlighted in higher-order product applications. At present, the liquid crystal display industry generally adopts 8-domain design to enable the liquid crystal tilting angles of main pixels and sub-pixels to be different when a liquid crystal screen is driven so as to improve the problem of visual angles; however, the improvement effect of this method is very limited.
Therefore, the liquid crystal display has the technical problem of poor viewing angle.
Disclosure of Invention
The application provides a manufacturing method of a display panel, which is used for relieving the technical problem of poor visual angle of the existing liquid crystal display.
The application provides a manufacturing method of a display panel, which comprises the following steps:
manufacturing an array substrate, wherein the array substrate comprises a plurality of sub-pixels, at least one sub-pixel comprises a main pixel and a sub-pixel adjacent to the main pixel, the array substrate further comprises a main pixel electrode arranged corresponding to the main pixel, a sub-pixel electrode arranged corresponding to the sub-pixel, and a voltage division wire, and the voltage division wire is electrically connected with the sub-pixel electrode;
manufacturing an opposite substrate on one side of the array substrate, wherein a gap is reserved between the array substrate and the opposite substrate;
filling liquid crystal between the array substrate and the opposite substrate;
and applying a preset voltage to the sub-pixel electrode through the voltage dividing wire, and irradiating the liquid crystal through ultraviolet light to form a pretilt angle.
In the method for manufacturing a display panel of the present application, the applying a preset voltage to the sub-pixel electrode through the voltage dividing line and irradiating the liquid crystal with ultraviolet light to form a pretilt angle includes:
applying a preset voltage to the sub-pixel electrode through the voltage dividing line so that the electric field intensity of the sub-pixel electrode area is different from that of the main pixel electrode area;
and irradiating the liquid crystal by ultraviolet light, wherein a first pretilt angle is formed by the liquid crystal corresponding to the main pixel, a second pretilt angle is formed by the liquid crystal corresponding to the secondary pixel, and the first pretilt angle is different from the second pretilt angle.
In the method for manufacturing a display panel of the present application, the applying a preset voltage to the sub-pixel electrode through the voltage dividing line so that the electric field intensity of the sub-pixel electrode area is different from the electric field intensity of the main pixel electrode area includes:
applying an initial voltage to the main pixel electrode and the sub pixel electrode;
and applying a preset voltage to the secondary pixel electrode through the voltage division wiring so that the voltage on the secondary pixel electrode is different from the voltage on the main pixel electrode.
In the method for manufacturing a display panel of the present application, the counter substrate includes a common electrode; the applying a preset voltage to the sub-pixel electrode through the voltage dividing line so that the electric field intensity of the sub-pixel electrode area is different from the electric field intensity of the main pixel electrode area, further includes:
and applying a common voltage to the common electrode, wherein an electric field of the sub-pixel electrode area is formed between the sub-pixel electrode and the common electrode, and an electric field of the main pixel electrode area is formed between the main pixel electrode and the common electrode.
In the method for manufacturing a display panel of the present application, the array substrate further includes a first transistor disposed between the main pixel and the sub-pixel; the applying an initial voltage to the main pixel electrode and the sub pixel electrode includes:
an initial voltage is applied to the main pixel electrode and the sub-pixel electrode through the first transistor.
In the method for manufacturing a display panel of the present application, the array substrate further includes a plurality of data lines extending along the first direction and arranged along the second direction, and a plurality of scan lines extending along the second direction and arranged along the first direction;
at least one scanning line is electrically connected with the grid electrode of the first transistor, the voltage division wiring is electrically connected with the source electrode of the first transistor, and the sub-pixel electrode is electrically connected with the drain electrode of the first transistor.
In the method for manufacturing a display panel of the present application, the array substrate further includes a second transistor disposed between the main pixel and the sub-pixel; the applying a preset voltage to the sub-pixel electrode through the voltage dividing line includes:
a preset voltage is supplied to the voltage dividing line, the preset voltage being applied to the sub-pixel electrode through the second transistor.
In the method for manufacturing a display panel of the present application, at least one of the scan lines is electrically connected to the gate of the second transistor, at least one of the data lines is electrically connected to the source of the second transistor, and the main pixel electrode and the sub pixel electrode are both electrically connected to the drain of the second transistor.
In the manufacturing method of the display panel, the voltage dividing wiring is positioned between two adjacent data lines;
at least one scanning line is arranged between the main pixel and the secondary pixel.
In the method for manufacturing a display panel of the present application, the sub-pixel electrode includes a first main electrode extending along a first direction, a second main electrode extending along a second direction, and a branch electrode connected to the first main electrode or the second main electrode;
at least part of the voltage division wiring is overlapped with the first main electrode.
The application has the beneficial effects that: the application provides a manufacturing method of a display panel, which is characterized in that a voltage division wiring electrically connected with a sub-pixel electrode is arranged, when alignment treatment is carried out on liquid crystal, a preset voltage is applied to the voltage division wiring, so that the electric field driving force of the sub-pixel electrode to the liquid crystal is different from the electric field driving force of a main pixel electrode to the liquid crystal, a design that the pretilt angle of the liquid crystal in the sub-pixel is different from the pretilt angle of the liquid crystal in the main pixel is formed, the liquid crystal in the whole display panel is diversified, and the visual angle of the display panel is improved.
Drawings
The technical solution and other advantageous effects of the present application will be made apparent by the following detailed description of the specific embodiments of the present application with reference to the accompanying drawings.
Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present application.
Fig. 2 is a schematic diagram of a partial structure of an array substrate in a display panel according to an embodiment of the application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. It will be apparent that the described embodiments are only some, but not all, embodiments of the application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to fall within the scope of the application.
An embodiment of the present application provides a display panel, please refer to fig. 1 and fig. 2, fig. 1 is a schematic structural diagram of the display panel provided by the embodiment of the present application, and fig. 2 is a schematic partial structural diagram of an array substrate in the display panel provided by the embodiment of the present application. The display panel includes an array substrate 10, a counter substrate 20 disposed opposite to the array substrate 10, and a liquid crystal layer 30 disposed between the array substrate 10 and the counter substrate 20, wherein a liquid crystal 301 is disposed in the liquid crystal layer 30. Wherein, a plurality of driving wires, driving circuits, thin film transistors, pixel electrodes and the like are arranged in the array substrate 10; the counter substrate 20 may be provided therein with a color filter layer including a plurality of color filter blocks, a common electrode, and the like.
Specifically, the display panel includes a plurality of sub-pixels, at least one of which includes a main pixel 111 and a sub-pixel 110 disposed adjacent to the main pixel 111; the main pixel 111 includes a main pixel electrode 113, the sub-pixel 110 includes a sub-pixel electrode 112, and the main pixel electrode 113 and the sub-pixel electrode 112 have four pixel domains, respectively, so that each sub-pixel includes eight pixel domains. It will be appreciated that each of the pixel domains represents a pixel region within a sub-pixel of the display panel, and that the pretilt angle of the liquid crystal within the pixel region differs from the pretilt angle of the liquid crystal within an adjacent pixel domain to ensure a larger viewing angle of the display panel.
The array substrate 10 further includes a voltage dividing line 120, and the voltage dividing line 120 is electrically connected to the sub-pixel electrode 112. When the liquid crystal 301 is aligned, the voltage dividing trace 120 provides a preset voltage to the sub-pixel electrode 112. Optionally, the preset voltage is a voltage greater than 0V, and when the alignment process is performed on the liquid crystal 301, the preset voltage changes the electric field intensity of the area corresponding to the sub-pixel electrode 112, so that the electric field intensity of the area corresponding to the sub-pixel electrode 112 is different from the electric field intensity of the area corresponding to the main pixel electrode 113, and thus the pretilt angle formed after the alignment of the liquid crystal 301 is adjusted, so as to form a design that the pretilt angle of the liquid crystal 301 in the sub-pixel 110 is different from the pretilt angle of the liquid crystal 301 in the main pixel 111, so that the liquid crystal in the whole display panel presents diversified arrangement, and the visual angle of the display panel is improved.
Further, at least part of the voltage dividing trace 120 overlaps with a middle bisector of the sub-pixel electrode 112. The middle bisector of the sub-pixel electrode 112 may be understood as a line bisecting the sub-pixel electrode 112 in half, which may be a transverse middle bisector of the sub-pixel electrode 112 or a longitudinal middle bisector of the sub-pixel electrode 112.
Further, the sub-pixel electrode 112 includes a first main electrode 114 extending in the first direction Y, a second main electrode 115 extending in the second direction Y, and a first branch electrode 116 connected to the first main electrode 114 or the second main electrode 115; at least part of the voltage dividing trace 120 overlaps the first main electrode 114. Optionally, the first direction Y is perpendicular to the second direction X, and the first trunk electrode 114 and the second trunk electrode 115 divide the sub-pixel electrode 112 into four pixel domains, and the first branch electrode 116 is distributed in the four pixel domains of the sub-pixel electrode 112.
Further, the array substrate 10 further includes a plurality of data lines 130 extending in the first direction Y and arranged in the second direction X, and a plurality of scan lines 140 extending in the second direction X and arranged in the first direction Y; the voltage dividing wire 120 is disposed between two adjacent data wires 130; and at least one of the sub-pixel electrodes 112 and at least one of the main pixel electrodes 113 are further disposed between two adjacent data lines 130.
Further, the main pixel electrode 113 includes a third main electrode 117 extending in the first direction Y, a fourth main electrode 118 extending in the second direction Y, and a second branch electrode 119 connected to the third main electrode 117 or the fourth main electrode 118. The third trunk electrode 117 and the fourth trunk electrode 118 divide the main pixel electrode 113 into four pixel domains, and the second branch electrode 119 is distributed in the four pixel domains of the main pixel electrode 113. The first trunk electrode 114, the second trunk electrode 115, the third trunk electrode 117 and the fourth trunk electrode 118 divide the sub-pixels into eight pixel domains, and the pretilt angles of the liquid crystals in the adjacent pixel domains are different, so as to ensure that the display panel has a larger visual angle.
Further, at least part of the voltage dividing trace 120 is located in the main pixel 111, and in the main pixel 111, the voltage dividing trace 120 overlaps the third main electrode 117. However, there is no electrical connection between the voltage dividing trace 120 and the main pixel electrode 113.
Further, the array substrate 10 further includes a first transistor T1 and a second transistor T2 disposed between the main pixel 111 and the sub-pixel 110, and the first transistor T1 and the second transistor T2 are located between two adjacent data lines 130, and at least one scan line 140 is disposed between the main pixel 111 and the sub-pixel 110. The display panel further includes a light shielding layer disposed corresponding to a region between the main pixel electrode 113 and the sub pixel electrode 112 and shielding the first transistor T1 and the second transistor T2.
At least one scan line 140 is electrically connected to the gate of the first transistor T1, the voltage dividing trace 120 is electrically connected to the source of the first transistor T1, and the sub-pixel electrode 112 is electrically connected to the drain of the first transistor T1. Under the signal provided by the scan line 140, the first transistor T1 is adjusted to be turned on or off, so as to adjust the electrical connection relationship between the voltage dividing trace 120 and the sub-pixel electrode 112. It will be appreciated that, during the liquid crystal alignment process and when the display panel performs a display function, the voltage dividing trace 120 is electrically connected to the sub-pixel electrode 112, and the voltage of the sub-pixel electrode 112 is pulled down, so that the sub-pixel electrode 112 and the main pixel electrode 113 have different voltages, thereby forming a design that the pretilt angle of the liquid crystal 301 in the sub-pixel 110 is different from the pretilt angle of the liquid crystal 301 in the main pixel 111 during the liquid crystal alignment process, and improving the visual angle of the display panel when performing the display function.
At least one of the scan lines 140 is electrically connected to the gate of the second transistor T2, at least one of the data lines 130 is electrically connected to the source of the second transistor T2, and at least one of the main pixel electrode 113 and the sub pixel electrode 112 is electrically connected to the drain of the second transistor T2. Under the action of the signal provided by the scan line 140, the second transistor T2 is adjusted to be turned on or off, so as to adjust the electrical connection relationship between the data line 130 and the main pixel electrode 113 and/or the sub-pixel electrode 112, so that the main pixel electrode 113 and the sub-pixel electrode 112 are respectively charged.
In summary, the display panel provided in the present embodiment includes a plurality of sub-pixels, where the sub-pixels include a main pixel 111 and a sub-pixel 110; the display panel includes an array substrate 10, a counter substrate 20, and a liquid crystal layer 30, where the array substrate 10 includes a voltage dividing trace 120 and a sub-pixel electrode 112 that are disposed corresponding to the sub-pixel 110, the voltage dividing trace 120 is electrically connected to the sub-pixel electrode 112, and when the liquid crystal is aligned, the voltage dividing trace 120 provides a preset voltage to the sub-pixel electrode 112. The voltage dividing trace 120 has a preset voltage when the liquid crystal is aligned. According to the liquid crystal display device, the voltage division wiring 120 is arranged in the sub-pixel 110, and the preset voltage is provided for the sub-pixel electrode 112 through the voltage division wiring 120 when the liquid crystal is subjected to alignment treatment, so that the electric field driving force of the sub-pixel electrode 112 to the liquid crystal is different from the electric field driving force of the main pixel electrode 113 to the liquid crystal, and the design that the pretilt angle of the liquid crystal in the sub-pixel 110 is different from the pretilt angle of the liquid crystal in the main pixel 111 is formed, so that the liquid crystal in the whole display panel is in diversified arrangement, and the visual angle of the display panel is improved.
Another embodiment of the present application also provides a method for manufacturing a display panel, which can be used for manufacturing the display panel described in the foregoing embodiment, so that the features of the display panel described in the foregoing embodiment are also applicable to the display panel manufactured by the method of the present embodiment. Specifically, referring to fig. 1 and 2, the method for manufacturing the display panel includes the following steps:
in step S101, an array substrate 10 is fabricated, where the array substrate 10 includes a plurality of sub-pixels, at least one of the sub-pixels includes a main pixel 111 and a sub-pixel 110 adjacent to the main pixel 111, the array substrate 10 further includes a main pixel electrode 113 disposed corresponding to the main pixel 111, a sub-pixel electrode 112 disposed corresponding to the sub-pixel 110, and a voltage dividing line 120, and the voltage dividing line 120 is electrically connected to the sub-pixel electrode 112.
Specifically, the main pixel electrode 113 and the sub-pixel electrode 112 have four pixel domains, respectively, so that each of the sub-pixels includes eight pixel domains.
The sub-pixel electrode 112 includes a first main electrode 114 extending in a first direction Y, a second main electrode 115 extending in a second direction Y, and a first branch electrode 116 connected to the first main electrode 114 or the second main electrode 115; at least part of the voltage dividing trace 120 overlaps the first main electrode 114. Optionally, the first direction Y is perpendicular to the second direction X, and the first trunk electrode 114 and the second trunk electrode 115 divide the sub-pixel electrode 112 into four pixel domains, and the first branch electrode 116 is distributed in the four pixel domains of the sub-pixel electrode 112.
The array substrate 10 further includes a plurality of data lines 130 extending in the first direction Y and arranged in the second direction X, and a plurality of scan lines 140 extending in the second direction X and arranged in the first direction Y; the voltage dividing wire 120 is disposed between two adjacent data wires 130; and at least one of the sub-pixel electrodes 112 and at least one of the main pixel electrodes 113 are further disposed between two adjacent data lines 130.
The main pixel electrode 113 includes a third main electrode 117 extending in the first direction Y, a fourth main electrode 118 extending in the second direction Y, and a second branch electrode 119 connected to the third main electrode 117 or the fourth main electrode 118. The third trunk electrode 117 and the fourth trunk electrode 118 divide the main pixel electrode 113 into four pixel domains, and the second branch electrode 119 is distributed in the four pixel domains of the main pixel electrode 113. The first, second, third and fourth main electrodes 114, 115, 117 and 118 divide the sub-pixel into eight pixel domains.
At least part of the voltage dividing trace 120 is located in the main pixel 111, and in the main pixel 111, the voltage dividing trace 120 overlaps the third main electrode 117. However, there is no electrical connection between the voltage dividing trace 120 and the main pixel electrode 113.
The array substrate 10 further includes a first transistor T1 and a second transistor T2 disposed between the main pixel 111 and the sub-pixel 110, wherein the first transistor T1 and the second transistor T2 are located between two adjacent data lines 130, and at least one scan line 140 is disposed between the main pixel 111 and the sub-pixel 110.
At least one scan line 140 is electrically connected to the gate of the first transistor T1, the voltage dividing trace 120 is electrically connected to the source of the first transistor T1, and the sub-pixel electrode 112 is electrically connected to the drain of the first transistor T1. At least one of the scan lines 140 is electrically connected to the gate of the second transistor T2, at least one of the data lines 130 is electrically connected to the source of the second transistor T2, and at least one of the main pixel electrode 113 and the sub pixel electrode 112 is electrically connected to the drain of the second transistor T2.
In step S102, a counter substrate 20 is fabricated on one side of the array substrate 10, and a gap is left between the array substrate 10 and the counter substrate 20.
Optionally, a color film layer including a plurality of color filter blocks, a common electrode, and the like are disposed in the opposite substrate 20, and the common electrode and the main pixel electrode 113 and the sub-pixel electrode 112 in the array substrate 10 are used together to generate a specific electric field to drive the liquid crystal to deflect.
In step S103, the liquid crystal 301 is filled between the array substrate 10 and the counter substrate 20, and the liquid crystal layer 30 is formed. Alternatively, an alignment layer is provided on the surface of the array substrate 10 and the opposite substrate 20 facing each other, and the liquid crystal 301 is injected between the array substrate 10 and the opposite substrate 20, and the liquid crystal 301 is aligned in a specific orientation by the alignment layer.
In step S104, a preset voltage is applied to the sub-pixel electrode 112 through the voltage dividing line 120, and the liquid crystal 301 is irradiated with ultraviolet light to form a pretilt angle.
Specifically, the step S104 includes: applying an initial voltage to the main pixel electrode 113 and the sub pixel electrode 112 through the first transistor T1, and applying a common voltage to the common electrode, wherein an electric field of a sub pixel electrode region is formed between the sub pixel electrode 112 and the common electrode, and an electric field of a main pixel electrode region is formed between the main pixel electrode 113 and the common electrode; simultaneously supplying the preset voltage to the voltage dividing wiring 120, the preset voltage being applied to the sub-pixel electrode 112 through the second transistor T2 so that the electric field intensity of the sub-pixel electrode area is different from that of the main pixel electrode area, thereby making the deflection angle of the liquid crystal 301 corresponding to the sub-pixel 110 different from that of the liquid crystal 301 corresponding to the main pixel 111; the liquid crystal 301 is cured and shaped by ultraviolet light, the liquid crystal 301 corresponding to the main pixel 111 forms a first pretilt angle, the liquid crystal 301 corresponding to the sub-pixel 110 forms a second pretilt angle, and the first pretilt angle is different from the second pretilt angle, so that the liquid crystal 301 corresponding to the same sub-pixel presents diversified arrangement modes, and the finally manufactured display panel has better visual angle effect.
In the method for manufacturing a display panel provided in this embodiment, by setting the voltage division trace 120 electrically connected to the sub-pixel electrode 112, when the alignment process is performed on the liquid crystal 301, a preset voltage is applied to the voltage division trace 120, so that the electric field driving force of the sub-pixel electrode 112 to the liquid crystal 301 is different from the electric field driving force of the main pixel electrode 113 to the liquid crystal 301, and a design in which the pretilt angle of the liquid crystal in the sub-pixel 110 is different from the pretilt angle of the liquid crystal in the main pixel 111 is formed, so that the liquid crystal in the whole display panel is diversified and arranged, and the visual angle of the display panel is improved.
It should be noted that, although the present application has been described in terms of the above embodiments, the above embodiments are not intended to limit the application, and those skilled in the art can make various changes and modifications without departing from the spirit and scope of the application, so that the scope of the application is defined by the appended claims.
Claims (6)
1. A method for manufacturing a display panel, comprising:
manufacturing an array substrate, wherein the array substrate comprises a plurality of sub-pixels, at least one sub-pixel comprises a main pixel and a sub-pixel adjacent to the main pixel, the array substrate further comprises a main pixel electrode arranged corresponding to the main pixel, a sub-pixel electrode arranged corresponding to the sub-pixel, and a voltage division wire, and the voltage division wire is electrically connected with the sub-pixel electrode;
manufacturing an opposite substrate on one side of the array substrate, wherein a gap is reserved between the array substrate and the opposite substrate;
filling liquid crystal between the array substrate and the opposite substrate;
applying a preset voltage to the sub-pixel electrode through the voltage dividing line, and irradiating the liquid crystal through ultraviolet light to form a pretilt angle;
the array substrate further comprises a first transistor and a second transistor which are arranged between the main pixel and the secondary pixel;
applying a preset voltage to the sub-pixel electrode through the voltage dividing line, comprising:
providing a preset voltage to the voltage dividing line, the preset voltage being applied to the sub-pixel electrode through the first transistor;
applying an initial voltage to the main pixel electrode and the sub-pixel electrode, comprising:
applying an initial voltage to the main pixel electrode and the sub pixel electrode through the second transistor;
the array substrate further comprises a plurality of data lines extending along a first direction and arranged along a second direction, and a plurality of scanning lines extending along the second direction and arranged along the first direction;
at least one scanning line is electrically connected with the grid electrode of the first transistor, the voltage dividing wire is electrically connected with the source electrode of the first transistor, and the sub-pixel electrode is electrically connected with the drain electrode of the first transistor;
at least one scanning line is electrically connected with the grid electrode of the second transistor, at least one data line is electrically connected with the source electrode of the second transistor, and the main pixel electrode and the secondary pixel electrode are both electrically connected with the drain electrode of the second transistor.
2. The method of manufacturing a display panel according to claim 1, wherein applying a preset voltage to the sub-pixel electrode through the voltage dividing line and irradiating the liquid crystal with ultraviolet light to form a pretilt angle, comprises:
applying a preset voltage to the sub-pixel electrode through the voltage dividing line so that the electric field intensity of the sub-pixel electrode area is different from that of the main pixel electrode area;
and irradiating the liquid crystal by ultraviolet light, wherein a first pretilt angle is formed by the liquid crystal corresponding to the main pixel, a second pretilt angle is formed by the liquid crystal corresponding to the secondary pixel, and the first pretilt angle is different from the second pretilt angle.
3. The method of manufacturing a display panel according to claim 2, wherein applying a preset voltage to the sub-pixel electrode through the voltage dividing line such that an electric field intensity of the sub-pixel electrode region is different from an electric field intensity of the main pixel electrode region, comprises:
applying an initial voltage to the main pixel electrode and the sub pixel electrode;
and applying a preset voltage to the secondary pixel electrode through the voltage division wiring so that the voltage on the secondary pixel electrode is different from the voltage on the main pixel electrode.
4. The method of manufacturing a display panel according to claim 3, wherein the counter substrate includes a common electrode; applying a preset voltage to the sub-pixel electrode through the voltage dividing line such that an electric field intensity of the sub-pixel electrode region is different from an electric field intensity of the main pixel electrode region, further comprising:
and applying a common voltage to the common electrode, wherein an electric field of the sub-pixel electrode area is formed between the sub-pixel electrode and the common electrode, and an electric field of the main pixel electrode area is formed between the main pixel electrode and the common electrode.
5. The method of claim 1, wherein the voltage dividing trace is located between two adjacent data lines;
at least one scanning line is arranged between the main pixel and the secondary pixel.
6. The method of claim 1, wherein the sub-pixel electrode includes a first main electrode extending in a first direction, a second main electrode extending in a second direction, and a branch electrode connecting the first main electrode or the second main electrode;
at least part of the voltage division wiring is overlapped with the first main electrode.
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