CN114792637A

CN114792637A - Preparation method of solder for eutectic bonding of bump structure

Info

Publication number: CN114792637A
Application number: CN202210284363.7A
Authority: CN
Inventors: 王玮; 杜建宇; 陈浪; 杨宇驰
Original assignee: Peking University
Current assignee: North Ic Technology Innovation Center Beijing Co ltd; Peking University
Priority date: 2022-03-22
Filing date: 2022-03-22
Publication date: 2022-07-26

Abstract

The invention relates to a method for preparing a solder for eutectic bonding of a convex structure, which can selectively form the solder on the bonding surface of the convex structure by electroplating, and the side wall of the convex structure is wrapped with a non-conductive parylene layer, so that the metal solder can be prevented from being formed on the side wall of the convex structure during electroplating.

Description

Preparation method of solder for eutectic bonding of convex structure

Technical Field

The invention relates to the field of microelectronic process processing, in particular to a preparation method of a solder for eutectic bonding of a convex structure.

Background

In the field of electronic devices, it is often necessary to bond a wafer having a bump structure to another substrate. At present, the bonding process mainly comprises: silicon-silicon bonding, anodic bonding, and eutectic bonding. However, the temperature required by the silicon-silicon bonding process is high, so that the surface of the bonded wafer generates large thermal stress, and the bonding quality is influenced. The anodic bonding process has high requirements on the quality of the bonding surface, requires high pressure and is easy to generate stress problems. The eutectic bonding process is a common bonding method because of the low temperature requirement.

However, when the adhesion layer and the seed layer of the eutectic bonding solder are prepared on the top of the protruding structure of the wafer, metal is sputtered on the sidewall of the protruding structure, so that when the metal solder is formed by electroplating, the metal solder also grows on the sidewall, thereby reducing the distance between adjacent protruding structures and even causing the sidewall connection of adjacent protruding structures.

Therefore, it is required to develop a method for preparing a solder for eutectic bonding of a bump structure, which can avoid the formation of a metal solder on the sidewall of the bump structure.

Disclosure of Invention

The invention aims to provide a preparation method of a solder for eutectic bonding of a convex structure, which can selectively form the solder on the bonding surface of the convex structure through electroplating, and the side wall of the convex structure is coated with a non-conductive parylene layer, so that the formation of metal solder on the side wall of the convex structure can be avoided during electroplating.

In order to achieve the above object, the present invention provides the following technical solutions.

A method of making a solder for eutectic bonding, comprising:

providing a substrate, wherein the substrate is provided with a raised structure, and the top surface of the raised structure is a bonding surface;

forming an adhesive layer to cover the protruding structure;

forming a seed layer and a parylene layer on the adhesive layer in sequence;

removing the parylene layer portion on the bonding surface, thereby exposing a portion of the seed layer to form a window; and

and forming solder at the window by electroplating.

Compared with the prior art, the invention has the following beneficial effects:

1. the invention provides a method for preparing a solder for eutectic bonding of a convex structure, which can selectively form the solder on the bonding surface of the convex structure by electroplating, and the side wall of the convex structure is wrapped with a non-conductive parylene layer, so that the formation of metal solder on the side wall of the convex structure can be avoided during electroplating.

2. The invention forms the adhesive layer and the seed layer by sputtering or ion beam evaporation, so that the seed layer and the adhesive layer can cover the convex structure and the whole substrate surface where the convex structure is positioned, thereby forming the solder on the whole bonding surface. In the prior art, the metal adhesion layer and the seed layer are sputtered on the whole wafer, then the metal on the regions where the solder does not need to grow is etched, then the etching preparation of the convex structures is carried out on the regions, and finally the electroplating growth of the solder is carried out. Although the method avoids growing the metal solder on the side wall of the convex structure, because part of the area forms the island structure after being etched, electrons cannot reach the metal seed layer on the island structure, and the metal solder cannot be deposited in the area during electroplating.

3. According to the invention, the metal barrier layer is formed on the side wall of the convex structure, and because the affinity of the metal barrier layer and the molten metal solder is poor, the problem that the molten metal solder spreads along the region where metal is grown on the side wall of the convex structure in the metal eutectic welding process is solved, the metal solder loss of the eutectic bonding region is avoided, and the bonding effect is improved; and simultaneously avoids the metal solder in a molten state from flowing into gaps between the convex structures (such as flowing into the micro-channels) to cause blockage.

Drawings

Various additional advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the invention. Also, like reference numerals are used to refer to like parts throughout the drawings. In the drawings:

fig. 1 to 10 are schematic partial structural views of structures obtained in each step of the preparation method provided in the embodiment of the present invention.

Description of the reference numerals

100 is a silicon wafer, 200 is a microchannel, 201 is a partition wall, 202 is a bonding surface, 300 is an adhesion layer, 400 is a seed layer, 500 is a metal barrier layer, 600 is a parylene layer, 700 is solder, 800 is a cover plate, and 900 is a metal layer.

Detailed Description

Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. It should be understood that the description is illustrative only and is not intended to limit the scope of the present disclosure. Moreover, in the following description, descriptions of well-known structures and techniques are omitted so as to not unnecessarily obscure the concepts of the present disclosure.

Various structural schematics according to embodiments of the present disclosure are shown in the figures. The figures are not drawn to scale, wherein certain details are exaggerated and some details may be omitted for clarity of presentation. The shapes of the various regions, layers and their relative sizes, positional relationships are shown in the drawings as examples only, and in practice deviations due to manufacturing tolerances or technical limitations are possible, and a person skilled in the art may additionally design regions/layers with different shapes, sizes, relative positions according to the actual needs.

In the context of the present disclosure, when a layer/element is referred to as being "on" another layer/element, it can be directly on the other layer/element or intervening layers/elements may be present. In addition, if a layer/element is "on" another layer/element in one orientation, then that layer/element may be "under" the other layer/element when the orientation is reversed.

In the prior art, when the adhesion layer and the seed layer of the eutectic bonding solder are prepared on the top of the convex structure, metal is sputtered on the side wall of the convex structure, so that when the metal solder is formed by electroplating, the metal solder also grows on the side wall. In order to avoid the formation of metal solder on the side wall of the convex structure, the invention provides an improved preparation method of solder for eutectic bonding, which comprises the following steps.

First, a substrate is provided, the substrate being provided with a raised structure, a top surface of the raised structure being a bonding surface.

The substrate of the invention can be a silicon wafer, a silicon-on-insulator wafer, a silicon germanium wafer, a gallium nitride wafer, a SiC wafer, a quartz wafer or a sapphire wafer. The present invention is not particularly limited to the substrate, and a conventional substrate suitable for a micro-processing process may be used.

In some embodiments, one surface (e.g., the upper or lower surface) of the substrate is provided with a plurality of raised structures. In other embodiments, the upper surface and the lower surface of the substrate are respectively provided with a plurality of protruding structures.

Preferably, the substrate and the protruding structure are integrally formed.

In some embodiments, a method of manufacturing a substrate provided with a projection structure includes: providing an initial substrate; and photoetching and etching the initial substrate to obtain the substrate with the convex structure. The initial substrate may be a silicon wafer, a silicon-on-insulator wafer, a silicon germanium wafer, a gallium nitride wafer, a SiC wafer, a quartz wafer, or a sapphire wafer. The present invention is not particularly limited to the initial substrate, and conventional substrates suitable for the micro-process may be used.

In some embodiments, the substrate provided with the raised structures is a substrate provided with embedded microchannels. The partition wall of the embedded microchannel is of a convex structure, and the top surface of the partition wall is a bonding surface. The substrate is commonly used in the field of heat dissipation of electronic devices. In some embodiments, a method of preparing a substrate provided with embedded microchannels comprises: providing an initial substrate, and forming embedded micro-channels on the initial substrate through photoetching and etching.

Then, an adhesive layer is formed so as to cover the projection structure.

Preferably, the adhesion layer is formed by a magnetron sputtering or ion beam evaporation process.

Preferably, the adhesion layer is a metal with good interlayer adhesion, such as titanium or chromium.

The thickness of the adhesion layer may be 10-1000nm (depending on the solder thickness, a thicker adhesion layer may be chosen when the solder thickness is thicker), for example 20-200nm when the solder is 10-20 μm (the thickness of the solder is related to the type of metal of the eutectic bonding).

Thereafter, a seed layer and a parylene layer are sequentially formed on the adhesive layer.

Preferably, the seed layer is a metal with good conductivity, such as copper or gold. The thickness of the seed layer can be 100-1000nm (determined by the thickness of the solder, when the thickness of the solder is thicker, a thicker seed layer can be selected), for example, when the thickness of the solder is 10-20 μm, the thickness of the seed layer can be 100-300 nm.

Preferably, the thickness of the parylene layer is 1-10 μm (determined by the size of the raised structures, e.g. the higher the height of the raised structures, the greater the thickness of the parylene layer).

Preferably, the seed layer is formed by sputtering or ion beam evaporation. The invention forms the adhesive layer and the seed layer on the whole surface by sputtering or ion beam evaporation, so that the seed layer and the adhesive layer can cover the convex structure and the whole substrate surface where the convex structure is positioned, thereby forming the solder on the whole bonding surface.

Preferably, the parylene layer is formed by a chemical vapor deposition method. The chemical vapor deposition method includes a plasma enhanced chemical vapor deposition method.

Next, the parylene layer portion on the bonding surface is removed, thereby exposing a portion of the seed layer, forming a window.

Preferably, the parylene layer portion on the bonding surface is removed by chemical mechanical polishing.

Preferably, a metal barrier layer is formed on the seed layer after the seed layer is formed and before the parylene layer is formed.

The metal barrier layer of the present invention is a metal having high hardness and not chemically reacting with a polishing liquid for chemical mechanical polishing. Preferably, the metal barrier layer is a metal such as aluminum or tantalum that does not react with the corresponding polishing solution easily.

Preferably, the thickness of the metal barrier layer is 100-1000nm (the thickness of the metal barrier layer is related to the metal type of the metal barrier layer).

Preferably, the metal barrier layer is formed by sputtering or ion beam evaporation.

In order to expose the seed layer on the bonding surface of the protruding structure in the case where the metal barrier layer is formed on the seed layer, it is necessary to remove the metal barrier layer portion on the bonding surface after removing the parylene layer portion on the bonding surface, thereby exposing a portion of the seed layer to form a window. Preferably, the metal barrier layer portion on the bonding surface is removed using an etching liquid. The corrosive liquid only chemically reacts with the metal barrier layer and does not chemically react with the seed layer. Preferably, the etching solution is an aluminum etching solution or a tantalum etching solution, including but not limited to hydrochloric acid, nitric acid, phosphoric acid, sulfuric acid or a mixture thereof.

According to the invention, the metal barrier layer is formed on the seed layer positioned on the side wall of the convex structure, and because the affinity between the metal barrier layer and the molten metal solder is poor, the problem that the molten metal solder spreads along the region where metal is grown on the side wall of the convex structure in the metal eutectic welding process is solved, the metal solder loss of a eutectic bonding region is avoided, and the bonding effect is improved; and simultaneously avoids the metal solder in a molten state from flowing into gaps between the convex structures (such as flowing into the micro-channels) to cause blockage. The method can control the flowing area of the molten metal solder by arranging the metal barrier layer, has better reliability and is easier for practical engineering application.

Finally, solder is formed at the window by electroplating.

Preferably, the solder comprises one or more metal layers. Each of the metal layers is formed by electroplating or electron beam evaporation, and may be Cu, Sn, Pb, In, Au, Ag, or Sb. Preferably, the solder comprises a plurality of (e.g. 2-3) metal layers, and the metal layers are different from each other. Of course, the solder may include other metal layers suitable for eutectic bonding.

The invention uses the electroplating process to prepare the solder, and can form thicker metal solder compared with other processes such as sputtering or evaporation and the like. Preferably, the solder has a thickness of 10-20 μm.

During electroplating, the side wall of the raised structure is coated with the non-conductive parylene layer, so that the formation of metal solder on the side wall of the raised structure can be avoided. Particularly, when the substrate is provided with the embedded micro-channel, the micro-channel has larger flow rate in work and better heat dissipation performance because the inner wall of the micro-channel can not form solder.

After the solder is formed, whether or not to remove the remaining parylene layer may be selected according to actual use needs. For example, when the substrate is a substrate provided with an embedded microchannel, since the porosity of the parylene layer is low, leakage of a cooling medium can be prevented when the microchannel operates, but there is a disadvantage in that it is difficult to endure a high temperature process.

In some embodiments, the remaining parylene layer is removed after the solder is formed. Preferably, the remaining parylene layer may be removed by dry etching. The dry etching includes oxygen plasma etching.

The invention will be further illustrated with reference to specific embodiments and the accompanying drawings.

Example 1

First, a silicon wafer 100 is provided. Then, a microchannel 200 is formed on the upper surface of the silicon wafer 100 by photolithography and etching, and a partial structure of the resulting structure is schematically shown in fig. 1, wherein 201 is a spacer of the

microchannel

200, and 202 is a bonding surface on the top of the spacer 201.

Then, an adhesion layer 300 is formed by sputtering so as to cover the bonding surface 202 and the inner wall of the micro channel 200, wherein the adhesion layer 300 is titanium and has a thickness of 100 nm.

Thereafter, a seed layer 400 is formed on the upper surface of the adhesion layer 300 by sputtering, and a partial structure of the resulting structure is schematically shown in fig. 2, wherein the seed layer 400 is gold and has a thickness of 200 nm.

Next, a metal barrier layer 500 is formed on the upper surface of the seed layer 400 by sputtering, and a partial structure of the resulting structure is schematically shown in fig. 3, wherein the metal barrier layer 500 is aluminum and has a thickness of 200 nm.

Then, a parylene layer 600 is formed on the upper surface of the metal barrier layer 500 by a plasma enhanced chemical vapor deposition method, and a partial structure of the resulting structure is schematically shown in fig. 4, in which the parylene layer 600 has a thickness of 5 μm.

Thereafter, the parylene layer 600 on the bonding surface 202 is partially removed by chemical mechanical polishing, so that the metal barrier layer 500 on the bonding surface 202 is exposed, and a partial structure diagram of the resulting structure is shown in fig. 5.

Next, the exposed portion of the metal barrier layer 500 is removed by using an aluminum etchant, so that a portion of the seed layer 400 is exposed to form a window, and a partial structural diagram of the resulting structure is shown in fig. 6. Since the thickness of the metal barrier layer 500 is small, the top end surface of the seed layer 400 and the parylene layer 600 can be considered to be at the same level after the exposed portion of the metal barrier layer 500 is removed.

Then, solder 700 is formed at the window by electroplating, and a partial structural diagram of the resulting structure is shown in fig. 7, in which the solder 700 is Sn and has a thickness of 10 μm.

Thereafter, the remaining parylene layer 600 is removed by oxygen plasma etching, and a partial structural view of the resulting structure is shown in fig. 8.

Next, a cover plate 800 is provided, and an adhesion layer 300 is formed on the lower surface thereof by sputtering, and thereafter, a Ni layer having a thickness of 3 micrometers, an Au layer having a thickness of 1 micrometer, and an Sn layer having a thickness of 10 micrometers are sequentially formed on the lower surface of the adhesion layer 300 from top to bottom by electroplating, which are collectively referred to as a metal layer 900, and a partial structural view of the resulting structure is shown in fig. 9.

Finally, the structure shown in fig. 8 and the structure shown in fig. 9 are bonded by applying pressure in a nitrogen atmosphere at a temperature above the melting point temperature of the solder, and a partial structural view of the resulting structure is shown in fig. 10. Since the inner wall of the micro channel 200 is covered by the metal barrier layer 500, the metal solder 700 in a molten state does not flow into the micro channel 200 during eutectic bonding.

While the invention has been described with reference to specific preferred embodiments, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention as defined in the following claims. Therefore, the protection scope of the present invention shall be subject to the protection scope of the appended claims.

Claims

1. A method for preparing a solder for eutectic bonding, comprising:

forming an adhesive layer to cover the protruding structure;

forming a seed layer and a parylene layer on the adhesive layer in sequence;

and forming solder at the window by electroplating.

2. The method of claim 1, wherein the adhesion layer and the seed layer are formed by magnetron sputtering or ion beam evaporation.

3. The production method according to claim 1 or 2, characterized by further comprising:

forming a metal barrier layer on the seed layer after forming the seed layer and before forming the parylene layer; and

after removing the parylene layer portion, removing the metal barrier layer portion on the bonding surface, thereby exposing a portion of the seed layer, forming a window.

4. The production method according to claim 3,

the metal barrier layer is aluminum or tantalum;

forming the metal barrier layer by sputtering or ion beam evaporation;

and removing the metal barrier layer part by using corrosive liquid.

5. The production method according to claim 1 or 2, wherein the parylene layer is formed by a chemical vapor deposition method.

6. A production method according to claim 1 or 2, characterized in that the parylene layer portion on the bonding surface is removed by chemical mechanical polishing.

7. The production method according to claim 1 or 2, characterized by further comprising: after the solder is formed, the remaining parylene layer is removed.

8. The production method according to claim 7, wherein the remaining parylene layer is removed by dry etching.

9. The method according to claim 1 or 2, wherein the method for producing the substrate provided with the projection structure includes: providing an initial substrate; and photoetching and etching the initial substrate to obtain the substrate with the convex structure.

10. The production method according to claim 1 or 2,

the adhesion layer is titanium or chromium;

the seed layer is copper or gold;

the solder is Cu, Sn, Pb, In, Au, Ag or Sb;

the substrate is a silicon wafer, a silicon-on-insulator wafer, a silicon germanium wafer, a gallium nitride wafer, a SiC wafer, a quartz wafer or a sapphire wafer.