CN114779544A - TFT substrate and manufacturing method thereof, liquid crystal display panel and OLED display panel - Google Patents

TFT substrate and manufacturing method thereof, liquid crystal display panel and OLED display panel Download PDF

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CN114779544A
CN114779544A CN202210322398.5A CN202210322398A CN114779544A CN 114779544 A CN114779544 A CN 114779544A CN 202210322398 A CN202210322398 A CN 202210322398A CN 114779544 A CN114779544 A CN 114779544A
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layer
electrode
drain
hole
dielectric layer
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张仪
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Wuhan China Star Optoelectronics Technology Co Ltd
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Wuhan China Star Optoelectronics Technology Co Ltd
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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/13338—Input devices, e.g. touch panels
    • G—PHYSICS
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    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134363—Electrodes characterised by their geometrical arrangement for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS]
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136231—Active matrix addressed cells for reducing the number of lithographic steps
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
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    • H01—ELECTRIC ELEMENTS
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    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
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    • H10K59/123—Connection of the pixel electrodes to the thin film transistors [TFT]

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Abstract

The embodiment of the application provides a TFT substrate, a manufacturing method of the TFT substrate, a liquid crystal display panel and an OLED display panel. The TFT substrate comprises a shading layer, an active layer, a grid electrode, a source drain layer, a first electrode layer and a second electrode layer, wherein the shading layer comprises shading units and touch signal lines which are arranged at intervals; the active layer is arranged corresponding to the shading unit; the grid electrode is arranged corresponding to the active layer; the source drain layer comprises a source electrode and a drain electrode which are arranged at intervals, and the source electrode and the drain electrode are both electrically connected with the active layer; the first electrode layer is used as a common electrode and a touch electrode in different time periods respectively; the second electrode layer comprises pixel electrodes and a switching layer which are arranged at intervals, the pixel electrodes are electrically connected with the drain electrodes, and the switching layer is respectively electrically connected with the first electrode layer and the touch signal line. The TFT substrate can be applied to a liquid crystal display panel or an OLED display panel to realize a touch function, and the production cost of the TFT substrate is low.

Description

TFT substrate and manufacturing method thereof, liquid crystal display panel and OLED display panel
Technical Field
The application relates to the field of display, in particular to a TFT substrate and a manufacturing method thereof, a liquid crystal display panel and an OLED display panel.
Background
With the rapid development of display technology, touch display devices have gradually spread throughout the lives of people. The working principle of the existing touch display device is as follows: by arranging the touch electrode and the touch signal line in the touch display device, when a human body contacts the touch display device, the touch electrode can transmit a capacitance signal between the touch electrode and the human body to the touch signal line, and then the capacitance signal is transmitted to the processor through the touch signal line, and the touch function is realized after the capacitance signal is processed by the processor; however, the touch electrode and the touch signal line are disposed in the touch display device, which often requires an additional mask process, thereby greatly increasing the production cost of the touch display device.
Disclosure of Invention
The embodiment of the application provides a TFT substrate and a manufacturing method thereof, a liquid crystal display panel and an OLED display panel.
In a first aspect, an embodiment of the present application provides a TFT substrate, including:
the light shielding layer comprises light shielding units and touch signal lines which are arranged at intervals;
an active layer disposed corresponding to the light shielding unit;
a gate electrode disposed corresponding to the active layer;
the source drain layer comprises a source electrode and a drain electrode which are arranged at intervals, and the source electrode and the drain electrode are both electrically connected with the active layer;
the touch screen comprises a first electrode layer and a second electrode layer, wherein the first electrode layer is used as a common electrode and a touch electrode in different time periods respectively;
the second electrode layer comprises pixel electrodes and a switching layer which are arranged at intervals, the pixel electrodes are electrically connected with the drain electrodes, and the switching layer is electrically connected with the first electrode layer and the touch signal line respectively.
In some embodiments, the source drain layer further includes a drain signal line for inputting an electrical signal to the drain, the drain signal line is electrically connected to the drain, and at least a portion of an orthographic projection of the drain signal line on a plane where the source drain layer is located overlaps with the touch signal line.
In some embodiments, the light shielding layer, the active layer, the gate electrode, the source drain layer, the first electrode layer, and the second electrode layer are sequentially stacked;
a first insulating layer is arranged between the shading layer and the active layer, a second insulating layer is arranged between the active layer and the grid electrode, a first dielectric layer is arranged between the grid electrode and the source drain layer, a second dielectric layer is arranged between the source drain layer and the first electrode layer, and a third dielectric layer is arranged between the first electrode layer and the second electrode layer;
a first through hole is formed in the third dielectric layer, and the switching layer is connected with the first electrode layer through the first through hole; second through holes are formed in the first insulating layer, the second insulating layer, the first dielectric layer, the second dielectric layer and the third dielectric layer, and the switching layer is connected with the touch signal line through the second through holes; a third through hole is formed in the second dielectric layer and the third dielectric layer, and the pixel electrode is connected with the drain electrode through the third through hole; and the second insulating layer and the first dielectric layer are provided with a source contact hole and a drain contact hole, the source is connected with the active layer electrode through the source contact hole, and the drain is connected with the active layer electrode through the drain contact hole.
In some embodiments, the second via includes a first via disposed on the second insulating layer and the first dielectric layer, a second via disposed on the second dielectric layer, a third via disposed on the third dielectric layer, and a fourth via disposed on the first insulating layer, and the apertures of the fourth via, the first via, the second via, and the third via are sequentially increased or sequentially decreased.
At one endIn some embodiments, the light-shielding layer has a thickness of
Figure BDA0003570566250000021
And/or
The second electrode layer has a thickness of
Figure BDA0003570566250000022
In a second aspect, an embodiment of the present application provides a method for manufacturing a TFT substrate, including:
providing a substrate, and arranging a light shielding layer on the substrate, wherein the light shielding layer comprises light shielding units and touch signal lines which are arranged at intervals;
arranging a first insulating layer on the light shielding layer and the substrate, wherein the first insulating layer covers one side, far away from the substrate, of the light shielding layer;
an active layer is arranged on the first insulating layer and corresponds to the light shielding unit;
arranging a second insulating layer on the active layer and the first insulating layer, wherein the second insulating layer covers one side of the active layer far away from the first insulating layer;
arranging a grid electrode on the second insulating layer, wherein the grid electrode is arranged corresponding to the active layer;
arranging a first dielectric layer on the grid electrode and the second insulating layer, wherein the first dielectric layer covers one side of the grid electrode, which is far away from the second insulating layer;
arranging a source drain layer on the first dielectric layer, wherein the source drain layer comprises a source electrode and a drain electrode which are arranged at intervals, and the source electrode and the drain electrode are electrically connected with the active layer;
arranging a second dielectric layer on the source drain layer and the first dielectric layer, wherein the second dielectric layer covers one side of the source drain layer, which is far away from the first dielectric layer;
arranging a first electrode layer on the second dielectric layer, wherein the first electrode layer is used as a common electrode and a touch electrode in different time periods respectively;
arranging a third dielectric layer on the first electrode layer and the second dielectric layer, wherein the third dielectric layer covers one side of the first electrode layer far away from the second dielectric layer;
and arranging a second electrode layer on the third dielectric layer, wherein the second electrode layer comprises pixel electrodes and a switching layer which are arranged at intervals, so that the pixel electrodes are electrically connected with the drain electrodes, and the switching layer is electrically connected with the first electrode layer and the touch signal line respectively.
In some embodiments, after disposing a first dielectric layer on the gate electrode and the second insulating layer, forming a source contact hole, a drain contact hole, and a first via hole on the second insulating layer and the first dielectric layer, the source contact hole and the drain contact hole being disposed corresponding to the active layer, the first via hole being disposed corresponding to the touch signal line;
after a second dielectric layer is arranged on the source drain layer and the first dielectric layer, a second through hole and a fifth through hole are formed in the second dielectric layer, the second through hole and the first through hole are mutually communicated, and the fifth through hole is arranged corresponding to the drain electrode;
after a third dielectric layer is arranged on the first electrode layer and the second dielectric layer, forming a third through hole, a sixth through hole and a first through hole on the third dielectric layer, and forming a fourth through hole on the first insulating layer; the first via hole, the second via hole, the third via hole and the fourth via hole are mutually communicated and jointly form a second via hole, the sixth via hole and the fifth via hole are mutually communicated and jointly form a third via hole, and the first via hole is arranged corresponding to the first electrode layer;
the switching layer is connected with the first electrode layer through the first through hole, and the switching layer is connected with the touch signal line through the second through hole; the pixel electrode is connected with the drain electrode through the third through hole; the source electrode is connected to the active layer electrode through the source contact hole, and the drain electrode is connected to the active layer electrode through the drain contact hole.
In some embodiments, the apertures of the fourth via, the first via, the second via, and the third via are sequentially increasing or sequentially decreasing.
In some embodiments, the light-shielding layer has a thickness of
Figure BDA0003570566250000041
And/or
The thickness of the second electrode layer is
Figure BDA0003570566250000042
In a third aspect, an embodiment of the present application provides a liquid crystal display panel, including:
a first substrate;
the second substrate is arranged opposite to the first substrate, and the second substrate is the TFT substrate or the TFT substrate manufactured by adopting the manufacturing method of the TFT substrate;
and the liquid crystal layer is clamped between the first substrate and the second substrate.
In a fourth aspect, an embodiment of the present application provides an OLED display panel, including:
the driving substrate is the TFT substrate or the TFT substrate manufactured by the manufacturing method of the TFT substrate;
the OLED device is arranged on the driving substrate and is electrically connected with the driving substrate.
The TFT substrate provided in the embodiment of the application can be applied to a touch display device, and the TFT substrate is provided with a first electrode layer, a switching layer, and a touch signal line, where the first electrode layer can serve as a common electrode and a touch electrode in different time periods, respectively, and when the first electrode layer serves as the touch electrode, the first electrode layer can be used to sense the touch signal, and then the first electrode layer transmits the touch signal to the touch signal line through the switching layer, and the touch signal line can transmit the touch signal to a processor, and the touch function is realized after the touch signal line is processed by the processor; in addition, the shading unit and the touch signal line are arranged on the same layer, the common electrode and the touch electrode are arranged to share the same electrode layer, and the pixel electrode and the switching layer are arranged on the same layer, so that the touch signal line and the shading unit can be prepared in the same photomask process, the touch electrode and the common electrode can be prepared in the same photomask process, the switching layer and the pixel electrode can be prepared in the same photomask process, and the shading unit, the common electrode and the pixel electrode are known to be conventional structures in the existing TFT substrate, that is, the embodiment of the application can realize the touch function without changing the number of the photomask processes of the existing TFT substrate, so that the production cost can be saved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings used in the description of the embodiments will be briefly introduced below. It is obvious that the drawings in the following description are only some embodiments of the application, and that for a person skilled in the art, other drawings can be derived from them without inventive effort.
Fig. 1 is a schematic structural diagram of a TFT substrate according to an embodiment of the present disclosure.
Fig. 2 is a schematic cross-sectional view of a TFT substrate at a second via hole according to an embodiment of the present disclosure.
Fig. 3 is a schematic view after forming a source contact hole, a drain contact hole, and a first via hole on the second insulating layer and the first dielectric layer.
Fig. 4 is a schematic diagram after forming a second via and a fifth via on the second dielectric layer.
Fig. 5 is a schematic diagram after forming a third via, a sixth via, and a first via on a third dielectric layer.
Fig. 6 is a schematic structural diagram of a liquid crystal display panel according to an embodiment of the present application.
Fig. 7 is a schematic structural diagram of an OLED display panel according to an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It should be apparent that the described embodiments are only a few embodiments of the present application, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a TFT substrate provided in an embodiment of the present application, and the embodiment of the present application provides a TFT substrate 100 including a light shielding layer, an active layer 30, a gate 40, a source drain layer, a first electrode layer 62, and a second electrode layer.
The light shielding layer comprises a light shielding unit 21 and a touch signal line 22 which are arranged at intervals; the active layer 30 is disposed corresponding to the light shielding unit 21; the gate electrode 40 is disposed corresponding to the active layer 30; the source and drain layers comprise a source 51 and a drain 52 which are arranged at intervals, and the source 51 and the drain 52 are both electrically connected with the active layer 30; the first electrode layer 62 is used as a common electrode and a touch electrode in different time periods; the second electrode layer includes a pixel electrode 71 and a via layer 72 disposed at an interval, the pixel electrode 71 is electrically connected to the drain 52, and the via layer 72 is electrically connected to the first electrode layer and the touch signal line 22, respectively.
It should be noted that, when the first electrode layer 62 is used to serve as a touch electrode, the first electrode layer 62 can sense a touch signal, and when the first electrode layer 62 is used to serve as a common electrode, a voltage difference can be formed between the common electrode and the pixel electrode 71 to drive the liquid crystal molecules to rotate (in this case, the TFT substrate 100 is applied to a liquid crystal display panel).
It can be understood that, since the human body is conductive, when the human body contacts the touch display device including the TFT substrate 100, the human body and the first electrode layer 62 generate a capacitance, which is a touch signal, and the first electrode layer 62 can transmit the touch signal to the touch signal line 22 through the via layer 72, and further transmit the touch signal to the processor through the touch signal line 22.
The TFT substrate 100 provided in the embodiment of the present application may be applied to a touch display device, and by providing the first electrode layer 62, the relay layer 72, and the touch signal line 22 in the TFT substrate 100, the first electrode layer 62 may serve as a common electrode and a touch electrode in different time periods, when the first electrode layer 62 serves as the touch electrode, the first electrode layer 62 may be used to sense a touch signal, and then the first electrode layer 62 transmits the touch signal to the touch signal line 22 through the relay layer 72, and the touch signal line 22 may transmit the touch signal to a processor, and the processor processes the touch signal to implement a touch function; in addition, in the embodiment of the present application, the light shielding unit 21 and the touch signal line 22 are disposed on the same layer, the common electrode and the touch electrode are disposed on the same electrode layer, and the pixel electrode 71 and the switching layer 72 are disposed on the same layer, so that the touch signal line 22 and the light shielding unit 21 can be prepared in the same photomask process, the touch electrode and the common electrode can be prepared in the same photomask process, and the switching layer 72 and the pixel electrode 71 can be prepared in the same photomask process.
Referring to fig. 1, the source/drain layer further includes a drain signal line 53 for inputting an electrical signal to the drain 52, the drain signal line 53 is electrically connected to the drain 52, and at least a portion of an orthogonal projection of the drain signal line 53 on a plane where the source/drain layer is located overlaps the touch signal line 22. Illustratively, the overlapping area between the orthographic projection of the drain signal line 53 on the plane of the source drain layer and the touch signal line 22 accounts for 10%, 20%, 30%, 40%, 50%, 60%, 70%, 80%, 90% and 100% of the area of the orthographic projection of the drain signal line 53 on the plane of the source drain layer.
It should be noted that, in the embodiment of the present application, by setting a part or all of the orthographic projection of the drain signal line 53 on the plane where the source and drain layers are located to overlap with the touch signal line 22, compared with the technical scheme in the related art in which there is no overlap between the drain signal line 53 and the touch signal line 22, the occupied area of the signal line in the display area of the display panel can be significantly reduced, and the pixel aperture ratio is improved.
Referring to fig. 1, the light-shielding layer, the active layer 30, the gate 40, the source/drain layer, the first electrode layer 62 and the second electrode layer are sequentially stacked;
a first insulating layer 81 is arranged between the shading layer and the active layer 30, a second insulating layer 82 is arranged between the active layer 30 and the grid 40, a first dielectric layer 83 is arranged between the grid 40 and the source drain layer, a second dielectric layer 84 is arranged between the source drain layer and the first electrode layer 62, and a third dielectric layer 85 is arranged between the first electrode layer 62 and the second electrode layer;
a first through hole 91 is formed in the third dielectric layer 85, and the interposer 72 is connected to the first electrode layer 62 through the first through hole 91; the first insulating layer 81, the second insulating layer 82, the first dielectric layer 83, the second dielectric layer 84, and the third dielectric layer 85 are provided with second through holes 92, and the transfer layer 72 is connected to the touch signal lines 22 through the second through holes 92; a third via 93 is disposed on the second dielectric layer 84 and the third dielectric layer 85, and the pixel electrode 71 is connected to the drain electrode 52 through the third via 93; the second insulating layer 82 and the first dielectric layer 83 are provided with a source contact hole 94 and a drain contact hole 95, the source electrode 51 is electrically connected to the active layer 30 through the source contact hole 94, and the drain electrode 52 is electrically connected to the active layer 30 through the drain contact hole 95.
Referring to fig. 1, the second via 92 includes a first via 921 disposed on the second insulating layer 82 and the first dielectric layer 83, a second via 922 disposed on the second dielectric layer 84, a third via 923 disposed on the third dielectric layer 85, and a fourth via 924 disposed on the first insulating layer 81.
Referring to fig. 2, fig. 2 is a schematic cross-sectional view of the TFT substrate at the second via position according to the present embodiment, in some embodiments, the aperture of the fourth via 924, the first via 921, the second via 922, and the third via 923 may be sequentially increased. In other embodiments, the diameters of the fourth via 924, the first via 921, the second via 922, and the third via 923 may also decrease sequentially. It can be understood that, by setting the apertures of the fourth via 924, the first via 921, the second via 922 and the third via 923 to be sequentially increased or sequentially decreased, the alignment of the upper and lower holes is facilitated in the process of manufacturing the fourth via 924, the third via 923, the second via 922 and the first via 921, and, when the apertures of the fourth via 924, the first via 921, the second via 922 and the third via 923 are set to be sequentially increased or sequentially decreased, the hole wall of the second through hole 92 presents a slope shape, the adhesion effect of the transit layer 72 on the hole wall of the second through hole 92 can be improved, and further, the electrical stability of the TFT substrate 100 is improved.
Referring to fig. 1, the third via 93 includes a fifth via 931 disposed on the second dielectric layer 84 and a sixth via 932 disposed on the third dielectric layer 85.
Illustratively, the light-shielding layer has a thickness of
Figure BDA0003570566250000071
Namely, the thickness of the light shielding unit 21 and the thickness of the touch signal line 22 are both
Figure BDA0003570566250000072
It is known that the thickness of the light-shielding layer in the conventional TFT substrate is
Figure BDA0003570566250000081
That is, in the embodiments of the present application, the thickness of the light-shielding layer is increased based on the thickness of the conventional light-shielding layer
Figure BDA0003570566250000082
Therefore, the impedance of the light shielding layer, that is, the impedance of the touch signal line 22, can be reduced, so that the touch signal line 22 has a better electrical performance. For example, in the embodiment of the present application, the light shielding layer may have a thickness of
Figure BDA0003570566250000083
Figure BDA0003570566250000084
And the like.
Illustratively, the second electrode layer has a thickness of
Figure BDA0003570566250000085
I.e. the thickness of the pixel electrode 71 and the thickness of the switching layer 72 are both
Figure BDA0003570566250000086
The thickness of the second electrode layer in the conventional TFT substrate is known to be
Figure BDA0003570566250000087
That is, the embodiments of the present application increase the thickness of the second electrode layer based on the thickness of the second electrode layer
Figure BDA0003570566250000088
It can be understood that, when the depth of the second through hole 92 is larger and the thickness of the second electrode layer is set to a smaller value, a situation that the second electrode layer (the via layer 72) is broken due to non-deposition of an electrode material in a partial area of the hole wall of the second through hole 92 is easily caused in the deposition process of the second electrode layer, and it is known that when the via layer 72 is broken, the via layer 72 cannot effectively achieve the electrical connection between the first electrode layer 62 and the touch signal line 22, so that the display panel cannot achieve the touch function; in the embodiment of the application, the second electrode layer (the transfer layer 72) can be prevented from being broken at the second through hole 92 by increasing the thickness of the second electrode layer, so that the electrical property stability of the TFT substrate 100 is ensured.
Referring to fig. 1, the TFT substrate 100 may further include a substrate 10, where the substrate 10 is disposed on a side of the light shielding layer away from the first insulating layer 81.
Illustratively, the substrate 10 may be a rigid substrate or a flexible substrate, the material of the rigid substrate may be glass, and the material of the flexible substrate may be a polymer (e.g., polyimide, etc.).
Illustratively, the material of the light blocking layer may include one or more of a metal material and a semiconductor material, wherein the metal material may include one or more of aluminum (Al), silver (Ag), tungsten (W), copper (Cu), nickel (Ni), chromium (Cr), molybdenum (Mo), titanium (Ti), platinum (Pt), tantalum (Ta), and neodymium (Nd).
Illustratively, the material of the first insulating layer 81 and the material of the second insulating layer 82 may each independently include one or more of silicon nitride, silicon oxide, and silicon oxynitride.
Illustratively, the material of the first dielectric layer 83, the material of the second dielectric layer 84, and the material of the third dielectric layer 85 may each independently include one or more of an inorganic material and an organic material, wherein the inorganic material may include one or more of silicon nitride, silicon oxide, and silicon oxynitride, and the organic material may include one or more of polyolefin, polyester compound, polyacryl compound, polycarbonate compound, polyoxirane compound, polyphenylene compound, polyether compound, polyketone compound, polyalcohol compound, and polyaldehyde compound. Illustratively, the first dielectric layer 83, the second dielectric layer 84, and the third dielectric layer 85 may each be a single-layer structure or a stacked-layer structure.
Illustratively, the material of the first electrode layer 62 and the material of the second electrode layer may each independently include one or more of indium tin oxide, indium zinc oxide, aluminum tin oxide, aluminum zinc oxide, indium germanium zinc oxide, and the like transparent conductive materials.
In some embodiments, the material of the active layer 30 may be an oxide semiconductor material, such as Indium Zinc Oxide (IZO), gallium indium oxide (IGO), Indium Gallium Zinc Oxide (IGZO), Indium Gallium Tin Oxide (IGTO), Indium Gallium Zinc Tin Oxide (IGZTO), or the like. In other embodiments, the material of the active layer 30 may also be amorphous silicon, monocrystalline silicon, low temperature polysilicon, etc.
Illustratively, the material of the gate electrode 40 and the material of the source drain electrode layer may be one or more metals selected from aluminum (Al), silver (Ag), tungsten (W), copper (Cu), nickel (Ni), chromium (Cr), molybdenum (Mo), titanium (Ti), platinum (Pt), tantalum (Ta), and neodymium (Nd), respectively.
Referring to fig. 1, an embodiment of the present invention further provides a method for manufacturing a TFT substrate, including:
providing a substrate 10, and arranging a light shielding layer on the substrate 10, wherein the light shielding layer comprises a light shielding unit 21 and a touch signal line 22 which are arranged at intervals;
a first insulating layer 81 is arranged on the shading layer and the substrate 10, and the first insulating layer 81 covers one side of the shading layer far away from the substrate 10;
an active layer 30 is disposed on the first insulating layer 81, the active layer 30 being disposed corresponding to the light shielding unit 21;
a second insulating layer 82 is arranged on the active layer 30 and the first insulating layer 81, and the second insulating layer 82 covers one side of the active layer 30 away from the first insulating layer 81;
a gate electrode 40 is disposed on the second insulating layer 82, the gate electrode 40 being disposed corresponding to the active layer 30;
a first dielectric layer 83 is arranged on the gate electrode 40 and the second insulating layer 82, and the first dielectric layer 83 covers one side, far away from the second insulating layer 82, of the gate electrode 40;
a source drain layer is arranged on the first dielectric layer 83, and the source drain layer comprises a source 51 and a drain 52 which are arranged at intervals, so that the source 51 and the drain 52 are both electrically connected with the active layer 30;
a second dielectric layer 84 is arranged on the source drain layer and the first dielectric layer 83, and the second dielectric layer 84 covers one side of the source drain layer far away from the first dielectric layer 83;
a first electrode layer 62 is disposed on the second dielectric layer 84, the first electrode layer 62 is used as a common electrode and a touch electrode in different time periods;
disposing a third dielectric layer 85 on the first electrode layer 62 and the second dielectric layer 84, the third dielectric layer 85 covering a side of the first electrode layer 62 away from the second dielectric layer 84;
a second electrode layer is disposed on the third dielectric layer 85, and the second electrode layer includes a pixel electrode 71 and a transfer layer 72 disposed at an interval, so that the pixel electrode 71 is electrically connected to the drain 52, and the transfer layer 72 is electrically connected to the first electrode layer 62 and the touch signal line 22, respectively.
Referring to fig. 3, after the first dielectric layer 83 is disposed on the gate electrode 40 and the second insulating layer 82, a source contact hole 94, a drain contact hole 95, and a first via 921 are formed on the second insulating layer 82 and the first dielectric layer 83, the source contact hole 94 and the drain contact hole 95 are disposed corresponding to the active layer 30, and the first via 921 is disposed corresponding to the touch signal line 22.
It should be noted that the depth of the source contact hole 94, the depth of the drain contact hole 95, and the depth of the first via hole 921 are the same, and are the sum of the thickness of the second insulating layer 82 and the thickness of the first dielectric layer 83, and since the active layer 30 is below the source contact hole 94 and the drain contact hole 95, in the process of etching the second insulating layer 82 and the first dielectric layer 83, the etching depth needs to be controlled to avoid the active layer 30 from being etched to affect the electrical performance of the TFT, and therefore the depth of the first via hole 921 is also controlled, and the first via hole cannot extend into the first insulating layer 81, that is, the portion of the first insulating layer 81 corresponding to the first via hole 921 is not etched.
Referring to fig. 4, after the second dielectric layer 84 is disposed on the source and drain layers and the first dielectric layer 83, a second via 922 and a fifth via 931 are formed on the second dielectric layer 84, the second via 922 penetrates the first via 921, and the fifth via 931 is disposed corresponding to the drain 52.
Referring to fig. 5, after the third dielectric layer 85 is disposed on the first electrode layer 62 and the second dielectric layer 84, a third via 923, a sixth via 932 and a first via 91 are formed on the third dielectric layer 85, and a fourth via 924 is formed on the first insulating layer 81; the first via 921, the second via 922, the third via 923, and the fourth via 924 are mutually penetrated and jointly form a second via 92, the sixth via 932 and the fifth via 931 are mutually penetrated and jointly form a third via 93, and the first via 91 is arranged corresponding to the first electrode layer 62;
the switching layer 72 is connected to the first electrode layer 62 through a first via 91, and the switching layer 72 is connected to the touch signal line 22 through a second via 92; the pixel electrode 71 is connected to the drain electrode 52 via the third through hole 93; the source electrode 51 is electrically connected to the active layer 30 through the source contact hole 94, and the drain electrode 52 is electrically connected to the active layer 30 through the drain contact hole 95.
It should be noted that, when the third dielectric layer 85 is etched to form the third via 923, the sixth via 932 and the first via 91, the etching strength may be increased, so that portions of the first insulating layer 81 corresponding to the first via 921, the second via 922 and the third via 923 are etched away to form the fourth via 924, at this time, since the drain 52 is disposed below the sixth via 932 and the fifth via 931 (the third via 93), the first dielectric layer 83 below the drain may be shielded, the first electrode layer 62 is disposed below the first via 91, and the second dielectric layer 84 below the drain may be shielded, so that increasing the etching strength of the third dielectric layer 85 does not affect other positions of the TFT substrate 100.
Illustratively, the material of the first insulating layer 81 and the material of the third dielectric layer 85 may be set to be the same material, and thus the same etching solution may be used for etching.
Referring to fig. 2, in some embodiments, the apertures of the fourth via 924, the first via 921, the second via 922, and the third via 923 may sequentially increase; in other embodiments, the aperture of the fourth via 924, the first via 921, the second via 922, and the third via 923 may decrease sequentially.
Illustratively, the light-shielding layer has a thickness of
Figure BDA0003570566250000111
Illustratively, the second electrode layer has a thickness of
Figure BDA0003570566250000112
Referring to fig. 6, fig. 6 is a schematic structural diagram of a liquid crystal display panel according to an embodiment of the present disclosure. The embodiment of the present application further provides a liquid crystal display panel 200, which includes a first substrate 210 and a second substrate 220 that are disposed opposite to each other, and a liquid crystal layer 230 interposed between the first substrate 210 and the second substrate 220, where the second substrate 220 may be the TFT substrate 100 in any of the above embodiments or the TFT substrate 100 manufactured by using the method for manufacturing the TFT substrate in any of the above embodiments. It can be understood that, the liquid crystal display panel provided in the embodiment of the present application can realize a touch function because the liquid crystal display panel includes the TFT substrate 100.
Exemplarily, the first substrate 210 may be a Color Filter (CF) substrate.
Referring to fig. 7, fig. 7 is a schematic structural diagram of an OLED display panel according to an embodiment of the present disclosure. The embodiment of the present application further provides an OLED display panel 300, which includes a driving substrate 310 and an OLED device 320, the OLED device 320 is disposed on the driving substrate 310, and the OLED device 320 is electrically connected to the driving substrate 310. The driving substrate 310 may be the TFT substrate 100 in any of the above embodiments or the TFT substrate 100 manufactured by the method for manufacturing the TFT substrate in any of the above embodiments. It can be understood that, the OLED display panel 300 provided in the embodiment of the present application can realize a touch function because the OLED display panel includes the TFT substrate 100.
Illustratively, the OLED device 320 may include an Anode (Anode), a Hole Injection Layer (HIL), a Hole Transport Layer (HTL), an Emission Layer (EML), an Electron Transport Layer (ETL), and a Cathode (Cathode) that are sequentially stacked.
The TFT substrate, the manufacturing method thereof, the liquid crystal display panel, and the OLED display panel provided in the embodiments of the present application are described in detail above. The principles and embodiments of the present application are described herein using specific examples, which are presented only to aid in the understanding of the present application. Meanwhile, for those skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.

Claims (11)

1. A TFT substrate, comprising:
the shading layer comprises shading units and touch signal lines which are arranged at intervals;
an active layer disposed corresponding to the light shielding unit;
a gate electrode disposed corresponding to the active layer;
the source drain layer comprises a source electrode and a drain electrode which are arranged at intervals, and the source electrode and the drain electrode are both electrically connected with the active layer;
the touch screen comprises a first electrode layer and a second electrode layer, wherein the first electrode layer is used as a common electrode and a touch electrode in different time periods respectively;
the second electrode layer comprises pixel electrodes and a switching layer which are arranged at intervals, the pixel electrodes are electrically connected with the drain electrodes, and the switching layer is electrically connected with the first electrode layer and the touch signal line respectively.
2. The TFT substrate according to claim 1, wherein the source and drain layers further comprise a drain signal line for inputting an electrical signal to the drain, the drain signal line is electrically connected to the drain, and at least a portion of an orthographic projection of the drain signal line on a plane where the source and drain layers are located overlaps the touch signal line.
3. The TFT substrate according to claim 1, wherein the light-shielding layer, the active layer, the gate electrode, the source/drain electrode layer, the first electrode layer, and the second electrode layer are sequentially stacked;
a first insulating layer is arranged between the shading layer and the active layer, a second insulating layer is arranged between the active layer and the grid electrode, a first dielectric layer is arranged between the grid electrode and the source drain layer, a second dielectric layer is arranged between the source drain layer and the first electrode layer, and a third dielectric layer is arranged between the first electrode layer and the second electrode layer;
a first through hole is formed in the third dielectric layer, and the switching layer is connected with the first electrode layer through the first through hole; second through holes are formed in the first insulating layer, the second insulating layer, the first dielectric layer, the second dielectric layer and the third dielectric layer, and the switching layer is connected with the touch signal line through the second through holes; a third through hole is formed in the second dielectric layer and the third dielectric layer, and the pixel electrode is connected with the drain electrode through the third through hole; and the second insulating layer and the first dielectric layer are provided with a source contact hole and a drain contact hole, the source is connected with the active layer electrode through the source contact hole, and the drain is connected with the active layer electrode through the drain contact hole.
4. The TFT substrate of claim 3, wherein the second via comprises a first via disposed on the second insulating layer and the first dielectric layer, a second via disposed on the second dielectric layer, a third via disposed on the third dielectric layer, and a fourth via disposed on the first insulating layer, and wherein the apertures of the fourth via, the first via, the second via, and the third via increase or decrease sequentially.
5. The TFT substrate according to any one of claims 1-4, wherein the light-shielding layer has a thickness of
Figure FDA0003570566240000021
And/or
The thickness of the second electrode layer is
Figure FDA0003570566240000022
6. A method for manufacturing a TFT substrate is characterized by comprising the following steps:
providing a substrate, and arranging a light shielding layer on the substrate, wherein the light shielding layer comprises light shielding units and touch signal lines which are arranged at intervals;
arranging a first insulating layer on the light shielding layer and the substrate, wherein the first insulating layer covers one side, far away from the substrate, of the light shielding layer;
an active layer is arranged on the first insulating layer and corresponds to the light shielding unit;
a second insulating layer is arranged on the active layer and the first insulating layer, and the second insulating layer covers one side, far away from the first insulating layer, of the active layer;
arranging a grid electrode on the second insulating layer, wherein the grid electrode is arranged corresponding to the active layer;
arranging a first dielectric layer on the grid electrode and the second insulating layer, wherein the first dielectric layer covers one side of the grid electrode, which is far away from the second insulating layer;
arranging a source drain layer on the first dielectric layer, wherein the source drain layer comprises a source electrode and a drain electrode which are arranged at intervals, and the source electrode and the drain electrode are electrically connected with the active layer;
arranging a second dielectric layer on the source drain layer and the first dielectric layer, wherein the second dielectric layer covers one side of the source drain layer, which is far away from the first dielectric layer;
arranging a first electrode layer on the second dielectric layer, wherein the first electrode layer is used as a common electrode and a touch electrode in different time periods respectively;
arranging a third dielectric layer on the first electrode layer and the second dielectric layer, wherein the third dielectric layer covers one side of the first electrode layer far away from the second dielectric layer;
and arranging a second electrode layer on the third dielectric layer, wherein the second electrode layer comprises pixel electrodes and a switching layer which are arranged at intervals, so that the pixel electrodes are electrically connected with the drain electrodes, and the switching layer is electrically connected with the first electrode layer and the touch signal line respectively.
7. The method of manufacturing the TFT substrate as claimed in claim 6, wherein after disposing a first dielectric layer on the gate electrode and the second insulating layer, a source contact hole, a drain contact hole, and a first via hole are formed on the second insulating layer and the first dielectric layer, the source contact hole and the drain contact hole being disposed corresponding to the active layer, the first via hole being disposed corresponding to the touch signal line;
after a second dielectric layer is arranged on the source drain layer and the first dielectric layer, a second through hole and a fifth through hole are formed in the second dielectric layer, the second through hole and the first through hole are mutually communicated, and the fifth through hole is arranged corresponding to the drain electrode;
after a third dielectric layer is arranged on the first electrode layer and the second dielectric layer, forming a third through hole, a sixth through hole and a first through hole on the third dielectric layer, and forming a fourth through hole on the first insulating layer; the first via hole, the second via hole, the third via hole and the fourth via hole are mutually communicated and jointly form a second via hole, the sixth via hole and the fifth via hole are mutually communicated and jointly form a third via hole, and the first via hole is arranged corresponding to the first electrode layer;
the switching layer is connected with the first electrode layer through the first through hole, and the switching layer is connected with the touch signal line through the second through hole; the pixel electrode is connected with the drain electrode through the third through hole; the source electrode is connected to the active layer electrode through the source contact hole, and the drain electrode is connected to the active layer electrode through the drain contact hole.
8. The method for manufacturing the TFT substrate according to claim 7, wherein the aperture of the fourth via hole, the aperture of the first via hole, the aperture of the second via hole and the aperture of the third via hole are sequentially increased or sequentially decreased.
9. The method for manufacturing the TFT substrate as claimed in any one of claims 6 to 8, wherein the light-shielding layer has a thickness of
Figure FDA0003570566240000031
And/or
The second electrode layer has a thickness of
Figure FDA0003570566240000032
10. A liquid crystal display panel, comprising:
a first substrate;
a second substrate disposed opposite to the first substrate, the second substrate being the TFT substrate according to any one of claims 1 to 5 or the TFT substrate manufactured by the method according to any one of claims 6 to 9;
and the liquid crystal layer is clamped between the first substrate and the second substrate.
11. An OLED display panel, comprising:
a driving substrate, which is the TFT substrate according to any one of claims 1 to 5 or the TFT substrate manufactured by the method of manufacturing the TFT substrate according to any one of claims 6 to 9;
the OLED device is arranged on the driving substrate and is electrically connected with the driving substrate.
CN202210322398.5A 2022-03-29 2022-03-29 TFT substrate and manufacturing method thereof, liquid crystal display panel and OLED display panel Pending CN114779544A (en)

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