CN114744861A - SiC MOSFET crosstalk suppression driving circuit - Google Patents
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- CN114744861A CN114744861A CN202210542544.5A CN202210542544A CN114744861A CN 114744861 A CN114744861 A CN 114744861A CN 202210542544 A CN202210542544 A CN 202210542544A CN 114744861 A CN114744861 A CN 114744861A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
- H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/38—Means for preventing simultaneous conduction of switches
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- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
A SiC MOSFET crosstalk suppression driving circuit relates to the technical field of power electronics. The invention aims to solve the problems that the SiMOSFET is sensitive to the parasitic parameters of a line, crosstalk is caused by high-speed action of a device, and the SiMOSFET is not suitable for a traditional SiMOSFET driving circuit. According to the SiC MOSFET crosstalk suppression driving circuit, a group of parallel voltage division structures are arranged between the gate and the source of each bridge arm SiC MOSFET, each parallel voltage division structure comprises a capacitor C1, a resistor R1 and a resistor R4, one end of a capacitor C1, one end of a resistor R1 and one end of a resistor R4 are connected with the gate of each SiC MOSFET, and the other end of the capacitor C1, the other end of the resistor R1 and the other end of the resistor R4 are connected with the source of each SiC MOSFET.
Description
Technical Field
The invention belongs to the technical field of power electronics, and particularly relates to a SiC MOSFET crosstalk suppression driving circuit.
Background
The SiC material has several times of performances of the traditional Si material in the aspects of field intensity, energy gap, heat conductivity and the like, so that a third generation wide bandgap semiconductor SiC device is more suitable for high-voltage, high-temperature and high-frequency working occasions, can meet the development requirements of power electronic technology, and becomes a preferred choice of a future high-power converter. Compared with the traditional high-power Si MOSFET, the SiC MOSFET has high switching speed while being more resistant to high voltage, and is very suitable for high-voltage and high-frequency application. However, higher voltages and switching frequencies mean greater dv/dt (rate of change of voltage) and di/dt (rate of change of current), resulting in SiC MOSFETs being more sensitive to parasitic parameters of the line than Si MOSFETs. Therefore, the conventional Si MOSFET driving circuit is not suitable for the SiC MOSFET, and the corresponding driving needs to be designed again according to the characteristics of the SiC MOSFET. In addition, it is also becoming more important to overcome the problem of crosstalk caused by high-speed operation of devices in bridge circuits.
Disclosure of Invention
The invention provides a SiC MOSFET crosstalk suppression driving circuit, aiming at solving the problems that a SiC MOSFET is sensitive to parasitic parameters of a line, crosstalk is caused by high-speed action of a device, and the SiC MOSFET crosstalk suppression driving circuit is not suitable for a traditional Si MOSFET driving circuit.
A group of parallel voltage division structures are arranged between the grid source electrodes of SiC MOSFETs of each bridge arm and comprise a capacitor C1, a resistor R1 and a resistor R4, one end of the capacitor C1, one end of the resistor R1 and one end of the resistor R4 are connected with the grid electrodes of the SiC MOSFETs, and the other end of the capacitor C1, the other end of the resistor R1 and the other end of the resistor R4 are connected with the source electrodes of the SiC MOSFETs.
Furthermore, a PNP triode Q1 is connected in parallel to two ends of the capacitor C1, an emitter of the PNP triode Q1 is connected to one end of the capacitor C1, a collector of the PNP triode Q1 is connected to the other end of the capacitor C1, and a base of the PNP triode Q1 is connected to the gate of the SiC MOSFET.
Further, a capacitor C2 and a capacitor C3 are connected in parallel between the gate and the source of each bridge arm SiC MOSFET, an NPN triode Q2 is connected in series between the capacitor C2 and the gate of the SiC MOSFET, and a PNP triode Q3 is connected in series between the capacitor C3 and the gate of the SiC MOSFET.
Further, the gate of the SiC MOSFET is connected to the emitter and the base of the NPN transistor Q2 and the emitter and the base of the PNP transistor Q3, respectively, the collector of the NPN transistor Q2 is connected to one end of the capacitor C2, the collector of the PNP transistor Q3 is connected to one end of the capacitor C3, and the other end of the capacitor C2 and the other end of the capacitor C3 are both connected to the source of the SiC MOSFET.
Further, a driving resistor Rg is connected in series between the emitter and the base of the PNP triode Q3.
Furthermore, a fast recovery diode D2 is connected in series between the collector of the NPN triode Q2 and one end of the capacitor C2,
the anode of the fast recovery diode D2 is connected to one end of the capacitor C2, and the cathode of the fast recovery diode D2 is connected to the collector of the NPN transistor Q2.
Furthermore, a resistor R2 is connected in parallel to both ends of the capacitor C2, and a resistor R3 is connected in parallel to both ends of the capacitor C3.
Furthermore, a zener diode D1 is connected in parallel to two ends of the capacitor C1, an anode of the zener diode D1 is connected to one end of the capacitor C1, and a cathode of the zener diode D1 is connected to the other end of the capacitor C1.
Further, the maximum discharge current generated by the parallel voltage dividing structure is less than 0.7V when the voltage generated by the driving resistor Rg flows through the driving resistor.
Further, the maximum value of the voltage across the driving resistor Rg is greater than 0.7V.
According to the SiC MOSFET crosstalk suppression driving circuit, the parallel voltage division structure formed by the capacitor C1, the resistor R1 and the resistor R4 can generate turn-off negative voltage at two ends of the capacitor C1 when the driving circuit is turned off, effectively suppress turn-on transient forward crosstalk, and simultaneously reduce the requirement on high speed of a driving chip. In order to prevent negative crosstalk of the negative-pressure-aggravated turn-off transient state, a PNP triode Q1 is connected in parallel with two ends of the capacitor C1, so that the negative crosstalk is enabled to short-circuit the capacitor C1 through the PNP triode Q1, and negative effects of negative-pressure turn-off are reduced. The capacitor C2 and the capacitor C3 are connected in parallel between the grid and the source of the SiC MOSFET, and are controlled to be merged into a driving loop only in a switching transient state by the NPN triode Q2 and the PNP triode Q3 respectively, so that negative effects brought by the parallel capacitors in the on and off periods are reduced to the maximum extent while partial displacement currents are divided. The peak voltage generated at the two ends of the driving resistor Rg by crosstalk is used for driving the on-off of the three triodes. The fast recovery diode D2 prevents the MOSFET from being incorporated into the capacitor C2 during normal operation. When the voltage across the capacitor C1 is stepped, a current pulse of several hundred amperes is generated, and the current pulse can be effectively suppressed by adding the zener diode D1. The resistor R2 and the resistor R3 suppress current pulses on the capacitor C2 and the capacitor C3 due to voltage steps.
Drawings
Fig. 1 is a structural diagram of a SiC MOSFET crosstalk suppression driving circuit according to the present invention;
fig. 2 is a schematic diagram of a crosstalk suppression process of a gate driving loop of the switch MOS _ L during an on transient of the switch MOS _ H;
FIG. 3 is a schematic diagram of the cross talk suppression process of the gate drive loop of the switch MOS _ L during the off transient of the switch MOS _ H;
FIG. 4 is a waveform diagram of forward crosstalk;
FIG. 5 is a diagram of negative crosstalk waveforms;
FIG. 6 is a diagram of a turn-on transient equivalent charging circuit;
fig. 7 is a working principle diagram of the switch MOS _ H turning off the transient switch MOS _ L.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention. It should be noted that the embodiments and features of the embodiments may be combined with each other without conflict.
There are currently two typical approaches to crosstalk suppression: a gate-source parallel capacitance method and a varying driving voltage level method. However, the former is not suitable for high frequency occasions because the mutual effect of parasitic capacitance and parasitic inductance prolongs the switching process by the parallel capacitance; the latter requires multiple levels to suppress positive and negative crosstalk, respectively, increasing the difficulty of control. Therefore, the present embodiment proposes a SiC MOSFET crosstalk suppression circuit based on passive devices, which combines the advantages of the two typical methods, effectively suppresses crosstalk, and simultaneously minimizes its negative effects. The method comprises the following specific steps:
the first embodiment is as follows: this embodiment is specifically described with reference to fig. 1.
The SiC MOSFET comprises an upper bridge arm, a lower bridge arm, a direct current voltage source Vdc, a resistor Rm and an inductor Lm, wherein the upper bridge arm comprises: switch MOS _ H, parasitic capacitance Cgd _ H, parasitic capacitance Cgs _ H, parasitic capacitance Cds _ H, parasitic resistance Rg (in) H and inductance Ls _ H. The lower bridge arm includes: switch MOS _ L, parasitic capacitance Cgd _ L, parasitic capacitance Cgs _ L, parasitic capacitance Cds _ L, parasitic resistance Rg (in) L and inductance Ls _ L.
The grid electrode of the switch MOS _ H is respectively connected with one end of a parasitic resistor Rg (in) H, one end of a parasitic capacitor Cgd _ H and one end of a parasitic capacitor Cgs _ H, the other end of the parasitic capacitor Cgs _ H is respectively connected with the source electrode of the switch MOS _ H, one end of an inductor Ls _ H and one end of a parasitic capacitor Cds _ H, and the other end of the parasitic capacitor Cgd _ H, the drain electrode of the switch MOS _ H and the other end of the parasitic capacitor Cds _ H are simultaneously connected with the anode of a direct-current voltage source Vdc.
The grid of the switch MOS _ L is respectively connected with one end of a parasitic resistor Rg (in) L, one end of a parasitic capacitor Cgd _ L and one end of a parasitic capacitor Cgs _ L, the other end of the parasitic capacitor Cgs _ L is respectively connected with the source of the switch MOS _ L, one end of an inductor Ls _ L and one end of a parasitic capacitor Cds _ L, the other end of the parasitic capacitor Cgd _ L, the drain of the switch MOS _ L, the other end of the parasitic capacitor Cds _ L and the other end of an inductor Ls _ H are simultaneously connected with one end of a resistor Rm, the other end of the resistor Rm is connected with one end of an inductor Lm, and the other end of the inductor Ls _ L, the other end of the inductor Lm and the negative electrode of the direct-current voltage source Vdc are simultaneously connected with the power ground.
The SiC MOSFET crosstalk suppression driving circuit according to this embodiment includes an upper arm portion and a lower arm portion.
The upper arm part includes: the driving circuit comprises a voltage stabilizing diode D1_ H, a fast recovery diode D2_ H, resistors R1_ H-R4 _ H, a driving power supply Vg _ H, capacitors C1_ H-C3 _ H, PNP, a triode Q1_ H, NPN, a triode Q2_ H, PNP, a triode Q3_ H and a driving resistor Rg _ H.
The positive electrode of the driving power supply Vg _ H is respectively connected with one end of the zener diode D1_ H, one end of the resistor R1_ H, one end of the capacitor C1_ H and the collector electrode of the PNP triode Q1_ H. The other end of the parasitic resistor Rg (in) is connected with the base electrode of the PNP triode Q1_ H, the emitter electrode of the PNP triode Q3_ H, one end of the driving resistor Rg _ H and the emitter electrode of the NPN triode Q2_ H respectively. The other end of the driving resistor Rg _ H is respectively connected with the base of the PNP triode Q3_ H, the base of the NPN triode Q2_ H, one end of the resistor R4_ H, the emitter of the PNP triode Q1_ H, the other end of the zener diode D1_ H, the other end of the resistor R1_ H and the other end of the capacitor C1_ H. The collector of the NPN triode Q2_ H is connected with the cathode of the fast recovery diode D2_ H, the anode of the fast recovery diode D2_ H is respectively connected with one end of the resistor R2_ H and one end of the capacitor C2_ H, and the collector of the PNP triode Q3_ H is respectively connected with one end of the resistor R3_ H and one end of the capacitor C3_ H. The negative electrode of the driving power source Vg _ H, the other end of the resistor R4_ H, the other end of the resistor R2_ H, the other end of the capacitor C2_ H, the other end of the resistor R3_ H and the other end of the capacitor C3_ H are simultaneously connected with the other end of the inductor Ls _ H.
The lower arm part includes: the driving circuit comprises a voltage stabilizing diode D1_ L, a fast recovery diode D2_ L, resistors R1_ L-R4 _ L, a driving power supply Vg _ L, capacitors C1_ L-C3 _ L, PNP, a triode Q1_ L, NPN, a triode Q2_ L, PNP, a triode Q3_ L and a driving resistor Rg _ L.
The positive electrode of the driving power supply Vg _ L is connected with one end of the zener diode D1_ L, one end of the resistor R1_ L, one end of the capacitor C1_ L and the collector electrode of the PNP triode Q1_ L respectively. The other end of the parasitic resistor Rg (in) L is respectively connected with the base electrode of the PNP triode Q1_ L, the emitting electrode of the PNP triode Q3_ L, one end of the driving resistor Rg _ L and the emitting electrode of the NPN triode Q2_ L. The other end of the driving resistor Rg _ L is respectively connected with the base of the PNP triode Q3_ L, the base of the NPN triode Q2_ L, one end of the resistor R4_ L, the emitter of the PNP triode Q1_ L, the other end of the voltage stabilizing diode D1_ L, the other end of the resistor R1_ L and the other end of the capacitor C1_ L. The collector of the NPN triode Q2_ L is connected with the cathode of the fast recovery diode D2_ L, the anode of the fast recovery diode D2_ L is respectively connected with one end of the resistor R2_ L and one end of the capacitor C2_ L, and the collector of the PNP triode Q3_ L is respectively connected with one end of the resistor R3_ L and one end of the capacitor C3_ L. The negative electrode of the driving power source Vg _ L, the other end of the resistor R4_ L, the other end of the resistor R2_ L, the other end of the capacitor C2_ L, the other end of the resistor R3_ L and the other end of the capacitor C3_ L are simultaneously connected with the power ground.
In this embodiment, taking the switching transient period of the upper arm as an example, the crosstalk suppression process analysis of the lower arm drive circuit is performed:
firstly, the forward crosstalk is suppressed, and as shown in fig. 6, in the switching-on transient state of the switch MOS _ H, the diodes of the switch MOS _ H channel and the switch MOS _ L commutate, the direct-current voltage source Vdc has significant overshoot, dv/dt interacts with the parasitic capacitance Cgd _ L of the switch MOS _ L to generate a misconduction current, and the current generates a forward spike voltage, that is, the forward crosstalk, through the driving resistor Rg _ L. At this time, the forward spike voltage triggers the PNP transistor Q3_ L to turn on, the capacitor C3_ L is connected in parallel with the parasitic capacitor Cgd _ L, and the capacitor C3_ L cuts off part of misconduction current, thereby weakening crosstalk. On the other hand, the PNP transistor Q1_ L and the NPN transistor Q2_ L are in an off state, and the capacitor C1_ L provides a stable off negative voltage, which is opposite to the positive peak voltage, so as to cancel the positive peak voltage actually connected to the gate source of the switching MOS _ L, and also effectively reduce the positive crosstalk. In this process, the gate driving circuit of the switch MOS _ L is in the operating state as shown in fig. 2, and the arrow direction in the figure indicates the direction of the misconduction current.
Referring to fig. 7, in the switching off transient state of the switch MOS _ H, the switch MOS _ L is still in the off state, and the capacitor C1_ H provides the switching off negative voltage for the switch MOS _ H, so as to accelerate the switching off process of the switch MOS _ H. Similarly, the dc voltage source Vdc has an obvious overshoot, dv/dt interacts with the parasitic capacitance Cgd _ L of the switch MOS _ L to generate a negative displacement current, and the negative displacement current passes through the driving resistor Rg _ L to generate a negative spike voltage, i.e., negative crosstalk. At this time, the negative spike voltage triggers the on state of the NPN transistor Q2_ L, the capacitor C2_ L is connected in parallel with the parasitic capacitor Cgs _ L, and the capacitor C2_ L splits off part of the displacement current, thereby weakening crosstalk. On the other hand, the PNP triode Q1_ L is also in a conducting state, the capacitor C1_ L is in short circuit, the negative voltage is prevented from being turned off to increase the negative spike voltage, and the defect of the method for inhibiting the positive crosstalk by the negative voltage is optimized. The working state of the gate driving circuit of the process switch MOS _ L is shown in fig. 3, and the arrow direction in the figure indicates the direction of the negative displacement current.
In the present embodiment, the drive circuit configurations of the upper and lower arms are the same, and in order to distinguish the upper and lower arms, the element name is added with _ H for the upper arm and _ L for the lower arm. The following description removes the suffixes for simplicity of explanation.
According to the SiC MOSFET crosstalk suppression driving circuit, the parallel voltage division structure formed by the capacitor C1, the resistor R1 and the resistor R4 can generate turn-off negative voltage at two ends of the capacitor C1 when the driving circuit is turned off, effectively suppress turn-on transient forward crosstalk, and simultaneously reduce the requirement on high speed of a driving chip. In order to prevent negative crosstalk of the negative-pressure-aggravated turn-off transient state, a PNP triode Q1 is connected in parallel with two ends of the capacitor C1, so that the negative crosstalk is enabled to short-circuit the capacitor C1 through the PNP triode Q1, and negative effects of negative-pressure turn-off are reduced. The capacitor C2 and the capacitor C3 are connected in parallel between the grid and the source of the SiC MOSFET, and are controlled to be merged into a driving loop only in a switching transient state by the NPN triode Q2 and the PNP triode Q3 respectively, so that negative effects brought by the parallel capacitors are reduced to the maximum extent while partial displacement currents are divided. The driving resistor Rg drives the three triodes to be switched on and off by utilizing peak voltages generated at two ends of the driving resistor Rg by crosstalk. The fast recovery diode D2 prevents the MOSFET from being incorporated into the capacitor C2 during normal operation. When the voltage across the capacitor C1 has a step, a current pulse of several hundred amperes is generated, and the addition of the zener diode D1 can effectively suppress the current pulse. The resistor R2 and the resistor R3 suppress current pulses on the capacitor C2 and the capacitor C3 due to voltage steps.
In terms of circuit element parameter design, the charging process of the capacitor C1 is the first step:
in order to control the PNP three-stage Q1 connected in parallel with the capacitor C1 to be in an off state, the NPN transistor Q2 that controls the auxiliary circuits of the resistor R2 and the capacitor C2 to work needs to be in an off state, that is, the maximum discharge current I generated by the RC parallel circuit composed of the capacitor C1, the resistor R1 and the resistor R4 should be ensuredC1(max) the voltage generated by the driving resistor Rg is less than 0.7V, which satisfies the following formula:
wherein, C1Is the capacitance value of the capacitor C1, VC1Terminal voltage of capacitor C1, R1Is the resistance of resistor R1, R4Is the resistance of resistor R4, Rg(eq)Is the resistance value of the resistor Rg, VgTo drive the voltage value of the power supply, CgsA capacitance value of the parasitic capacitance Cgs, RgIs the resistance of the driving resistor Rg.
In the turn-off transient state, the crosstalk displacement current flows through the driving resistor Rg and generates a potential difference at two ends of the driving resistor Rg, the potential difference not only conducts the NPN transistor Q2 to realize negative crosstalk current absorption, but also conducts the PNP transistor Q1 short-circuit capacitor C1 to prevent negative voltage from aggravating negative crosstalk, and the following formula is satisfied:
wherein the content of the first and second substances,
is the maximum value of the voltage across the driving resistor Rg, R2Is the resistance value of resistor R2, C2Is the capacitance value of the capacitor C2, CgsAnd CgdCapacitance values, V, of parasitic capacitances Cgs and Cgd, respectivelydcIs the voltage value of the dc voltage source Vdc.
And (3) utilizing LTspice software to set up a simulation platform, and comparing the traditional drive circuit with the crosstalk of the invention. The forward crosstalk waveform comparison is shown in fig. 4, in which the forward peak voltage of the conventional driving circuit is 2.76V, and the forward peak voltage of the novel crosstalk suppression driving circuit is-1.59V. A comparison of negative-going crosstalk waveforms is shown in fig. 5. The negative peak voltage of the traditional drive circuit is-4.52V, and the negative peak voltage of the novel crosstalk suppression drive circuit is-4.16V. The novel crosstalk suppression driving circuit provided by the invention has good crosstalk suppression capability, wherein the suppression effect on positive crosstalk is obvious, and the suppression effect on negative crosstalk is weaker because the negative crosstalk is originally much smaller. In summary, the SiC MOSFET crosstalk suppression driving circuit provided by the invention does not need to additionally increase a control signal, completely depends on passive triggering of a passive element, and has a simple structure.
Although the invention herein has been described with reference to particular embodiments, it is to be understood that these embodiments are merely illustrative of the principles and applications of the present invention. It is therefore to be understood that numerous modifications may be made to the illustrative embodiments and that other arrangements may be devised without departing from the spirit and scope of the present invention as defined by the appended claims. It should be understood that features described in different dependent claims and herein may be combined in ways different from those described in the original claims. It is also to be understood that features described in connection with individual embodiments may be used in other described embodiments.
Claims (10)
1. A cross talk suppression driving circuit of SiC MOSFETs is characterized in that a group of parallel voltage division structures are arranged between the gate and the source of each bridge arm SiC MOSFET, each parallel voltage division structure comprises a capacitor C1, a resistor R1 and a resistor R4,
one end of the capacitor C1, one end of the resistor R1 and one end of the resistor R4 are all connected with the grid electrode of the SiC MOSFET, and the other end of the capacitor C1, the other end of the resistor R1 and the other end of the resistor R4 are all connected with the source electrode of the SiC MOSFET.
2. The SiC MOSFET crosstalk suppression driving circuit according to claim 1, wherein a PNP transistor Q1 is connected in parallel with two ends of the capacitor C1, an emitter of the PNP transistor Q1 is connected with one end of the capacitor C1, a collector of the PNP transistor Q1 is connected with the other end of the capacitor C1, and a base of the PNP transistor Q1 is connected with a gate of the SiC MOSFET.
3. The SiC MOSFET crosstalk suppression driving circuit according to claim 1 or 2, wherein a capacitor C2 and a capacitor C3 are connected in parallel between the gate and the source of each bridge arm SiC MOSFET, an NPN transistor Q2 is connected in series between the capacitor C2 and the gate of the SiC MOSFET, and a PNP transistor Q3 is connected in series between the capacitor C3 and the gate of the SiC MOSFET.
4. The SiC MOSFET crosstalk suppression driving circuit according to claim 3, wherein the gate of the SiC MOSFET is connected to the emitter and the base of an NPN transistor Q2 and the emitter and the base of a PNP transistor Q3, respectively, the collector of the NPN transistor Q2 is connected to one end of a capacitor C2, the collector of the PNP transistor Q3 is connected to one end of a capacitor C3, and the other end of the capacitor C2 and the other end of the capacitor C3 are connected to the source of the SiC MOSFET simultaneously.
5. The SiC MOSFET crosstalk suppression driving circuit according to claim 4, wherein a driving resistor Rg is connected in series between an emitter and a base of the PNP triode Q3.
6. The SiC MOSFET crosstalk suppression driving circuit according to claim 4 or 5, wherein a fast recovery diode D2 is connected in series between the collector of the NPN transistor Q2 and one end of the capacitor C2,
the anode of the fast recovery diode D2 is connected to one end of the capacitor C2, and the cathode of the fast recovery diode D2 is connected to the collector of the NPN transistor Q2.
7. The SiC MOSFET crosstalk suppression driver circuit according to claim 6, wherein a resistor R2 is connected in parallel to two ends of a capacitor C2, and a resistor R3 is connected in parallel to two ends of a capacitor C3.
8. The SiC MOSFET crosstalk suppression driver circuit according to claim 1, 2, 4 or 5, wherein a zener diode D1 is connected in parallel to two ends of the capacitor C1,
the anode of the zener diode D1 is connected to one end of the capacitor C1, and the cathode of the zener diode D1 is connected to the other end of the capacitor C1.
9. The SiC MOSFET crosstalk suppression driving circuit according to claim 5, wherein the maximum discharge current generated by the parallel voltage division structure is less than 0.7V when the voltage generated by the driving resistor Rg flows.
10. The SiC MOSFET crosstalk suppression driver circuit of claim 5, wherein a maximum voltage across the driving resistor Rg is greater than 0.7V.
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Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2017075796A (en) * | 2015-10-13 | 2017-04-20 | トヨタ自動車株式会社 | Resolver signal input circuit |
| CN108988617A (en) * | 2018-08-22 | 2018-12-11 | 哈尔滨工业大学 | A kind of driving circuit and circuits improvement method of active suppression SiC MOSFET crosstalk phenomenon |
| CN111181362A (en) * | 2020-01-19 | 2020-05-19 | 山东大学 | High-anti-interference SiC MOSFET (Metal-oxide-semiconductor field Effect transistor) driving circuit, half-bridge circuit and working method |
| CN111262566A (en) * | 2020-03-13 | 2020-06-09 | 珠海格力电器股份有限公司 | Switch driving circuit for preventing misconduction and electrical equipment |
| CN111600461A (en) * | 2020-05-27 | 2020-08-28 | 山东大学 | Improved SiC MOSFET bridge arm crosstalk suppression driving circuit and method |
| CN111614234A (en) * | 2020-05-27 | 2020-09-01 | 电子科技大学 | Silicon carbide MOSFET bridge arm crosstalk suppression circuit |
| CN112737312A (en) * | 2020-12-28 | 2021-04-30 | 山东大学 | Drive circuit for inhibiting crosstalk of SiC MOSFET bridge circuit |
| US20210376721A1 (en) * | 2020-06-02 | 2021-12-02 | University Of Tennessee Research Foundation | Charge pump gate drive circuit for reduction in turn-on switching loss for mosfets |
| CN113872420A (en) * | 2021-09-23 | 2021-12-31 | 上海电机学院 | Improved gate drive circuit for inhibiting bridge arm crosstalk of SiC-MOSFET (silicon carbide-metal oxide semiconductor field effect transistor) |
-
2022
- 2022-05-18 CN CN202210542544.5A patent/CN114744861B/en active Active
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2017075796A (en) * | 2015-10-13 | 2017-04-20 | トヨタ自動車株式会社 | Resolver signal input circuit |
| CN108988617A (en) * | 2018-08-22 | 2018-12-11 | 哈尔滨工业大学 | A kind of driving circuit and circuits improvement method of active suppression SiC MOSFET crosstalk phenomenon |
| CN111181362A (en) * | 2020-01-19 | 2020-05-19 | 山东大学 | High-anti-interference SiC MOSFET (Metal-oxide-semiconductor field Effect transistor) driving circuit, half-bridge circuit and working method |
| CN111262566A (en) * | 2020-03-13 | 2020-06-09 | 珠海格力电器股份有限公司 | Switch driving circuit for preventing misconduction and electrical equipment |
| CN111600461A (en) * | 2020-05-27 | 2020-08-28 | 山东大学 | Improved SiC MOSFET bridge arm crosstalk suppression driving circuit and method |
| CN111614234A (en) * | 2020-05-27 | 2020-09-01 | 电子科技大学 | Silicon carbide MOSFET bridge arm crosstalk suppression circuit |
| US20210376721A1 (en) * | 2020-06-02 | 2021-12-02 | University Of Tennessee Research Foundation | Charge pump gate drive circuit for reduction in turn-on switching loss for mosfets |
| CN112737312A (en) * | 2020-12-28 | 2021-04-30 | 山东大学 | Drive circuit for inhibiting crosstalk of SiC MOSFET bridge circuit |
| CN113872420A (en) * | 2021-09-23 | 2021-12-31 | 上海电机学院 | Improved gate drive circuit for inhibiting bridge arm crosstalk of SiC-MOSFET (silicon carbide-metal oxide semiconductor field effect transistor) |
Non-Patent Citations (1)
| Title |
|---|
| 徐英辉: "SiC MOSFET高可靠性驱动技术研究", 《中国优秀硕士学位论文全文数据库 信息科技辑》 * |
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| CN114744861B (en) | 2023-03-10 |
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