CN114675733A - Method, system, terminal and storage medium for resetting functional chip by BMC (baseboard management controller) - Google Patents
Method, system, terminal and storage medium for resetting functional chip by BMC (baseboard management controller) Download PDFInfo
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- CN114675733A CN114675733A CN202210300095.3A CN202210300095A CN114675733A CN 114675733 A CN114675733 A CN 114675733A CN 202210300095 A CN202210300095 A CN 202210300095A CN 114675733 A CN114675733 A CN 114675733A
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- G06F1/24—Resetting means
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operation
- G06F11/1402—Saving, restoring, recovering or retrying
- G06F11/1415—Saving, restoring, recovering or retrying at system level
- G06F11/1441—Resetting or repowering
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Abstract
The invention relates to the technical field of servers, in particular to a method, a system, a terminal and a storage medium for resetting a function chip by BMC, which comprises the following steps: the BMC acquires monitoring information of each functional chip through a monitoring interface, and screens out fault functional chips according to the monitoring information; the BMC sends a reset signal to the fault function chip to the IO expansion chip through the connecting link, so that the IO expansion chip forwards the reset signal to the fault function chip, and the IO expansion chip is connected with the reset pin of each function chip. The invention can increase the stability of the server, save manpower and material resources for field detection and maintenance of maintenance personnel, and improve the competitiveness of products and the satisfaction degree of customers.
Description
Technical Field
The invention relates to the technical field of servers, in particular to a method, a system, a terminal and a storage medium for resetting a function chip by BMC.
Background
With the rapid development of various industry fields, the demand for servers is increasing. More and more clients apply the server as a core, correspondingly, higher requirements are put forward on the stability and reliability of the server, and whether the server can keep normal and stable operation also becomes the premise that the client service can be stably maintained. In the process of long-time operation of the server, a certain module may be in a failure state due to the influence of various factors. In the existing server, when a certain working module fails, the BMC records logs and reports the logs, and a professional maintenance worker maintains the logs. In most cases, the chip can be restored to normal only by resetting the hardware of the chip again due to program abnormality of the chip.
Disclosure of Invention
Aiming at the problems of low efficiency and lag existing in the existing fault chip repair, the invention provides a method, a system, a terminal and a storage medium for resetting a functional chip by BMC (baseboard management controller), so as to solve the technical problems.
In a first aspect, the present invention provides a method for resetting a functional chip by a BMC, including:
the BMC acquires monitoring information of each functional chip through a monitoring interface, and screens out fault functional chips according to the monitoring information;
the BMC sends a reset signal to the fault function chip to the IO expansion chip through the connecting link, so that the IO expansion chip forwards the reset signal to the fault function chip, and the IO expansion chip is connected with the reset pin of each function chip.
Further, the BMC sends a reset signal to the functional failure chip to the IO expansion chip through the connection link, including:
the BMC obtains the one-to-one corresponding connection relation between each extension pin position of the IO extension chip and each functional chip;
inquiring a target extension pin position corresponding to the fault function chip according to the connection relation;
the BMC sends a reset instruction to the IO expansion chip, and controls the IO expansion chip to send a reset signal to the fault function chip through the target expansion pin position through the reset instruction.
Further, after the BMC sends a reset signal to the IO expansion chip through the connection link, the method further includes:
the BMC continuously monitors whether the fault function chip is reset successfully:
if yes, resetting the fault function chip and successfully recording the reset fault function chip to a log;
if not, repeating the operation of sending the reset signal to the fault function chip until the repetition times reaches the set threshold value, and recording the reset process to a log.
In a second aspect, the present invention provides a system for resetting a functional chip by a BMC, including:
the chip monitoring unit is used for acquiring monitoring information of each functional chip through the monitoring interface by the BMC and screening out fault functional chips according to the monitoring information;
and the chip reset unit is used for sending a reset signal of the fault function chip to the IO expansion chip by the BMC through the connecting link so that the IO expansion chip forwards the reset signal to the fault function chip, and the IO expansion chip is connected with the reset pin of each function chip.
Further, the chip reset unit includes:
the relation acquisition module is used for acquiring the one-to-one corresponding connection relation between each extension pin position of the IO extension chip and each functional chip by the BMC;
the target determining module is used for inquiring a target extension pin position corresponding to the fault function chip according to the connection relation;
and the signal sending module is used for sending a reset instruction to the IO expansion chip by the BMC and controlling the IO expansion chip to send a reset signal to the fault function chip through the target expansion pin position by the reset instruction.
Further, the system further comprises:
the continuous monitoring unit is used for continuously monitoring whether the fault functional chip is successfully reset or not by the BMC;
the successful recording unit is used for successfully recording the resetting of the fault function chip to the log if the resetting of the fault function chip is successful;
and the failure recording unit is used for repeating the operation of sending the reset signal to the fault function chip if the fault function chip fails to reset until the repetition times reach the set threshold value, and recording the reset process to a log.
In a third aspect, a terminal is provided, including:
a processor, a memory, wherein,
the memory is used for storing a computer program which,
the processor is used for calling and running the computer program from the memory so as to make the terminal execute the method of the terminal.
In a fourth aspect, a computer storage medium is provided having stored therein instructions that, when executed on a computer, cause the computer to perform the method of the above aspects.
The method, the system, the terminal and the storage medium for resetting the functional chip by the BMC have the advantages that the IO expander with rich IO ports is connected to the reset pins of the functional chips and is connected with the BMC through the I2C link. When the BMC monitors that a certain chip is abnormal, the fault caused by the abnormal chip program can be quickly solved by independently resetting the chip by sending an I2C instruction on the premise of not influencing the normal work of the server, and the normal operation of the server function is maintained. The invention can increase the stability of the server, save manpower and material resources for field detection and maintenance of maintenance personnel, and improve the competitiveness of products and the satisfaction degree of customers.
In addition, the invention has reliable design principle, simple structure and very wide application prospect.
Drawings
In order to more clearly illustrate the embodiments or prior art solutions of the present invention, the drawings used in the description of the embodiments or prior art will be briefly described below, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.
FIG. 1 is a schematic flow diagram of a method of one embodiment of the invention.
Fig. 2 is a schematic structural diagram of a BMC monitoring interface of the method according to an embodiment of the present invention.
Fig. 3 is a schematic structural diagram of the BMC connecting the functional chip via the IO expansion chip according to the method of the embodiment of the present invention.
FIG. 4 is another schematic flow diagram of a method of one embodiment of the invention.
FIG. 5 is a schematic block diagram of a system of one embodiment of the present invention.
Fig. 6 is a schematic structural diagram of a terminal according to an embodiment of the present invention.
Detailed Description
In order to make those skilled in the art better understand the technical solution of the present invention, the technical solution in the embodiment of the present invention will be clearly and completely described below with reference to the drawings in the embodiment of the present invention, and it is obvious that the described embodiment is only a part of the embodiment of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The following explains key terms appearing in the present invention.
The BMC executes a server remote Management controller, which is called Basebard Management controller in English. The method can be used for upgrading the firmware of the machine, checking the equipment of the machine, and the like in the state that the machine is not started. Fully implementing IPMI functionality in a BMC requires a powerful 16-bit or 32-bit microcontroller as well as RAM for data storage, flash memory and firmware for non-volatile data storage, providing basic remote manageability in terms of secure remote restart, secure re-power-up, LAN alerts and system health monitoring. In addition to the basic IPMI function and system operation monitoring function, the mBMC enables selection and protection of BIOS flash devices by storing the previous BIOS using one of 2 flash memories. For example, when the system cannot be started after the remote BIOS is upgraded, the remote administrator can switch back to the BIOS image that worked before to start the system. Once BIOS is upgraded, BIOS image can be locked to prevent virus from invading it.
The I2C bus is a simple, bi-directional two-wire synchronous serial bus developed by Philips. It requires only two wires to transfer information between devices connected to the bus. The master device is used to initiate the bus to transfer data and to generate a clock to open up the devices that are transferring, when any addressed device is considered a slave device. If the host wants to send data to the slave device, the host addresses the slave device first, then actively sends the data to the slave device, and finally the host terminates the data transmission; the master device addresses the slave device first if the master device is to receive data from the slave device. The host is responsible for generating the timing clock and terminating the data transfer.
FIG. 1 is a schematic flow diagram of a method of one embodiment of the invention. The execution main body in fig. 1 may be a system of a BMC reset function chip.
As shown in fig. 1, the method includes:
and 120, the BMC sends a reset signal for the fault function chip to the IO expansion chip through the connecting link so that the IO expansion chip forwards the reset signal to the fault function chip, and the IO expansion chip is connected with the reset pin of each function chip.
When the BMC detects a fault of a certain device, the BMC sends corresponding information to the IO expander through the I2C link, and the IO expander pulls down a reset pin connected with the IO expander and placed into the fault device for a corresponding time to reset the device. If the equipment normally operates again after being reset, the BMC stops resetting the equipment and records a log; if the equipment is still in an abnormal state after being reset, the BMC sends a reset signal to the equipment again after a certain time, and if the equipment is still abnormal within a set number of times, the BMC stops resetting the equipment and records a log.
In order to facilitate understanding of the present invention, the method for resetting the BMC function chip according to the present invention is further described below with reference to the principle of the method for resetting the BMC function chip according to the present invention and the process of resetting the function chip in the embodiment.
Referring to fig. 2, the BMC includes various monitoring interfaces and can interface with various functional chips. As a baseboard management controller, the BMC monitors most of the functional chips of the server. The BMC is connected to each chip in the system through a different interface. When the chip fails, the BMC finds the abnormality and records the failure.
In order to reset the functional chips with the BMC, as shown in fig. 3, the BMC is connected to the IO extender chip through an I2C link, and is connected to the reset pin of each functional chip through the IO port of the IO extender.
Specifically, referring to fig. 4, the method for resetting the functional chip by the BMC includes:
and S1, the BMC acquires the monitoring information of each functional chip through the monitoring interface, and screens out the fault functional chip according to the monitoring information.
And when the system runs normally, the BMC monitors the normal running state of the server system. The BMC is connected to an IO expander through an I2C link, and the IO expander is connected to a hardware reset pin of each functional device.
S2, the BMC sends a reset signal of the fault function chip to the IO expansion chip through the connecting link, so that the IO expansion chip forwards the reset signal to the fault function chip, and the IO expansion chip is connected with the reset pin of each function chip.
When the BMC monitors that a certain device fails, the BMC resets the device by sending I2C information to the IO expander and setting the reset pin of the corresponding device to be valid by the IO expander.
After time t0, the BMC detects whether the corresponding function is normal. If the device returns to normal through resetting, the BMC stops sending the reset signal to the device and records the reset signal in the log.
After time t0, the BMC detects whether the corresponding function is normal. If the device does not return to normal, after the time t1 is timed, the BMC continues to send a reset signal to the device; the method comprises the steps that a certain threshold value exists in the frequency of sending reset signals to fault equipment by the BMC, when the frequency of sending the reset signals to the fault equipment is not smaller than the threshold value, the BMC stops resetting the fault equipment, records logs and uploads the logs, and professional maintenance personnel solve the problem.
As shown in fig. 5, the system 500 includes:
the chip monitoring unit 510 is used for the BMC to acquire monitoring information of each functional chip through the monitoring interface and screen out a fault functional chip according to the monitoring information;
and the chip reset unit 520 is used for sending a reset signal to the fault function chip to the IO expansion chip by the BMC through the connection link, so that the IO expansion chip forwards the reset signal to the fault function chip, and the IO expansion chip is connected with the reset pin of each function chip.
Optionally, as an embodiment of the present invention, the chip resetting unit includes:
the relation acquisition module is used for acquiring the one-to-one corresponding connection relation between each extension pin position of the IO extension chip and each functional chip by the BMC;
the target determining module is used for inquiring a target extension pin position corresponding to the fault function chip according to the connection relation;
and the signal sending module is used for sending a reset instruction to the IO expansion chip by the BMC and controlling the IO expansion chip to send a reset signal to the fault function chip through the target expansion pin position by the reset instruction.
Optionally, as an embodiment of the present invention, the system further includes:
the continuous monitoring unit is used for continuously monitoring whether the fault functional chip is successfully reset or not by the BMC;
the successful recording unit is used for successfully recording the resetting of the fault function chip to the log if the resetting of the fault function chip is successful;
and the failure recording unit is used for repeating the operation of sending the reset signal to the fault function chip if the fault function chip fails to reset until the repetition times reach the set threshold value, and recording the resetting process to a log.
Fig. 6 is a schematic structural diagram of a terminal 600 according to an embodiment of the present invention, where the terminal 600 may be used to execute the method for resetting the functional chip for BMC according to the embodiment of the present invention.
The terminal 600 may include: a processor 610, a memory 620, and a communication unit 630. The components communicate via one or more buses, and those skilled in the art will appreciate that the architecture of the servers shown in the figures is not intended to be limiting, and may be a bus architecture, a star architecture, a combination of more or less components than those shown, or a different arrangement of components.
The memory 620 may be used for storing instructions executed by the processor 610, and the memory 620 may be implemented by any type of volatile or non-volatile storage terminal or combination thereof, such as Static Random Access Memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk or optical disk. The executable instructions in memory 620, when executed by processor 610, enable terminal 600 to perform some or all of the steps in the method embodiments described below.
The processor 610 is a control center of the storage terminal, connects various parts of the entire electronic terminal using various interfaces and lines, and performs various functions of the electronic terminal and/or processes data by operating or executing software programs and/or modules stored in the memory 620 and calling data stored in the memory. The processor may be composed of an Integrated Circuit (IC), for example, a single packaged IC, or a plurality of packaged ICs connected with the same or different functions. For example, the processor 610 may include only a Central Processing Unit (CPU). In the embodiment of the present invention, the CPU may be a single operation core, or may include multiple operation cores.
A communication unit 630, configured to establish a communication channel so that the storage terminal can communicate with other terminals. And receiving user data sent by other terminals or sending the user data to other terminals.
The present invention also provides a computer storage medium, wherein the computer storage medium may store a program, and the program may include some or all of the steps in the embodiments provided by the present invention when executed. The storage medium may be a magnetic disk, an optical disk, a read-only memory (ROM) or a Random Access Memory (RAM).
Therefore, the invention uses the IO expander with rich IO ports to be connected to the reset pin of each functional chip and is connected with the BMC through the I2C link. When the BMC monitors that a certain chip is abnormal, the fault caused by the abnormal chip program can be quickly solved by independently resetting the chip by sending an I2C instruction on the premise of not influencing the normal work of the server, and the normal operation of the server function is maintained. The invention can increase the stability of the server, save manpower and material resources for field detection and maintenance of maintenance personnel, and improve the competitiveness and customer satisfaction of the product.
Those skilled in the art will readily appreciate that the techniques of the embodiments of the present invention may be implemented as software plus a required general purpose hardware platform. Based on such understanding, the technical solutions in the embodiments of the present invention may be substantially or partially embodied in the form of a software product, the computer software product is stored in a storage medium, such as a usb disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and various media capable of storing program codes include several instructions for enabling a computer terminal (which may be a personal computer, a server, or a second terminal, a network terminal, etc.) to execute all or part of the steps of the method in the embodiments of the present invention.
The same and similar parts in the various embodiments in this specification may be referred to each other. Especially, for the terminal embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant points can be referred to the description in the method embodiment.
In the several embodiments provided in the present invention, it should be understood that the disclosed system and method may be implemented in other manners. For example, the above-described system embodiments are merely illustrative, and for example, the division of the units is only one logical functional division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, systems or units, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.
Although the present invention has been described in detail by referring to the drawings in connection with the preferred embodiments, the present invention is not limited thereto. Various equivalent modifications or substitutions can be made on the embodiments of the present invention by those skilled in the art without departing from the spirit and scope of the present invention, and these modifications or substitutions are within the scope of the present invention/any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (8)
1. A method for resetting a functional chip by a BMC (baseboard management controller) is characterized by comprising the following steps:
the BMC acquires monitoring information of each functional chip through a monitoring interface, and screens out fault functional chips according to the monitoring information;
the BMC sends a reset signal to the failed functional chip to the IO expansion chip through the connecting link, so that the IO expansion chip forwards the reset signal to the failed functional chip, and the IO expansion chip is connected with the reset pin of each functional chip.
2. The method of claim 1, wherein the BMC sends a reset signal to the IO expansion chip to the failing functional chip via the connection link, comprising:
the BMC obtains the one-to-one corresponding connection relation between each extension pin position of the IO extension chip and each functional chip;
inquiring a target extension pin position corresponding to the fault function chip according to the connection relation;
the BMC sends a reset instruction to the IO expansion chip, and controls the IO expansion chip to send a reset signal to the fault function chip through the target expansion pin position through the reset instruction.
3. The method of claim 1, wherein after the BMC sends a reset signal to the IO expansion chip over the connection link to the malfunctioning chip, the method further comprises:
the BMC continuously monitors whether the fault function chip is reset successfully:
if yes, resetting the fault function chip and successfully recording the reset fault function chip to a log;
if not, repeating the operation of sending the reset signal to the fault function chip until the repetition times reaches the set threshold value, and recording the reset process to a log.
4. A system for resetting a functional chip by a BMC, comprising:
the chip monitoring unit is used for acquiring monitoring information of each functional chip through the monitoring interface by the BMC and screening out fault functional chips according to the monitoring information;
and the chip reset unit is used for sending a reset signal of the fault function chip to the IO expansion chip by the BMC through the connecting link so that the IO expansion chip forwards the reset signal to the fault function chip, and the IO expansion chip is connected with the reset pin of each function chip.
5. The system of claim 4, wherein the chip reset unit comprises:
the relation acquisition module is used for acquiring the one-to-one corresponding connection relation between each extension pin position of the IO extension chip and each functional chip by the BMC;
the target determining module is used for inquiring a target extension pin position corresponding to the fault functional chip according to the connection relation;
and the signal sending module is used for sending a reset instruction to the IO expansion chip by the BMC and controlling the IO expansion chip to send a reset signal to the fault function chip through the target expansion pin position by the reset instruction.
6. The system of claim 4, further comprising:
the continuous monitoring unit is used for continuously monitoring whether the fault functional chip is successfully reset or not by the BMC;
the successful recording unit is used for successfully resetting the fault function chip to record the fault function chip to the log if the fault function chip is successfully reset;
and the failure recording unit is used for repeating the operation of sending the reset signal to the fault function chip if the fault function chip fails to reset until the repetition times reach the set threshold value, and recording the reset process to a log.
7. A terminal, comprising:
a processor;
a memory for storing instructions for execution by the processor;
wherein the processor is configured to perform the method of any one of claims 1-3.
8. A computer-readable storage medium, in which a computer program is stored which, when being executed by a processor, carries out the method according to any one of claims 1-3.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210300095.3A CN114675733A (en) | 2022-03-25 | 2022-03-25 | Method, system, terminal and storage medium for resetting functional chip by BMC (baseboard management controller) |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210300095.3A CN114675733A (en) | 2022-03-25 | 2022-03-25 | Method, system, terminal and storage medium for resetting functional chip by BMC (baseboard management controller) |
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| CN114675733A true CN114675733A (en) | 2022-06-28 |
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Application publication date: 20220628 |