CN114666993A - PCB preparation method and PCB - Google Patents
PCB preparation method and PCB Download PDFInfo
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- CN114666993A CN114666993A CN202210301149.8A CN202210301149A CN114666993A CN 114666993 A CN114666993 A CN 114666993A CN 202210301149 A CN202210301149 A CN 202210301149A CN 114666993 A CN114666993 A CN 114666993A
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Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/243—Reinforcing the conductive pattern characterised by selective plating, e.g. for finish plating of pads
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/26—Cleaning or polishing of the conductive pattern
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
The application discloses a PCB preparation method and a PCB, wherein the preparation method comprises the following steps: providing a PCB to be manufactured, wherein the PCB to be manufactured is provided with a through hole penetrating from an element surface to a welding surface; etching all outer layer patterns on the element surface and the welding surface of the PCB to be manufactured at one time; coating or attaching a conductive material on the opposite surface of a specific area of the PCB to be manufactured to form a conductive material layer, wherein the conductive material is a fluid material with conductivity or a solid material with conductivity and containing an adhesive component; and performing a gold plating process for the specific region. By adopting the preparation method of the PCB disclosed by the application, the processing flow of the PCB can be shortened, the current distribution is reduced, and the problem of secondary alignment of the outer layer pattern is avoided.
Description
Technical Field
The application relates to the technical field of Printed Circuit Boards (PCBs), in particular to a PCB preparation method and a PCB.
Background
For testing of packaged semiconductor products, it is generally desired that the service life of the PCB (also referred to as a test board) used for the test is long, and thus the PCB used for the test is required to be processed in a gold-plated manner in a region corresponding to the packaged semiconductor products. For example, for testing of BGA (Ball Grid Array) packaged products, it is often required that the PCB used for testing be processed with gold-clad gold on all sides in the region corresponding to the BGA packaged products.
There are currently two methods of gold plating for specific areas on a PCB: (1) gold plating was performed using a conventional method of pulling a wire. However, the areas of the PCB corresponding to the packaged semiconductor products are typically closely spaced, and PADs (i.e., PADs) typically belong to multiple networks and are not electrically conductive. Therefore, this method is often limited to too small a pitch to process, or uneven current distribution due to uneven lead distribution, which leads to uneven thickness and appearance during gold plating; (2) gold plating with copper skin on the back of the specific area, the PAD can be conducted through the through hole at the specific area and the current distribution is relatively uniform. However, this method requires two etching processes, and further requires 2 to 3 wet film processes and 5 dry film processes, which is complicated and affects the working period and cost.
Disclosure of Invention
Embodiments of the present application aim to address at least one of the problems of the prior art. Therefore, the embodiment of the application provides a PCB preparation method and a PCB, so as to shorten the PCB processing flow and reduce the problem of uneven current distribution.
An embodiment of one aspect of the present application provides a method of manufacturing a PCB. The preparation method comprises the following steps:
providing a PCB to be manufactured, wherein the PCB to be manufactured is provided with a through hole penetrating from an element surface to a welding surface;
etching all outer layer patterns on the element surface and the welding surface of the PCB to be manufactured at one time;
coating or attaching a conductive material on the opposite surface of a specific area of the PCB to be manufactured to form a conductive material layer, wherein the conductive material is a fluid material with conductivity or a solid material with conductivity and containing an adhesive component; and
and performing gold plating treatment on the specific area.
Further, the outer layer pattern includes a circuit pattern and a pad of the specific region.
Further, the specific region includes a region on the PCB corresponding to the BGA package product, and the pads of the specific region include BGA pads.
Further, the conductive material includes at least one of a conductive paste, a conductive ink, a conductive paste, and a conductive paint.
Further, the conductive material layer is a conductive adhesive layer, and the material of the conductive adhesive layer comprises thermal peeling conductive adhesive.
Further, the preparation method further includes, before the gold plating process is performed on the specific region: and covering a wet film or a dry film on the conductive material layer to form an electroplating-resistant layer.
Further, the preparation method further includes, after the gold plating process is performed on the specific region: removing the plating resist layer; and removing the conductive material layer.
Further, after removing the conductive material layer, the preparation method further includes: cleaning the opposite surface of the specific area with acetone organic solvent.
Further, before completing the manufacture of all outer layer patterns by one-time etching, the preparation method further comprises the following steps: and carrying out full-board copper plating on the PCB to be manufactured.
The technical scheme of the preparation method of the PCB in the embodiment of the application at least has the following beneficial effects: plating is performed by coating or attaching conductive materials on opposite surfaces of a specific area of the PCB to be fabricated, and conducting all networks on the specific area of the PCB by means of the conductive materials. The preparation method can avoid the problem of uneven current distribution caused by the traditional method of carrying out gold plating by drawing a lead. In addition, the preparation method in the embodiment of the application completes the one-time etching processing of the outer layer pattern of the PCB, reduces the unnecessary increase of the process flow caused by the two-time etching of the outer layer pattern (one of the traditional preparation methods is to arrange a copper sheet on the back of a specific area of the PCB and carry out gold plating by means of the conduction of the through hole, but the traditional method needs to carry out the two-time etching of the outer layer pattern), and also avoids the secondary alignment problem of the outer layer pattern.
An embodiment of another aspect of the present application provides a PCB. The PCB is manufactured by the manufacturing method of the PCB in any one of the technical schemes. Therefore, the PCB in the embodiment of the present application has the beneficial effects brought by the foregoing preparation method, and is not described herein again.
Additional aspects and advantages of the present application will be set forth in part in the description which follows. In part, therefore, will be apparent from the following description, or may be learned by practice of the application.
Drawings
FIG. 1 is a schematic flow chart of a method of making a PCB in some embodiments of the present application;
FIG. 2 is a schematic flow chart of a method of fabricating a PCB according to further embodiments of the present application;
fig. 3(a) to 3(g) are schematic product form diagrams showing important steps in one embodiment of the present application, wherein:
FIG. 3(a) is the PCB after the whole board is plated with copper;
FIG. 3(b) is the PCB after the outer layer pattern is etched;
FIG. 3(c) is the PCB after the conductive adhesive is attached;
FIG. 3(d) is the PCB after the dry film is covered on the conductive adhesive layer;
fig. 3(e) is a PCB after gold plating of a region on the PCB corresponding to the BGA package product;
FIG. 3(f) is the PCB after stripping;
fig. 3(g) shows the PCB after the conductive paste layer is removed.
In the figure:
1-PCB; 10-element face, 20-welding face; 30-a via hole; 40-copper plating; 50-a conductive adhesive layer; 60-dry film layer; 70-gold plating.
Detailed Description
Reference will now be made in detail to embodiments of the present application, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the accompanying drawings are illustrative and are only for the purpose of explaining the present application and are not to be construed as limiting the present application. The technical solutions in the embodiments of the present application may be combined with each other based on the realization of those skilled in the art.
References in this application to words such as "first" or "second" are used for descriptive purposes only and are not to be construed as indicating or implying any relative importance or implicit to the number of technical features indicated.
In order to meet the testing requirements of semiconductor package products, it is generally required that the corresponding region of the PCB used for testing has high oxidation resistance, wear resistance, electrical conductivity, and the like, so that the PCB used for testing (i.e., the testing board) can be used many times, thereby prolonging the service life of the PCB used for testing. And the requirements of oxidation resistance, wear resistance, conductivity and the like are met, and gold plating is required to be carried out on the corresponding area of the PCB. For example, a PCB used for testing a semiconductor product of a BGA package should be subjected to a gold plating process at a region corresponding to a BGA pad.
An embodiment of one aspect of the present application provides a method of manufacturing a PCB. Referring to fig. 1, the preparation method includes:
step S100: a PCB to be manufactured is provided with a through hole penetrating from a component surface to a welding surface. The back of the element surface is a bonding surface.
Step S300, etching all outer layer patterns on the element surface and the welding surface of the PCB to be manufactured at one time;
step S400, coating or attaching a conductive material on the opposite surface of the specific area of the PCB to be manufactured to form a conductive material layer;
step S600, performing gold plating treatment on the specific area.
As previously mentioned, after the integrated circuit or discrete component is mounted on the PCB, related tests may be performed. The "specific area" in the present application corresponds to a position of a test object for a subsequent test on the PCB. For example, the integrated circuit product of the BGA package is tested, and the specific area refers to a position area where the integrated circuit product of the subsequent BGA package is mounted on the PCB.
By "opposing surface" is meant a surface opposite a surface on which an integrated circuit product, such as a BGA package, is mounted to a component side of a PCB, and then the opposing surface is meant a solder side of the PCB.
The gold plating may be hard gold plating (i.e., alloy plating), and specifically, nickel gold plating may be used. It is understood that electroplated soft gold (soft gold is understood to be pure gold) may also be used, depending on the circumstances.
The conductive material is a fluid material having conductivity or a solid material having conductivity and containing a binder component. In the conventional gold plating method, the lead wire has no binder component. Compared with a mode of taking the lead as a conductive material, the conductive material in the embodiment of the application has high line resolution and is suitable for finer lead spacing, so that the problem that the traditional mode of pulling the lead cannot process gold due to too small spacing is solved to a certain extent.
The conductive material may be in the form of a fluid or may be in the form of a solid (e.g., a solid such as a conductive tape). The conductive material layer can be formed by selectively coating or attaching the conductive material according to the conductive material. The element side of the PCB is electrically connected to the conductive material layer on the soldering side by means of vias through the PCB, thus enabling gold plating.
The outer layer pattern of the PCB is etched and processed at one time, so that unnecessary increase of process flow caused by etching the outer layer pattern twice is reduced, and the problem of secondary alignment of the outer layer pattern is also avoided. One of the conventional preparation methods is to dispose a copper sheet on the back of a specific area of a PCB and perform gold plating by means of via hole conduction, but this conventional method requires two times of etching of an outer layer pattern: (1) performing a first etching pattern to form a bonding pad (such as a BGA bonding pad) in a specific area; (2) gold plating the specific area (e.g., BGA pad location) by means of the conduction of the via and the copper skin of the backside of the specific area; (3) and performing second etching pattern to form a circuit pattern of the PCB.
Plating is performed by coating or attaching conductive materials on opposite surfaces of a specific area of a PCB to be fabricated, and conducting a network on the specific area of the PCB by means of the conductive material layer and the via holes. The preparation method can avoid the problem of uneven current distribution caused by the traditional method of carrying out gold plating by drawing a lead.
In some embodiments of the present application, the outer layer pattern includes a circuit pattern and a pad of a specific area. "circuit pattern" refers to a circuit connection pattern that is typically present on a PCB. The pads are used to connect certain components (e.g., an integrated circuit packaged with a BGA), and thus are the basic building blocks of a surface mount assembly. "land-specific" is a pattern of basic building blocks on a PCB for connecting specific components. According to the embodiment of the application, the two patterns are completed in one etching process, so that the problem of secondary alignment of the outer layer pattern etched twice is avoided, and the preparation process of the PCB is simplified.
Specifically, in some embodiments of the present application, the specific component is a BGA package product, the specific region includes a region on the PCB corresponding to the BGA package product, and the pads of the specific region include BGA pads.
In some embodiments of the present application, the conductive material includes at least one of a conductive paste, a conductive ink, a conductive paste, and a conductive paint.
The conductive adhesive may be in the form of a fluid or solid conductive tape, and contains a binder component. The conductive adhesive has certain conductivity after being cured or dried, and usually takes matrix resin and conductive filler (namely conductive particles) as main components, and the conductive particles are combined together through the bonding action of the matrix resin to form a conductive path so as to realize the conductive connection of the bonded materials. The conductive filler may be a compound of an element such as gold, silver, copper, aluminum, iron, zinc, or nickel, or may be graphite. The conducting resin in the embodiment of the application comprises conductive silver paste, the conductive silver paste is also called silver conductive paste, and the conductive silver paste can be divided into two types: polymer silver conductive paste (dried or solidified into film and organic polymer as adhesive phase) and sintered silver conductive paste (sintering into film, sintering temperature is higher than 500 ℃, glass powder or oxide as adhesive phase).
The conductive ink is made of a conductive material, has a certain conductive property and can be used for printing conductive points or conductive circuits; the conductive paste is a soft paste body which is prepared by grinding, dispersing and modifying and refining mineral oil, synthetic lipid oil and silicone oil which are used as base oil and added with additives with special functions of conductivity, oxidation resistance, corrosion resistance, arc suppression and the like; the conductive paint comprises conductive paint, and the conductive paint adopts composite particles containing copper or silver and the like as conductive particles, and is paint with better conductive performance.
It is understood that the conductive material may also be other kinds of conductive materials such as conductive resin including conductive rubber.
Further, in some embodiments of the present application, the conductive material layer is a conductive adhesive layer, and the material of the conductive adhesive layer is a thermal peeling conductive adhesive.
The conductive adhesive has the advantage of high linear resolution, and does not contain lead and other toxic metals, so the conductive adhesive is an environment-friendly adhesive. In addition, the conductive adhesive can be connected at low temperature, and is particularly suitable for interconnection of thermosensitive components; the conductive paste can be attached to different substrates, including interconnects of ceramics, glass, and other non-solderable surfaces. The conductive adhesive also has good flexibility and fatigue resistance.
The hot-peeling conductive adhesive has reduced viscosity and even loses viscosity under the heating action, thereby being convenient to peel and realizing little or even no residual adhesive.
Referring to fig. 2, in some embodiments of the present application, the method further includes, before performing the gold plating process on the specific region: step S500: and covering the conductive material layer with a wet film or a dry film to form an electroplating-resistant layer.
The wet film is mostly a photosensitive ink, specifically a photosensitive ink which is sensitive to ultraviolet rays and can be cured by ultraviolet rays. The dry film is a high molecular material, and can generate polymerization reaction after being irradiated by ultraviolet rays to form a stable substance to be attached to the board surface, thereby achieving the effect of blocking electroplating and etching. The wet film and the dry film both have the function of blocking electroplating. And (3) a wet film or a dry film is arranged on the conductive material layer so as to close the via hole on the PCB to be manufactured, the conductive material layer also has a protection effect, so that when the gold plating treatment is carried out on the specific area, the opposite surface (namely the surface opposite to the specific area) of the specific area is not electroplated, for example, when the gold plating is carried out on the BGA pad area on the component surface, the welding surface is not electroplated.
The operation of covering the dry film is to press the dry film, for example, to peel off the polyethylene protective film from the dry film, and to adhere a dry film resist or the like to the PCB to be fabricated under heat and pressure. The method of covering the wet film is to coat the wet film, for example, by roll coating, spray coating, dip coating, screen printing, or the like.
With continuing reference to fig. 2, in some embodiments of the present application, the method further comprises, after performing the gold plating process on the specific region: step S700: removing the anti-plating layer; and step S800: the layer of conductive material is removed, thereby removing material necessary for the intermediate process but not part of the final form of the PCB.
Specifically, removing the plating resist layer is stripping. The film can be removed by sodium hydroxide solution to expose the non-circuit copper layer. The removing of the conductive material layer may be specifically tearing off the conductive adhesive layer.
Further, in some embodiments of the present application, in order to further reduce or avoid residues after removing the conductive material layer, the preparation method further includes, after removing the conductive material layer: the opposite surfaces of the specific area are cleaned with acetone organic solvent. The acetone organic solvent has better cleaning effect on most resin materials, and particularly removes the possibly residual conductive adhesive.
With continuing reference to fig. 2, in some embodiments of the present application, the method further includes, before completing the formation of the entire outer layer pattern by one etching step: step S100: and carrying out whole-board copper plating on the PCB to be manufactured. The electroplated copper is deposited on the surface of the PCB to be manufactured so as to form a uniform, compact and well-bonded electroplated copper layer, so as to protect the chemical copper deposited on the surface of the PCB to be manufactured in the early stage.
Embodiments of another aspect of the present application further provide a PCB, which is manufactured by the manufacturing method of any one of the foregoing embodiments.
To facilitate understanding of the technical solution of the present application, the following text describes a specific embodiment of the present application, i.e., a PCB manufactured for testing a BGA packaged semiconductor product, with reference to fig. 3(a) to 3 (g). The PCB is required to be subjected to a gold plating process at a specific region on the PCB corresponding to a mounting position of the BGA-packaged semiconductor product or the like.
As shown in fig. 3(a), the PCB1 to be fabricated is subjected to full board copper plating (also referred to as board electroplating) so that electroplated copper is deposited on the surface of the PCB1 to be fabricated, forming a copper plated layer 40. Fig. 3(a) also shows that the PCB1 to be fabricated has vias 30, the vias 30 penetrating from the component face 10 to the soldering face 20. In the orientation shown in fig. 3(a), the component face 10 is located on the upper surface of the PCB1, and the bonding face 20 is located on the lower surface of the PCB 1. After the entire board is plated with copper, a copper plating layer 40 is deposited on both the component side 10 and the bonding side 20.
As shown in fig. 3(b), the entire outer layer pattern is formed by etching at once on the component side 10 and the bonding side 20 of the PCB1 to be formed. All outer layer patterns include the normal circuit pattern of the PCB and the pad pattern of the BGA.
As shown in fig. 3 c, a conductive paste is applied to the back surface of the designed BGA pad position on the PCB1 to be formed (the designed BGA pad position is on the device surface 10, and the back surface of the designed BGA pad position, i.e., the designed BGA pad position on the soldering surface 20), to form a conductive paste layer 50. In fig. 3(c), the pattern left after the last etching of the device surface 10 includes BGA pads.
As shown in fig. 3(d), a dry film is coated on the conductive paste layer 50 to form an electroplating resist layer, i.e., a dry film layer 60. The dry film layer 60 shields and seals the via hole 30 and protects the conductive adhesive layer 50.
As shown in fig. 3(e), a gold plating process is performed on the designed positions of the BGA pads on the device surface 10 to form gold plating layers 70.
As shown in fig. 3(f), the dry film layer 60 is subjected to a film stripping treatment;
as shown in fig. 3(g), the conductive adhesive layer 50 is peeled off, leaving as little adhesive residue as possible. Thus, the PCB1 in the embodiment of the present application is completed.
While embodiments of the present application have been shown and described, it will be understood by those of ordinary skill in the art that: various changes, modifications, substitutions and alterations can be made to the embodiments without departing from the principles and spirit of the application, the scope of which is defined by the claims and their equivalents.
Claims (10)
1. A method for preparing a PCB is characterized by comprising the following steps:
providing a PCB to be manufactured, wherein the PCB to be manufactured is provided with a through hole penetrating from an element surface to a welding surface;
etching all outer layer patterns on the element surface and the welding surface of the PCB to be manufactured at one time;
coating or attaching a conductive material on the opposite surface of a specific area of the PCB to be manufactured to form a conductive material layer, wherein the conductive material is a fluid material with conductivity or a solid material with conductivity and containing an adhesive component; and
and performing gold plating treatment on the specific area.
2. The method of claim 1, wherein the outer layer pattern comprises a circuit pattern and a pad of the specific area.
3. The method of claim 2, wherein the specific area includes an area of the PCB corresponding to a BGA package product, and the pads of the specific area include BGA pads.
4. The method of claim 1, wherein the conductive material comprises at least one of conductive paste, conductive ink, conductive paste, and conductive paint.
5. The method as claimed in claim 4, wherein the conductive material layer is a conductive adhesive layer, and the material of the conductive adhesive layer comprises a thermal peeling conductive adhesive.
6. The method of claim 1, further comprising, before the gold plating process for the specific region: and covering a wet film or a dry film on the conductive material layer to form an electroplating-resistant layer.
7. The method of claim 6, further comprising, after the gold plating process is performed on the specific region:
removing the plating resist layer;
and removing the conductive material layer.
8. The method of claim 7, further comprising, after removing the conductive material layer:
cleaning the opposite surface of the specific area with acetone organic solvent.
9. The method for preparing a PCB of claim 1, wherein before completing the manufacture of all outer layer patterns by one etching, the method further comprises the following steps:
and carrying out full-board copper plating on the PCB to be manufactured.
10. A PCB manufactured by the method of manufacturing a PCB of any of claims 1 to 9.
Priority Applications (2)
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CN202210301149.8A CN114666993A (en) | 2022-03-25 | 2022-03-25 | PCB preparation method and PCB |
PCT/CN2022/099823 WO2023178851A1 (en) | 2022-03-25 | 2022-06-20 | Preparation method for pcb, and pcb |
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CN202210301149.8A CN114666993A (en) | 2022-03-25 | 2022-03-25 | PCB preparation method and PCB |
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CN202210301149.8A Pending CN114666993A (en) | 2022-03-25 | 2022-03-25 | PCB preparation method and PCB |
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WO (1) | WO2023178851A1 (en) |
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US7045460B1 (en) * | 2005-01-04 | 2006-05-16 | Nan Ya Printed Circuit Board Corporation | Method for fabricating a packaging substrate |
US20070264750A1 (en) * | 2006-05-09 | 2007-11-15 | Advanced Semiconductor Engineering Inc. | Method of Manufacturing the Substrate for Packaging Integrated Circuits |
CN102014579A (en) * | 2010-11-24 | 2011-04-13 | 深南电路有限公司 | Gold-plating method of long and short golden fingers |
WO2017071393A1 (en) * | 2015-10-29 | 2017-05-04 | 广州兴森快捷电路科技有限公司 | Printed circuit board and fabrication method therefor |
CN113630962A (en) * | 2021-07-01 | 2021-11-09 | 广州兴森快捷电路科技有限公司 | Printed circuit board manufacturing method based on four-side gold-clad process and printed circuit board |
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Publication number | Priority date | Publication date | Assignee | Title |
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JP2005064012A (en) * | 2003-08-11 | 2005-03-10 | Daisho Denshi:Kk | Printed wiring board and its manufacturing method |
CN102014584B (en) * | 2010-11-24 | 2012-12-26 | 深南电路有限公司 | Process for manufacturing whole gold-plated board |
CN102014582B (en) * | 2010-11-24 | 2012-05-09 | 深南电路有限公司 | Process for manufacturing whole gold-plated board |
CN110678004B (en) * | 2019-09-19 | 2023-02-17 | 胜宏科技(惠州)股份有限公司 | Manufacturing method of PCB for charging pile |
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2022
- 2022-03-25 CN CN202210301149.8A patent/CN114666993A/en active Pending
- 2022-06-20 WO PCT/CN2022/099823 patent/WO2023178851A1/en unknown
Patent Citations (5)
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US7045460B1 (en) * | 2005-01-04 | 2006-05-16 | Nan Ya Printed Circuit Board Corporation | Method for fabricating a packaging substrate |
US20070264750A1 (en) * | 2006-05-09 | 2007-11-15 | Advanced Semiconductor Engineering Inc. | Method of Manufacturing the Substrate for Packaging Integrated Circuits |
CN102014579A (en) * | 2010-11-24 | 2011-04-13 | 深南电路有限公司 | Gold-plating method of long and short golden fingers |
WO2017071393A1 (en) * | 2015-10-29 | 2017-05-04 | 广州兴森快捷电路科技有限公司 | Printed circuit board and fabrication method therefor |
CN113630962A (en) * | 2021-07-01 | 2021-11-09 | 广州兴森快捷电路科技有限公司 | Printed circuit board manufacturing method based on four-side gold-clad process and printed circuit board |
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WO2023178851A1 (en) | 2023-09-28 |
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