CN114661086A - Band-gap reference voltage source circuit - Google Patents
Band-gap reference voltage source circuit Download PDFInfo
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- CN114661086A CN114661086A CN202111534818.8A CN202111534818A CN114661086A CN 114661086 A CN114661086 A CN 114661086A CN 202111534818 A CN202111534818 A CN 202111534818A CN 114661086 A CN114661086 A CN 114661086A
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
- G05F1/567—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for temperature compensation
Abstract
The invention discloses a band-gap reference voltage source circuit, which comprises a pre-adjusting voltage circuit, a voltage-regulating circuit and a voltage-regulating circuit, wherein the pre-adjusting voltage circuit is used for generating pre-adjusting voltage; the pseudo-cascode gate mirror circuit is connected with the pre-regulation voltage circuit and used for carrying out current mirror processing according to the pre-regulation voltage to generate a first voltage signal and a second voltage signal with equal voltage values; the negative feedback operational amplifier loop is connected with the pre-regulation voltage circuit and the pseudo-cascode current mirror circuit and is used for carrying out negative feedback regulation processing on the first voltage signal and the second voltage signal according to the pre-regulation voltage so as to ensure that the voltage values of the first voltage signal and the second voltage signal are kept equal and outputting corresponding band gap reference voltage; the boosting circuit is connected with the negative feedback operational amplifier loop and used for boosting the band gap reference voltage; and the pre-regulation voltage circuit is connected with the booster circuit and is also used for updating the pre-regulation voltage according to the boosted band gap reference voltage. The invention effectively saves the area and power consumption of the chip and improves the PSRR performance of the band-gap reference voltage.
Description
Technical Field
The invention belongs to the technical field of integrated circuit design, and particularly relates to a band-gap reference voltage source circuit.
Background
The reference voltage is one of the basic analog cell circuits in integrated circuit design. The reference Voltage may provide a Voltage that does not vary with temperature and power Voltage to other modules of the system, such as Analog-to-Digital Converter (ADC), Digital-to-Analog Converter (DAC), power management and Voltage Controlled Oscillator (VCO), and other module circuits. Therefore, the reference voltage is an important aspect of current integrated circuit design.
Base-emitter voltage V of Bipolar Junction Transistor (BJT for short)BEExhibiting a negative temperature coefficient characteristic. Difference DeltaV of base-emitter voltages of two bipolar transistors at unequal collector currentsBEProportional to absolute temperature, i.e., exhibiting a positive temperature coefficient characteristic. The basic principle of generating the bandgap reference voltage is as follows: using VBEVoltage of negative temperature coefficient and Δ VBEThe positive temperature coefficient voltages are added with proper weight to obtain a band gap reference voltage with zero temperature coefficient. Most of the proposed bandgap reference voltage source circuits need an additional starting circuit to eliminate the existence of a degenerate point, otherwise, the bandgap reference voltage source circuits cannot work after the power supply is powered on; in addition, in practical applications, the fluctuation of the Power Supply voltage also affects the precision of the bandgap reference voltage, so that these circuits affected by the fluctuation of the Power Supply voltage all use an external linear regulator to Supply Power to the bandgap reference voltage source circuit alone, so as to improve the Power Supply Rejection Ratio (PSRR) of the bandgap reference voltage source circuit.
However, the above-mentioned manner of additionally designing the start-up circuit and the additional linear regulator has a limited improvement of PSRR performance of the bandgap reference voltage source circuit, and increases the area and power consumption of the chip.
Disclosure of Invention
In order to solve the above problems in the prior art, the present invention provides a bandgap reference voltage source circuit. The technical problem to be solved by the invention is realized by the following technical scheme:
the embodiment of the invention provides a band-gap reference voltage source circuit, which comprises a pre-regulation voltage circuit, a pseudo-cascode gate mirror circuit, a negative feedback operational amplifier loop and a booster circuit, wherein,
the pre-regulation voltage circuit is used for generating pre-regulation voltage;
the pseudo-cascode gate mirror circuit is connected with the pre-regulation voltage circuit and used for carrying out current mirror processing according to the pre-regulation voltage to generate a first voltage signal and a second voltage signal with equal voltage values;
the negative feedback operational amplifier loop is connected with the pre-regulation voltage circuit and the pseudo-cascode gate mirror circuit, and is used for performing negative feedback regulation processing on the first voltage signal and the second voltage signal according to the pre-regulation voltage to ensure that the voltage values of the first voltage signal and the second voltage signal are equal and outputting corresponding band-gap reference voltages;
the boosting circuit is connected with the negative feedback operational amplifier loop and is used for boosting the band gap reference voltage;
and the pre-regulation voltage circuit is connected with the booster circuit and is also used for updating the pre-regulation voltage according to the boosted band gap reference voltage.
In one embodiment of the invention, the pre-conditioning voltage circuit comprises a resistor R1, a transistor NM1, and a transistor NM2, wherein,
one end of the resistor R1 and the drain of the transistor NM1 are connected with a power supply voltage VDD, the gate of the transistor NM1 is connected with the other end of the resistor R1 and the drain of the transistor NM2, the source of the transistor NM1 is connected with the pseudo-common source common gate current mirror circuit, the negative feedback operational amplifier loop and the booster circuit, the gate of the transistor NM2 is connected with the negative feedback operational amplifier loop, and the source of the transistor NM2 is connected with GND.
In one embodiment of the invention, the pseudo-cascode current mirror circuit comprises transistors PM 1-PM 4, wherein,
the source of the transistor PM1, the source of the transistor PM2 are connected to the pre-regulation voltage circuit, the gate of the transistor PM1 is connected to the gate of the transistor PM2, the gate of the transistor PM3, the drain of the transistor PM3, the gate of the transistor PM4, the negative feedback op-amp loop, and the output terminal of the first voltage signal, the drain of the transistor PM1 is connected to the source of the transistor PM3, the drain of the transistor PM2 is connected to the source of the transistor PM4, and the drain of the transistor PM4 is connected to the negative feedback op-amp loop and the output terminal of the second voltage signal.
In one embodiment of the invention, the negative feedback operational amplifier loop comprises transistors PM 5-PM 8, a transistor NM3, a transistor NM4, a transistor Q1, a transistor Q2, a resistor R2 and a resistor R3, wherein,
a source of the transistor PM5 is connected to the pre-adjustment voltage circuit, a gate of the transistor PM5 is connected to a gate of the transistor PM2, a gate of the transistor PM6 is connected to a gate of the transistor PM4, a drain of the transistor PM5 is connected to a source of the PM6, a drain of the transistor PM6 is connected to a source of the transistor PM7 and a source of the transistor PM8, a gate of the transistor PM7 is connected to an output terminal of the first voltage signal and a collector of the transistor Q1, a drain of the transistor PM7 is connected to a drain of the transistor NM3, a gate of the transistor NM3 and a gate of the transistor NM4, a source of the transistor NM3 and a source of the transistor NM4 are grounded to GND, a gate of the transistor PM8 is connected to an output terminal of the second voltage signal and a collector of the transistor Q2, a drain of the transistor PM8 is connected to a drain of the transistor NM4, The base of the triode Q1 is connected with the base of the triode Q2, the boost circuit and the output end of the band-gap reference voltage, the emitter of the triode Q1 is connected with one end of the resistor R2, the other end of the resistor R2 is connected with the emitter of the triode Q2 and one end of the resistor R3, and the other end of the resistor R3 is grounded GND.
In one embodiment of the present invention, the ratio of the junction area of the emitter of the transistor Q1 to the junction area of the emitter of the transistor Q2 is N, N being an integer greater than 1.
In one embodiment of the present invention, the current flowing through the resistor R3 is 2 times the current flowing through the resistor R2.
In one embodiment of the present invention, the bandgap reference voltage is formulated as:
wherein VREF is the band gap reference voltage, VBEIs the voltage between the base electrode and the emitter electrode of the triode Q2 and has a first-order negative temperature coefficient characteristic, VTIs a thermal voltage and has a first-order positive temperature coefficient characteristic, N is the ratio of the junction area of the emitter of the transistor Q1 to the junction area of the emitter of the transistor Q2, R3Is the resistance value of the resistor R3, R2Is the resistance value of the resistor R2.
In an embodiment of the present invention, the negative feedback operational amplifier loop further includes a capacitor C1, one end of the capacitor C1 is connected to the drain of the transistor PM2, and the other end of the capacitor C1 is connected to the drain of the transistor NM 4.
In one embodiment of the present invention, the boost circuit includes a resistor R4 and a resistor R5, wherein,
one end of the resistor R4 is connected with the pre-adjusting voltage circuit, the other end of the resistor R4 is connected with one end of the resistor R5 and the output end of the band-gap reference voltage, and the other end of the resistor R5 is grounded GND.
In one embodiment of the invention, the updated preconditioning voltage formula is represented as:
where VDD _ BGR is the updated preconditioning voltage, R4Is the resistance value of the resistor R4, R5VREF is the bandgap reference voltage, which is the resistance value of the resistor R5.
The invention has the beneficial effects that:
the band-gap reference voltage source circuit provided by the invention effectively saves the chip area and the power consumption, and improves the PSRR performance of the band-gap reference voltage, specifically:
under the power supply of the pre-adjusted voltage provided by the pre-adjusted voltage circuit, the pseudo-cascode current mirror circuit generates a first voltage signal and a second voltage signal with the same voltage value through current mirror processing, and the voltage values of the first voltage signal and the second voltage signal are always kept equal under the negative feedback regulation of a negative feedback operational amplifier loop, so that stable band-gap reference voltage is output, and the PSRR performance of the band-gap reference voltage is improved.
Meanwhile, the internal power supply preset voltage of the preset voltage regulating circuit is updated through the booster circuit, the preset voltage is irrelevant to the power supply voltage, and the stable power supply voltage is realized through the band-gap reference voltage output by the band-gap reference voltage source circuit, so that the influence on the band-gap reference voltage caused by the fluctuation of the power supply voltage is avoided; because no additional linear voltage stabilizer is needed to stabilize the power supply voltage of the power supply, and no additional starting circuit is needed to realize the self-starting of the circuit, the area of a chip and the power consumption can be effectively saved.
The present invention will be described in further detail with reference to the accompanying drawings and examples.
Drawings
Fig. 1 is a schematic structural diagram of a bandgap reference voltage source circuit according to an embodiment of the present invention;
fig. 2 is a schematic circuit diagram of a specific circuit structure of a bandgap reference voltage source circuit according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of another specific circuit structure of a bandgap reference voltage source circuit according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a simulation result of bandgap reference voltages correspondingly generated by the bandgap reference voltage source circuit in the temperature variation range of-45 deg.C to 125 deg.C according to the present invention;
fig. 5 is a schematic diagram of a PSRN simulation result corresponding to a bandgap reference voltage source circuit according to an embodiment of the present invention.
Description of the reference numerals:
10-a pre-regulated voltage circuit; 20-a pseudo-cascode gate-mirror circuit; 30-a negative feedback operational amplifier loop; 40-a booster circuit.
Detailed Description
The present invention will be described in further detail with reference to specific examples, but the embodiments of the present invention are not limited thereto.
Example one
In order to improve the precision of the reference voltage output by the bandgap reference voltage source circuit without increasing the chip area and the power consumption, an embodiment of the invention provides a bandgap reference voltage source circuit, please refer to fig. 1, which includes a preconditioning voltage circuit 10, a pseudo-cascode current mirror circuit 20, a negative feedback operational amplifier loop 30 and a voltage boosting circuit 40, wherein,
a pre-regulation voltage circuit 10 for generating a pre-regulation voltage VDD _ BGR;
a pseudo-cascode current mirror circuit 20 connected to the pre-regulated voltage circuit 10 for performing current mirror processing according to the pre-regulated voltage VDD _ BGR to generate a first voltage signal V with equal voltage valueXAnd a second voltage signal VY；
A negative feedback operational amplifier loop 30 connected to the pre-regulated voltage circuit 10 and the pseudo-cascode current mirror circuit 20 for providing the first voltage signal V according to the pre-regulated voltage VDD _ BGRXAnd a second voltage signal VYPerforming negative feedback regulation to ensure the first voltage signal VXAnd a second voltage signal VYThe voltage values of the output voltage are kept equal, and corresponding band gap reference voltage VREF is output;
the boosting circuit 40 is connected with the negative feedback operational amplifier loop 30 and used for boosting the band gap reference voltage VREF;
and the pre-regulation voltage circuit 10 is connected with the boosting circuit 40 and is also used for updating the pre-regulation voltage VDD _ BGR according to the boosted band gap reference voltage VREF.
Next, each circuit of the embodiment of the present invention will be described in detail.
Referring to fig. 2, the pre-adjustment voltage circuit 10 includes a resistor R1, a transistor NM1, and a transistor NM2, where one end of the resistor R1 and a drain of the transistor NM1 are connected to a power supply voltage VDD, a gate of the transistor NM1 is connected to the other end of the resistor R1 and a drain of the transistor NM2, a source of the transistor NM1 is connected to the pseudo-cascode current mirror circuit 20, the negative feedback operational amplifier loop 30, and the boost circuit 40, a gate of the transistor NM2 is connected to the negative feedback operational amplifier loop 30, and a source of the transistor NM2 is connected to GND.
Preferably, the transistors NM1 and NM2 are both NMOS transistors.
Further, an alternative scheme of the pseudo-cascode current mirror circuit 20 is provided in the embodiments of the present invention, please refer to fig. 2 again, where the pseudo-cascode current mirror circuit 20 includes transistors PM1 to PM4, where a source of the transistor PM1 and a source of the transistor PM2 are connected to a source of the transistor NM1 in the pre-regulation voltage circuit 10, a gate of the transistor PM1 is connected to a gate of the transistor PM2, a gate of the transistor PM3, a drain of the transistor PM3, a gate of the transistor PM4, the negative feedback operational amplifier loop 30, and the first voltage signal VXIs connected to the output terminal of transistor PM1, the drain of transistor PM1 is connected to the source of transistor PM3, the drain of transistor PM2 is connected to the source of transistor PM4, the drain of transistor PM4 is connected to the negative feedback op-amp loop 30 and the second voltage signal VYIs connected.
Preferably, the transistors PM1 to PM4 are all PMOS transistors.
Further, an embodiment of the present invention provides an alternative scheme of a negative feedback operational amplifier loop 30, please refer to fig. 2 again, where the negative feedback operational amplifier loop 30 includes transistors PM5 to PM8, a transistor NM3, a transistor NM4, a transistor Q1, a transistor Q2, a resistor R2, and a resistor R3, where a source of the transistor PM5 is connected to a source of the transistor NM1 in the pre-regulation voltage circuit 10, a gate of the transistor PM5 is connected to a gate of the transistor PM2, a gate of the transistor PM6 is connected to a gate of the transistor PM4, a drain of the transistor PM5 is connected to a source of the PM6, a drain of the transistor PM6 is connected to a source of the transistor PM7 and a source of the transistor PM8, and a gate of the transistor PM7 is connected to the first voltage signal VXIs connected to the collector of the transistor Q1, the drain of the transistor PM7 is connected to the drain of the transistor NM3, the gate of the transistor NM3 and the gate of the transistor NM4, the source of the transistor NM3 and the source of the transistor NM4 are connected to GND, the gate of the transistor PM8 is connected to the second voltage signal VYThe output end of the transistor Q2 is connected with the collector of the triode Q2, the drain of the transistor PM8 is connected with the drain of the transistor NM4 and the gate of the transistor NM2 in the pre-regulation voltage circuit 10, the base of the triode Q1 is connected with the base of the triode Q2, the booster circuit 40 and the output end of the band-gap reference voltage VREF, the emitter of the triode Q1 is connected with one end of a resistor R2, the other end of the resistor R2 is connected with the emitter of the triode Q2 and one end of a resistor R3, and the other end of the resistor R3 is grounded GND. In the embodiment of the invention, the ratio of the junction area of the emitter of the triode Q1 to the junction area of the emitter of the triode Q2 is N, wherein N is an integer greater than 1; the current flowing through the resistor R3 is 2 times the current flowing through the resistor R2.
Preferably, the transistors PM 5-PM 8 are all PMOS tubes; the transistors NM3 and NM4 are NMOS transistors.
Further, in order to ensure the stability of the negative feedback operational amplifier loop 30 in the bandgap reference voltage source circuit, referring to fig. 3, on the basis of the circuit shown in fig. 2, the negative feedback operational amplifier loop 30 further includes a capacitor C1, one end of the capacitor C1 is connected to the drain of the transistor PM2, and the other end of the capacitor C1 is connected to the drain of the transistor NM 4.
Further, referring to fig. 2, the boost circuit 40 includes a resistor R4 and a resistor R5, wherein one end of the resistor R4 is connected to the source of the transistor NM1 in the pre-regulation voltage circuit 10, the other end of the resistor R4 is connected to one end of the resistor R5 and the output end of the bandgap reference voltage VREF, and the other end of the resistor R5 is connected to the ground GND.
Based on the above-mentioned design of each part of the specific circuit, the following is a detailed description of the operating principle of the bandgap reference voltage source circuit provided by the embodiment of the present invention.
The embodiment of the invention can realize self-starting without an additional starting circuit, and specifically comprises the following steps: before the power supply voltage VDD is electrified, an internal circuit of the band-gap reference voltage source circuit is in a closed state; after the power supply voltage VDD is powered up, the transistor NM1 in the pre-regulation voltage circuit 10 is first in a closed state, due to the pull-up action of the resistor R1, the gate voltage of the transistor NM2 is the power supply voltage VDD, and at this time, because the transistor NM2 and the resistor R4 and the resistor R5 in the boost circuit 40 form a source follower structure, the base of the resistor R5, the base of the transistor Q1 and the base of the transistor Q2 all have bias voltages, and at this time, current is generated inside the bandgap reference voltage source circuit, so that under the negative feedback regulation of the negative feedback operational amplifier loop 30, the bandgap reference voltage source circuit will be started.
In the embodiment of the present invention, the transistors PM1 and PM3, the transistors PM2 and PM4 in the pseudo-cascode current mirror circuit 20 form a current mirror structure, and the current mirror ratio is 1:1, at this time, the first voltage signal V at the output point X of the pseudo-cascode current mirror circuit 20 is at this timeXAnd a second voltage signal V of the output point YYTo achieve current mirroring, i.e. the first voltage signal VXA second voltage signal VYAre equal in voltage value. In practice, however, the first voltage signal VXA second voltage signal VYThe two voltages are not always kept equal, so that the band-gap reference voltage output by the band-gap reference voltage source circuit is not stable. Based on the existing problems, the inventor designs the negative feedback operational amplifier loop 30, and the first voltage signal V which changes is generated due to the action of the negative feedback operational amplifier loop 30XOr the second voltage signal VYThe first voltage signal V corresponding to the output point X is adjusted back to the original voltage valueXA second voltage signal V corresponding to the output point YYSo that the first voltage signal V is clampedXAnd a second voltage signal VYThe voltage values of the transistor Q1 and the collector of the transistor Q2 are kept equal, so that the currents flowing through the two branches are equal. Therefore, the current flowing through the resistor R2 and the current flowing through the resistor R3 are respectively expressed as:
IR3＝2IR2 (2)
wherein, I in the formula (1)R2Is the current flowing through the resistor R2, VBE1And VBEIs the voltage between the base-emitter of transistor Q1 and transistor Q2, and VBE1And VBEAll have a first-order negative temperature coefficient characteristic, VTIs a thermal voltage, and VTHaving a first order positive temperature coefficient characteristic, R2Is the resistance of resistor R2, and N is the ratio of the junction area of the emitter of transistor Q1 to the junction area of the emitter of transistor Q2; i in formula (2)R3Is the current flowing through resistor R3.
As can be known from KVL law, the bandgap reference voltage VREF output by the bandgap reference voltage source circuit according to the embodiment of the present invention is expressed as:
wherein VREF in formula (3) is a bandgap reference voltage, R3Is the resistance value of the resistor R3. Due to V in the formula (3)BEHaving a first-order negative temperature coefficient characteristic, VTThe zero-temperature-coefficient band-gap reference voltage VREF has first-order positive temperature coefficient characteristics, and can be obtained after first-order temperature compensation by adjusting the resistance values of the resistor R2 and the resistor R3.
The embodiment of the present invention may further update the preconditioned voltage VDD _ BGR inside the preconditioned voltage circuit 10 through the resistor R4 and the resistor R5 in the boost circuit 40, where the updated preconditioned voltage VDD _ BGR is expressed as:
where VDD _ BGR is the updated preconditioning voltage, R4Is the resistance value of the resistor R4, R5VREF is a bandgap reference voltage, which is the resistance value of resistor R5.
Since transistor NM1 provides isolation for supply voltage VDD, supply voltage VDD does not directly affect preconditioned voltage VDD _ BGR supplied internally by preconditioned voltage circuit 10 through transistor NM 1. Meanwhile, the power supply voltage VDD directly affects the bandgap reference voltage VREF through the resistor R1 and the source follower structure composed of the transistor NM1, the resistor R4 and the resistor R5. However, the two-stage high-gain negative feedback operational amplifier composed of the transistor PM7, the transistor PM8, and the transistors NM1 to NM3 directly realizes the voltage stabilization of the bandgap reference voltage VREF, and the voltage boost circuit 40 composed of the resistor R4 and the resistor R5 can generate the pre-regulated voltage VDD _ BGR with sufficient voltage margin, so as to ensure the stability of the pre-regulated voltage VDD _ BGR in the pre-regulated voltage circuit 10, and make the pre-regulated voltage VDD _ BGR not affected by the power supply voltage VDD any more. By the scheme, the PSRR performance of the band-gap reference voltage VREF is improved. In addition, the PSRR performance of the band-gap reference voltage source circuit can be further improved by a self-biased cascode structure formed by the transistor PM2 and the transistor PM 4.
In order to verify the effectiveness of the bandgap reference voltage source circuit provided in the embodiment of the present invention, the following experiment is performed.
In the experimental process, the embodiment of the invention adopts a 0.18 μm BCD process of CSMC company to simulate on Cadence spectrum.
Referring to fig. 4, the bandgap reference voltage VREF is generated by using the bandgap reference band proposed by the present invention under the condition of a temperature variation range of-45 ℃ to 125 ℃, wherein the abscissa of fig. 4 represents the temperature and the ordinate represents the bandgap reference voltage VREF. As can be seen from FIG. 4, the bandgap reference voltage source circuit provided by the invention has good temperature drift characteristics, and the temperature drift coefficient is 23 ppm/DEG C.
Referring to fig. 5, the embodiment of the invention simultaneously simulates PSRR performance during the generation of the bandgap reference voltage VREF by the bandgap reference voltage source circuit, wherein an abscissa of fig. 5 represents clock frequency and an ordinate represents PSRR. As can be seen from fig. 5, at a low frequency, the bandgap reference voltage source circuit provided in the embodiment of the present invention has a very high PSRR, which can reach-91 dB.
In summary, the bandgap reference voltage source circuit provided in the embodiment of the present invention effectively saves chip area and power consumption, and improves PSRR performance of the bandgap reference voltage VREF, specifically:
pseudo-cascode current supplied by preconditioned voltage VDD _ BGR from preconditioned voltage circuit 10The mirror circuit 20 generates the first voltage signal V with equal voltage value through the current mirror processingXAnd a second voltage signal VYAnd makes the first voltage signal V under the negative feedback regulation of the negative feedback operational amplifier loop 30XAnd a second voltage signal VYThe voltage values of the reference voltages are always kept equal, so that a stable band-gap reference voltage VREF is output, and the PSRR performance of the band-gap reference voltage VREF is improved.
Meanwhile, the embodiment of the invention updates the internal power supply preconditioning voltage VDD _ BGR of the preconditioning voltage circuit 10 through the booster circuit 40, the preconditioning voltage VDD _ BGR is irrelevant to the power supply voltage VDD, and the stable power supply voltage is realized through the band-gap reference voltage VREF output by the band-gap reference voltage source circuit, so that the influence on the band-gap reference voltage VREF caused by the fluctuation of the power supply voltage VDD is avoided; because no additional linear voltage stabilizer is needed to stabilize the power supply voltage of the power supply, and no additional starting circuit is needed to realize the self-starting of the circuit, the area of a chip and the power consumption can be effectively saved.
In the description of the present invention, it is to be understood that the terms "first", "second", and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or to imply that the number of technical features indicated are in fact significant. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means two or more unless specifically defined otherwise.
In the description of the specification, reference to the description of "one embodiment," "some embodiments," "an example," "a specific example," or "some examples" or the like means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples described in this specification can be combined and combined by those skilled in the art.
While the present application has been described in connection with various embodiments, other variations to the disclosed embodiments can be understood and effected by those skilled in the art in practicing the claimed application, from a review of the drawings, the disclosure, and the appended claims. In the claims, the word "comprising" does not exclude other elements or steps, and the word "a" or "an" does not exclude a plurality. A single processor or other unit may fulfill the functions of several items recited in the claims. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage.
The foregoing is a more detailed description of the invention in connection with specific preferred embodiments and it is not intended that the invention be limited to these specific details. For those skilled in the art to which the invention pertains, several simple deductions or substitutions can be made without departing from the spirit of the invention, and all shall be considered as belonging to the protection scope of the invention.
Claims (10)
1. A bandgap reference voltage source circuit comprises a pre-regulation voltage circuit, a pseudo-cascode gate mirror circuit, a negative feedback operational amplifier circuit, and a booster circuit,
the pre-regulation voltage circuit is used for generating pre-regulation voltage;
the pseudo-cascode gate mirror circuit is connected with the pre-regulation voltage circuit and used for carrying out current mirror processing according to the pre-regulation voltage to generate a first voltage signal and a second voltage signal with equal voltage values;
the negative feedback operational amplifier loop is connected with the pre-regulation voltage circuit and the pseudo-cascode gate mirror circuit, and is used for performing negative feedback regulation processing on the first voltage signal and the second voltage signal according to the pre-regulation voltage to ensure that the voltage values of the first voltage signal and the second voltage signal are equal and outputting corresponding band-gap reference voltages;
the boosting circuit is connected with the negative feedback operational amplifier loop and used for boosting the band gap reference voltage;
and the pre-regulation voltage circuit is connected with the booster circuit and is also used for updating the pre-regulation voltage according to the boosted band gap reference voltage.
2. The bandgap reference voltage source circuit of claim 1, wherein the pre-regulating voltage circuit comprises a resistor R1, a transistor NM1 and a transistor NM2, wherein,
one end of the resistor R1 and the drain of the transistor NM1 are connected with a power supply voltage VDD, the gate of the transistor NM1 is connected with the other end of the resistor R1 and the drain of the transistor NM2, the source of the transistor NM1 is connected with the pseudo-common source common gate current mirror circuit, the negative feedback operational amplifier loop and the booster circuit, the gate of the transistor NM2 is connected with the negative feedback operational amplifier loop, and the source of the transistor NM2 is connected with GND.
3. The bandgap reference voltage source circuit of claim 1, wherein the pseudo-cascode current mirror circuit comprises transistors PM 1-PM 4, wherein,
the source of the transistor PM1, the source of the transistor PM2 are connected to the pre-regulation voltage circuit, the gate of the transistor PM1 is connected to the gate of the transistor PM2, the gate of the transistor PM3, the drain of the transistor PM3, the gate of the transistor PM4, the negative feedback op-amp loop, and the output terminal of the first voltage signal, the drain of the transistor PM1 is connected to the source of the transistor PM3, the drain of the transistor PM2 is connected to the source of the transistor PM4, and the drain of the transistor PM4 is connected to the negative feedback op-amp loop and the output terminal of the second voltage signal.
4. The bandgap reference voltage source circuit of claim 3, wherein the negative feedback operational amplifier loop comprises transistors PM 5-PM 8, transistor NM3, transistor NM4, transistor Q1, transistor Q2, resistor R2 and resistor R3, wherein,
a source of the transistor PM5 is connected to the pre-adjustment voltage circuit, a gate of the transistor PM5 is connected to a gate of the transistor PM2, a gate of the transistor PM6 is connected to a gate of the transistor PM4, a drain of the transistor PM5 is connected to a source of the PM6, a drain of the transistor PM6 is connected to a source of the transistor PM7 and a source of the transistor PM8, a gate of the transistor PM7 is connected to an output terminal of the first voltage signal and a collector of the transistor Q1, a drain of the transistor PM7 is connected to a drain of the transistor NM3, a gate of the transistor NM3 and a gate of the transistor NM4, a source of the transistor NM3 and a source of the transistor NM4 are grounded to GND, a gate of the transistor PM8 is connected to an output terminal of the second voltage signal and a collector of the transistor Q2, a drain of the transistor PM8 is connected to a drain of the transistor NM4, The base of the triode Q1 is connected with the base of the triode Q2, the boost circuit and the output end of the band-gap reference voltage, the emitter of the triode Q1 is connected with one end of the resistor R2, the other end of the resistor R2 is connected with the emitter of the triode Q2 and one end of the resistor R3, and the other end of the resistor R3 is grounded GND.
5. The bandgap reference voltage source circuit of claim 4, wherein the ratio of the junction area of the emitter of the transistor Q1 to the junction area of the emitter of the transistor Q2 is N, N being an integer greater than 1.
6. The bandgap reference voltage source circuit according to claim 5, wherein the current flowing through the resistor R3 is 2 times the current flowing through the resistor R2.
7. The bandgap reference voltage source circuit of claim 6, wherein the bandgap reference voltage calculation formula is:
wherein VREF is the band gap reference voltage, VBEIs the voltage between the base electrode and the emitter electrode of the triode Q2 and has a first-order negative temperature coefficient characteristic, VTIs a thermal voltage and has a first-order positive temperature coefficient characteristic, N is the ratio of the junction area of the emitter of the transistor Q1 to the junction area of the emitter of the transistor Q2, R3Is the resistance value of the resistor R3, R2Is the resistance value of the resistor R2.
8. The bandgap reference voltage source circuit of claim 4, wherein the negative feedback op-amp loop further comprises a capacitor C1, one end of the capacitor C1 is connected to the drain of the transistor PM2, and the other end of the capacitor C1 is connected to the drain of the transistor NM 4.
9. The bandgap reference voltage source circuit of claim 4, wherein the boost circuit comprises a resistor R4 and a resistor R5, wherein,
one end of the resistor R4 is connected with the pre-adjusting voltage circuit, the other end of the resistor R4 is connected with one end of the resistor R5 and the output end of the band-gap reference voltage, and the other end of the resistor R5 is grounded GND.
10. The bandgap reference voltage source circuit of claim 9, wherein the updated preconditioned voltage is formulated as:
where VDD _ BGR is the updated preconditioning voltage, R4Is the resistance value of the resistor R4, R5Is the resistance value of the resistor R5, VREF is the resistance valueA bandgap reference voltage.
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| CN115268545A (en) * | 2022-07-26 | 2022-11-01 | 骏盈半导体(上海)有限公司 | Band-gap reference circuit with low-voltage regulation function and method |
| CN115268545B (en) * | 2022-07-26 | 2023-12-05 | 骏盈半导体(上海)有限公司 | Band gap reference circuit with low-voltage regulation function and method |
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