CN114628357A - 半导体装置以及半导体模块 - Google Patents

半导体装置以及半导体模块 Download PDF

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Publication number
CN114628357A
CN114628357A CN202111516855.6A CN202111516855A CN114628357A CN 114628357 A CN114628357 A CN 114628357A CN 202111516855 A CN202111516855 A CN 202111516855A CN 114628357 A CN114628357 A CN 114628357A
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Prior art keywords
semiconductor
circuit
switch
semiconductor device
wiring
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CN202111516855.6A
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筒井孝幸
斋藤祐一
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Murata Manufacturing Co Ltd
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Murata Manufacturing Co Ltd
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Publication of CN114628357A publication Critical patent/CN114628357A/zh
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Abstract

本发明提供在包含元素半导体系的半导体元件和化合物半导体系的半导体元件的高频电路中，能够减少寄生电感的半导体装置。由元素半导体系的半导体元件构成的开关设置于第一部件。设置有包含化合物半导体系的半导体元件的高频电路的第二部件与第一部件接合。开关和高频电路通过路径连接。该路径包含由配置在从第二部件的表面到第一部件的表面的层间绝缘膜上的金属图案构成的部件间连接布线、或者使电流在与第一部件和第二部件接合的界面交叉的方向上流动的导电部件。

Description

半导体装置以及半导体模块
技术领域
本发明涉及半导体装置以及半导体模块。
背景技术
搭载于移动终端的主要部件之一有高频功率放大器。为了使移动终端的无线传输容量大容量化，将载波聚合(CA)等利用多个频段的无线通信标准实用化。随着使用的频段增加，RF前端的电路结构变得复杂。并且，为了能够使用第五代移动通信系统(5G)的子6GHz频带的频段，RF前端的电路结构变得更加复杂。
若RF前端的电路结构变得复杂，则由插入在从高频功率放大器到天线的传输线路的滤波器、开关等引起的损失增大。其结果是，对于高频功率放大器而言，除了要兼容多个频段外，还要求高输出化。在下述的非专利文献1中，公开了对多个CMOS功率放大器的输出进行合成，并且进行阻抗转换的技术。
若使用的频段增多，则优选根据频段来调整阻抗匹配电路的元件常量。例如，通过接通断开与电抗元件连接的开关，来调整元件常量。另外，高频功率放大器例如使用化合物半导体系的异质结双极晶体管。
非专利文献1：Kyu Hwan An et.al.,"Power-Combining TransformerTechniques for Fully-Integrated CMOS Power Amplifiers",IEEE J.of Solid-stateCircuits,Vol.43,No.5,MAY(2008)
为了在形成有化合物半导体系的异质结双极晶体管的半导体芯片中，形成元件常量调整用的开关，例如必须采用BiFET结构、BiHEMT结构。因此，制造工序变得复杂。若在硅系的半导体芯片形成开关，并利用化合物半导体系的半导体芯片形成高频功率放大器，则无需采用BiFET结构、BiHEMT结构。但是，在将两个半导体芯片分别安装于模块基板的结构中，半导体模块的尺寸增大。
若层叠硅系的半导体芯片和化合物半导体系的半导体芯片，并通过键合线连接两者，则能够使半导体模块小型化。但是，若要处理的信号为高频，则不能忽略键合线的寄生电感，无法获得所希望的特性。
发明内容
本发明的目的在于提供一种能够在包含元素半导体系的半导体元件和化合物半导体系的半导体元件的高频电路中，减少寄生电感的半导体装置以及半导体模块。
根据本发明的一个观点，提供一种半导体装置，具备：
第一部件，设置有由元素半导体系的半导体元件构成的开关；
第二部件，设置有包含化合物半导体系的半导体元件的高频电路，并与上述第一部件接合；以及
路径，连接上述开关和上述高频电路，
上述路径包含：配置在从上述第二部件的表面到上述第一部件的表面的层间绝缘膜上的由金属图案构成的部件间连接布线、或者使电流在与接合上述第一部件和上述第二部件的界面交叉的方向上流动的导电部件。
根据本发明的另一观点，提供一种半导体模块，具备：
半导体装置，包含设置有由元素半导体系的半导体元件构成的开关的第一部件、以及设置有包含化合物半导体系的半导体元件的高频电路，并与上述第一部件接合的第二部件；
模块基板，安装有上述半导体装置；以及
路径，连接上述开关和上述高频电路，
上述半导体装置包含与上述开关连接的第一导体突起以及与上述高频电路连接的第二导体突起，
上述路径包含上述第一导体突起、设置于上述模块基板的布线、以及上述第二导体突起。
由于不使用键合线连接第一部件的开关和第二部件的高频电路，所以能够抑制连接两者的路径的寄生电感的增大。
附图说明
图1是第一实施例的高频功率放大器的示意等效电路图。
图2是搭载于第一实施例的高频功率放大器的半导体装置的示意剖视图。
图3A是构成形成于第二部件的功率级差动放大电路的一个单元的等效电路图，图3B是构成形成于第二部件的功率级差动放大电路的一个单元的剖视图。
图4是第一实施例的高频电力模块的示意剖视图。
图5A至图5F的附图是制造中途阶段的半导体装置的剖视图。
图6A至图6C的附图是制造中途阶段的半导体装置的剖视图，图6D是完成后的半导体装置的剖视图。
图7A以及图7B分别是表示在电容可变电路的寄生电感为零的条件、以及寄生电感为2nH的条件下进行模拟的结果的图表。
图8是第一实施例的变形例的高频功率放大器中使用的电容可变电路的等效电路图。
图9是搭载于第二实施例的高频功率放大器的半导体装置的示意剖视图。
图10是第三实施例的高频功率放大器的示意等效电路图。
图11是第三实施例的高频电力模块的示意剖视图。
图12是第四实施例的高频功率放大器的示意等效电路图。
图13是第四实施例的变形例的高频功率放大器的示意等效电路图。
图14是第四实施例的其他的变形例的高频功率放大器的示意等效电路图。
图15是第四实施例的又一变形例的高频功率放大器的示意等效电路图。
图16是第五实施例的高频功率放大器的示意等效电路图。
附图标记说明
20…高频功率放大器；21…第一部件；21A…第一部件的第一面；22…第二部件；23…半导体装置；25…模块基板；26、27、28…布线；31…驱动级放大电路；31T…驱动级放大电路的晶体管；32…功率级差动放大电路；32T…功率级差动放大电路的晶体管；33…第一平衡转换器；34…电容可变电路；34A、34B、34C、34D…电容器；34S…开关；35…第二平衡转换器；36…去耦电容器；37…DC截止电容器；38…输出匹配电路；38C…电容器；38L…电感器；39…开关控制电路；40…电感器；51…半导体基板；52…多层布线结构；53、54…布线；55…粘合层；55A、55B…金属区域；55C…绝缘区域；56…布线；71…部件间连接布线；72、73…焊盘；74、75、76…部件间连接布线；77…层间绝缘膜；78…保护膜；82…导体突起；82A…Cu柱；82B…焊料层；83、84、85、86…导体突起；101…基底半导体层；101A…导电区域；101B…元件分离区域；102B…基极层；102C…集电极层；102E…发射极层；103B…基极电极；103C…集电极电极；103E…发射极电极；104B…第一层基极布线；104BB…基极偏置布线；104C…第一层集电极布线；104E…第一层发射极布线；105E…第二层发射极布线；105RF…高频信号输入布线；111、112…层间绝缘膜；200…母基板；201…剥离层；202…元件形成层；204…连结支承体；210…基板。
具体实施方式
[第一实施例]
参照图1至图7B的附图，对第一实施例的半导体装置进行说明。第一实施例的半导体装置是高频功率放大器。
图1是第一实施例的高频功率放大器20的示意等效电路图。第一实施例的高频功率放大器20包含驱动级放大电路31、第一平衡转换器33、电容可变电路34、功率级差动放大电路32、第二平衡转换器35、输出匹配电路38以及开关控制电路39。驱动级放大电路31至少包含一个晶体管31T，功率级差动放大电路32包含相互并联连接的多个晶体管32T。驱动级放大电路31放大从输入端子Pin输入的单端信号。
第一平衡转换器33包含一次线圈和二次线圈，将单端信号转换为差动信号。具体而言，一次线圈的一端与驱动级放大电路31的输出端口连接，另一端与地线连接。二次线圈的两端分别经由差动传输线路与差动放大电路32的两个输入端口连接。
电容可变电路34连接在传输向差动放大电路32输入的差动信号的一对布线之间。电容可变电路34包含相互并联连接的电容器34A、电容器34B以及与电容器34A串联连接的开关34S。
第二平衡转换器35包含一次线圈和二次线圈，将从差动放大电路32输出的差动信号转换为单端信号。一次线圈的两端分别与差动放大电路32的两个输出端口连接。对一次线圈的中间抽头施加电源电压Vcc，经由一次线圈向差动放大电路32供给电源。以防止振荡、抑制噪声、确保调制时的线性等目的，去耦电容器36连接到电源线。另外，一次线圈的中间抽头经由DC截止电容器37高频地接地。在图1中，将布线所具有的电感表示为电感器40。由DC截止电容器37和电感器40构成的谐振电路作为针对高频信号的第二高次谐波、第三高次谐波等的高次谐波抑制滤波器发挥作用。此外，也存在DC截止电容器37和电感器40不用作滤波器的情况。此时，DC截止电容器37仅作为DC截止用的电容器发挥作用。
由第二平衡转换器35从差动信号转换而成的单端信号经由输出匹配电路38从输出端子Pout输出。输出匹配电路38包含与负载串联连接的电感器38L、以及与负载和电感器38L并联连接的电容器38C。
开关控制电路39根据放大对象的高频信号的频率进行开关34S的接通断开控制。若切换开关34S的接通断开，则电容可变电路34的电容发生变化。由此，能够根据频率进行适当的阻抗匹配。
如后面参照图2至图4的附图说明的那样，第一实施例的高频功率放大器20包含：具有第一部件21和第二部件22的半导体装置23、以及安装有半导体装置23的模块基板25(图4)。驱动级放大电路31以及功率级差动放大电路32形成于第二部件22。开关34S形成于第一部件21。第一平衡转换器33、电容器34A、电容器34B、第二平衡转换器35、去耦电容器36、DC截止电容器37以及输出匹配电路38由安装于模块基板25(图4)的表面安装型的无源电路部件构成。
图1所示的实心的正方形以及空心的正方形分别意味着经由设置于第一部件21的导体突起以及设置于第二部件22的导体突起连接到模块基板25。另外，图1所示的相对较粗的实线意味着通过再布线层所包含的部件间连接布线71连接后面说明的设置于第一部件21的电路和设置于第二部件22的电路。
图2是搭载于第一实施例的高频功率放大器20的半导体装置23的示意剖视图。在图2中，用电路图符号示出驱动级放大电路31以及功率级差动放大电路32，并用折线示出多层布线结构的布线、导通孔。这些布线实际上包含布线层内的金属图案和连接布线层间的导通孔。
第一实施例的高频功率放大器的半导体装置23包含第一部件21以及第二部件22。例如，第一部件21由元素半导体构成，第二部件22由化合物半导体构成。第一部件21包含元素半导体系的半导体区域。例如，第一部件21包含半导体基板51和配置于半导体基板51的一个面的多层布线结构52。作为半导体基板51，例如能够使用硅基板、绝缘体上硅(SOI)基板等元素半导体系的基板。第一部件21包含形成于半导体基板51的表层部的元素半导体系的半导体元件，例如由MOSFET构成的开关34S等。
在多层布线结构52的表面(以下，称为第一面21A。)，通过面接触接合有第二部件22。第二部件22包含化合物半导体系的半导体区域。后面参照图3对第二部件22的结构进行详细说明。
第二部件22包含驱动级放大电路31以及功率级差动放大电路32。配置层间绝缘膜77，以覆盖第一部件21的第一面21A以及第二部件22。层间绝缘膜77的上表面被平坦化。在层间绝缘膜77上，配置有由金属图案构成的部件间连接布线71、焊盘72、73等。
焊盘72通过设置于层间绝缘膜77的开口与功率级差动放大电路32的晶体管32T(图1)的发射极连接。另一个焊盘73通过设置于层间绝缘膜77的开口，经由多层布线结构52内的布线54与开关34S连接。部件间连接布线71通过设置于层间绝缘膜77的开口，与功率级差动放大电路32连接，并且通过设置于层间绝缘膜77的其他开口，经由多层布线结构52内的布线53与开关34S连接。
配置有部件间连接布线71、焊盘72、73等的布线层有被称为再布线层的情况。在层间绝缘膜77上配置有绝缘性的保护膜78，以覆盖再布线层。在保护膜78，设置有在俯视时被焊盘72、73等中的每个焊盘包含的开口。在开口内露出的焊盘72、73上，分别配置有导体突起82、83。导体突起82、83从保护膜78的上表面突出，并扩展到开口周边的保护膜78的上表面。
导体突起82包含与焊盘72连接的Cu柱82A以及配置于Cu柱82A的上表面的焊料层82B。这样的结构的导体突起82也被称为Cu柱凸块。此外，也可以以提高紧贴性为目的，在Cu柱82A的底面配置凸块下金属层。其他导体突起83也具有与导体突起82相同的层叠结构。此外，导体突起82、83等也可以代替Cu柱凸块，使用Au凸块、焊球凸块、竖立在焊盘上的导体柱等。如Au凸块那样，未载置焊料层的凸块也被称为柱(Pillar)。竖立在焊盘上的导体柱也被称为立柱(Post)。
第二部件22内的地线导体和第一部件21内的地线导体通过再布线层内的再布线(未出现在图2的剖面上。)相互连接。并且，第二部件22内的地线导体和第一部件21内的地线导体分别经由设置于第一部件21的导体突起以及设置于第二部件22的导体突起，与模块基板的共用的地线导体连接。设置于第一部件21的开关34S经由导体突起83与安装于模块基板的电容器34A(图1)连接。
图3A是构成形成于第二部件22的功率级差动放大电路32(图1)的一个单元的等效电路图。功率级差动放大电路32包含相互并联连接的多个单元。各单元包含晶体管32T、输入电容器Cin以及镇流电阻元件Rb。晶体管32T的基极经由输入电容器Cin连接到高频信号输入布线105RF。并且，晶体管32T的基极经由镇流电阻元件Rb连接到基极偏置布线104BB。晶体管32T的发射极被接地。对晶体管32T的集电极施加电源电压，并且放大后的高频信号从集电极输出。
图3B是构成形成于第二部件22的功率级差动放大电路32的一个单元的示意剖视图。第二部件22包含基底半导体层101。通过基底半导体层101与第一部件21面接触，第二部件22与第一部件21接合。基底半导体层101被划分为导电区域101A和元件分离区域101B。基底半导体层101例如使用GaAs。导电区域101A由n型GaAs形成，元件分离区域101B通过向n型GaAs层离子注入绝缘化杂质而形成。
在导电区域101A上，配置有晶体管32T。晶体管32T包含从导电区域101A起依次层叠的集电极层102C、基极层102B以及发射极层102E。发射极层102E配置在基极层102B的部分区域上。作为一个例子，集电极层102C由n型GaAs形成，基极层102B由p型GaAs形成，发射极层102E由n型InGaP形成。即，晶体管32T是异质结双极晶体管。
在基极层102B上配置有基极电极103B，基极电极103B与基极层102B电连接。在发射极层102E上配置有发射极电极103E，发射极电极103E与发射极层102E电连接。在导电区域101A上配置有集电极电极103C。集电极电极103C经由导电区域101A与集电极层102C电连接。
在基底半导体层101上将第一层层间绝缘膜111配置为覆盖晶体管32T、集电极电极103C、基极电极103B以及发射极电极103E。第一层层间绝缘膜111例如由SiN等无机绝缘材料形成。在层间绝缘膜111设置有多个开口。
在层间绝缘膜111上，配置有第一层发射极布线104E、基极布线104B、集电极布线104C、基极偏置布线104BB。并且，在层间绝缘膜111上配置有镇流电阻元件Rb。发射极布线104E通过设置于层间绝缘膜111的开口与发射极电极103E连接。基极布线104B通过设置于层间绝缘膜111的其他开口与基极电极103B连接。集电极布线104C通过设置于层间绝缘膜111的其他开口与集电极电极103C连接。
基极布线104B延伸到未配置晶体管32T的区域，其前端与镇流电阻元件Rb的一个端部重叠。在重叠部分，基极布线104B与镇流电阻元件Rb电连接。镇流电阻元件Rb的另一个端部与基极偏置布线104BB重叠。在重叠部分，镇流电阻元件Rb与基极偏置布线104BB电连接。
在层间绝缘膜111上将第二层层间绝缘膜112配置为覆盖第一层发射极布线104E、基极布线104B、基极偏置布线104BB以及镇流电阻元件Rb。第二层层间绝缘膜112也由SiN等无机绝缘材料形成。
在层间绝缘膜112上，配置有第二层发射极布线105E以及高频信号输入布线105RF。第二层发射极布线105E通过设置于层间绝缘膜112的开口与第一层发射极布线104E连接。在俯视时，高频信号输入布线105RF的一部分与第一层基极布线104B重叠。在两者重叠的区域形成输入电容器Cin。
第三层层间绝缘膜77配置为覆盖第二层发射极布线105E以及高频信号输入布线105RF。第三层层间绝缘膜77例如由聚酰亚胺等有机绝缘材料形成。此外，如图2所示，第三层层间绝缘膜77延伸到第一部件21上。
在第三层层间绝缘膜77上配置有焊盘72。焊盘72通过设置于层间绝缘膜77的开口与第二层发射极布线105E连接。
图4是第一实施例的高频功率放大器20的示意剖视图。在模块基板25的部件安装面，安装有半导体装置23、电容器34A、第一平衡转换器33、第二平衡转换器35等。以使第一部件21的接合第二部件22的面与模块基板25对置的姿势安装半导体装置23。
在半导体装置23的第一部件21形成有开关34S，在第二部件22形成有功率级差动放大电路32。差动放大电路32(图1)的一个输入端口经由部件间连接布线71与第一部件21的开关34S的一个触点连接。开关34S的另一个触点经由设置于第一部件21的导体突起83、模块基板25内的布线27，与电容器34A的一个端子连接。电容器34A的另一个端子经由模块基板25内的布线26、设置于第二部件22的导体突起84，与差动放大电路32的另一个输入端口连接。
接下来，参照图5A至图6D的附图，对搭载于第一实施例的高频功率放大器的半导体装置23(图2)的制造方法进行说明。图5A至图6C的附图是制造中途阶段中的半导体装置23的剖视图，图6D是完成后的半导体装置23的剖视图。
如图5A所示，在GaAs等化合物半导体的单晶的母基板200上外延生长剥离层201，并在剥离层201上形成元件形成层202。在元件形成层202，形成有图3中示出的第二部件22的晶体管32T、第一层布线层、第二层布线层等。这些电路元件以及布线层通过一般的半导体工序形成。在图5A中，对于形成于元件形成层202的元件结构省略记载。在该阶段，元件形成层202未分离成各个第二部件22。
接下来，如图5B所示，将抗蚀剂图案(未图示)作为蚀刻掩模，对元件形成层202(图5A)以及剥离层201进行图案化。在该阶段，元件形成层202(图5A)被分离成每个第二部件22。
接下来，如图5C所示，将连结支承体204粘贴在分离后的第二部件22上。由此，多个第二部件22经由连结支承体204相互连结。此外，也可以留下在图5B的图案化工序中作为蚀刻掩模使用的抗蚀剂图案，使抗蚀剂图案夹在第二部件22与连结支承体204之间。
接下来，如图5D所示，对母基板200以及第二部件22选择性地蚀刻剥离层201。由此，第二部件22以及连结支承体204从母基板200剥离。为了选择性地蚀刻剥离层201，作为剥离层201，使用蚀刻耐性与母基板200以及第二部件22均不同的化合物半导体。
如图5E所示，准备形成有设置于第一部件21(图2)的开关34S以及多层布线结构52(图2)等的基板210。在该阶段，基板210不分离为各个第一部件21。
如图5F所示，将第二部件22接合至基板210。第二部件22与基板210的接合基于范德华键或氢键。此外，也可以通过静电力、共价键、共晶合金键等将第二部件22接合至基板210。例如，在基板210的表面的一部分由Au形成的情况下，也可以通过使第二部件22紧贴于Au区域并加压，来接合两者。
接下来，如图6A所示，从第二部件22剥离连结支承体204。在剥离连结支承体204后，如图6B所示，在基板210以及第二部件22上形成层间绝缘膜77以及再布线层。再布线层包含部件间连接布线71、焊盘72、焊盘73(图2)等。
接下来，如图6C所示，在再布线层上形成保护膜78，并在保护膜78的规定位置形成开口。之后，在开口内以及保护膜78上，形成导体突起82。在形成导体突起82的同时，也形成其他导体突起83(图4)、导体突起84(图4)等。
最后，如图6D所示，切割基板210。由此，得到半导体装置23。在俯视时，单片化后的半导体装置23的各自的第一部件21比第二部件22大。
接下来，对第一实施例的优异效果进行说明。
在第一实施例中，通过使电容可变电路34(图1)的电容根据频段变化，能够按每个频段进行适当的阻抗匹配。
并且，在第一实施例中，将由MOSFET构成的开关34S(图2)配置于包含元素半导体系的半导体基板51的第一部件21，并将包含化合物半导体系的晶体管32T(图3A、图3B)的功率级差动放大电路32配置于第二部件22。由于在第二部件22未配置开关34S，所以第二部件22无需采用BiFET结构、BiHEMT结构。因此，能够避免第二部件22的制造工序的复杂性，并抑制制造成本的上升。
进一步，在第一实施例中，将第二部件22接合到第一部件21，并作为一个半导体装置23安装于模块基板25。因此，与将化合物半导体系的半导体芯片和元素半导体系的半导体芯片分别安装于模块基板25的结构相比，能够实现高频功率放大器的小型化。
接下来，参照图7A以及图7B，对通过以由导体构成的路径连接功率级差动放大电路32和开关34S(图2)而获得的优异效果进行说明，其中，上述导体包含再布线层的部件间连接布线71(图2)以及多层布线结构52内的布线53(图2)。例如，高频电流通过该路径流动。在该情况下，由导体构成的路径作为“电流路径”发挥作用。此外，也存在将开关34S插入在即使接通开关34S也几乎不流动电流的位置的情况。例如，也存在在接通开关34S时，经由开关34S，主要传输高频的电压信号的情况。在任意情况下，由该导体构成的路径作为传播高频信号的信号路径发挥作用。
在具有重叠元素半导体系的半导体芯片和化合物半导体系的半导体芯片的结构的以往的半导体装置中，一般采用通过键合线连接层叠的两个半导体芯片的结构。若通过键合线连接第二部件22的功率级差动放大电路32和第一部件21的开关34S，则不能忽略键合线所具有的寄生电感的影响。在图1所示的等效电路图中，在接通了开关34S的状态下，与电容器34A串联地插入寄生电感。
为了估计寄生电感的影响，在存在寄生电感的情况下和没有寄生电感的情况下，求出接通开关34S的状态下的电容器34A(图1)的S参数S21。
图7A以及图7B分别是表示在寄生电感为零的条件下以及寄生电感为2nH的条件下进行模拟的结果的图表。横轴以单位“GHz”表示频率，纵轴以单位“dB”表示参数S21。图7A以及图7B中示出的六根曲线分别表示电容器34A为2pF、4pF、6pF、8pF、10pF以及12pF时的参数S21。
可知在寄生电感为2nH的情况下，产生LC串联电路的谐振。这样，若寄生阻抗增大到不可忽略的程度，则不能进行如设计那样的阻抗转换。在第一实施例中，功率级差动放大电路32和开关34S不使用键合线，而通过包含再布线层的部件间连接布线71以及多层布线结构52内的布线53的路径连接。因此，能够抑制与电容器34A串联地插入的寄生电感的增大。
在第一实施例(图2)中，由于第二部件22与第一部件21面接触，所以从配置于第二部件22的晶体管32T(图1)到第一部件21的导热路径的热阻降低。在晶体管32T中产生的热量通过第一部件21与第二部件22的界面传导至第一部件21。被传导至第一部件21的热量在第一部件21内扩散，并从第一部件21的表面散热到外部。另外，由于第一部件21本身与第二部件22相比具有较大的热容量，所以第一部件21作为散热片发挥作用。
为了提高经由第一部件21的散热特性，优选第一部件21的半导体区域，例如半导体基板51(图2)使用具有比构成晶体管32T的化合物半导体材料的热传导率高的热传导率的半导体材料。例如，第一部件21的半导体区域优选使用硅、锗等元素半导体。
并且，在第一实施例(图2)中，在晶体管32T中产生的热量经由焊盘72以及导体突起82(图2)传导至模块基板25(图4)。这样，由于形成从晶体管32T到第一部件21的导热路径和经由导体突起82到达模块基板25的导热路径这两个路径，所以能够提高抑制晶体管32T的温度上升的效果。
接下来，参照图8对第一实施例的变形例进行说明。
图8是第一实施例的变形例的高频功率放大器20中使用的电容可变电路34的等效电路图。在第一实施例中，构成电容可变电路34的两个电容器34A与电容器34B相互并联连接。与此相对，在图8所示的变形例中，构成电容可变电路34的两个电容器34C和34D相互串联连接。开关34S与一个电容器34D并联连接。
在本变形例中，开关34S和功率级差动放大电路32的一个输入端口经由再布线层的部件间连接布线71连接，不使用键合线。在本变形例中，通过切换开关34S的接通断开，来使电容可变电路34的电容变化。作为电容可变电路34，能够采用包含开关和多个电容器，且通过切换开关的接通断开而电容发生变化的各种电路结构。
在上述第一实施例中，对半导体装置是高频功率放大器的例子进行了说明，但上述实施例的技术思想能够应用于高频功率放大器以外的各种高频电路装置。例如，在将作用于形成于第二部件22的包含化合物半导体系的半导体元件的高频电路的开关形成于第一部件21的情况下，经由再布线层内的部件间连接布线71连接第二部件22内的高频电路和第一部件21的开关即可。由此，能够减少与开关串联地插入的寄生电感。
[第二实施例]
接下来，参照图9对第二实施例的高频功率放大器进行说明。以下，对于与参照图1至图7B的附图说明的第一实施例的高频功率放大器共用的结构省略说明。
图9是搭载于第二实施例的高频功率放大器的半导体装置23的示意剖视图。在第一实施例(图2)中，将形成于第一部件21的开关34S和形成于第二部件的功率级差动放大电路32经由再布线层内的部件间连接布线71连接。与此相对，在第二实施例中，开关34S和功率级差动放大电路32经由包含使电流在与接合第一部件21和第二部件22的界面交叉的方向上流动的导电部件的路径连接。
第一部件21除了半导体基板51以及多层布线结构52以外，还包含配置于多层布线结构52的上表面的粘合层55。粘合层55被划分为多个金属区域55A、55B以及绝缘区域55C。绝缘区域55C将多个金属区域55A、55B等电分离。金属区域55A与第二部件22内的功率级差动放大电路32的一个输入端口连接。金属区域55A经由多层布线结构52内的布线56与开关34S连接。包含金属区域55A以及布线56的路径连接功率级差动放大电路32和开关34S，该路径使电流在与第一部件21和第二部件22面接触的界面交叉的方向上流动。
焊盘73通过设置于层间绝缘膜77的开口连接到金属区域55B。导体突起83经由焊盘73、金属区域55B以及多层布线结构52内的布线54与开关34S连接。导体突起83与安装于模块基板25(图4)的电容器34A连接。
接下来，对第二实施例的优异效果进行说明。
在第二实施例中，不使用键合线，连接第二部件22的功率级差动放大电路32和第一部件21的开关34S。因此，能够抑制与开关34S串联地插入的寄生电感的增大。并且，在第二实施例中也与第一实施例相同，可获得高频功率放大器的小型化、抑制制造成本增大、抑制功率级差动放大电路32所包含的晶体管32T的温度上升这样的各种效果。
[第三实施例]
接下来，参照图10以及图11对第三实施例的半导体模块进行说明。第三实施例的半导体模块是高频功率放大器。以下，对于与参照图1至图7B的附图说明的第一实施例的半导体装置共用的结构省略说明。
图10是第三实施例的高频功率放大器20的示意等效电路图。图11是第三实施例的高频功率放大器20的示意剖视图。在第一实施例(图1)中，开关34S和功率级差动放大电路32的一个输入端口经由再布线层内的部件间连接布线71相互连接。与此相对，在第三实施例中，开关34S经由设置于第一部件21的导体突起85、模块基板25内的布线28、以及设置于第二部件22的导体突起86，与功率级差动放大电路32的一个输入端口连接。
接下来，对第三实施例的优异效果进行说明。
在第三实施例中，不使用键合线，连接第二部件22的功率级差动放大电路32和第一部件21的开关34S。因此，能够抑制与开关34S串联地插入的寄生电感的增大。并且，在第三实施例中也与第一实施例相同，可获得高频功率放大器的小型化、抑制制造成本增大、抑制功率级差动放大电路32所包含的晶体管32T的温度上升这样的各种效果。
[第四实施例]
接下来，参照图12对第四实施例的高频功率放大器进行说明。以下，对于与参照图1至图7B的附图说明的第一实施例的高频功率放大器共用的结构省略说明。
图12是第四实施例的高频功率放大器20的示意等效电路图。在第一实施例(图1)中，电容可变电路34的两个电容器34A、电容器34B由安装于模块基板25(图4)的表面安装型的无源部件构成。与此相对，在第四实施例中，两个电容器34A、电容器34B配置于第一部件21内。例如，能够通过第一部件21的多层布线结构52(图2)内的第一层布线层所包含的金属图案和第二层布线层所包含的金属图案，构成电容器34A、电容器34B。
配置于第一部件21的电容器34A、电容器34B的一个电极经由再布线层所包含的部件间连接布线74与功率级差动放大电路32的一个输入端口连接。
接下来，参照图13至图15的附图，对第四实施例的变形例的高频功率放大器进行说明。图13、图14以及图15分别是第四实施例的变形例的高频功率放大器20的示意等效电路图。
在图13所示的变形例中，除了电容器34A、电容器34B以外，第一平衡转换器33也配置于第一部件21。第一平衡转换器33的一次线圈的一端经由再布线层所包含的部件间连接布线75与第二部件22的驱动级放大电路31的输出端口连接。
在图14所示的变形例中，两个电容器34A、电容器34B配置于第二部件22。电容器34A、电容器34B例如能够与输入电容器Cin(图3B)同样地、由第一层布线层所包含的金属图案和第二层布线层所包含的金属图案构成。
开关34S与电容器34A经由再布线层所包含的部件间连接布线76相互连接。另外，电容器34A、电容器34B经由设置于第二部件22的导体突起(在图14中为空心的正方形)与第一平衡转换器33的二次线圈连接。
在图15所示的变形例中，除了两个电容器34A、电容器34B以外，第一平衡转换器33也配置于第二部件22。作为一个例子，第一平衡转换器33的一次线圈以及二次线圈分别能够由第二部件22(图3B)的第一层布线层所包含的金属图案以及第二层布线层所包含的金属图案形成。
作为另一变形例，也可以将第二平衡转换器35以及输出匹配电路38分别配置于第一部件21或第二部件22。
接下来，对第四实施例以及其变形例的优异效果进行说明。
如第四实施例及其变形例所示，也可以代替由安装于模块基板25的表面安装型的电路部件构成组成高频功率放大器20的各种电路元件，而由第一部件21或第二部件22内的布线层所包含的金属图案等构成组成高频功率放大器20的各种电路元件。通过将电路元件配置于第一部件21或第二部件22，与由表面安装型的电路部件构成的结构相比，能够实现高频功率放大器20的小型化。
相反，若像第一实施例那样，由表面安装型的电路部件构成各种电路元件，则与在第一部件21或第二部件22内配置电路元件的结构相比，能够抑制无源元件的电路常量的偏差。并且，能够抑制设置于第一部件21以及第二部件22的多层布线结构所包含的布线层的层数的增加。由安装于模块基板25的表面安装型的电路部件构成高频功率放大器20的各种电路元件、还是由第一部件21或第二部件22内的金属图案构成高频功率放大器20的各种电路元件可以根据高频功率放大器20所要求的规格来决定。
[第五实施例]
接下来，参照图16对第五实施例的高频功率放大器进行说明。以下，对于与参照图1～图7B的附图说明的第一实施例的高频功率放大器共用的结构省略说明。
图16是第五实施例的高频功率放大器20的示意等效电路图。在第一实施例(图1)中，作为驱动级放大电路31，使用单端信号用的放大电路。与此相对，在第五实施例中，驱动级放大电路31与功率级相同使用差动放大电路。
在第一实施例(图1)中，第一平衡转换器33以及电容可变电路34被插入到驱动级放大电路31与功率级差动放大电路32之间，但在第五实施例中，第一平衡转换器33以及电容可变电路34连接到驱动级放大电路31的输入侧。由第一平衡转换器33从单端信号转换而成的差动信号被输入到驱动级放大电路31的两个输入端口。驱动级放大电路31的一个输入端口与开关34S通过再布线层内的部件间连接布线71相互连接。
接下来，对第五实施例的优异的效果进行说明。
在第五实施例中，不使用键合线，来连接第二部件22的驱动级放大电路31和第一部件21的开关34S。因此，能够抑制与开关34S串联地插入的寄生电感的增大。并且，在第五实施例中也与第一实施例相同，可获得高频功率放大器的小型化、抑制制造成本增大、抑制功率级差动放大电路32的晶体管32T的温度上升这样的各种效果。
上述的各实施例是例示，可以说能够进行在不同的实施例中示出的结构的部分置换或组合。对于由多个实施例的相同的结构起到的相同的作用效果，不在每个实施例中依次提及。并且，本发明并不限制于上述的实施例。例如，对本领域技术人员来说，能够进行各种变更、改进、组合等是显而易见的。

Claims (8)

1.一种半导体装置，具备：
第一部件，设置有由元素半导体系的半导体元件构成的开关；
第二部件，设置有包含化合物半导体系的半导体元件的高频电路，并与上述第一部件接合；以及
路径，连接上述开关和上述高频电路，
上述路径包含部件间连接布线、或者导电部件，上述部件间连接布线配置在从上述第二部件的表面到上述第一部件的表面的层间绝缘膜上的由金属图案构成，上述导电部件使电流在与接合上述第一部件和上述第二部件的界面交叉的方向上流动。
2.根据权利要求1所述的半导体装置，其中，
上述高频电路包含差动放大电路，
上述半导体装置还具备电容可变电路，上述电容可变电路连接在传输向上述差动放大电路输入的差动信号的一对布线之间，包含电容器以及上述开关，一对布线间的电容根据上述开关的接通断开而变化。
3.根据权利要求2所述的半导体装置，其中，
构成上述电容可变电路的电容器形成于上述第一部件。
4.根据权利要求2所述的半导体装置，还具备：
第一平衡转换器，将单端信号转换为向上述差动放大电路输入的差动信号；以及
第二平衡转换器，将从上述差动放大电路输出的差动信号转换为单端信号。
5.根据权利要求4所述的半导体装置，其中，
上述第一平衡转换器以及上述第二平衡转换器形成于上述第一部件。
6.根据权利要求4或5所述的半导体装置，其中，
还具备驱动级放大电路，上述驱动级放大电路输出向上述第一平衡转换器输入的单端信号。
7.根据权利要求4或5所述的半导体装置，其中，
还具备功率级差动放大电路，上述功率级差动放大电路放大从上述差动放大电路输出的信号，并输出向上述第二平衡转换器输入的差动信号。
8.一种半导体模块，具备：
半导体装置，包含设置有由元素半导体系的半导体元件构成的开关的第一部件、以及设置有包含化合物半导体系的半导体元件的高频电路并与上述第一部件接合的第二部件；
模块基板，安装有上述半导体装置；以及
路径，连接上述开关和上述高频电路，
上述半导体装置包含与上述开关连接的第一导体突起以及与上述高频电路连接的第二导体突起，
上述路径包含上述第一导体突起、设置于上述模块基板的布线、以及上述第二导体突起。
CN202111516855.6A 2020-12-14 2021-12-13 半导体装置以及半导体模块 Pending CN114628357A (zh)

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