CN1146192C - Ethernet exchange chip output queue management and dispatching method and device - Google Patents
Ethernet exchange chip output queue management and dispatching method and device Download PDFInfo
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Abstract
The present invention relates to a method for dispatching and managing an output queue of an ethernet exchange chip and a device thereof., which relates to the technology of electric digital data processing and equipment. A single-message or multi-message control separation module makes a frame control block output a queue in the unicast and multicast separating mode of each port; a frame control block of unicast data sets a unicast queue according to a mode of multiple priority queues; the unicast queue is maintained by a congestion control algorithm, and a frame control block of multicast data is maintained in an independent mode of a multicast queue by a congestion control algorithm of directly discarding the tail of the queue and is organized in the mode of an FIFO queue; afterwards, unicast and multicast priority queues are matched and set. If a unicast queue and a multicast queue simultaneously exist in a despatcher of an output queue, the dispatching of the unicast queue and the multicast queue is carried out again by a dispatching algorithm after the port dispatching between two ports and the priority dispatching in the ports; after the dispatching, output a dispatching result; else, directly output the dispatching result. The present invention can realize quick data processing and significant allocation of resources.
Description
[technical field]
The present invention relates to electric numerical data treatment technology and equipment, relate in particular to a kind of Ethernet switching chip output queue management and dispatching method and device.
[background technology]
The shared buffer memory formula Ethernet switching chip of storage-forward mode work, it is transmitted processing procedure and can be described below with following several treatment steps, as shown in Figure 1:
1, receive also data cached frame: the Frame that enters exchange chip from outside port is cached to the shared buffer memory through input interface, the distribution of shared buffer memory is managed by address pointer by caching management module, in the process of processing afterwards, the main body of Frame will be kept in the shared buffer memory all the time, have only the buffer address pointer in chip, to transmit, up to transmitting instruction issuing, according to the buffer address pointer outside port is read and sent to data by output interface from shared buffer memory again to output interface.
2, destination interface is searched: when Frame writes buffer memory, input interface module extracts from Frame and is used for information that frame is transmitted, with the address of Frame in buffer memory, send to forwarding engine, forwarding engine carries out the forwarding lookup operation according to these information to Frame, obtains the destination interface of Frame.Forwarding engine outputs to other information of the buffer address pointer of the forwarding destination interface of Frame, Frame, Frame component frame controll block FCB together to wait for scheduling output in the output queue management module.
3, output queue management: so-called output queue, be meant frame controll block FCB is lined up by the mode of every port output queue, wait outputs to outside port, the base attribute of formation is a fifo fifo, and the length of formation is limited, queue management is administration queue length at first, the frame controll block FCB that formation is lined up if desired then is called congested too much, queue management this moment process just need selectively abandon the frame controll block of some waiting lineses, so that formation normally moves, the first in first out behavior of administration queue is also wanted in queue management, guarantees that frame controll block FCB can enter and leave formation fast.
4, output scheduling: in general; in order to guarantee different service quality; each output port always has a plurality of output queues; and a plurality of ports also usually can have Frame to need output simultaneously; the output scheduling process is selected from a plurality of port queues exactly, has only current selected formation to deliver to the frame controll block FCB of queuing in the output interface.
5, send Frame: after output interface was received the frame controll block of scheduling output, the shared buffer memory address pointer according to wherein carrying read out Frame from shared buffer memory, send to external output port, and so far, the repeating process of ethernet data frame is finished.
In order to provide service quality to guarantee, Ethernet switching chip uses the mode of priority query to organize the output queue of every port usually, as shown in Figure 2, each port has m priority query, each need be forwarded to the Frame of certain port, can be forwarded engine is divided in certain priority according to its business demand, this Frame will enter the corresponding priority query of this port when output work queue, the output scheduling process need is formation of each selection from these formations of each port, and the frame controll block FCB that takes out in the formation sends.
From above process as can be seen, output queue management ability and output scheduling ability have great influence to the transfer capability and the performance quality of chip.
In order to solve output queue management and output scheduling problem, technical scheme commonly used as shown in Figure 3, each formation of all output ports all uses chained list to manage, be that each output queue will corresponding chained list in the chip, all these chained list common storage are in a queue management memory block, be the output queue chained list RAM among Fig. 3, because the access speed of output queue chained list RAM is limited, frame controll block FCB from forwarding engine uses the buffer memory of a fifo fifo type to preserve usually earlier, the output queue scheduler uses certain polling dispatching algorithm computation to choose which formation to export at every turn, all Frames enter formation and read formation and all finished by output queue management, the reading of concrete interpolation that is operating as the chained list afterbody and chained list head.
The operation more complicated of chained list, and multicast data frame need enter a plurality of output queues, the formation of going into is at this moment operated, just carrying out repeatedly chained list continuously adds, to become the bottleneck of system like this, and cause the frame controll block FCB of back to wait for, meeting bulk deposition in the fifo fifo buffer memory.
In this technical scheme, output queue chained list RAM of the common use of all chained lists, this chained list is a kind of data structure very flexibly, individual queue can be shared the resource of output queue chained list RAM, allow the length random variation of individual queue, show two output queues as Fig. 4, be formation 1 and formation 2, in each comfortable output queue chained list address ram one section, wherein dotted line is represented formation 1, solid line is represented formation 2, output queue leaves among the output queue chained list RAM, the corresponding ram cell of each address ram, and each ram cell is divided into two parts: the data division of chained list, the pointer part of chained list, when entering formation, Frame do not distinguish list, multicast data frame, formation use the mode of chain list index to couple together.
For such output queue organization and management mode, the scheduling output algorithm structure of its correspondence can be done following statement with reference to figure 5: the output queue scheduling is divided into two-level scheduler, and flow process is as follows:
Port Scheduling between a, port: because all output data frames all leave in the central shared buffer memory, a Frame output can only be arranged at every turn, therefore need between all output ports, to dispatch earlier, determine which port can output data frame, common polling algorithm has: WRR WRR, band deficit poll DRR etc.
Output queue scheduling in b, the port: after having selected output port, once select among a plurality of priority queries in each port again, determine finally can output data frame formation, common polling algorithm has: WRR WRR, band deficit poll DRR, improved deficit poll MDRR, strict priority poll, weighted-fair poll WFQ etc.
Obtain output queue number through such two-level scheduler, just can require the output queue management module to export the frame controll block FCB of corresponding formation head of the queue, be passed to output interface and carry out Frame and export.
Adopt the major defect of above technical scheme to be:
At first, because the shared output queue chained list RAM of all formations, and the access bandwidth of output queue chained list RAM is limited, for multicast data frame, it need be copied in a plurality of output queues, thereby need consumption plenty of time ability reproducible to finish, the speed bottle-neck that becomes prior art is duplicated in multicast like this, because the reproduction process of each multicast frame controll block FCB is slow, follow-up frame controll block FCB have to wait in going into the fifo fifo buffer memory of formation, cause increase time of delay on the one hand, on the other hand, can be caused Frame to abandon if fifo fifo piles, systematic function is had bigger influence because of the system handles underspeed.
Secondly, all clean culture and the multicast frame controll block FCB queuing that mixes in each formation, scheduler module is not separating unicast or multicast when carrying out poll, just carries out polling operation according to the distribution bandwidth of port.In fact, single, the quality of service requirement of multicast data frame on network is different, be mixed in the formation and then can't distinguish, cause between two kinds of Frames and interact, the service quality that can't provide, especially under the situation that multicast traffic is bigger, unicast traffic will be subjected to very big impact.
Once more, can't carry out congested control according to what the characteristics of clean culture and multicast traffic were treated with a certain discrimination, queue length is subjected to the exchange chip resource limit, impossible endless, if there is too many Frame controll block FCB to line up to an output queue, for guaranteeing the formation normal running, must adopt congestion avoidance algorithm, selectively abandon some Frames, and it is single, the characteristics of multicast data frame are different, it is also different that they stand the ability that Frame abandons, but single, multicast data frame is blended in a formation and makes and can't select to abandon at the flow characteristics of Frame, has influenced the use of queue resource.
[summary of the invention]
The object of the present invention is to provide the Ethernet switching chip output queue management and dispatching method and the device of a kind of rapid data processing and effective Resources allocation.
The output queue management and dispatching method that is adopted among the present invention is:
A. receive and data cached frame, that is: Frame is cached in the shared buffer memory through input interface, the distribution of shared buffer memory is managed by address pointer by caching management module, in the later processing procedure, the main body of Frame will be kept in the shared buffer memory all the time, up to transmitting instruction issuing, according to the buffer address pointer outside port is read and sent to data by output interface from shared buffer memory again to output interface;
B. destination interface searches, promptly, when Frame writes buffer memory, input interface extracts from Frame and is used for information that Frame is transmitted, with the address of Frame in buffer memory, send to forwarding engine, forwarding engine is transported to the output queue management module to other information of the buffer address pointer of the forwarding destination interface of Frame, Frame, Frame component frame controll block together;
C. the management of output queue, promptly, earlier the output queue of every port is organized according to the mode that list, multicast separate, in different ways unicast queue and multicast formation are provided with respectively then and organize, safeguard unicast queue and multicast formation respectively with congestion avoidance algorithm again;
D. output scheduling, promptly, at first before the dispatching algorithm operation, setting is mated in list, multicast priority query, make the priority setting of multicast formation corresponding, carry out the Port Scheduling between port then successively, priority scheduling in the port with the priority of unicast queue, single, multicast formation are delivered to the frame controll block of selected formation in the output interface at last;
E. after output interface was received the frame controll block of scheduling output, the shared buffer memory address pointer according to wherein carrying read out Frame from shared buffer memory, send to external output port.
In the management of output queue, unicast data frames controll block is provided with unicast queue by the mode of a plurality of priority queries, and multicast data frame controll block adopts independently multicast formation mode, and this multicast formation adopts the mode of fifo queue to organize; The congestion avoidance algorithm of multicast formation adopts the direct discarding method of tail of the queue; The congestion avoidance algorithm of unicast queue adopts at random, and early drop RED, cum rights WRED of early drop at random or tail of the queue heavily directly abandon; The multicast formation is provided with 2 at each port; In the output scheduling, list, multicast formation are arranged simultaneously in the priority, can adopt the dispatching algorithm of WRR WRR or strict priority, list, multicast formation are dispatched.
The technical scheme that the Ethernet switching chip output queue management and dispatching device of the above-mentioned output queue management and dispatching method of application is adopted among the present invention is: a kind of application rights requires the Ethernet switching chip output queue management and dispatching device of 1 described output queue management and dispatching method, in Ethernet switching chip, comprise input interface 1, shared buffer memory 2, caching management module 4, forwarding engine 5, output queue management module 6, scheduler module 7 and output interface 3, when Frame writes buffer memory, input interface 1 extracts from Frame and is used for information that frame is transmitted, with the address of Frame in buffer memory, send to forwarding engine 5, forwarding engine 5 is transported to output queue management module 6 to frame controll block, it is characterized in that: comprise list/multicast message control separation module 61 in the output queue management module 6, the clean culture output queue go out to join the team the arbitration 62 and the multicast output queue go out to join the team the arbitration 63; List/multicast message control separation module 61 links to each other with arbitration 62 and the multicast output queue arbitration 63 that goes out to join the team that goes out to join the team of clean culture output queue respectively, and clean culture output queue go out to join the team arbitration 62 and multicast output queue goes out to join the team and arbitrate 63 and link to each other with scheduler module 7; List/multicast message control separation module 61 is with single, the mode output queue that multicast separate of frame controll block by every port, unicast data frames controll block is provided with unicast queue by clean culture output queue arbitration 62 modes by a plurality of priority queries that go out to join the team, and uses congestion avoidance algorithm to safeguard unicast queue; Multicast data frame controll block adopts independently by the arbitration 63 that goes out to join the team of multicast output queue that multicast formation mode is provided with the multicast formation, this multicast formation adopts the mode of fifo queue to organize, the congestion avoidance algorithm that adopts tail of the queue directly to abandon is safeguarded, carry out the coupling setting between list, multicast priority query then, the priority that is about to the multicast formation is set to corresponding with the priority of corresponding unicast queue; In scheduler module 7 through behind the priority scheduling in Port Scheduling between port and the port, if list, multicast formation are arranged in the priority simultaneously, then adopt dispatching algorithm to carry out scheduling between list, multicast formation again, scheduling back output scheduling result, otherwise, direct output scheduling result.
The shared clean culture output queue chained list RAM of unicast queue; An independently multicast output queue data fifo RAM is adopted in the multicast formation at least.
Beneficial effect of the present invention is: in the present invention, will be single, the multi-case data frame queue separates, like this can be according to list, the characteristics of multicast traffic, adopt corresponding quick to clean culture and multicast output queue respectively, effective output queue mode and congestion avoidance algorithm, can guarantee the multicast data frame quick copy, and effective Resources allocation, utilize the coupling setting up procedure with single, the multicast output queue connects, adopt dispatching algorithm to dispatch, control is single flexibly, the multicast traffic bandwidth, make resource allocation optimization, therefore, the present invention can realize that rapid data is handled and effective Resources allocation.
Use independent multicast formation to manage to multicast data frame controll block FCB, each port is provided with 2 multicast formations generally is enough to support great majority to be used, make the multicast data frame quick copy, and needed cost is lower, can obtains cost-performance ratio preferably; List, multicast formation are arranged in priority simultaneously, adopt the dispatching algorithm of WRR WRR or strict priority, calculate simply, be easy to realize, further improved practicality of the present invention because of this dispatching algorithm; In the Ethernet switching chip output queue management and dispatching method, the congestion avoidance algorithm that the multicast formation adopts simple tail of the queue directly to abandon can be realized simply, calculate fast; In Ethernet switching chip output queue management and dispatching device, the shared clean culture output queue chained list RAM of unicast queue, an independently multicast output queue data fifo RAM is adopted in the multicast formation at least, interacting between list, multicast traffic significantly reduced, can be provided with and mate the service request of various flows flexibly, provide higher assurance list, the multicast data frame service quality on network.
In a word, the present invention can realize that rapid data is handled and effective Resources allocation, and calculating is simple, quick, and cost is low, the network service quality height.
[description of drawings]
Fig. 1 is existing exchange chip data handling procedure schematic diagram;
Fig. 2 is the output queue schematic diagram of existing switching chip port;
Fig. 3 is existing exchange chip queue management schematic diagram;
Fig. 4 is existing exchange chip output queue chain hoist pennants;
Fig. 5 is existing exchange chip scheduling output algorithm structural representation;
Fig. 6 is a multicast formation schematic diagram;
Fig. 7 is single, multicast priority query coupling schematic diagram;
Fig. 8 is scheduling output algorithm structural representation;
Fig. 9 is the structural representation of queue management scheduling of the present invention.
[embodiment]
With embodiment the present invention is described in further detail with reference to the accompanying drawings below:
According to Fig. 6, Fig. 7, Fig. 8 and Fig. 9, with reference to figure 1, in Ethernet switching chip, comprise input interface 1, shared buffer memory 2, caching management module 4 and output interface 3, when Frame writes buffer memory, input interface 1 extracts from Frame and is used for information that frame is transmitted, with the address of Frame in buffer memory, send to forwarding engine 5, forwarding engine 5 is transported to output queue management module 6 to frame controll block FCB, comprise in the output queue management module 6 that list/multicast message control separation module 61 is with the list of frame controll block FCB by every port, the mode output queue that multicast separates, as shown in Figure 9, unicast data frames controll block FCB through the clean culture output queue go out to join the team the arbitration 62 modes by a plurality of priority queries unicast queue is set, the shared clean culture output queue chained list RAM621 of unicast queue, use congestion avoidance algorithm to safeguard unicast queue, the congestion avoidance algorithm of unicast queue can adopt early drop RED at random, WRED of early drop at random or tail of the queue that cum rights is heavy directly abandon; Multicast data frame controll block FCB 63 adopts independently multicast formation mode through the arbitration that goes out to join the team of multicast output queue, the multicast formation is provided with 2 at each port, an independently multicast output queue data fifo RAM631 is adopted in the multicast formation, multicast formation as shown in Figure 6, this multicast formation adopts the mode of fifo fifo formation to organize, the congestion avoidance algorithm that adopts tail of the queue directly to abandon is safeguarded, carry out list then, coupling setting between multicast priority query, as shown in Figure 7, for example, certain clean culture has 4 priority queries, multicast has 2 priority queries, 2 priority just determining multicast when coupling is provided with are corresponding with which 2 of 4 priority of clean culture respectively, in this example, if 4 priority queries of clean culture are UQ1, UQ2, UQ3, UQ4,2 priority queries of multicast are MQ1, MQ2, if it is corresponding with UQ2 that MQ1 is set, MQ2 is corresponding with UQ4, has then obtained 4 such priority level: UQ1, UQ2﹠amp; MQ1, UQ3, UQ4﹠amp; MQ2, the priority of multicast formation is set to corresponding with the priority of corresponding unicast queue like this, priority scheduling in Port Scheduling in output queue scheduler 74 between the process port and the port, the dispatching algorithm of the Port Scheduling between port can adopt WRR WRR, deficit WRR DRR etc., the dispatching algorithm of priority scheduling can be in the port: WRR WRR, band deficit poll DRR, improved band deficit poll MDRR, strict priority poll etc., as shown in Figure 8, if list is arranged in the priority simultaneously, the multicast formation, then adopt dispatching algorithm to carry out list again, scheduling between the multicast formation, scheduling back output scheduling result, otherwise, direct output scheduling result, can adopt the dispatching algorithm of WRR WRR or strict priority here, to list, the multicast formation is dispatched, the frame controll block FCB of selected formation handle delivers in the output interface 3, after output interface 3 is received the frame controll block FCB of output queue scheduler 74 in scheduler module 7, according to shared buffer memory 2 address pointers that wherein carry, output interface 3 reads out Frame from shared buffer memory 2, send to external output port.
Claims (9)
1. Ethernet switching chip output queue management and dispatching method, this method may further comprise the steps:
A. receive and data cached frame, that is: Frame is cached in the shared buffer memory (2) through input interface (1), the distribution of shared buffer memory (2) is managed by address pointer by caching management module (4), in the later processing procedure, the main body of Frame will be kept in the shared buffer memory (2) all the time, up to transmitting instruction issuing, according to the buffer address pointer outside port is read and sent to data by output interface (3) from shared buffer memory (2) again to output interface (3);
B. destination interface searches, promptly, when Frame writes buffer memory, input interface (1) extracts from Frame and is used for information that Frame is transmitted, with the address of Frame in buffer memory, send to forwarding engine (5), forwarding engine (5) is transported to the output queue management module to other information of the buffer address pointer of the forwarding destination interface of Frame, Frame, Frame component frame controll block together;
C. the management of output queue, promptly, earlier the output queue of every port is organized according to the mode that list, multicast separate, in different ways unicast queue and multicast formation are provided with respectively then and organize, safeguard unicast queue and multicast formation respectively with congestion avoidance algorithm again;
D. output scheduling, promptly, at first before the dispatching algorithm operation, setting is mated in list, multicast priority query, make the priority setting of multicast formation corresponding, carry out the Port Scheduling between port then successively, priority scheduling in the port with the priority of unicast queue, single, multicast formation are delivered to the frame controll block of selected formation in the output interface (3) at last;
E. after output interface (3) is received the frame controll block of scheduling output,, Frame is read out from shared buffer memory (2), send to external output port according to the shared buffer memory of wherein carrying (2) address pointer.
2. Ethernet switching chip output queue management and dispatching method according to claim 1, it is characterized in that: in the management of described output queue, unicast data frames controll block is provided with unicast queue by the mode of a plurality of priority queries, multicast data frame controll block adopts independently multicast formation mode, and this multicast formation adopts the mode of fifo queue to organize.
3. Ethernet switching chip output queue management and dispatching method according to claim 1 and 2 is characterized in that: the congestion avoidance algorithm of described multicast formation adopts the direct discarding method of tail of the queue.
4. Ethernet switching chip output queue management and dispatching method according to claim 1 and 2 is characterized in that: the congestion avoidance algorithm of described unicast queue adopts early drop at random, early drop at random or tail of the queue that cum rights is heavy directly to abandon.
5. Ethernet switching chip output queue management and dispatching method according to claim 1 and 2 is characterized in that: described multicast formation is provided with 2 at each port.
6. Ethernet switching chip output queue management and dispatching method according to claim 1, it is characterized in that: in the described output scheduling, list, multicast formation are arranged in the priority simultaneously, can adopt the dispatching algorithm of WRR or strict priority, list, multicast formation are dispatched.
7. an application rights requires the Ethernet switching chip output queue management and dispatching device of 1 described output queue management and dispatching method, in Ethernet switching chip, comprise input interface (1), shared buffer memory (2), caching management module (4), forwarding engine (5), output queue management module (6), scheduler module (7) and output interface (3), when Frame writes buffer memory, input interface (1) extracts from Frame and is used for information that frame is transmitted, with the address of Frame in buffer memory, send to forwarding engine (5), forwarding engine (5) is transported to output queue management module (6) to frame controll block, it is characterized in that: output queue management module (6) comprises list/multicast message control separation module (61), arbitration (62) and the multicast output queue arbitration (63) that goes out to join the team that goes out to join the team of clean culture output queue; List/multicast message control separation module (61) links to each other with arbitration (62) and the multicast output queue arbitration (63) that goes out to join the team that goes out to join the team of clean culture output queue respectively, and arbitration (62) and the multicast output queue arbitration (63) that goes out to join the team that goes out to join the team of clean culture output queue links to each other with scheduler module (7) again; List/multicast message control separation module (61) is with single, the mode output queue that multicast separate of frame controll block by every port, unicast data frames controll block is provided with unicast queue by the arbitration (62) that goes out to join the team of clean culture output queue by the mode of a plurality of priority queries, uses congestion avoidance algorithm to safeguard unicast queue; Multicast data frame controll block adopts independently by the arbitration (63) that goes out to join the team of multicast output queue that multicast formation mode is provided with the multicast formation, this multicast formation adopts the mode of fifo queue to organize, the congestion avoidance algorithm that adopts tail of the queue directly to abandon is safeguarded, carry out the coupling setting between list, multicast priority query then, the priority that is about to the multicast formation is set to corresponding with the priority of corresponding unicast queue; In scheduler module (7) through behind the priority scheduling in Port Scheduling between port and the port, if list, multicast formation are arranged in the priority simultaneously, then adopt dispatching algorithm to carry out scheduling between list, multicast formation again, scheduling back output scheduling result, otherwise, direct output scheduling result.
8. Ethernet switching chip output queue management and dispatching device according to claim 7 is characterized in that: the shared clean culture output queue chained list RAM of described unicast queue (621).
9. according to claim 7 or 8 described Ethernet switching chip output queue management and dispatching devices, it is characterized in that: an independently multicast output queue data RAM (631) is adopted in described multicast formation at least.
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-
2002
- 2002-04-17 CN CNB021089787A patent/CN1146192C/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100421420C (en) * | 2005-08-02 | 2008-09-24 | 华为技术有限公司 | Method for dispatching variable length data packet queue in crossbar switching matrix |
| CN101938404B (en) * | 2009-07-01 | 2012-11-28 | 中兴通讯股份有限公司 | Random early detection method and device for data flow management |
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