CN114586019A - 基于存储器的处理器 - Google Patents

基于存储器的处理器 Download PDF

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Publication number
CN114586019A
CN114586019A CN202080071415.1A CN202080071415A CN114586019A CN 114586019 A CN114586019 A CN 114586019A CN 202080071415 A CN202080071415 A CN 202080071415A CN 114586019 A CN114586019 A CN 114586019A
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China
Prior art keywords
memory
processing
processor
database
integrated circuit
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Pending
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CN202080071415.1A
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English (en)
Chinese (zh)
Inventor
E.西蒂
E.希勒尔
S.布劳多
D.沙米尔
G.达扬
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Nuro Brad Ltd
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Nuro Brad Ltd
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Publication of CN114586019A publication Critical patent/CN114586019A/zh
Pending legal-status Critical Current

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/78Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7807System on chip, i.e. computer system on a single chip; System in package, i.e. computer system on one or more chips in a single package
    • G06F15/7821Tightly coupled to memory, e.g. computational memory, smart memory, processor in memory
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0215Addressing or allocation; Relocation with look ahead addressing means
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14Protection against unauthorised use of memory or access to memory
    • G06F12/1416Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights
    • G06F12/1425Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block
    • G06F12/1441Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block for a range
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/78Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0811Multiuser, multiprocessor or multiprocessing cache systems with multilevel cache hierarchies
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0813Multiuser, multiprocessor or multiprocessing cache systems with a network or matrix configuration
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0862Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/45Caching of specific data in cache memory
    • G06F2212/454Vector or matrix data
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Computer Security & Cryptography (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Software Systems (AREA)
  • Dram (AREA)
  • Memory System (AREA)
  • Storage Device Security (AREA)
  • Semiconductor Memories (AREA)
CN202080071415.1A 2019-08-13 2020-08-13 基于存储器的处理器 Pending CN114586019A (zh)

Applications Claiming Priority (11)

Application Number Priority Date Filing Date Title
US201962886328P 2019-08-13 2019-08-13
US62/886,328 2019-08-13
US201962907659P 2019-09-29 2019-09-29
US62/907,659 2019-09-29
US201962930593P 2019-11-05 2019-11-05
US62/930,593 2019-11-05
US202062971912P 2020-02-07 2020-02-07
US62/971,912 2020-02-07
US202062983174P 2020-02-28 2020-02-28
US62/983,174 2020-02-28
PCT/IB2020/000665 WO2021028723A2 (en) 2019-08-13 2020-08-13 Memory-based processors

Publications (1)

Publication Number Publication Date
CN114586019A true CN114586019A (zh) 2022-06-03

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202080071415.1A Pending CN114586019A (zh) 2019-08-13 2020-08-13 基于存储器的处理器

Country Status (5)

Country Link
EP (1) EP4010808A4 (de)
KR (1) KR20220078566A (de)
CN (1) CN114586019A (de)
TW (1) TW202122993A (de)
WO (1) WO2021028723A2 (de)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110875066A (zh) * 2018-09-03 2020-03-10 爱思开海力士有限公司 半导体器件和包括半导体器件的半导体系统
CN115237036A (zh) * 2022-09-22 2022-10-25 之江实验室 一种针对晶圆级处理器系统的全数字化管理装置
CN118295960A (zh) * 2024-06-03 2024-07-05 芯方舟(上海)集成电路有限公司 一种算力芯片及其设计方法、制造方法及算力芯片系统

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US12073251B2 (en) 2020-12-29 2024-08-27 Advanced Micro Devices, Inc. Offloading computations from a processor to remote execution logic
WO2022245382A1 (en) * 2021-05-18 2022-11-24 Silicon Storage Technology, Inc. Split array architecture for analog neural memory in a deep learning artificial neural network
US11327771B1 (en) * 2021-07-16 2022-05-10 SambaNova Systems, Inc. Defect repair circuits for a reconfigurable data processor
US20230051863A1 (en) * 2021-08-10 2023-02-16 Micron Technology, Inc. Memory device for wafer-on-wafer formed memory and logic
CN115729845A (zh) * 2021-08-30 2023-03-03 华为技术有限公司 数据存储装置和数据处理方法
US11914532B2 (en) 2021-08-31 2024-02-27 Apple Inc. Memory device bandwidth optimization
US11947940B2 (en) * 2021-10-11 2024-04-02 International Business Machines Corporation Training data augmentation via program simplification
CN116264085A (zh) * 2021-12-14 2023-06-16 长鑫存储技术有限公司 存储系统以及存储系统的数据写入方法
TWI819480B (zh) * 2022-01-27 2023-10-21 緯創資通股份有限公司 加速系統及其動態配置方法
TWI776785B (zh) * 2022-04-07 2022-09-01 點序科技股份有限公司 裸晶測試系統及其裸晶測試方法
US11755399B1 (en) * 2022-05-24 2023-09-12 Macronix International Co., Ltd. Bit error rate reduction technology
TW202406056A (zh) * 2022-05-25 2024-02-01 以色列商紐羅布萊德有限公司 處理系統及方法
US20230393849A1 (en) * 2022-06-01 2023-12-07 Advanced Micro Devices, Inc. Method and apparatus to expedite system services using processing-in-memory (pim)
WO2024027937A1 (en) * 2022-08-05 2024-02-08 Synthara Ag Memory-mapped compact computing array
TWI843280B (zh) * 2022-11-09 2024-05-21 財團法人工業技術研究院 人工智慧加速器及其運作方法
CN115599025B (zh) * 2022-12-12 2023-03-03 南京芯驰半导体科技有限公司 芯片阵列的资源成组控制系统、方法及存储介质
CN116962176B (zh) * 2023-09-21 2024-01-23 浪潮电子信息产业股份有限公司 一种分布式集群的数据处理方法、装置、系统及存储介质
CN118133574B (zh) * 2024-05-06 2024-07-19 沐曦集成电路(上海)有限公司 一种sram生成系统

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002063069A (ja) * 2000-08-21 2002-02-28 Hitachi Ltd メモリ制御装置、データ処理システム及び半導体装置
US9612979B2 (en) * 2010-10-22 2017-04-04 Intel Corporation Scalable memory protection mechanism
US20140040622A1 (en) * 2011-03-21 2014-02-06 Mocana Corporation Secure unlocking and recovery of a locked wrapped app on a mobile device
US9262246B2 (en) * 2011-03-31 2016-02-16 Mcafee, Inc. System and method for securing memory and storage of an electronic device with a below-operating system security agent
US8590050B2 (en) * 2011-05-11 2013-11-19 International Business Machines Corporation Security compliant data storage management
US8996951B2 (en) * 2012-11-15 2015-03-31 Elwha, Llc Error correction with non-volatile memory on an integrated circuit
CN107239420B (zh) * 2012-11-21 2020-05-05 相干逻辑公司 具有散布处理器dma-fifo的处理系统
TW202301125A (zh) * 2017-07-30 2023-01-01 埃拉德 希提 具有以記憶體為基礎的分散式處理器架構的記憶體晶片
US10810141B2 (en) * 2017-09-29 2020-10-20 Intel Corporation Memory control management of a processor

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110875066A (zh) * 2018-09-03 2020-03-10 爱思开海力士有限公司 半导体器件和包括半导体器件的半导体系统
CN115237036A (zh) * 2022-09-22 2022-10-25 之江实验室 一种针对晶圆级处理器系统的全数字化管理装置
CN115237036B (zh) * 2022-09-22 2023-01-10 之江实验室 一种针对晶圆级处理器系统的全数字化管理装置
CN118295960A (zh) * 2024-06-03 2024-07-05 芯方舟(上海)集成电路有限公司 一种算力芯片及其设计方法、制造方法及算力芯片系统
CN118295960B (zh) * 2024-06-03 2024-09-03 芯方舟(上海)集成电路有限公司 一种算力芯片及其设计方法、制造方法及算力芯片系统

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WO2021028723A3 (en) 2021-07-08
EP4010808A2 (de) 2022-06-15
EP4010808A4 (de) 2023-11-15
WO2021028723A2 (en) 2021-02-18
TW202122993A (zh) 2021-06-16
KR20220078566A (ko) 2022-06-10

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