CN114552968A - Self-adaptive bootstrap charging circuit suitable for GaN driving chip - Google Patents

Self-adaptive bootstrap charging circuit suitable for GaN driving chip Download PDF

Info

Publication number
CN114552968A
CN114552968A CN202111603500.0A CN202111603500A CN114552968A CN 114552968 A CN114552968 A CN 114552968A CN 202111603500 A CN202111603500 A CN 202111603500A CN 114552968 A CN114552968 A CN 114552968A
Authority
CN
China
Prior art keywords
voltage
bootstrap
diode
node
gan
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202111603500.0A
Other languages
Chinese (zh)
Inventor
常红
黄少卿
顾明
耿镐
于文涛
席晓丽
肖培磊
宣志斌
罗永波
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CETC 58 Research Institute
Original Assignee
CETC 58 Research Institute
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CETC 58 Research Institute filed Critical CETC 58 Research Institute
Priority to CN202111603500.0A priority Critical patent/CN114552968A/en
Publication of CN114552968A publication Critical patent/CN114552968A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/38Means for preventing simultaneous conduction of switches
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/08Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/083Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the ignition at the zero crossing of the voltage or the current
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/32Means for protecting converters other than automatic disconnection
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

The invention discloses a self-adaptive bootstrap charging circuit suitable for a GaN driving chip, and belongs to the field of integrated circuits. Through carrying out zero-crossing detection on the SW voltage of the open joint, whether to open or shut off the bootstrap charging path is judged, the voltage on the bootstrap capacitor is clamped at a fixed voltage, the bootstrap voltage is prevented from being overcharged, the bootstrap voltage is ensured to be within the safe working voltage range of the GaN power device, and the problem that the traditional driving chip drives the GaN power device to damage the GaN power device due to overlarge bootstrap voltage is solved. The scheme can be integrated into a converter chip, so that the complexity of a peripheral circuit is reduced, the system performance is improved, and the cost is saved.

Description

Self-adaptive bootstrap charging circuit suitable for GaN driving chip
Technical Field
The invention relates to the technical field of integrated circuits, in particular to a self-adaptive bootstrap charging circuit suitable for a GaN driving chip.
Background
As power electronic equipment is continuously developed towards high power, high efficiency, small volume and light weight, the requirements on the performance of a power switching device are higher and higher, and the traditional Si power device is also more and more difficult to meet the requirements. Gallium nitride (GaN) as a representative of the third generation semiconductor material has higher electrical properties such as large forbidden bandwidth, high breakdown field strength, large thermal conductivity, high electron saturation velocity, small dielectric constant, strong radiation resistance, high chemical temperature and power density, and the like, compared with the conventional Si material. The device prepared by the GaN material has lower conduction loss and higher frequency response performance, which means that the GaN power device has great advantages in preparing a small-volume and high-efficiency power module and has good application prospect. However, there are some factors that need special attention when driving GaN power devices, such as small gate withstand voltage, narrow gate safe operating voltage range, low threshold voltage, large reverse conducting voltage, and sensitivity to parasitic factors, which puts new requirements on the design of driving circuits for GaN power devices.
For the half-bridge driving circuit, it is necessary to use a bootstrap circuit to provide a bootstrap voltage to the high side to drive the upper tube, as shown in fig. 1. When the down tube is turned on, the low side supply voltage VDD passes through the bootstrap diode DBOOTFor bootstrap capacitor CBOOTCharging is carried out; when the upper tube is conducted, the bootstrap diode DBOOTBlocking the low-side supply voltage VDD while bootstrapping the capacitor CBOOTThe energy required for high-side gate drive is provided. In the half-bridge driving circuit, in order to prevent the upper tube and the lower tube from being in a through state, dead time is required to be set, in the dead time, HO and LO are both low level, and the upper tube and the lower tube are both turned off. In the process of level conversion, after the upper tube is closed, because the current on the inductor L can not be suddenly changed, the current needs to be reversely conducted through the lower tube for follow current, the voltage at the point HS is rapidly reduced to be lower than the potential 0, and at the moment, the voltage at the two ends of the bootstrap capacitor is charged to be VBOOT=VDD-VF+VSDIn which V isFIs the conduction voltage drop, V, of the bootstrap diodeSDIs the reverse turn-on voltage of the lower GaN power device. For the GaN power device, the reverse conducting voltage will increase rapidly with the increase of the load current, and when the load current is 20A, the value thereof reaches 2.2V, which is much larger than the reverse conducting voltage of the conventional power device, so that the voltage across the bootstrap capacitor is rapidly charged to be larger than 6V (VDD is generally 5V), which exceeds the gate withstand voltage of the GaN power device, and the device is damaged. This is a problem to be considered and solved in the design of the driving circuit of the GaN power device.
To the problem that the reverse conduction voltage drop of the GaN power device is too large and the bootstrap voltage of the high-side tube is overvoltage, the solutions in the academic world and the industrial world mainly include: the dead time of the upper tube and the lower tube is controlled within several ns, and the overlapping time of reverse conduction current and reverse conduction voltage of the GaN power device is reduced, so that the reverse conduction loss is reduced, but larger parasitic capacitance and reverse recovery charge are introduced, and the improvement of the switching frequency is restricted; the anti-parallel diode is arranged at two ends of the low-side GaN power device and acts as a body diode, so that the reverse conducting voltage is clamped to a lower voltage level, but the anti-parallel diode can flow a certain current to generate loss, and researches show that the current loss is increased by 40%, and meanwhile, the under-voltage locking of a high-side circuit can be caused.
Disclosure of Invention
The invention aims to provide a self-adaptive bootstrap charging circuit suitable for a GaN driving chip, which is used for solving the problem that the traditional bootstrap circuit is overcharged due to the voltage on a bootstrap capacitor in dead time, preventing a GaN power device from grid crossing and improving the use reliability of the driving chip.
In order to solve the above technical problems, the present invention provides an adaptive bootstrap charging circuit suitable for a GaN driver chip, which includes a zero-crossing detection module, a low voltage control module, and a bootstrap diode DBOOTAnd a bootstrap capacitor CBOOT
The zero-crossing detection module carries out zero-crossing detection on the switching node SW, and the low-voltage control module controls the starting and the closing of the bootstrap charging loop to prevent the bootstrap voltage from being overcharged and damaging the GaN power device.
Optionally, the zero-crossing detection module includes a first bias current IBIAS1A second bias current IBIAS2A first diode D1A second diode D2A resistor R1 and a voltage comparator COMP,
the first bias current IBIAS1One end is connected with VDD and the other end is connected with a node V1(ii) a One end of the resistor R1 is connected with a node V1The other end is connected with a first diode D1The anode of (1); first diode D1Is connected to the switch node SW, wherein the voltage at the node V1 is controlled by the first bias current IBIAS1Resistance R1A first diode D1The forward conduction voltage of the switch and the voltage of the SW point are jointly determined;
the second bias current IBIAS2One end is connected with VDD and the other end is connected with a node V2(ii) a The second diode D2Anode connection node V of2Cathode is grounded, wherein node V2Is supplied by a second diode D2The forward on voltage of (c);
the positive input end of the voltage comparator COMP is connected with a node V2Negative input terminal connected to node V1And the output end is connected with the low-voltage control module.
Optionally, the first diode D1And the second diode D2All are reverse bias high voltage resistant devices, and the forward conduction voltages are equal.
Optionally, the low pressure controlThe module comprises a driving buffer and a PMOS (P-channel metal oxide semiconductor) switching tube MP1, wherein the input end of the driving buffer is connected with the output end of the voltage comparator COMP, and the output end of the driving buffer is connected with the grid end and the node V of the PMOS switching tube MP1P(ii) a The drain terminal of the PMOS switch tube MP1 is connected with VDD, and the source terminal is connected with the bootstrap diode DBOOTAccording to the gate signal, the charge circuit of the bootstrap capacitor is turned on or off.
Optionally, the PMOS switch MP1 is a single-side high-voltage tolerant device.
Optionally, the bootstrap diode DBOOTIs a reverse bias high voltage resistant device.
In the self-adaptive bootstrap charging circuit suitable for the GaN driving chip, provided by the invention, the zero-crossing detection is carried out on the SW voltage of the switching node, whether a bootstrap charging path is started or shut off is judged, the voltage on the bootstrap capacitor is clamped at a fixed voltage, the bootstrap voltage is prevented from being overcharged, the bootstrap voltage is ensured to be within the safe working voltage range of the GaN power device, and the problem that the GaN power device is damaged due to the overlarge bootstrap voltage when the traditional driving chip drives the GaN power device is solved. The scheme can be integrated into a converter chip, so that the complexity of a peripheral circuit is reduced, the system performance is improved, and the cost is saved.
Drawings
FIG. 1 is a schematic diagram of a bootstrap charging circuit topology of a conventional half-bridge drive circuit;
FIG. 2 is a schematic diagram of an adaptive bootstrap charging circuit suitable for a GaN driver chip according to the present invention;
fig. 3 is a schematic waveform diagram of the working principle of the adaptive bootstrap charging circuit suitable for the GaN driver chip provided by the present invention.
Detailed Description
The following describes in detail an adaptive bootstrap charging circuit suitable for a GaN driver chip according to the present invention with reference to the accompanying drawings and specific embodiments. Advantages and features of the present invention will become apparent from the following description and from the claims. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention.
The invention provides a self-adaptive bootstrap charging circuit suitable for a GaN driving chip, and the structure of the self-adaptive bootstrap charging circuit is shown in FIG. 2. FIG. 1 shows a bootstrap circuit of a conventional driving circuit, in which a lower tube MN11 is reversely conducted during a dead time, and the reverse conduction voltage is VSD. VDD forms a loop to the ground through a bootstrap diode, a bootstrap capacitor and a lower tube, and the voltage of the bootstrap capacitor is charged to VBOOT=VDD-VF+VSDIn which V isFIs the conduction voltage drop, V, of the bootstrap diodeSDIs the reverse turn-on voltage of the lower GaN power device. Because the GaN power device is in a transverse symmetrical structure, the GaN power device does not have a body diode inside, and reverse follow current of the switching power supply is realized through reverse conduction, the reverse conduction voltage of the GaN power device is far greater than the conduction voltage of the diode and is about 2V. When the voltage of VDD is 5V and the conduction voltage of the diode is 0.7V, the voltage V at two ends of the bootstrap capacitor is enabled to beBOOTOver 6V, the voltage exceeds the safe working voltage range of the GaN power device, so that the upper GaN power tube breaks down, and the reliability of the system is affected. Compared with the traditional bootstrap circuit, the bootstrap circuit provided by the invention has the advantages that the zero-crossing detection is carried out on the SW voltage of the switching node, whether the bootstrap charging path is started or not is judged, the clamp on the bootstrap voltage is realized, the too high bootstrap voltage is prevented, the voltages at two ends of the bootstrap capacitor are ensured to be in the safe working range of the GaN power device, and the system performance is improved.
The self-adaptive bootstrap charging circuit suitable for the GaN driving chip mainly comprises a zero-crossing detection module, a low-voltage control module and a bootstrap diode DBOOTAnd a bootstrap capacitor CBOOTComposition of, wherein a bootstrap diode DBOOTIs a reverse bias high voltage tolerant device. The zero-crossing detection module is controlled by a first bias current IBIAS1A second bias current IBIAS2A first diode D1A second diode D2Resistance R1And a voltage comparator COMP, wherein the first diode D1And a second diode D2The device is a reverse bias high voltage resistant device and the forward conducting voltage is equal. The low-voltage control module consists of a driving buffer and a PMOS switching tube MP1, wherein the PMOThe S switch tube MP1 is a single-side high-voltage resistant device. The first bias current IBIAS1One end is connected with VDD and the other end is connected with a node V1Resistance R1A termination node V1The other end is connected with a first diode D1Anode, first diode D1Cathode is connected to switch node SW, wherein node V1Is controlled by a first bias current IBIAS1、R1Resistance value, D1The forward conduction voltage and the SW point voltage are determined together. Second bias current IBIAS2One end is connected with VDD and the other end is connected with a node V2A second diode D2Anode node V2Cathode grounded to ground, wherein node V2Is determined by the forward conduction voltage of the second diode D2. The positive input end of the voltage comparator COMP is connected with a node V2Negative input terminal connected to node V1The output end is connected with the input end of the driving buffer and is mainly used for comparing the node V1And V2When V is1Big V2When the voltage is high, the high level is output, otherwise, the low level is output. The input end of the driving buffer is connected with the output port of the comparator COMP, and the output port is connected with the grid end of the PMOS switching tube MP1 and the node VPThe main function is to increase the driving capability of the output signal of the voltage comparator COMP. The drain end of the PMOS switching tube MP1 is connected with VDD, and the source end is connected with a bootstrap diode DBOOTThe main function of the anode is to turn on or off the charging loop of the bootstrap capacitor according to the gate signal.
Fig. 3 is a schematic waveform diagram illustrating the operation principle of the present invention. The upper tube is turned off, the circuit enters dead time, the voltage of the SW end begins to fall, and the voltage of the HS end does not fall to VDD-I in the stage of 0-t1BIAS1*R1-VFBefore, due to the first diode D1Is not conducted, V1The voltage of the point is clamped at 5V and is greater than V2Voltage V of pointF,VPThe PMOS transistor MP1 is turned on when the voltage is low. At the same time, at this stage, the bootstrap diode DBOOTAnd the reverse direction is cut off, and the bootstrap charging path is cut off. During the period t1-t2, the voltage at HS drops to 0V, and in the process, V is reduced to 0V1The voltage at the point will drop as the voltage at the HS terminal drops, but V1Electricity of pointPressure is still greater than V2Voltage V of pointF,VPThe PMOS transistor MP1 is turned on when the voltage is low. In the period from t2 to t3, the voltage at the HS end gradually drops from 0V to Vt2In which V ist2=-IBIAS1*R1In the process, V1The point voltage has not dropped to VF,VPStill low, the PMOS transistor MP1 is still in the conducting state. Due to the bootstrap diode DBOOTThe voltage at the HB end is clamped at VDD-VFSince the voltage at HS is less than 0V, bootstrap capacitor C is used at this stageBOOTVoltage V aboveBOOTA slight elevation will occur. During the period t3-t4, the voltage at HS will start to fall first and rise, but during this period, V1The voltage of the point is always less than VFThe output of the voltage comparator COMP is inverted, VPJump to high level, PMOS transistor MP1 is turned off, and bootstrap capacitor C is blockedBOOTPreventing the voltage V on the bootstrap capacitorBOOTFurther raising the over-charged state. After the period t4, the voltage at the HS terminal rises to Vt2Above, V1The voltage at the point begins to be greater than V2Voltage V of pointFThe output of the voltage comparator COMP is inverted again, VPWhen the voltage is changed into low level, the PMOS tube MP1 is conducted, the charging loop of the bootstrap capacitor is opened, and the voltage V on the bootstrap capacitor is maintainedBOOTAt VDD-VF+IBIAS1*R1And the bootstrap voltage is ensured to be within the safe working range of the GaN power device.
The embodiment can also be used for other GaN HEMT driving circuits, such as a full-bridge driving circuit and the like, the starting and the closing of the bootstrap capacitor charging loop are automatically adjusted by detecting the voltage of the HS point, the bootstrap voltage is clamped in the safe working voltage range of the GaN power device, and the problem of GaN power device damage caused by bootstrap voltage overcharge due to overlarge reverse conduction voltage of the GaN power device is solved.
The above description is only for the purpose of describing the preferred embodiment of the present invention, and is not intended to limit the scope of the present invention, and any variations and modifications made by those skilled in the art based on the above disclosure are intended to fall within the scope of the appended claims.

Claims (6)

1. A self-adaptive bootstrap charging circuit suitable for a GaN driving chip is characterized by comprising a zero-crossing detection module, a low-voltage control module and a bootstrap diode DBOOTAnd a bootstrap capacitor CBOOT
The zero-crossing detection module carries out zero-crossing detection on the switching node SW, and the low-voltage control module controls the starting and the closing of the bootstrap charging loop to prevent the bootstrap voltage from being overcharged and damaging the GaN power device.
2. The adaptive bootstrap charging circuit for GaN driven chips of claim 1, wherein said zero crossing detection module comprises a first bias current IBIAS1A second bias current IBIAS2A first diode D1A second diode D2A resistor R1 and a voltage comparator COMP,
the first bias current IBIAS1One end is connected with VDD and the other end is connected with a node V1(ii) a One end of the resistor R1 is connected with a node V1The other end is connected with a first diode D1The anode of (1); first diode D1Is connected to the switch node SW, wherein the voltage at the node V1 is controlled by the first bias current IBIAS1Resistance R1A first diode D1The forward conduction voltage of the switch and the voltage of the SW point are jointly determined;
the second bias current IBIAS2One end is connected with VDD and the other end is connected with a node V2(ii) a The second diode D2Anode connection node V of2Cathode is grounded, wherein node V2Is supplied by a second diode D2The forward turn-on voltage of;
the positive input end of the voltage comparator COMP is connected with a node V2Negative input terminal connected to node V1And the output end is connected with the low-voltage control module.
3. The adaptive bootstrap charging circuit for GaN-driven chips of claim 2, wherein said first oneDiode D1And the second diode D2All are reverse bias high voltage resistant devices, and the forward conduction voltages are equal.
4. The adaptive bootstrap charging circuit for GaN driven chip as claimed in claim 2, wherein said low voltage control module includes a driving buffer and a PMOS switch tube MP1, an input terminal of said driving buffer is connected to an output terminal of said voltage comparator COMP, an output terminal of said driving buffer is connected to a gate terminal of PMOS switch tube MP1 and a node VP(ii) a The drain terminal of the PMOS switch tube MP1 is connected with VDD, and the source terminal is connected with the bootstrap diode DBOOTThe anode of the bootstrap capacitor is turned on or off according to the gate signal.
5. The adaptive bootstrap charging circuit for GaN driver chips of claim 4, wherein said PMOS switch MP1 is a single-side high-voltage tolerant device.
6. The adaptive bootstrap charging circuit that is suitable for GaN driver chip of any of claims 1-5, characterized in that the bootstrap diode DBOOTIs a reverse bias high voltage resistant device.
CN202111603500.0A 2021-12-24 2021-12-24 Self-adaptive bootstrap charging circuit suitable for GaN driving chip Pending CN114552968A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202111603500.0A CN114552968A (en) 2021-12-24 2021-12-24 Self-adaptive bootstrap charging circuit suitable for GaN driving chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202111603500.0A CN114552968A (en) 2021-12-24 2021-12-24 Self-adaptive bootstrap charging circuit suitable for GaN driving chip

Publications (1)

Publication Number Publication Date
CN114552968A true CN114552968A (en) 2022-05-27

Family

ID=81670212

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202111603500.0A Pending CN114552968A (en) 2021-12-24 2021-12-24 Self-adaptive bootstrap charging circuit suitable for GaN driving chip

Country Status (1)

Country Link
CN (1) CN114552968A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2619112A (en) * 2022-12-12 2023-11-29 Cambridge Gan Devices Ltd III-Nitride power semiconductor based heterojunction device comprising a bootstrap device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2619112A (en) * 2022-12-12 2023-11-29 Cambridge Gan Devices Ltd III-Nitride power semiconductor based heterojunction device comprising a bootstrap device

Similar Documents

Publication Publication Date Title
CN109039029B (en) Bootstrap charging circuit suitable for GaN power device gate drive circuit
US8723564B2 (en) Driving circuit
CN106104993B (en) The driving circuit of power semiconductor element
CN109004820B (en) Switch bootstrap charging circuit suitable for high-speed grid driving of GaN power device
CN106877634B (en) Driving mechanism for switch and switch drive methods
CN109698611B (en) Multi-stage grid voltage reduction type SiC-MOSFET drive circuit
CN111193395A (en) Resonant converter control based on zero current detection
Seidel et al. A fully integrated three-level 11.6 nC gate driver supporting GaN gate injection transistors
CN110572020B (en) Control circuit and flyback switching power supply system
CN111049100B (en) Bootstrap circuit with clamping function
CN109962699A (en) Method and apparatus for controlling switch mosfet module
CN111884491B (en) Drive circuit with energy recovery function and switching power supply
CN111865053A (en) Negative-pressure turn-off driving circuit based on wide-bandgap power device
CN111555595B (en) GaN power tube gate drive circuit with controllable opening rate
CN102064678B (en) Gate drive circuit of switch power supply
US20220278615A1 (en) Switching power supply circuit, control circuit and control method thereof
CN114552968A (en) Self-adaptive bootstrap charging circuit suitable for GaN driving chip
CN111865055B (en) Synchronous rectification drive circuit for pulling down grid voltage of synchronous rectification tube in advance
CN112332821A (en) MOSFET passive isolation direct connection prevention quick-closing drive circuit
CN114362501B (en) Dynamic anti-backflow circuit for wireless charging synchronous rectifier bridge and working method thereof
CN110460227A (en) The driving control system and drive control method of two-stage type gird-connected inverter
CN216672983U (en) Circuit and electronic device
US11962240B2 (en) Auto calibration dead-time control circuit
CN113676029B (en) Active clamp circuit based on IGBT
CN114421946A (en) Direct drive circuit of depletion type power device with low reverse conduction voltage drop

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination