CN114551689A - Technical scheme for solving poor die bonding of conventional miniLED COB - Google Patents
Technical scheme for solving poor die bonding of conventional miniLED COB Download PDFInfo
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- CN114551689A CN114551689A CN202011362821.1A CN202011362821A CN114551689A CN 114551689 A CN114551689 A CN 114551689A CN 202011362821 A CN202011362821 A CN 202011362821A CN 114551689 A CN114551689 A CN 114551689A
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- chip
- welding
- miniled
- die bonding
- arranging
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- 238000003466 welding Methods 0.000 claims abstract description 27
- 239000011521 glass Substances 0.000 claims abstract description 23
- 238000000034 method Methods 0.000 claims abstract description 18
- 238000010438 heat treatment Methods 0.000 claims abstract description 10
- 239000000758 substrate Substances 0.000 claims abstract description 10
- 229910000679 solder Inorganic materials 0.000 claims abstract description 8
- 238000000197 pyrolysis Methods 0.000 claims description 3
- 239000007787 solid Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 4
- 239000003292 glue Substances 0.000 description 3
- 238000001514 detection method Methods 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
- H01L2933/0066—Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Wire Bonding (AREA)
Abstract
The invention discloses a process scheme for solving the problem of poor chip bonding of a conventional miniLED COB (chip on Board), which comprises the following steps of: arranging the flip chips on a positioning glass plate with a chip arranging film by using a precise chip arranging machine, wherein the electrode surfaces of the chips face upwards during die bonding; the obtained product chip is downward, and the positioning glass is attached and fixed with the upper platform; printing solder paste at the corresponding position of the PCB substrate, and fixing the solder paste at the corresponding position point of the lower platform; heating the lower platform, and pressurizing the upper platform through the pressure head to complete welding; and after welding, heating the upper platform, and peeling off the chip arranging film to finally obtain the chip welded on the PCB substrate. The technical scheme for solving the poor die bonding of the conventional miniLED COB is simple, the problems of chip offset and inclination after welding can be effectively solved by the positioning glass plate, the welding is accurate and high in precision, the problem of incomplete welding caused by uneven chip thickness can be solved by the arranging film, the chips can be welded in a large batch, the welding efficiency is high, the welding is accurate, and the method can be popularized and used.
Description
Technical Field
The invention relates to the technical field of miniLED COB die bonding, in particular to a process scheme for solving the problem of poor die bonding of the conventional miniLED COB.
Background
Die Bond or Die attach. Die bonding is a process of bonding a wafer to a designated area of a support through a glue (generally, a conductive glue or an insulating glue for an LED), forming a thermal or electrical path, and providing conditions for subsequent wire bonding.
At present, Mini LED die bonding is mainly characterized in that chips pass through a welding furnace after being directly bonded by one pick and place, vibration in the picking and placing process and equipment image and precision deviation easily cause die bonding chip deviation and inclination, so that a process scheme for solving the problem of poor die bonding of the conventional Mini LED COB is provided.
Disclosure of Invention
The invention mainly aims to provide a process scheme for solving the problem of poor chip bonding of the conventional miniLED COB, and the problem in the background technology can be effectively solved.
In order to realize the purpose, the invention adopts the technical scheme that:
a technical scheme for solving the problem of poor die bonding of the conventional miniLED COB comprises the following steps:
s1: arranging the flip chips on a positioning glass plate with a chip arranging film by using a precise chip arranging machine, wherein the electrode surfaces of the chips face upwards during die bonding;
s2: the product chip obtained in the step S1 is downward, and the positioning glass is fixedly attached to the upper platform;
s3: printing solder paste at the corresponding position of the PCB substrate, and fixing the solder paste at the corresponding position point of the lower platform;
s4: heating the lower platform, and pressurizing the upper platform through a pressure head to complete welding;
s5: and after welding, heating the upper platform, and peeling off the chip arranging film to finally obtain the chip welded on the PCB substrate.
Preferably, the positioning glass plate in S1 has a location point corresponding to the product design, and the positioning glass plate has a pressurizable function.
Preferably, the sheet discharge film in S1 is a release film having a buffer layer, and the stickiness is lost after pyrolysis.
Preferably, the pressure of the ram in S4 is adjustable.
Preferably, the temperature for heating the upper stage in S5 is 120 ℃.
Compared with the prior art, the invention has the following beneficial effects:
1. according to the invention, by arranging the position points corresponding to the product design on the positioning glass plate, the chip can be subjected to high-precision position pre-arrangement, effective pre-arrangement can be realized, then AOI (automatic optical inspection) is carried out, repair is carried out, bad repair caused by one-time die bonding is avoided, time limitation of an operation process can be avoided, the positioning chip arrangement glass has a pressurizing function and integrity, the problems of deviation and inclination of the welded chip can be effectively solved, and the welding is accurate and high in precision.
2. In the invention, the chip arranging film has a buffer function by fixing the chip arranging film on the positioning glass plate, so that the problem of incomplete welding caused by uneven chip thickness can be solved, and the chip arranging film is easy to peel off by heat and convenient to use.
3. The technical scheme of the invention has the advantages of convenient operation, high welding efficiency, accurate welding and high welding quality, can weld chips in large batch, and effectively solves the problems of offset and inclination of the welded chips.
Drawings
FIG. 1 is a state diagram of S1 according to the present invention;
FIG. 2 is a state diagram of S2 according to the present invention;
FIG. 3 is a state diagram of S3 according to the present invention;
fig. 4 is a state diagram of S4 according to the present invention.
In the figure: 1. an upper platform; 2. positioning the glass plate; 3. a chip; 4. a PCB substrate; 5. tin paste; 6. and (4) pressing head.
Detailed Description
In order to make the technical means, the creation characteristics, the achievement purposes and the effects of the invention easy to understand, the invention is further described with the specific embodiments.
In the description of the present invention, it should be noted that the terms "upper", "lower", "inner", "outer", "front", "rear", "both ends", "one end", "the other end", and the like indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience of description and simplicity of description, but do not indicate or imply that the referred device or element must have a specific orientation, be constructed in a specific orientation, and be operated, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present invention, it is to be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "disposed," "connected," and the like are to be construed broadly, such as "connected," which may be fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.
As shown in fig. 1-4, a process for solving the problem of poor chip bonding of the current miniLED COB comprises the following steps:
s1: arranging the flip chips 3 on the positioning glass plate 2 with the arranging film by using a precision arranging machine, wherein the electrode surfaces of the chips 3 face upwards when the crystal is fixed, as shown in figure 1;
s2: the product chip 3 obtained in the step S1 is downward, and the positioning glass is attached and fixed with the upper platform 1, so that the large-batch welding of the chip 3 can be realized, and the welding efficiency is improved;
s3: printing solder paste 5 at the corresponding position of the PCB substrate 4, and fixing the solder paste at the corresponding position point of the lower platform, as shown in FIG. 2;
s4: heating the lower platform, and pressurizing the upper platform 1 by the pressure head 6 to complete welding, as shown in fig. 3;
s5: after the soldering is completed, the upper stage 1 is heated, and the chip arrangement film is peeled off, so that the chip 3 soldered on the PCB substrate 4 is finally obtained, as shown in fig. 4.
The positioning glass plate 2 in the S1 has the position points corresponding to the product design, so that the chip 3 can be pre-arranged in high-precision position, the advanced pre-arrangement can be effectively carried out, the AOI is carried out for detection and repair, the poor repair caused by one-time die bonding is avoided, the time limitation of the operation process can be avoided, and the positioning glass plate 2 has the pressurizing function.
The sheet arranging film in the S1 is a release film with a buffer layer, and the viscosity disappears after pyrolysis, so that the sheet arranging film is easy to peel by heat.
The pressure of the pressure head 6 in S4 can be adjusted to improve the firmness of soldering the chip 3 on the PCB substrate 4.
The heating temperature of the upper platform 1 in the S5 is 120 ℃, the piece arranging film can be heated and peeled, and the processing precision is improved.
The process method of the invention can pre-arrange the chip 3 at a high precision position by arranging the position point corresponding to the product design on the positioning glass sheet, can effectively pre-arrange in advance, then carry out AOI detection and repair, avoids bad repair caused by one-time die bonding, can not be limited to the time limit of the operation process, has the function of pressurizing and integration of the positioning glass sheet, can effectively solve the problem of deviation and inclination of the chip 3 after welding, has accurate welding and high precision, can solve the problem of incomplete welding caused by uneven thickness of the chip 3 by fixing the glass sheet film on the positioning glass plate 2 and having the buffer function, is easy to be thermally stripped and convenient to use, can weld the chip 3 in large batch, has high welding efficiency, and effectively solves the problem of deviation and inclination of the chip 3 after welding, the welding is accurate, and welding quality is high.
The foregoing shows and describes the general principles and broad features of the present invention and advantages thereof. It will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, which are described in the specification and illustrated only to illustrate the principle of the present invention, but that various changes and modifications may be made therein without departing from the spirit and scope of the present invention, which fall within the scope of the invention as claimed. The scope of the invention is defined by the appended claims and equivalents thereof.
Claims (5)
1. The utility model provides a solve the bad technological scheme of solid brilliant of present miniLED COB which characterized in that: the method comprises the following steps:
s1: arranging the flip chips on a positioning glass plate with a chip arranging film by using a precise chip arranging machine, wherein the electrode surfaces of the chips face upwards during die bonding;
s2: the product chip obtained in the step S1 is downward, and the positioning glass is fixedly attached to the upper platform;
s3: printing solder paste at the corresponding position of the PCB substrate, and fixing the solder paste at the corresponding position point of the lower platform;
s4: heating the lower platform, and pressurizing the upper platform through the pressure head to complete welding;
s5: and after welding, heating the upper platform, and peeling off the chip arranging film to finally obtain the chip welded on the PCB substrate.
2. The process scheme for solving the poor COB die bonding of the conventional miniLED according to claim 1, wherein: and the positioning glass sheet in the S1 has a position point corresponding to the product design, and the positioning glass sheet has a pressurizable function.
3. The process scheme for solving the problem of poor COB die bonding of the conventional miniLED according to claim 1, which is characterized in that: the sheet arranging film in the S1 is a release film with a buffer layer, and the viscosity disappears after pyrolysis.
4. The process scheme for solving the problem of poor COB die bonding of the conventional miniLED according to claim 1, which is characterized in that: the pressure of the ram in S4 is adjustable.
5. The process scheme for solving the problem of poor COB die bonding of the conventional miniLED according to claim 1, which is characterized in that: the temperature for heating the upper platform in the S5 is 120 ℃.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011362821.1A CN114551689A (en) | 2020-11-27 | 2020-11-27 | Technical scheme for solving poor die bonding of conventional miniLED COB |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011362821.1A CN114551689A (en) | 2020-11-27 | 2020-11-27 | Technical scheme for solving poor die bonding of conventional miniLED COB |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN114551689A true CN114551689A (en) | 2022-05-27 |
Family
ID=81668217
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202011362821.1A Pending CN114551689A (en) | 2020-11-27 | 2020-11-27 | Technical scheme for solving poor die bonding of conventional miniLED COB |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN114551689A (en) |
-
2020
- 2020-11-27 CN CN202011362821.1A patent/CN114551689A/en active Pending
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