CN114533087A - Method and system for eliminating direct current offset between electrodes based on chopping technology - Google Patents

Method and system for eliminating direct current offset between electrodes based on chopping technology Download PDF

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CN114533087A
CN114533087A CN202210455681.5A CN202210455681A CN114533087A CN 114533087 A CN114533087 A CN 114533087A CN 202210455681 A CN202210455681 A CN 202210455681A CN 114533087 A CN114533087 A CN 114533087A
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direct current
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唐弢
丁曦
魏依娜
冯琳清
刘金标
王丽婕
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Zhejiang Lab
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Abstract

The invention discloses a method and a system for eliminating direct current offset between electrodes based on a chopping technology, which comprises the following steps: step S1: outputting the chopped wave modulated electroencephalogram signal and an interelectrode direct current offset signal; step S2: outputting direct current offset current between the electrodes; step S3: extracting an integral direct current offset signal; step S5: the electroencephalogram signals enter a chip amplification module for amplification processing, demodulation and return to the original electroencephalogram signal frequency band to obtain original electroencephalogram signals; step S6: filtering the original electroencephalogram signal by a low-pass filter to obtain an electroencephalogram signal with noise filtered; step S7: and transmitting the noise-filtered electroencephalogram signal into a digital-to-analog converter to be converted into a digital signal. The invention effectively restrains direct current offset between electrodes, reduces process delay compared with the traditional direct current servo loop, simultaneously, the capacitance value of the input capacitor and the feedforward capacitor in the circuit is the same, and the ABBA type layout arrangement mode can be adopted, thereby effectively avoiding the process error when manufacturing chips.

Description

Method and system for eliminating direct current offset between electrodes based on chopping technology
Technical Field
The invention relates to the technical field of integrated circuit design, in particular to a method for eliminating direct current offset between electrodes based on a chopping technology.
Background
With the continuous development of modern science and technology, the research on brain, the most complex organ in human body, becomes the focus of attention of scholars. The brain-computer interface technology restores a brain operation mechanism and controls external equipment through electroencephalogram signal acquisition, feature extraction, feature classification, external control and the like. At present, with the rapid development of intelligent wearable technology, electroencephalogram signals can be acquired in real time through intelligent wearable equipment worn on the body or integrated into clothes and accessories, and intelligent control is achieved.
The quality of the electroencephalogram signals collected by the wearable electroencephalogram collection equipment directly determines the quality of the data. Because the original EEG signals generated by the human body are almost below 100 Hz, the frequency is low and the voltage amplitude is small, the acquired EEG signals can be transmitted to the rear end for digital signal processing after being amplified, filtered and digitized. In the process of acquiring the electroencephalogram signals, the wet/dry electrodes are generally used for acquiring the electroencephalogram signals, the wet electrodes are required to be added with conductive adhesive and stirred in the using process to ensure that the impedance of the electrodes is in a lower level, but the process is complicated and possible damage can be brought to the scalp of a subject. And the wearable brain electricity collecting system usually uses a dry electrode, and the electrode is simple and convenient in use mode due to no need of gluing, and is very suitable for common daily wearing and electrophysiological monitoring. However, due to the large impedance of the dry electrodes (typically of the order of M Ω) and the presence of gaps between the dry electrodes and the scalp, a dc voltage difference, commonly referred to as a dc voltage offset, exists between the collection electrodes at different collection sites on the head. In a conventional ac coupling amplifier, the large dc voltage offset (usually 10mV to 500 mV) caused by the collecting electrode is directly filtered by an input capacitor without affecting the normal operation of an amplifying unit of the collecting module, but the conventional ac coupling amplifier has the defect of high input noise, so that in the collecting process of weak signals (such as electroencephalogram signals), a chopper amplifier is usually used to modulate the input signal to avoid the flicker noise at the input end, then the amplified signal is demodulated at the output end, and the noise in the amplifying process is eliminated by filtering, but the signal is amplified by a chopper modulation mode to cause the collecting mode of the amplifier to be changed from ac coupling to dc coupling, which cannot be filtered for the dc voltage offset, and when the dc offset voltage between the collecting electrodes enters the amplifier by chopper modulation, the output voltage of the amplifier is saturated, the amplifier cannot normally amplify the target electroencephalogram signal, and the analog-to-digital converter and the whole receiver after the amplifier are disabled.
For the problem that the chopper amplifier cannot filter the dc voltage offset between the electrodes, it is common practice to add a decoupling capacitor in front of the chopper modulation unit to filter the dc voltage offset, but this solution requires a decoupling capacitor with a large capacitance value (usually in the order of 100 nF), and the capacitor has a large volume, is not suitable for wearable devices, and can greatly reduce the input impedance of the system. Another method is to extract the dc component at the output of the amplifier through a dc servo loop, and then perform feedback at the input of the amplifier to eliminate the dc voltage offset, but this scheme is not suitable for operation under the condition of large dc voltage offset due to the slow feedback speed and noise introduced.
Therefore, in order to overcome the above drawbacks of the techniques for eliminating dc voltage offset between electrodes, the present invention provides a method and a system for eliminating dc offset between electrodes based on a chopping technique to solve the above technical problems.
Disclosure of Invention
In order to solve the above technical problems, the present invention provides a method for eliminating inter-electrode dc offset based on a chopping technique.
The technical scheme adopted by the invention is as follows:
a method for eliminating direct current offset between electrodes based on a chopping technology comprises the following steps:
step S1: an input signal acquired by dry electrode electroencephalogram acquisition equipment worn outside the cranium enters a modulation chopping unit I through the input end of a signal amplification path for chopping modulation, and an electroencephalogram signal and an interelectrode direct current offset signal after chopping modulation are output;
step S2: the direct current offset signal between the electrodes outputs direct current offset current between the electrodes through an input capacitor;
step S3: the method comprises the steps that input signals collected by dry electrode electroencephalogram collecting equipment worn outside a skull enter an integration module through the input end of a direct current servo loop to be subjected to integration filtering, chopping modulation is carried out on the filtered signals through a modulation chopping unit II to extract an integration direct current offset signal, and signals of the modulation chopping unit I and the modulation chopping unit II are subjected to same-frequency reverse modulation;
step S4: the integral direct current offset signal outputs a feedforward direct current offset current through a feedforward capacitor;
step S5: utilizing the phases of the direct current offset current between the electrodes and the phase of the feedforward direct current offset current to be opposite to each other for mutual cancellation, enabling the electroencephalogram signals to enter a chip amplification module for amplification processing, enabling the amplified electroencephalogram signals to be demodulated through a demodulation chopping unit, and returning to the original electroencephalogram signal frequency band to obtain the amplified electroencephalogram signals;
step S6: filtering the amplified electroencephalogram signal through a low-pass filter to obtain an electroencephalogram signal with noise filtered;
step S7: and transmitting the noise-filtered electroencephalogram signal into an analog-to-digital converter to be converted into a digital signal.
Further, the chopping modulation frequency of the first modulation chopping unit is 16 khz, and the cut-off frequency of the integration module is 0.1 hz.
Furthermore, the integration module comprises an integrator, two integration capacitors and two integration resistors, wherein the two integration capacitors are connected to two ends of the integrator, and the two integration resistors are respectively connected to the outer sides of the two integration capacitors. The capacitance value of the integrating capacitor is 3pF, the impedance of the integrating resistor is 100G ohm, the integrating capacitor is an on-chip MIM capacitor, and the integrating resistor is composed of two PMOS transistors through a pseudo resistor built by a back-to-back structure.
Further, the inter-electrode direct current offset current and the feedforward direct current offset current have opposite phases and the same amplitude.
Furthermore, the chip amplification module comprises a chip amplifier, two feedback capacitors and two feedback resistors, wherein the two ends of the chip amplifier are connected with the two feedback capacitors, and the outer sides of the two feedback capacitors are respectively connected with the two feedback resistors.
Further, the gain of the chip amplifier is designed to be 60dB, the bandwidth is 30 KHz, and a single-stage closed-loop fully-differential amplifier structure is adopted.
Furthermore, control signals of the first modulation chopping unit and the second modulation chopping unit in the signal amplification path are synchronous signals, and the chopping modulation frequency and the demodulation chopping frequency are both 16 khz.
Furthermore, the input end of the first modulation chopping unit and the output end of the first demodulation chopping unit are also provided with a positive feedback loop, and the positive feedback loop is formed by two impedance boosting capacitors.
Further, the cut-off frequency of the low-pass filter is 200 Hz, and the precision of the analog-to-digital converter is 10 Bit.
The invention also provides a system for eliminating direct current offset between electrodes based on the chopping technology, which comprises:
modulation chopper unit one: the device is used for modulating an input signal by chopping waves and outputting a chopped electroencephalogram signal and an interelectrode direct current offset signal; the modulation chopping unit comprises two input ends (input ends 1 and 2) and two output ends (output ends 1 and 2), is controlled by four switching circuits, has two working phases (phases 1 and 2), wherein in the phase 1, a signal flowing into the input end 1 flows to the output end 1, a signal flowing into the input end 2 flows to the output end 2, in the phase 2, a signal flowing into the input end 1 flows to the output end 2, a signal flowing into the input end 2 flows to the output end 1, and the periods of the phase 1 and the phase 2 are the same and are not overlapped;
input capacitance: the direct current offset signal between the electrodes is converted into direct current offset current between the electrodes;
an integration module: the direct current offset signal processing circuit is used for integrating and filtering an input signal and extracting a filtered direct current offset signal;
and a modulation chopper unit II: the direct current offset signal processing module is used for carrying out chopping modulation on the extracted direct current offset signal to obtain an integral direct current offset signal; the modulation chopping unit II comprises two input ends (input ends 1 and 2) and two output ends (output ends 1 and 2), is controlled by four switching circuits and has two working phases (phases 1 and 2), wherein in the phase 1, a signal flowing into the input end 1 flows to the output end 1, a signal flowing into the input end 2 flows to the output end 2, in the phase 2, a signal flowing into the input end 1 flows to the output end 2, a signal flowing into the input end 2 flows to the output end 1, the periods of the phase 1 and the phase 2 are the same and are not overlapped, and the modulation chopping unit I and the modulation chopping unit II are controlled by the same clock signal;
a feed-forward capacitance: for converting the integrated dc offset signal to a feed-forward dc offset current;
a chip amplification module: the electroencephalogram signal processing module is used for amplifying the transmitted electroencephalogram signal to obtain an amplified electroencephalogram signal;
a demodulation chopping unit: the electroencephalogram signal processing module is used for demodulating the amplified electroencephalogram signal and returning the demodulated electroencephalogram signal to the original electroencephalogram signal frequency band to obtain the amplified electroencephalogram signal; the demodulation chopping unit comprises two input ends (input ends 1 and 2) and two output ends (output ends 1 and 2), is controlled by four switching circuits and has two working phases (phases 1 and 2), wherein in the phase 1, a signal flowing into the input end 1 flows to the output end 1, a signal flowing into the input end 2 flows to the output end 2, in the phase 2, a signal flowing into the input end 1 flows to the output end 2, a signal flowing into the input end 2 flows to the output end 1, the periods of the phase 1 and the phase 2 are the same and are not overlapped with each other, and the demodulation chopping unit, the modulation chopping unit I and the modulation chopping unit II are controlled by the same clock signal;
a positive feedback loop: the input resistance is used for improving the EEG signal transmission process; through the two positive feedback capacitors, the capacitance value of the two positive feedback capacitors is consistent with that of the input capacitor, and the loop is built between the input positive end of the chip amplification module and the output positive end of the chip amplification module and between the input negative end of the chip amplification module and the output negative end of the chip amplification module;
a low-pass filter: the electroencephalogram signal processing device is used for filtering the amplified electroencephalogram signal to obtain an electroencephalogram signal with noise filtered;
an analog-to-digital converter: the device is used for converting the EEG signals with the noise filtered out into digital signals.
The invention has the beneficial effects that: the invention firstly carries out chopped wave modulation on the collected electroencephalogram signals and direct current offset signals between electrodes in a signal amplification path, meanwhile, a feedforward direct current offset signal is extracted through a direct current feedforward loop and then is subjected to same-frequency reverse-phase modulation with a signal in a signal amplification path, then, the modulated signal in the signal amplification path and the DC component extracted from the DC servo loop are coupled to the input end of the chip amplifier, thereby eliminating direct current offset between the electrodes, demodulating the amplified EEG signals through a chopper circuit at the output end, a positive feedback loop is arranged at the original signal input end and the demodulation signal output end, the voltage difference between the output end and the input end is converted into positive feedback current to be transmitted back to the input end through an impedance boosting capacitor in the loop, and the current transmitted to the input end from the collecting electrode is reduced, so that the input impedance is improved. Then, high-frequency chopping noise in the demodulated signal is filtered by a low-pass filter, and finally, the amplified electroencephalogram signal with the DC offset removed is transmitted to a digital-to-analog converter and converted into a digital signal. Accurate dc offset cancellation and fast response to inter-electrode dc offset signal changes can be achieved simultaneously. The technology is realized by using an independently designed integrated circuit chip, a feedforward loop of the circuit is arranged at an input port of an amplifier, direct current offset between electrodes is effectively inhibited, and compared with a traditional direct current servo loop, the process delay is reduced. In addition, as the feedforward loop is used in the method, compared with a direct current servo feedback technology, the extracted direct current offset can be eliminated through the feedforward loop without passing through an amplifier unit, and the time delay of the amplifier unit is avoided, so that the response speed of the direct current offset between electrodes is high, the implementation method is simple, the process error is small, and the method is suitable for a wearable electroencephalogram acquisition system.
Drawings
FIG. 1 is a flow chart of a method for eliminating DC offset between electrodes based on a chopping technique according to the present invention;
FIG. 2 is a schematic diagram of a system for eliminating DC offset between electrodes based on a chopping technique according to the present invention;
FIG. 3 is a circuit diagram of an embodiment of the present invention.
Detailed Description
The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1, a method for eliminating inter-electrode dc offset based on a chopping technique includes the following steps:
step S1: an input signal acquired by dry electrode electroencephalogram acquisition equipment worn outside the cranium enters a modulation chopping unit I through the input end of a signal amplification path for chopping modulation, and an electroencephalogram signal and an interelectrode direct current offset signal after chopping modulation are output;
step S2: the direct current offset signal between the electrodes outputs direct current offset current between the electrodes through an input capacitor;
step S3: the method comprises the steps that input signals collected by dry electrode electroencephalogram collecting equipment worn outside a skull enter an integration module through the input end of a direct current servo loop to be subjected to integration filtering, chopping modulation is carried out on the filtered signals through a modulation chopping unit II to extract an integration direct current offset signal, and signals of the modulation chopping unit I and the modulation chopping unit II are subjected to same-frequency reverse modulation;
step S4: the integral direct current offset signal outputs a feedforward direct current offset current through a feedforward capacitor;
step S5: utilizing the phases of the direct current offset current between the electrodes and the phase of the feedforward direct current offset current to be opposite to each other for mutual cancellation, enabling the electroencephalogram signals to enter a chip amplification module for amplification processing, enabling the amplified electroencephalogram signals to be demodulated through a demodulation chopping unit, and returning to the original electroencephalogram signal frequency band to obtain the amplified electroencephalogram signals;
step S6: filtering the amplified electroencephalogram signal through a low-pass filter to obtain an electroencephalogram signal with noise filtered;
step S7: and transmitting the noise-filtered electroencephalogram signal into an analog-to-digital converter to be converted into a digital signal. Effectively converting analog signals with continuous time and continuous amplitude into digital signals with discrete time and discrete amplitude.
The method comprises the steps of firstly carrying out chopping modulation on an acquired electroencephalogram signal and an inter-electrode direct current offset signal in a signal amplification path, meanwhile, extracting a feedforward direct current offset signal through a direct current feedforward loop, carrying out same-frequency and opposite-phase modulation on the feedforward direct current offset signal and a signal in the signal amplification path, then, coupling a modulated signal in the signal amplification path and a direct current component extracted from a direct current servo loop to an input end of a chip amplifier, thereby eliminating inter-electrode direct current offset, carrying out signal demodulation on the amplified electroencephalogram signal through a chopper circuit of an output end, arranging a positive feedback loop at an original signal input end and a demodulated signal output end, increasing a capacitor through impedance in the loop, converting the output end and the input end into positive feedback current to be transmitted back to the input end, reducing current transmitted to the input end by an acquisition electrode, and accordingly improving input impedance. Then, high-frequency chopping noise in the demodulated signal is filtered by a low-pass filter, and finally, the amplified electroencephalogram signal with the DC offset removed is transmitted to a digital-to-analog converter and converted into a digital signal. Accurate dc offset cancellation and fast response to inter-electrode dc offset signal changes can be achieved simultaneously. The technology is realized by using an independently designed integrated circuit chip, a feedforward loop of the circuit is arranged at an input port of an amplifier, direct current offset between electrodes is effectively inhibited, process delay is reduced compared with a traditional direct current servo loop, and meanwhile, because the feedforward loop used in the method inhibits direct current offset signals of an input end by 1 to 1 equivalent, capacitance values of an input capacitor and the feedforward capacitor in the circuit are the same, an ABBA type layout arrangement mode can be adopted, process errors during chip manufacturing are effectively avoided, layout optimization of on-chip passive devices is realized, feedback precision is improved, and direct current offset elimination effect between electrodes is improved. In addition, compared with a direct current servo feedback technology, the method uses a feedforward loop, the extracted direct current offset can be eliminated through the feedforward loop without passing through an amplifier unit, and the time delay of the amplifier unit is avoided.
The chopping modulation frequency of the modulation chopping unit I is 16 kHz, and the cut-off frequency of the integration module is 0.1 Hz.
The integration module comprises an integrator, two integration capacitors and two integration resistors, wherein the two ends of the integrator are connected with the two integration capacitors, and the outer sides of the two integration capacitors are respectively connected with the two integration resistors.
The direct current offset current between the electrodes and the feedforward direct current offset current have opposite phases and same amplitude.
The chip amplification module comprises a chip amplifier, two feedback capacitors and two feedback resistors, wherein the two ends of the chip amplifier are connected with the two feedback capacitors, and the outer sides of the two feedback capacitors are respectively connected with the two feedback resistors.
The gain of the chip amplifier is designed to be 60dB, the bandwidth is 30 KHz, and a single-stage closed-loop fully-differential amplifier structure is adopted.
Control signals of the first modulation chopping unit and the second modulation chopping unit in the signal amplification path are synchronous signals, and the chopping modulation frequency and the demodulation chopping frequency are both 16k hertz.
And the input end of the first modulation chopping unit and the output end of the first demodulation chopping unit are also provided with a positive feedback loop, and the positive feedback loop is formed by two impedance boosting capacitors. The input impedance can be improved by the arranged positive feedback loop.
The cut-off frequency of the low-pass filter is 200 Hz, and the precision of the analog-to-digital converter is 10 Bit. The signals after chopper modulation contain harmonic noise of the carrier modulation signals, the harmonic noise is transmitted to a low-pass filter, and various harmonic noises are filtered out, so that the acquired electroencephalogram signals are left.
Referring to fig. 2, a system for removing inter-electrode dc offset based on a chopping technique includes:
modulation chopper unit one: the device is used for modulating an input signal by chopping waves and outputting a chopped electroencephalogram signal and an interelectrode direct current offset signal; the modulation chopping unit comprises two input ends (input ends 1 and 2) and two output ends (output ends 1 and 2), is controlled by four switching circuits, has two working phases (phases 1 and 2), wherein in the phase 1, a signal flowing into the input end 1 flows to the output end 1, a signal flowing into the input end 2 flows to the output end 2, in the phase 2, a signal flowing into the input end 1 flows to the output end 2, a signal flowing into the input end 2 flows to the output end 1, and the periods of the phase 1 and the phase 2 are the same and are not overlapped;
input capacitance: the direct current offset signal between the electrodes is converted into direct current offset current between the electrodes;
an integration module: the direct current offset signal processing circuit is used for integrating and filtering an input signal and extracting a filtered direct current offset signal;
and a modulation chopper unit II: the direct current offset signal processing module is used for carrying out chopping modulation on the extracted direct current offset signal to obtain an integral direct current offset signal; the modulation chopping unit II comprises two input ends (input ends 1 and 2) and two output ends (output ends 1 and 2), is controlled by four switching circuits and has two working phases (phases 1 and 2), wherein in the phase 1, a signal flowing into the input end 1 flows to the output end 1, a signal flowing into the input end 2 flows to the output end 2, in the phase 2, a signal flowing into the input end 1 flows to the output end 2, a signal flowing into the input end 2 flows to the output end 1, the periods of the phase 1 and the phase 2 are the same and are not overlapped, and the modulation chopping unit I and the modulation chopping unit II are controlled by the same clock signal;
a feed-forward capacitance: for converting the integrated dc offset signal to a feed-forward dc offset current;
a chip amplification module: the electroencephalogram signal processing module is used for amplifying the transmitted electroencephalogram signal to obtain an amplified electroencephalogram signal;
a demodulation chopping unit: the electroencephalogram signal processing module is used for demodulating the amplified electroencephalogram signal and returning the demodulated electroencephalogram signal to the original electroencephalogram signal frequency band to obtain the amplified electroencephalogram signal; the demodulation chopping unit comprises two input ends (input ends 1 and 2) and two output ends (output ends 1 and 2), is controlled by four switching circuits and has two working phases (phases 1 and 2), wherein in the phase 1, a signal flowing into the input end 1 flows to the output end 1, a signal flowing into the input end 2 flows to the output end 2, in the phase 2, a signal flowing into the input end 1 flows to the output end 2, a signal flowing into the input end 2 flows to the output end 1, the periods of the phase 1 and the phase 2 are the same and are not overlapped with each other, and the demodulation chopping unit, the modulation chopping unit I and the modulation chopping unit II are controlled by the same clock signal;
a positive feedback loop: the input resistance is used for improving the EEG signal transmission process; through the two positive feedback capacitors, the capacitance value of the two positive feedback capacitors is consistent with that of the input capacitor, and the loop is built between the input positive end of the chip amplification module and the output positive end of the chip amplification module and between the input negative end of the chip amplification module and the output negative end of the chip amplification module;
a low-pass filter: the electroencephalogram signal processing device is used for filtering the amplified electroencephalogram signal to obtain an electroencephalogram signal with noise filtered;
an analog-to-digital converter: the device is used for converting the EEG signals with the noise filtered out into digital signals.
Examples
Referring to fig. 3, a method for eliminating inter-electrode dc offset based on a chopping technique includes the following steps:
step S1: the dry electrode brain electricity collecting device worn outside the skullInput signal V to be acquiredinThe signal enters a first modulation chopping unit through the input end of the signal amplification path to be subjected to chopping modulation, and the chopping modulation frequency of the first modulation chopping unit is 16 khz; outputting the chopped wave modulated electroencephalogram signal and an interelectrode direct current offset signal;
step S2: the DC offset signal between the electrodes passes through an input capacitor Cin1、Cin2Coupling the current signals to D1 and D2 terminals, outputting inter-electrode DC offset current, and amplifying the current I in the path1The expression of (a) should be:
I 1 = C in1,2 *（V EEG +V DCO ） (1)
wherein VEEGIs an electroencephalogram signal, VDCOIs an inter-electrode DC offset signal;
inter-electrode DC offset signal VDCOGenerated direct current offset current I between electrodesDCOThe expression of (a) should be:
I DCO = C in1,2 *V DCO (2)
step S3: an input signal V acquired by a dry electrode electroencephalogram acquisition device worn outside the craniuminThe input end of the direct current servo loop enters an integral module for integral filtering, chopping modulation is carried out by a second modulation chopping unit after filtering, integral direct current offset signals are extracted, and signals of the first modulation chopping unit and the second modulation chopping unit are subjected to same-frequency reverse modulation; the cut-off frequency of the integration module is 0.1 Hz, and the integration module comprises an integrator A2 and two integration capacitors C with the size of 3pFint1、Cint2And two integrating resistors R with the size of 100G ohmf1、Rf2Two ends of the integrator A2 are connected with two integrating capacitors Cint1、Cint2Two of said integrating capacitors Cint1、Cint2Respectively connected with two of the integrating resistors Rf1、Rf2。
Step S4: the integrated DC offset signal passes through a feedforward capacitor Chp1、Chp2Outputting feedforward direct current offset current;
feedforward DC offset current I in DC feedforward loop2The expression of (a) should be:
I 2 = C hp1,2 *V DCO (3)
step S5: the phases of the direct current offset current between the electrodes and the feedforward direct current offset current are opposite to each other to offset each other, the electroencephalogram signal enters a chip amplification module to be amplified, the chip amplification module comprises a chip amplifier A1, the gain of the chip amplifier A1 is designed to be 60dB, the bandwidth is 30 kHz, and a single-stage closed-loop fully-differential amplifier structure is adopted; two feedback capacitors C with 50fFfb1、Cfb2Two ends of the chip amplifier A1 are connected with the two feedback capacitors, the outer sides of the two feedback capacitors are respectively connected with the two feedback resistors, the amplified electroencephalogram signal is demodulated through a demodulation chopping unit and returns to the original electroencephalogram signal frequency band, and the amplified electroencephalogram signal is obtained; the direct current offset current between the electrodes and the feedforward direct current offset current have opposite phases and same amplitude. The parameters are kept consistent, so that the direct current offset current in the signal amplification path is counteracted by the feedback loop, and only the electroencephalogram signal enters the signal amplification module;
DC offset signal between electrodes via Cin1、Cin2Generated inter-electrode DC offset current IDCOWith feed-forward DC offset current I2Opposite in phase, when they are of the same amplitude, IDCO= I2Then, the DC offset can be cancelled, and the following formula (2) and (3) can be substituted:
C in1,2 *V DCO = C hp1,2 *V DCO (4)
namely, it is
C in1,2 =C hp1,2 (5)
Step S6: filtering the amplified electroencephalogram signal through a low-pass filter to obtain an electroencephalogram signal with noise filtered; the electroencephalogram signals after modulation and demodulation contain harmonic noise of the carrier modulation signals, and the harmonic noise is transmitted to a low-pass filter to filter various harmonic noises, so that the acquired electroencephalogram signals are left; the cut-off frequency of the low-pass filter is 200 Hz.
Step S7: and transmitting the noise-filtered electroencephalogram signal into an analog-to-digital converter to be converted into a digital signal, converting a signal which is continuous in time and continuous in amplitude into a digital signal which is discrete in time and discrete in amplitude, wherein the precision of the analog-to-digital converter is 10 Bit.
Control signals of the first modulation chopping unit and the second modulation chopping unit in the signal amplification path are synchronous signals, and the chopping modulation frequency and the demodulation chopping frequency are both 16k hertz.
And the input end of the first modulation chopping unit and the output end of the first demodulation chopping unit are also provided with a positive feedback loop, and the positive feedback loop is composed of two impedance boosting capacitors with the size of 50 fF.
The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (10)

1. A method for eliminating direct current offset between electrodes based on a chopping technology is characterized by comprising the following steps:
step S1: an input signal acquired by dry electrode electroencephalogram acquisition equipment worn outside the cranium enters a modulation chopping unit I through the input end of a signal amplification path for chopping modulation, and an electroencephalogram signal and an interelectrode direct current offset signal after chopping modulation are output;
step S2: the direct current offset signal between the electrodes outputs direct current offset current between the electrodes through an input capacitor;
step S3: the method comprises the steps that input signals collected by dry electrode electroencephalogram collecting equipment worn outside a skull enter an integration module through the input end of a direct current servo loop to be subjected to integration filtering, chopping modulation is carried out on the filtered signals through a modulation chopping unit II to extract an integration direct current offset signal, and signals of the modulation chopping unit I and the modulation chopping unit II are subjected to same-frequency reverse modulation;
step S4: the integral direct current offset signal outputs a feedforward direct current offset current through a feedforward capacitor;
step S5: utilizing the phases of the direct current offset current between the electrodes and the phase of the feedforward direct current offset current to be opposite to each other for mutual cancellation, enabling the electroencephalogram signals to enter a chip amplification module for amplification processing, enabling the amplified electroencephalogram signals to be demodulated through a demodulation chopping unit, and returning to the original electroencephalogram signal frequency band to obtain the amplified electroencephalogram signals;
step S6: filtering the amplified electroencephalogram signal through a low-pass filter to obtain an electroencephalogram signal with noise filtered;
step S7: and transmitting the noise-filtered electroencephalogram signal into an analog-to-digital converter to be converted into a digital signal.
2. The method for removing direct current offset between electrodes based on the chopping technology as claimed in claim 1, wherein the chopping modulation frequency of the first modulation chopping unit is 16 khz, and the cut-off frequency of the integration module is 0.1 hz.
3. The method according to claim 1, wherein the integrating module includes an integrator, two integrating capacitors, and two integrating resistors, two ends of the integrator are connected to the two integrating capacitors, and two outer sides of the two integrating capacitors are connected to the two integrating resistors, respectively.
4. The method for removing inter-electrode dc offset based on the chopping technique of claim 1, wherein the inter-electrode dc offset current and the feedforward dc offset current are in opposite phases and have the same magnitude.
5. The method according to claim 1, wherein the chip amplification module includes a chip amplifier, two feedback capacitors and two feedback resistors, two ends of the chip amplifier are connected to the two feedback capacitors, and two outer sides of the two feedback capacitors are connected to the two feedback resistors, respectively.
6. The method for canceling direct current offset between electrodes based on the chopping technique as claimed in claim 5, wherein the chip amplifier has a gain designed to be 60dB and a bandwidth of 30 kHz, and adopts a single-stage closed-loop fully-differential amplifier structure.
7. The method for removing direct current offset between electrodes based on the chopping technology as claimed in claim 1, wherein the control signals of the first modulation chopping unit and the second modulation chopping unit in the signal amplification path are synchronous signals, and the chopping modulation frequency and the de-modulation chopping frequency are both 16 khz.
8. The method for eliminating direct current offset between electrodes based on the chopping technology as claimed in claim 1, wherein a positive feedback loop is further provided at the input end of the first modulation chopping unit and the output end of the second modulation chopping unit, and the positive feedback loop is formed by two impedance boosting capacitors.
9. The method for removing direct current offset between electrodes based on the chopping technique as claimed in claim 1, wherein the cut-off frequency of the low pass filter is 200 hz, and the precision of the analog-to-digital converter is 10 Bit.
10. A system for removing dc offset between electrodes based on chopping techniques, comprising:
modulation chopper unit one: the device is used for modulating an input signal by chopping waves and outputting a chopped electroencephalogram signal and an interelectrode direct current offset signal;
input capacitance: the direct current offset signal between the electrodes is converted into direct current offset current between the electrodes;
an integration module: the direct current offset signal processing circuit is used for integrating and filtering an input signal and extracting a filtered direct current offset signal;
and a modulation chopper unit II: the direct current offset signal processing module is used for carrying out chopping modulation on the extracted direct current offset signal to obtain an integral direct current offset signal;
a feed-forward capacitance: for converting the integrated dc offset signal to a feed-forward dc offset current;
a chip amplification module: the electroencephalogram acquisition module is used for amplifying the transmitted electroencephalogram signals to obtain the amplified electroencephalogram signals;
a demodulation chopping unit: the electroencephalogram signal processing module is used for demodulating the amplified electroencephalogram signal and returning the demodulated electroencephalogram signal to the original electroencephalogram signal frequency band to obtain the amplified electroencephalogram signal;
a positive feedback loop: the input resistance is used for improving the EEG signal transmission process;
a low-pass filter: the electroencephalogram signal processing device is used for filtering the amplified electroencephalogram signal to obtain an electroencephalogram signal with noise filtered;
an analog-to-digital converter: the device is used for converting the EEG signals with the noise filtered out into digital signals.
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114983424A (en) * 2022-08-03 2022-09-02 之江实验室 Multichannel mixed chopping method and system applied to brain-computer interface chip
CN115005842A (en) * 2022-08-09 2022-09-06 之江实验室 Frequency-modulated brain-computer interface chip input impedance enhancing method and system

Citations (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3819864A (en) * 1973-03-30 1974-06-25 Texas Instruments Inc Digital dc offset removal method for data systems
US5532583A (en) * 1993-05-04 1996-07-02 Storage Technology Corporation System and method for calibrating a position sensing system
JP2003218727A (en) * 2002-01-18 2003-07-31 Hitachi Ltd Direct conversion receiving device
JP2004040157A (en) * 2002-06-28 2004-02-05 Matsushita Electric Ind Co Ltd Dc offset canceling circuit and receiver
US6750703B1 (en) * 2002-12-24 2004-06-15 Silicon Integrated Systems Corp. DC offset canceling circuit applied in a variable gain amplifier
US20050107674A1 (en) * 2003-09-30 2005-05-19 Jayant Parthasarathy DC offset cancellation techniques
JP2006229865A (en) * 2005-02-21 2006-08-31 Matsushita Electric Ind Co Ltd Wireless communication reception circuit and dc offset voltage correction method thereof
US20090140900A1 (en) * 2007-12-02 2009-06-04 The Chinese University Of Hong Kong Sensor interface devices and amplifiers
CN101621281A (en) * 2008-06-11 2010-01-06 英特赛尔美国股份有限公司 Chopper stabilized amplifier
US20100033240A1 (en) * 2007-01-31 2010-02-11 Medtronic, Inc. Chopper-stabilized instrumentation amplifier for impedance measurement
CN101809863A (en) * 2007-09-28 2010-08-18 Nxp股份有限公司 Automatic common-mode rejection calibration
CN102150363A (en) * 2008-09-11 2011-08-10 美国亚德诺半导体公司 Auto-correction feedback loop for offset and ripple suppression in a chopper-stabilized amplifier
CN103095233A (en) * 2013-01-23 2013-05-08 电子科技大学 Amplifier eliminating direct current offsets
CN103138760A (en) * 2012-11-05 2013-06-05 戴祖渝 Amplifier with ultralow direct current (DC) offset at input end and analog/digital (A/D) converter
CN104811404A (en) * 2015-04-14 2015-07-29 华南理工大学 DC deviation correcting method and device
US20160065133A1 (en) * 2014-09-02 2016-03-03 Medtronic, Inc. Power-efficient chopper amplifier
WO2016054274A1 (en) * 2014-09-30 2016-04-07 The Regents Of The University Of California High dyamic range sensing front-end for neural signal recording systems
US20160242645A1 (en) * 2013-08-20 2016-08-25 The Regents Of The University Of California Systems and methods for electrocorticography signal acquisition
WO2018068013A1 (en) * 2016-10-06 2018-04-12 The Regents Of The University Of California An implantable electrocorticogram brain-computer interface system for restoring extremity movement
CN108634949A (en) * 2018-05-16 2018-10-12 西安电子科技大学 The DC maladjustment of copped wave instrument amplifier calibrates circuit
CN111162738A (en) * 2020-01-10 2020-05-15 电子科技大学 Instrument amplifier with ripple suppression function
WO2020177163A1 (en) * 2019-03-07 2020-09-10 华南理工大学 Chopper amplifying circuit employing negative impedance compensation technique
CN112274158A (en) * 2020-09-30 2021-01-29 清华大学 Biopotential recorder
CN112564642A (en) * 2020-12-04 2021-03-26 江苏科技大学 Chopper amplifier frequency compensation circuit
CN113746491A (en) * 2021-07-19 2021-12-03 成都通量科技有限公司 Blocking capacitor compensation system suitable for zero intermediate frequency receiver
CN113827249A (en) * 2021-09-28 2021-12-24 之江实验室 Method for eliminating multichannel gain error of electroencephalogram signal acquisition system
US20220071544A1 (en) * 2020-09-04 2022-03-10 Unist (Ulsan National Institute Of Science And Technology) Electroencephalogram (eeg) signal amplification apparatus for boosting impedance

Patent Citations (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3819864A (en) * 1973-03-30 1974-06-25 Texas Instruments Inc Digital dc offset removal method for data systems
US5532583A (en) * 1993-05-04 1996-07-02 Storage Technology Corporation System and method for calibrating a position sensing system
JP2003218727A (en) * 2002-01-18 2003-07-31 Hitachi Ltd Direct conversion receiving device
JP2004040157A (en) * 2002-06-28 2004-02-05 Matsushita Electric Ind Co Ltd Dc offset canceling circuit and receiver
US6750703B1 (en) * 2002-12-24 2004-06-15 Silicon Integrated Systems Corp. DC offset canceling circuit applied in a variable gain amplifier
US20050107674A1 (en) * 2003-09-30 2005-05-19 Jayant Parthasarathy DC offset cancellation techniques
JP2006229865A (en) * 2005-02-21 2006-08-31 Matsushita Electric Ind Co Ltd Wireless communication reception circuit and dc offset voltage correction method thereof
US20100033240A1 (en) * 2007-01-31 2010-02-11 Medtronic, Inc. Chopper-stabilized instrumentation amplifier for impedance measurement
CN101809863A (en) * 2007-09-28 2010-08-18 Nxp股份有限公司 Automatic common-mode rejection calibration
US20090140900A1 (en) * 2007-12-02 2009-06-04 The Chinese University Of Hong Kong Sensor interface devices and amplifiers
CN101621281A (en) * 2008-06-11 2010-01-06 英特赛尔美国股份有限公司 Chopper stabilized amplifier
CN102077467A (en) * 2008-07-08 2011-05-25 香港中文大学 Sensor interface devices and amplifiers
CN102150363A (en) * 2008-09-11 2011-08-10 美国亚德诺半导体公司 Auto-correction feedback loop for offset and ripple suppression in a chopper-stabilized amplifier
CN103138760A (en) * 2012-11-05 2013-06-05 戴祖渝 Amplifier with ultralow direct current (DC) offset at input end and analog/digital (A/D) converter
CN103095233A (en) * 2013-01-23 2013-05-08 电子科技大学 Amplifier eliminating direct current offsets
US20160242645A1 (en) * 2013-08-20 2016-08-25 The Regents Of The University Of California Systems and methods for electrocorticography signal acquisition
US20160065133A1 (en) * 2014-09-02 2016-03-03 Medtronic, Inc. Power-efficient chopper amplifier
WO2016054274A1 (en) * 2014-09-30 2016-04-07 The Regents Of The University Of California High dyamic range sensing front-end for neural signal recording systems
CN104811404A (en) * 2015-04-14 2015-07-29 华南理工大学 DC deviation correcting method and device
WO2018068013A1 (en) * 2016-10-06 2018-04-12 The Regents Of The University Of California An implantable electrocorticogram brain-computer interface system for restoring extremity movement
CN108634949A (en) * 2018-05-16 2018-10-12 西安电子科技大学 The DC maladjustment of copped wave instrument amplifier calibrates circuit
WO2020177163A1 (en) * 2019-03-07 2020-09-10 华南理工大学 Chopper amplifying circuit employing negative impedance compensation technique
CN111162738A (en) * 2020-01-10 2020-05-15 电子科技大学 Instrument amplifier with ripple suppression function
US20220071544A1 (en) * 2020-09-04 2022-03-10 Unist (Ulsan National Institute Of Science And Technology) Electroencephalogram (eeg) signal amplification apparatus for boosting impedance
CN112274158A (en) * 2020-09-30 2021-01-29 清华大学 Biopotential recorder
CN112564642A (en) * 2020-12-04 2021-03-26 江苏科技大学 Chopper amplifier frequency compensation circuit
CN113746491A (en) * 2021-07-19 2021-12-03 成都通量科技有限公司 Blocking capacitor compensation system suitable for zero intermediate frequency receiver
CN113827249A (en) * 2021-09-28 2021-12-24 之江实验室 Method for eliminating multichannel gain error of electroencephalogram signal acquisition system

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
徐勇等: "新型轨到轨斩波稳定运算放大器设计", 《军事通信技术》 *

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114983424A (en) * 2022-08-03 2022-09-02 之江实验室 Multichannel mixed chopping method and system applied to brain-computer interface chip
CN114983424B (en) * 2022-08-03 2022-11-15 之江实验室 Multichannel mixed chopping method and system applied to brain-computer interface chip
CN115005842A (en) * 2022-08-09 2022-09-06 之江实验室 Frequency-modulated brain-computer interface chip input impedance enhancing method and system

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