CN110212873A - Low noise high input impedance amplifier applied to wearable dry electrode cardioelectric monitor - Google Patents
Low noise high input impedance amplifier applied to wearable dry electrode cardioelectric monitor Download PDFInfo
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- CN110212873A CN110212873A CN201910620696.0A CN201910620696A CN110212873A CN 110212873 A CN110212873 A CN 110212873A CN 201910620696 A CN201910620696 A CN 201910620696A CN 110212873 A CN110212873 A CN 110212873A
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- 208000010668 atopic eczema Diseases 0.000 description 1
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- 201000010099 disease Diseases 0.000 description 1
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- 208000031225 myocardial ischemia Diseases 0.000 description 1
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- A—HUMAN NECESSITIES
- A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
- A61B—DIAGNOSIS; SURGERY; IDENTIFICATION
- A61B5/00—Measuring for diagnostic purposes; Identification of persons
- A61B5/24—Detecting, measuring or recording bioelectric or biomagnetic signals of the body or parts thereof
- A61B5/25—Bioelectric electrodes therefor
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/26—Modifications of amplifiers to reduce influence of noise generated by amplifying elements
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/68—Combinations of amplifiers, e.g. multi-channel amplifiers for stereophonics
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/271—Indexing scheme relating to amplifiers the DC-isolation amplifier, e.g. chopper amplifier, modulation/demodulation amplifier, uses capacitive isolation means, e.g. capacitors
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/294—Indexing scheme relating to amplifiers the amplifier being a low noise amplifier [LNA]
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/372—Noise reduction and elimination in amplifier
Abstract
The present invention discloses a kind of low noise high input impedance amplifier applied to wearable dry electrode cardioelectric monitor.Amplifier circuit reduces the flicker noise of circuit using novel chopped wave stabilizing technology, can effectively amplify to the electrocardiosignal of ultralow frequency；Sampling input structure is used simultaneously, be ensure that the not input impedance of step-down amplifier while using chopped wave stabilizing technology, effectively can be obtained electrocardiosignal from the dry electrode of high resistant, be conducive to the application of wearable dry electrode electrocardiographic examination；The electrode imbalance suppression circuit adjusted using digital analog mixed, does not increase the noise of overall circuit while the electrode for providing ± 300mV lacks of proper care rejection ability；Using taibiter, the recovery time of electrode imbalance suppression loop is improved, is conducive to the application of round-the-clock continuous ECG detecting, provides good solution for Internet of Things+medical treatment.
Description
Technical field
The present invention relates to technical field of integrated circuits, and in particular to a kind of applied to the low of wearable dry electrode cardioelectric monitor
Noise high input impedance amplifier.
Background technique
With the development of society and the progress of science and technology, health problem has been increasingly becoming focus concerned by people.According to WHO
Statistics, the number for dying of uninfection every year is about 41,000,000 people, and the ratio for dying of the number of cardiovascular disease is more than 50%.
The estimated the year two thousand twenty of WHO, the number that cardiovascular disease is died of in the whole world will be up to 26,000,000 simultaneously.China dies of heart attack every year
The number of sudden death is up to 560,000 people.And conventional electrocardiogram detection can only be to diseases such as myocardial ischemia, arrhythmia cordis, premature beats
Judged, heart attack can not be prevented.With the molding of the new techniques such as Internet of Things, cloud platform, a kind of " Internet of Things are produced
The completely new pattern of net+medical treatment ".Wearable continuous ECG detecting combine " Internet of Things+" by can round-the-clock monitoring human body the heart
Electric signal, and analyzed in real time by cloud, the death rate of heart attack can be substantially reduced in this way.
Since traditional electrocardiogram is lower using internal resistance, the lesser wet electrode of electrode imbalance, to the heart
The input impedance of electric amplifier and electrode imbalance rejection ability are of less demanding.But because wet electrode long periods of wear can cause skin
The problems such as skin itch, eczema, to not can be used directly in wearable ECG detecting.For wet electrode, dry electrode
It does not need to carry out Skin sensitization test and coats conductive paste, thus in theory, long periods of wear is needed more suitable for being used in
In wearable ECG detecting equipment.But in view of dry electrode there is biggish output impedance (1M Ω~100M Ω) and electrode to lose
It adjusts (± 300mV), the input impedance of traditional ecg amplifier is difficult to and the impedance of dry electrode is well matched with, and
The ecg amplifier output traditional under greatly lacking of proper care of dry electricity is easily saturated, and causes dry electrode that can not normally be applied to wear
Wear equipment.For this reason, it may be necessary to be improved to traditional ecg amplifier.
Summary of the invention
To be solved by this invention is that traditional ecg amplifier can not be with the height output in wearable ECG detecting equipment
Impedance, high electrode imbalance dry electrode match the problem of using, provide a kind of applied to wearable dry electrode cardioelectric monitor
Low noise high input impedance amplifier.
To solve the above problems, the present invention is achieved by the following technical solutions:
Applied to the low noise high input impedance amplifier of wearable dry electrode cardioelectric monitor, including chopper amplifier, line
Wave suppression loop and gain control loop.The output end of the input terminal connection chopper amplifier of Ripple Suppression loop, Ripple Suppression
The output end of the output termination chopper amplifier internal Ll trsanscondutance amplifier of loop.The input terminal of gain control loop connects
The output end of chopper amplifier, the output of the output termination chopper amplifier internal Ll trsanscondutance amplifier of Ripple Suppression loop
End.It is except that still further comprise sampling input stage circuit, simulation electrode imbalance suppression loop and digital electrode imbalance
Suppression circuit.Sample the input terminal V of input stage circuitinnAnd VinpForm the input of this low noise high input impedance ecg amplifier
End.Sample the output end V of input stage circuitampnAnd VamppConnect the input terminal of chopper amplifier.The output end shape of chopper amplifier
The output end of cost low noise high input impedance ecg amplifier.Simulation electrode imbalance suppression loop includes low-pass filter and declines
Subtract device.One group of input terminal of low-pass filter forms the input terminal of simulation electrode imbalance suppression loop, and with chopper amplifier
Output end connection.The output end of low-pass filter and the input terminal of attenuator connect.The output end connection sampling input of attenuator
The input terminal V of grade circuitADSLnAnd VADSLp.The input terminal connection simulation electrode imbalance of digital electrode imbalance suppression circuit inhibits ring
The output end of the low-pass filter on road, the input terminal of the output end connection sampling input stage circuit of digital electrode imbalance suppression circuit
VDDSLnAnd VDDSLp.Sampling and pretreatment of the input stage circuit completion to external input signal are sampled, enters copped wave in input signal
By the input impedance of electrode imbalance and baseline drift interference removal without reducing circuit in input signal before amplifier.Simulation electricity
Pole lack of proper care suppression loop first with low-pass filter to chopper amplifier output signal carry out low-pass filtering take out electrode imbalance and
Baseline drift exports an analog feedback signal after interfering and amplifying, and attenuator is recycled to decline analog feedback signal
Sampling input stage circuit is sent to after subtracting, to offset the electrode imbalance and baseline drift interference of external input signal.Digital electrode
Suppression circuit of lacking of proper care detects the voltage of the analog feedback signal of the active low-pass filter output of simulation electrode imbalance suppression loop,
And generate a digital compensation signal accordingly and be sent to sampling input stage circuit, to prevent low-pass filter output saturation.
In above scheme, sampling input stage circuit includes 16 NMOS tube K11~K18、K21~K28And 4 sampling capacitances
Cin1~Cin4.NMOS tube K11~K18Grid connect with clock signal φ 1, NMOS tube K21~K28Grid and clock signal φ 2
Connection.Above-mentioned clock signal φ 1 and clock signal φ 2 is one group and does not overlap clock.Capacitor Cin1One end and NMOS tube K11With
K21Source electrode be connected, capacitor Cin1The other end and NMOS tube K12And K22Drain electrode be connected.Capacitor Cin2One end and NMOS tube K13
And K23Source electrode be connected, capacitor Cin2The other end and NMOS tube K14And K24Drain electrode be connected.Capacitor Cin3One end and NMOS tube
K15And K25Source electrode be connected, capacitor Cin3The other end and NMOS tube K16And K26Drain electrode be connected.Capacitor Cin4One end and NMOS
Pipe K17And K27Source electrode be connected, capacitor Cin4The other end and NMOS tube K18And K28Drain electrode be connected.NMOS tube K11And K25Leakage
Pole forms the input terminal V of sampling input stage circuitinn.NMOS tube K13And K27Drain electrode formed sampling input stage circuit input terminal
Vinp.NMOS tube K15And K21Drain electrode formed sampling input stage circuit output end Vampn.NMOS tube K17And K23Drain electrode formed
Sample the output end V of input stage circuitampp.NMOS tube K16And K22Source electrode formed sampling input stage circuit input terminal VADSLn。
NMOS tube K18And K24Source electrode formed sampling input stage circuit input terminal VADSLp.NMOS tube K12And K26Source electrode formed sampling
The input terminal V of input stage circuitDDSLn.NMOS tube K14And K28Source electrode formed sampling input stage circuit input terminal VDDSLp。
In above scheme, the low-pass filter of simulation electrode imbalance suppression circuit includes hysteresis comparator I1、I2, NAND gate
I3, PMOS tube M1–M3, NMOS tube M4, amplifier A3And capacitor C61、C62.Hysteresis comparator I1With hysteresis comparator I2Reverse phase
One group of input terminal of input terminal formation low-pass filter.Hysteresis comparator I1With hysteresis comparator I2Non-inverting input terminal connect simultaneously
Reference voltage Vref.Hysteresis comparator I1With hysteresis comparator I2Output end meet NAND gate I respectively32 input terminals.NOT gate I3
Output end meet NMOS tube M simultaneously3With PMOS tube M4Grid.NMOS tube M4Source electrode meet reference voltage Vb.PMOS tube M3Source
Pole connects power supply.NMOS tube M3With PMOS tube M4Drain electrode be connected after, while with PMOS tube M1With PMOS tube M2Grid connection.
PMOS tube M1Drain electrode and hysteresis comparator I2Inverting input terminal connection, PMOS tube M1Source electrode connect amplifier A3Reverse phase
Input terminal.PMOS tube M2Drain electrode and hysteresis comparator I1Inverting input terminal connection, PMOS tube M2Source electrode connect amplifier A3
Non-inverting input terminal.Capacitor C61Both ends be separately connected amplifier A3Inverting input terminal and in-phase output end.Capacitor C62Two
End is separately connected amplifier A3Non-inverting input terminal and reversed-phase output.Amplifier A3In-phase output end and reversed-phase output shape
At one group of output end of low-pass filter.
In above scheme, the attenuator of simulation electrode imbalance suppression circuit includes chopper chopping1, chopping2,
And capacitor C71、C72、C81、C82.2 input terminals of chopper chopping1 form one group of input terminal of attenuator.Chopper
An output termination capacitor C of chopping171, capacitor C71The other end be divided into 2 tunnels, all the way via capacitor C81After be grounded, separately
An input terminal of chopper chopping2 is connect all the way.The another output of chopper chopping1 meets capacitor C72, capacitor
C72The other end be divided into 2 tunnels, all the way via capacitor C82After be grounded, another way connect chopper chopping2 another input
End.2 output ends of chopper chopping2 form one group of output end of attenuator.
In above scheme, digital electrode imbalance suppression circuit includes comparator U1、U2, shift register Shift, constant-current source
I1, resistance R1~R3, NMOS tube M11~M14、M21~M24、M5And reseting module Rest.Comparator U1With comparator U2Same phase
Input terminal forms one group of input terminal of digital electrode imbalance suppression circuit.Comparator U1With comparator U2Inverting input terminal simultaneously
Meet reference voltage VCM.Comparator U1Output termination shift register Shift rising input terminal up, comparator U2Output end
Meet the decline input terminal down of shift register Shift.The clock of shift register Shift terminates external timing signal.Displacement
The reset terminal rest of register Shift connects the output end of reseting module Rest.First group of four output terminals A of shift register <
4:1 > be divided into 2 tunnels, is sent into reseting module Rest all the way, and another way is separately connected NMOS tube M21~M24Grid.Shift register
Second group of four output end B<4:1>be divided into 2 tunnels, be sent into reseting module Rest all the way, another way is separately connected NMOS tube M11~
M14Grid.Current source I1A termination power, current source I1Another termination NMOS tube M14With NMOS tube M24Source electrode, and
Resistance R1One end.Resistance R1Other end NMOS tube M13With NMOS tube M23Source electrode and resistance R2One end.Resistance R2's
Other end NMOS tube M12With NMOS tube M22Source electrode and resistance R3One end.Resistance R3Other end NMOS tube M11And NMOS
Pipe M12Source electrode and NMOS tube M5Grid and drain electrode.NMOS tube M5Grounded drain.NMOS tube M11~M14Drain electrode be connected
Afterwards, one of them in one group of output end of digital electrode imbalance suppression circuit, NMOS tube M are formed21~M24Drain electrode be connected
Afterwards, another in one group of output end of digital electrode imbalance suppression circuit is formed.
Compared with prior art, the present invention has a characteristic that
1, using number and simulation mixed electrode lack of proper care suppression circuit, not only allow amplifier inhibit up to ±
The electrode of 300mV is lacked of proper care, and will not step-down amplifier input impedance；And it greatly reduces electrode imbalance suppression loop and draws
The noise entered；
2, input structure is sampled using novel capacitor, made in the case where not using positive feedback and booster amplifier
The low frequency equivalent input impedance of amplifier is greater than 1G Ω, and does not introduce additional noise.
Detailed description of the invention
Fig. 1 is the schematic diagram of the low noise high input impedance amplifier applied to wearable dry electrode cardioelectric monitor.
Fig. 2 is the schematic diagram for sampling input stage circuit.
Fig. 3 is the schematic diagram of low-pass filter.
Fig. 4 is the schematic diagram of attenuator.
Fig. 5 is the schematic diagram of digital electrode imbalance suppression circuit.
Fig. 6 is shift register work flow diagram.
The periodic steady state that Fig. 7 is Fig. 1 exchanges (PAC) simulation result diagram.
Fig. 8 is periodic steady state noise (PNOISE) simulation result diagram of Fig. 1.
The relationship simulation result diagram of input equivalent impedance and input frequency that Fig. 9 is Fig. 1.
Figure 10 is the time-domain simulation results figure of Fig. 1.
Specific embodiment
To make the objectives, technical solutions, and advantages of the present invention clearer, below in conjunction with specific example, to the present invention
It is further described.
Referring to Fig. 1, a kind of low noise high input impedance amplifier applied to wearable dry electrode cardioelectric monitor is main
By sampling input stage circuit, chopper amplifier, Ripple Suppression loop, gain control loop, simulation electrode lack of proper care suppression loop and
Digital electrode imbalance suppression circuit.Sampling input stage circuit includes 3 groups of input terminals, one group of input terminal Vinn、VinpIt is formed entire low
The input terminal of noise high input impedance ecg amplifier, another group of input terminal VADSLn、VADSLpConnect simulation electrode imbalance suppression loop
Output end, another group of input terminal VDDSLn、VDDSLpConnect the output end of digital electrode imbalance suppression circuit.Sample input stage circuit
Output end Vampn、VamppConnect the input terminal of chopper amplifier.The output end V of chopper amplifieroutn、VoutpForm entire low noise
The output end of sound pitch input impedance ecg amplifier.The output end V of the input termination chopper amplifier of Ripple Suppression loopoutn、
Voutp；Trsanscondutance amplifier G inside the output termination chopper amplifier of Ripple Suppression loopm1Output end.Gain control loop
The output end V of input termination chopper amplifieroutn、Voutp；Mutual conductance is put inside the output termination chopper amplifier of gain control loop
Big device Gm1Output end.The output end V of the input termination chopper amplifier of simulation electrode imbalance suppression loopoutn、Voutp.Simulation
The input terminal V of the output termination sampling input stage circuit of electrode imbalance suppression loopADSLn、VADSLp.Digital electrode imbalance inhibits electricity
Output end TESTn, TESTp of low-pass filter in the input termination simulation electrode imbalance suppression loop on road；Digital electrode is lost
Adjust the input terminal V of the output termination sampling input stage circuit of suppression circuitDDSLp、VDDSLn。
Input stage circuit is sampled, as shown in Fig. 2, including 16 switch K11~K18、K21~K28, 4 sampling capacitance Cin1~
Cin4.Since the source electrode and drain electrode of NMOS in integrated chip is symmetrical structure, comparatively ideal switch may be constructed, therefore in this hair
In bright preferred embodiment, 16 switch K11~K18、K21~K28It is made of NMOS.16 for wherein sampling input stage circuit open
It closes and is controlled respectively by one group of not overlapping clock φ 1 and φ 2,1 control switch K of clock signal φ11~K18, the control of clock signal φ 2
Switch K21~K28.NMOS tube K11~K18Grid connect with clock signal φ 1, NMOS tube K21~K28Grid and clock signal
The connection of φ 2；Above-mentioned clock signal φ 1 and clock signal φ 2 is one group and does not overlap clock.Capacitor Cin1One end and NMOS tube K11
And K21Source electrode be connected, capacitor Cin1The other end and NMOS tube K12And K22Drain electrode be connected；Capacitor Cin2One end and NMOS tube
K13And K23Source electrode be connected, capacitor Cin2The other end and NMOS tube K14And K24Drain electrode be connected；Capacitor Cin3One end and NMOS
Pipe K15And K25Source electrode be connected, capacitor Cin3The other end and NMOS tube K16And K26Drain electrode be connected；Capacitor Cin4One end with
NMOS tube K17And K27Source electrode be connected, capacitor Cin4The other end and NMOS tube K18And K28Drain electrode be connected.NMOS tube K11And K25
Drain electrode formed sampling input stage circuit input terminal Vinn；NMOS tube K13And K27Drain electrode formed sampling input stage circuit it is defeated
Enter to hold Vinp；NMOS tube K15And K21Drain electrode formed sampling input stage circuit output end Vampn；NMOS tube K17And K23Drain electrode
Form the output end V of sampling input stage circuitampp；NMOS tube K16And K22Source electrode formed sampling input stage circuit input terminal
VADSLn；NMOS tube K18And K24Source electrode formed sampling input stage circuit input terminal VADSLp；NMOS tube K12And K26Source electrode shape
At the input terminal V of sampling input stage circuitDDSLn；NMOS tube K14And K28Source electrode formed sampling input stage circuit input terminal
VDDSLp。
Chopper amplifier, including chopper MX1, MX2, trsanscondutance amplifier Gm1、Gm4, and by amplifier A1With capacitor C31、
C32The integrator of composition.2 input terminals of chopper MX1 form one group of input terminal V of chopper amplifierampn、Vampp.Chopper
2 output ends of MX1 are separately connected trsanscondutance amplifier Gm1Same phase and inverting input terminal, trsanscondutance amplifier Gm1Same phase and anti-
Phase output terminal is separately connected trsanscondutance amplifier Gm4Reverse phase and non-inverting input terminal.Trsanscondutance amplifier Gm4Same phase and reverse phase difference
2 input terminals of chopper MX2 are connected, 2 output ends of chopper MX2 are separately connected amplifier A1Same phase and anti-phase input
End.Capacitor C31Both ends be separately connected amplifier A1Reversed-phase output and non-inverting input terminal.Capacitor C32Both ends be separately connected
Amplifier A1In-phase output end and inverting input terminal.Amplifier A1Same phase and reversed-phase output formed chopper amplifier one
Group output end Voutn、Voutp.The input terminal V of chopper amplifieramppAnd VampnConnect the output end of sampling input stage circuit, input terminal
VamppAnd VampnThe differential input signal V of compositionampIt first passes around chopper MX1 and is modulated to chopping frequency, then put by mutual conductance
Big device Gm1、Gm4Amplification, is transferred to base band using chopper MX2 solution, finally by by C31、C32、A1The integrator filtering of composition is put
Big output.
Gain control loop, including capacitor C11、C12、C21、C22, trsanscondutance amplifier Gm2.Capacitor C11One end connect copped wave
The output end V of amplifieroutn, the other end is divided into two-way, all the way via capacitor C21It is connected to ground, another way connects trsanscondutance amplifier
Gm2Inverting input terminal.Capacitor C12One end connection chopper amplifier output end Voutp, the other end is divided into two-way, all the way via
Capacitor C22It is connected to ground, another way connects trsanscondutance amplifier Gm2Non-inverting input terminal.Trsanscondutance amplifier Gm2Same phase and reverse phase it is defeated
Outlet is separately connected chopper amplifier trsanscondutance amplifier Gm1In-phase output end and reversed-phase output.Pass through capacitor C11、C12、C21、
C22To output voltage Voutn、VoutpIt is divided, by the C of output voltage11/(C11+C21) Voltage Feedback of times size puts to mutual conductance
Big device Gm2Input terminal, if Gm2With Gm1Gain it is equal, so that it may control amplifier gain be C21/C11+1。
Ripple Suppression loop, including capacitor C41、C42, chopper MX3, by capacitor C51、C52With amplifier A2The integral of composition
Device, trsanscondutance amplifier Gm3.One group of output end V of chopper amplifieroutp、Voutn, respectively via capacitor C41、C42Connect chopper
2 input terminals of MX3.2 output ends of chopper MX3 are separately connected amplifier A2In-phase output end and inverting input terminal.
Amplifier A2In-phase output end trsanscondutance amplifier G is connected with reversed-phase outputm3Inverting input terminal and non-inverting input terminal.Capacitor
C51Both ends be separately connected amplifier A2In-phase output end and inverting input terminal.Capacitor C52Both ends be separately connected amplifier A2
Reversed-phase output and non-inverting input terminal.Trsanscondutance amplifier Gm3In-phase output end connected in chopper amplifier with reversed-phase output
Trsanscondutance amplifier Gm1In-phase output end and reversed-phase output.Ripple Suppression loop input connects the output end of chopper amplifier
Voutn、Voutp, the feedback node of the output termination chopper amplifier of Ripple Suppression loop, i.e. trsanscondutance amplifier Gm4Input terminal.
Due to trsanscondutance amplifier Gm1、Gm4Offset voltage and low-frequency noise can be chopped into device MX2 be modulated into frequency be chopping frequency at
Square wave, then by by amplifier A1With capacitor C31、C32The integrator of composition forms the triangle that frequency size is chopping frequency
Wave, in order to eliminate this triangular wave, Ripple Suppression loop is first by VoutOn triangle wave voltage by Capacitance derivative formed frequency
For the square wave current of chopping frequency, DC current is then demodulated by chopper MX3, passes through A2、C51、C52The integrator of composition
DC voltage is formed, trsanscondutance amplifier feedback to G is passed throughm4Balance out Gm1And Gm4Imbalance and low-frequency noise.
Simulation electrode imbalance suppression loop, including low-pass filter LPF1 and attenuator.
The low-pass filter, as shown in figure 3, including by hysteresis comparator I1、I2, NAND gate I3, PMOS tube M3And NMOS
Pipe M4The taibiter of composition, by PMOS tube M1And M2The pseudo- resistance P-RES, amplifier A of composition3And capacitor C61、C62。
Hysteresis comparator I1With hysteresis comparator I2Inverting input terminal formed low-pass filter one group of input terminal.Hysteresis comparator I1
With hysteresis comparator I2Non-inverting input terminal meet reference voltage V simultaneouslyref.Hysteresis comparator I1With hysteresis comparator I2Output end
NAND gate I is met respectively32 input terminals.NAND gate I3Output end meet NMOS tube M simultaneously3With PMOS tube M4Grid.NMOS
Pipe M4Source electrode meet reference voltage Vb.PMOS tube M3Source electrode connect power supply.NMOS tube M3With PMOS tube M4Drain electrode be connected after, simultaneously
With PMOS tube M1With PMOS tube M2Grid connection.PMOS tube M1Drain electrode and hysteresis comparator I2Inverting input terminal connection,
PMOS tube M1Source electrode connect amplifier A3Inverting input terminal.PMOS tube M2Drain electrode and hysteresis comparator I1Anti-phase input
End connection, PMOS tube M2Source electrode connect amplifier A3Non-inverting input terminal.Capacitor C61Both ends be separately connected amplifier A3It is anti-
Phase input terminal and in-phase output end.Capacitor C62Both ends be separately connected amplifier A3Non-inverting input terminal and reversed-phase output.It puts
Big device A3In-phase output end and reversed-phase output formed low-pass filter one group of output end.
The attenuator, as shown in figure 4, including chopper chopping1, chopping2 and capacitor C71、C72、C81、
C82.2 input terminals of chopper chopping1 form one group of input terminal of attenuator.An output of chopper chopping1
Termination capacitor C71, capacitor C71The other end is divided into 2 tunnels, all the way via capacitor C81After be grounded, another way meets chopper chopping2
An input terminal.The another output of chopper chopping1 meets capacitor C72, capacitor C72The other end is divided into 2 tunnels, all the way
Via capacitor C82After be grounded, another way connects another input terminal of chopper chopping2.2 of chopper chopping2 are defeated
One group of output end of outlet formation attenuator.
Digital electrode imbalance suppression circuit, as shown in figure 5, including comparator U1、U2, shift register Shift, constant-current source
I1, resistance R1~R3, NMOS tube M11~M14、M21~M24、M5And reseting module Rest.Comparator U1With comparator U2Same phase
Input terminal forms one group of input terminal of digital electrode imbalance suppression circuit.Comparator U1With comparator U2Inverting input terminal simultaneously
Meet reference voltage VCM.Comparator U1Output termination shift register Shift rising input terminal up, comparator U2Output end
Meet the decline input terminal down of shift register Shift.The clock of shift register Shift terminates external timing signal.Displacement
The reset terminal rest of register Shift connects the output end of reseting module Rest.First group of four output terminals A of shift register <
4:1 > be divided into 2 tunnels, is sent into reseting module Rest all the way, and another way is separately connected NMOS tube M21~M24Grid.Shift register
Second group of four output end B<4:1>be divided into 2 tunnels, be sent into reseting module Rest all the way, another way is separately connected NMOS tube M11~
M14Grid.Current source I1A termination power, current source I1Another termination NMOS tube M14With NMOS tube M24Source electrode, and
Resistance R1One end.Resistance R1Other end NMOS tube M13With NMOS tube M23Source electrode and resistance R2One end.Resistance R2's
Other end NMOS tube M12With NMOS tube M22Source electrode and resistance R3One end.Resistance R3Other end NMOS tube M11And NMOS
Pipe M12Source electrode and NMOS tube M5Grid and drain electrode.NMOS tube M5Grounded drain.NMOS tube M11~M14Drain electrode be connected
Afterwards, one of them in one group of output end of digital electrode imbalance suppression circuit, NMOS tube M are formed21~M24Drain electrode be connected
Afterwards, another in one group of output end of digital electrode imbalance suppression circuit is formed.
The operation principle of the present invention is that:
Electrocardiosignal first passes around sampling input stage circuit, electrode imbalance and baseline drift part is eliminated, then by operation
Voltage input afterwards is amplified to chopper amplifier；Wherein Ripple Suppression loop is the line for inhibiting chopper amplifier to generate
Wave；Gain control loop is used to control the gain of entire circuit.The input terminal V of chopper amplifieramppAnd VampnConnect sampling input stage
The output end of circuit, VoutnAnd VoutpFor the output end of amplifier.Input terminal VamppAnd VampnThe differential input signal V of compositionamp
It first passes around chopper MX1 to be modulated at chopping frequency, then passes through trsanscondutance amplifier Gm1、Gm4Amplification, using chopper
MX2 solution is transferred at baseband frequency, finally by by C31、C32、A1The integrator of composition carries out signal filtering；Ripple Suppression loop
The output end V of input termination chopper amplifieroutn、Voutp, the feedback node of the output termination chopper amplifier of Ripple Suppression loop
That is trsanscondutance amplifier Gm4Input terminal.Due to trsanscondutance amplifier Gm1、Gm4Offset voltage and low-frequency noise can be chopped into device
MX2 is modulated into the square wave that frequency is chopping frequency, then by by C31、C32、A1It is copped wave frequency that the integrator of composition, which forms frequency,
The triangular wave of rate, in order to eliminate this triangular wave, Ripple Suppression loop is first by VoutOn triangle wave voltage pass through Capacitance derivative
It is the square wave current of chopping frequency at frequency, DC current is then demodulated by chopper MX2, passes through A2、C51、C52It constitutes
Integrator forms DC voltage, passes through trsanscondutance amplifier feedback to Gm4Balance out Gm1And Gm4Imbalance and low-frequency noise；Gain control
Loop processed passes through capacitor C11、C12、C21、C22To output voltage Voutn、VoutpIt is divided, by the C of output voltage11/(C11+
C21) times size Voltage Feedback to trsanscondutance amplifier Gm2Input terminal, if Gm2With Gm1Gain it is equal, so that it may control put
The gain of big device is C21/C11+1。
Input stage circuit is sampled, sampling and pretreatment to input signal is completed, enters chopper amplifier in input signal
The preceding input impedance of electrode imbalance and the removal of baseline drift ingredient without reducing circuit by input signal.Fully differential table tennis knot
The sampling input stage circuit of structure capacitor carries out signal condition before signal enters amplifier, eliminate electrode imbalance and baseline drift at
Point, improve the input impedance of amplifier.The circuit distinguishes control switch K by two-phase not overlapping clock φ 1, φ 211~K14, K21~
K24, because the circuit is based on sampling technique, in order to enable the input signal of circuit is continuous, which uses two modules
Block1, block2 constitute ping-pong structure.The K when φ 1 is high11~K14Conducting, K21~K24Cut-off, block1 are in sampling rank
Section, block2 are in input phase；On the contrary, the K when φ 2 is high11~K14Cut-off, K21~K24Conducting, block1 are in input rank
Section, block2 are in sample phase；It is worked alternatively by block1 and block2 so that input signal is continuous.Following emphasis pair
Block1 is analyzed, and circuit is divided into two stages:
1. sample phase (φ 1 is height):
Switch K11~K14Conducting, switch K21~K24Cut-off, capacitor Cin1With Vinn、VDDSLnIt is connected, Cin2With Vinp、VDDSLpPhase
Connect, at this time Cin1、Cin2On voltage be respectively as follows:
Vcin1=Vinn-VDDSLn (1)
Vcin2=Vinp-VDDSLp (2)
2. input phase (φ 2 is height):
Switch K11~K14Cut-off, switch K21~K24Conducting, capacitor Cin1With Vampn、VADSLnIt is connected, Cin2With Vampp、VADSLp
It is connected, since the voltage on capacitor will not change, keeps sample phase voltage, therefore input voltage Vampn、VamppVoltage difference
Are as follows:
Vampn=Vcin1+VADSLn=Vinn-VDDSLn+VADSLn (3)
Vampp=Vcin2+VADSLp=Vinp-VDDSLp+VADSLp (4)
Enable input differential mode voltage Vin=Vinp-Vinn；Export differential mode voltage Vamp=Vampp-Vampn, it is obtained by (3), (4):
Vamp=Vin-(VDDSLp-VDDSLn)+(VADSLp-VADSLn) (5)
Enable VDSL=(VDDSLp-VDDSLn)+(VADSLn-VADSLp), it is obtained by (5):
Vamp=Vin-VDSL (6)
When feedback stability, VDSLWith input VinIn electrode imbalance it is equal with baseline drift ingredient, therefore the difference of amplifier
Divide input VampNot comprising by VinElectrode imbalance and baseline drift ingredient, effectively inhibit electrode lack of proper care and baseline drift.
Simulation electrode imbalance suppression loop carries out low-pass filtering to chopper amplifier output signal first with low-pass filter
It takes out after electrode imbalance is interfered and amplified with baseline drift and exports an analog feedback signal, recycle attenuator to simulation
Feedback signal is sent to sampling input stage circuit after being decayed, dry to offset externally input electrode imbalance and baseline drift
It disturbs.Taibiter is in order to improve the voltage recovery rate of high resistant node.When two hysteresis comparators detect output voltage
Higher than VrefWhen, the gate voltage of pseudo- resistance tube is pulled down into Vb, so that pseudo- resistance decline, accelerates the charging of capacitive node.By
It is located at ultralow frequency in the cutoff frequency of low-pass filter, the band in electrocardiosignal is outer, with interior capacitor C61、C62Impedance it is remote
Lower than the impedance of pseudo- resistance P-RES, amplifier A3Follower, therefore amplifier A are equivalent to inband signaling3Output noise with
A3Gain it is unrelated, consistently equal to A3Input equivalent noise.Therefore the effect of attenuator is for the simulation electrode imbalance suppression that decays
The noise that loop processed introduces, but in order not to reduce the ability inhibited to electrode imbalance, when design, increase A3Gain, increase volume
While guaranteeing that loop gain does not decline, the noise contribution of simulation electrode imbalance suppression loop is reduced for 10 times of outer attenuators
10 times.In order not to introduce additional noise and power consumption, the attenuator first by HVDC Modulation to high frequency by solving again after capacitance partial pressure
It is adjusted to direct current, avoids the problem of causing noise to increase with power consumption increase using electric resistance partial pressure.
The mould of the active low-pass filter output of digital electrode imbalance suppression circuit detection simulation electrode imbalance suppression loop
The voltage of quasi- feedback signal, and generate a digital compensation signal accordingly and be sent to sampling input stage circuit, to prevent low pass filtered
Wave device output saturation expands electrode imbalance and inhibits range.A inside TESTn signal from analog electrode mistuned circuit3Anti-phase output
End extracts, TESTp from simulation electrode imbalance suppression loop inside A3In-phase output end extract, CLK_100Hz 100Hz
Clock signal.10 times of attenuators are connected on simulation electrode imbalance suppression loop, in 1.8V power supply, amplifier A3It is defeated
The amplitude of oscillation is ± 1V out, there was only ± 100mV by the output voltage swing of attenuator.In order to make up the loss of inhibition amplitude, digital electrode
Workflow of lacking of proper care is as follows:
Four output terminals As<4:1>of shift register and B<4:1>are to metal-oxide-semiconductor M21~M24、M11~M14Control mode point
Not as shown in table 1, table 2
Shift register is to metal-oxide-semiconductor M11~M14、M21~M24Control planning it is as follows:
1 four output terminals A<4:1>control logics of table
| Binary value | A<4> | A<3> | A<2> | A<1> | The pipe of conducting |
| 0001 | 0 | 0 | 0 | 1 | M21 |
| 0010 | 0 | 0 | 1 | 0 | M22 |
| 0100 | 0 | 1 | 0 | 0 | M23 |
| 1000 | 1 | 0 | 0 | 0 | M24 |
2 four output end B<4:1>control logics of table
| Binary value | B<4> | B<3> | B<2> | B<1> | The pipe of conducting |
| 0001 | 0 | 0 | 0 | 1 | M11 |
| 0010 | 0 | 0 | 1 | 0 | M12 |
| 0100 | 0 | 1 | 0 | 0 | M13 |
| 1000 | 1 | 0 | 0 | 0 | M14 |
In the case where being worked normally due to circuit, metal-oxide-semiconductor M21~M24In only have the conducting of pipe, meanwhile, metal-oxide-semiconductor
M11~M14In also only have the conducting of pipe.Therefore, circuit malfunctions in order to prevent, adds in digital electrode imbalance suppression circuit
Reseting module Rest, which detects the control signal of A<4:1>, B<4:1>, if M21~M24In there are two metal-oxide-semiconductor simultaneously
A<4:1>and B<4:1>is then reset to 0001 by conducting simultaneously；If same M11~M14In simultaneously turn on there are two metal-oxide-semiconductor, then
Also A<4:1>and B<4:1>is reset to 0001 simultaneously, increases the fault-tolerance of circuit.
The workflow of shift register can be illustrated by Fig. 6:
1. when TESTn detects amplifier A3When the voltage of reversed-phase output is higher than threshold value VCM, shift register judges four
Whether position output end B is 1 (0001):
If not being 1, four output end B are moved to right one in next rising edge clock, are controlled by four output end B
Switch meeting so that VDDSLnOutput voltage declines 70mV, by formula (5) as can be seen that because VinNearly flip-flop due to super
The characteristics of low frequency and will not be mutated in the short time, i.e. VDSLIt is constant, VDDSLnDecline will make VADSLnDecline is TESTn decline；
If four output end B are 1, four output terminals As are controlled in next rising edge clock and move to left one, so that
VDDSLpRise 70mV, equally passes through formula (5) and VDSLIt is constant to can be seen that VDDSLpRising also results in VADSLnDecline is under TESTn
Drop.
2. when TESTp detects amplifier A3When the voltage of in-phase output end is higher than threshold value VCM, shift register judges four
Whether position output terminals A is 1 (0001):
If not being 1, four output terminals As are moved to right one in next rising edge clock, so that VDDSLpUnder output voltage
70mV is dropped, formula (5) and V are passed throughDSLIt is constant to can be seen that VDDSLpDecline will lead to VADSLpDecline is TESTp decline；
If four output terminals As are 1, four output end B are controlled in next rising edge clock and move to left one, so that
VDDSLnRise, passes through formula (5) and VDSLIt is constant to can be seen that VDDSLnRising also results in VADSLpDecline is TESTp decline.
7 kinds of different differential voltages are provided by digital electrode imbalance inhibition part, are that simulation electrode imbalance suppression loop mentions
For the Amplitude Compensation of ± 210mV, in addition simulation electrode imbalance suppression loop itself has ± 100mV rejection ability, so always
Rejection ability be extended to ± 310mV.
Fig. 7 is that the periodic steady state of this low noise high input impedance amplifier exchanges (PAC) simulation result, passes through simulation result
It can be seen that circuit has the high current flow angle of 0.6Hz, electrode imbalance and baseline drift interference can be effectively filtered out.
Fig. 8 is periodic steady state noise (PNOISE) simulation result of this low noise high input impedance amplifier, passes through emulation
As a result as can be seen that the circuit hasUltra-low noise, efficiently solve the circuit under CMOS technology
The larger problem of flicker noise meets biomedical ultralow frequency, low noise applications.
Fig. 9 is the input impedance of this low noise high input impedance amplifier and the relationship simulation result of frequency, passes through emulation
As a result it can be seen that the circuit has the input impedance of 0.1~250Hz of 7G Ω@, meet answering for the wearable dry electrode of biomedicine
With.
Figure 10 is the time domain functional verification of this low noise high input impedance amplifier, increases a 300mV in input when 1s
Electrode imbalance, by simulation result as can be seen that the circuit effectively inhibits the electrode of 300mV to lack of proper care, when the recovery of system
Between be less than 100ms.
Present invention employs novel capacitor sampling input stage circuit and feedback systems based on capacitor operation, and are based on
Number and two kinds of simulation are adjusted combined novel bicyclic mixing regulative mode by capacitor, are efficiently avoided feedback and are led
The problem of causing input impedance decline.Chopping frequency be 20KHz in the case where, realize input impedance be 7G Ω@0.6~
250Hz。
To the wearable dry continuous cardioelectric monitor amplifier circuit of electrode low noise high input impedance proposed in 180nm
Software emulation is carried out under CMOS technology standard, the results showed that under 1.8V condition of power supply, total power consumption 18uW, input impedance 7G
Ω 0.6~250Hz of@, gain 46dB, the high pass cut off frequency with 0.6Hz, equivalent input noise are0.6~250Hz is 1.9uVrms with interior integral RMS AC noise.
The detection of ultra-weak electronic signal when the present invention is suitable for Biomedical Signals Acquisition, such as electrocardio, eeg monitoring are led to
Crossing can also realize and put to other biological electric signal to the adjustment of the low-pass cut-off frequencies in simulation electrode imbalance suppression loop
Greatly, with meet field of biomedicine to electro-physiological signals low noise, ultralow frequency, high impedance, high-precision, low-power consumption apply need
It asks.
It realizes and still keeps high input impedance after introducing chopped wave stabilizing technology, and be all to have in passband to direct current
High input impedance, and without introducing additional noise.It is characterized in that, use novel capacitor sampling input structure and
The novel electrode imbalance suppression circuit based on capacitor operation, solves and traditionally inhibits circuit to be connected to input terminal electrode imbalance
The problem of causing input impedance to reduce, so that not needing additional positive feedback loop to promote input impedance, while using number
The mode that electrode imbalance suppression circuit and simulation electrode imbalance suppression loop mixing are adjusted, in the imbalance suppression of guarantee ± 300mV electrode
The noise of electrode imbalance suppression circuit is effectively reduced in the case where range processed.In addition to this circuit also includes copped wave main amplifier,
For being amplified to faint electrocardiosignal；Ripple Suppression loop, for inhibiting to be chopped into the ripple of amplifier generation；Gain
Control loop is used to determine the gain of amplifier.
It should be noted that although the above embodiment of the present invention be it is illustrative, this be not be to the present invention
Limitation, therefore the invention is not limited in above-mentioned specific embodiment.Without departing from the principles of the present invention, all
The other embodiment that those skilled in the art obtain under the inspiration of the present invention is accordingly to be regarded as within protection of the invention.
Claims (5)
1. being applied to the low noise high input impedance amplifier of wearable dry electrode cardioelectric monitor, including chopper amplifier, ripple
Suppression loop and gain control loop；
The output end of the input terminal connection chopper amplifier of Ripple Suppression loop, the output of Ripple Suppression loop terminate chopper amplification
The output end of device internal Ll trsanscondutance amplifier；The output end of the input terminal connection chopper amplifier of gain control loop, line
The output end of the output termination chopper amplifier internal Ll trsanscondutance amplifier of wave suppression loop；
It is characterized in that still further comprising sampling input stage circuit, simulation electrode imbalance suppression loop and digital electrode imbalance suppression
Circuit processed；
Sample the input terminal V of input stage circuitinnAnd VinpForm the input terminal of this low noise high input impedance ecg amplifier；It adopts
The output end V of sample input stage circuitampnAnd VamppConnect the input terminal of chopper amplifier；The output end of chopper amplifier forms this
The output end of low noise high input impedance ecg amplifier；
Simulation electrode imbalance suppression loop includes low-pass filter and attenuator；One group of input terminal of low-pass filter forms simulation
The input terminal of electrode imbalance suppression loop, and connect with the output end of chopper amplifier；The output end of low-pass filter and decaying
The input terminal of device connects；The input terminal V of the output end connection sampling input stage circuit of attenuatorADSLnAnd VADSLp；
The output end of the low-pass filter of the input terminal connection simulation electrode imbalance suppression loop of digital electrode imbalance suppression circuit,
The input terminal V of the output end connection sampling input stage circuit of digital electrode imbalance suppression circuitDDSLnAnd VDDSLp；
Sampling and pretreatment of the input stage circuit completion to external input signal are sampled, before input signal enters chopper amplifier
By the input impedance of electrode imbalance and baseline drift interference removal without reducing circuit in input signal；
Simulation electrode imbalance suppression loop carries out low-pass filtering taking-up to chopper amplifier output signal first with low-pass filter
Electrode imbalance and baseline drift export an analog feedback signal after interfering and amplifying, and recycle attenuator to analog feedback
Signal is sent to sampling input stage circuit after being decayed, dry with electrode imbalance and the baseline drift of offsetting external input signal
It disturbs；
The simulation of the active low-pass filter output of digital electrode imbalance suppression circuit detection simulation electrode imbalance suppression loop is anti-
The voltage of feedback signal, and generate a digital compensation signal accordingly and be sent to sampling input stage circuit, to prevent low-pass filter
Output saturation.
2. it is applied to the low noise high input impedance amplifier of wearable dry electrode cardioelectric monitor according to claim 1,
Be characterized in: sampling input stage circuit includes 16 NMOS tube K11~K18、K21~K28And 4 sampling capacitance Cin1~Cin4；
NMOS tube K11~K18Grid connect with clock signal φ 1, NMOS tube K21~K28Grid connect with clock signal φ 2；
Above-mentioned clock signal φ 1 and clock signal φ 2 is one group and does not overlap clock；
Capacitor Cin1One end and NMOS tube K11And K21Source electrode be connected, capacitor Cin1The other end and NMOS tube K12And K22Leakage
Extremely it is connected；Capacitor Cin2One end and NMOS tube K13And K23Source electrode be connected, capacitor Cin2The other end and NMOS tube K14And K24's
Drain electrode is connected；Capacitor Cin3One end and NMOS tube K15And K25Source electrode be connected, capacitor Cin3The other end and NMOS tube K16And K26
Drain electrode be connected；Capacitor Cin4One end and NMOS tube K17And K27Source electrode be connected, capacitor Cin4The other end and NMOS tube K18With
K28Drain electrode be connected；
NMOS tube K11And K25Drain electrode formed sampling input stage circuit input terminal Vinn；NMOS tube K13And K27Drain electrode formation adopt
The input terminal V of sample input stage circuitinp；NMOS tube K15And K21Drain electrode formed sampling input stage circuit output end Vampn；NMOS
Pipe K17And K23Drain electrode formed sampling input stage circuit output end Vampp；NMOS tube K16And K22Source electrode formed sampling input
The input terminal V of grade circuitADSLn；NMOS tube K18And K24Source electrode formed sampling input stage circuit input terminal VADSLp；NMOS tube
K12And K26Source electrode formed sampling input stage circuit input terminal VDDSLn；NMOS tube K14And K28Source electrode formed sampling input stage
The input terminal V of circuitDDSLp。
3. it is applied to the low noise high input impedance amplifier of wearable dry electrode cardioelectric monitor according to claim 1,
Be characterized in: the low-pass filter of simulation electrode imbalance suppression circuit includes hysteresis comparator I1、I2, NAND gate I3, PMOS tube M1–
M3, NMOS tube M4, amplifier A3And capacitor C61、C62；
Hysteresis comparator I1With hysteresis comparator I2Inverting input terminal formed low-pass filter one group of input terminal；Sluggishness is relatively
Device I1With hysteresis comparator I2Non-inverting input terminal meet reference voltage V simultaneouslyref；Hysteresis comparator I1With hysteresis comparator I2It is defeated
Outlet meets NAND gate I respectively32 input terminals；NOT gate I3Output end meet NMOS tube M simultaneously3With PMOS tube M4Grid；
NMOS tube M4Source electrode meet reference voltage Vb；PMOS tube M3Source electrode connect power supply；NMOS tube M3With PMOS tube M4Drain electrode be connected after,
Simultaneously with PMOS tube M1With PMOS tube M2Grid connection；PMOS tube M1Drain electrode and hysteresis comparator I2Inverting input terminal connect
It connects, PMOS tube M1Source electrode connect amplifier A3Inverting input terminal；PMOS tube M2Drain electrode and hysteresis comparator I1Reverse phase it is defeated
Enter end connection, PMOS tube M2Source electrode connect amplifier A3Non-inverting input terminal；Capacitor C61Both ends be separately connected amplifier A3's
Inverting input terminal and in-phase output end；Capacitor C62Both ends be separately connected amplifier A3Non-inverting input terminal and reversed-phase output；
Amplifier A3In-phase output end and reversed-phase output formed low-pass filter one group of output end.
4. it is applied to the low noise high input impedance amplifier of wearable dry electrode cardioelectric monitor according to claim 1,
Be characterized in: the attenuator of simulation electrode imbalance suppression circuit includes chopper chopping1, chopping2 and capacitor C71、
C72、C81、C82；
2 input terminals of chopper chopping1 form one group of input terminal of attenuator；One of chopper chopping1 is defeated
Termination capacitor C out71, capacitor C71The other end be divided into 2 tunnels, all the way via capacitor C81After be grounded, another way connects chopper
An input terminal of chopping2；The another output of chopper chopping1 meets capacitor C72, capacitor C72The other end point
For 2 tunnels, all the way via capacitor C82After be grounded, another way connects another input terminal of chopper chopping2；Chopper
2 output ends of chopping2 form one group of output end of attenuator.
5. it is applied to the low noise high input impedance amplifier of wearable dry electrode cardioelectric monitor according to claim 1,
Be characterized in: digital electrode imbalance suppression circuit includes comparator U1、U2, shift register Shift, constant-current source I1, resistance R1~R3,
NMOS tube M11~M14、M21~M24、M5And reseting module Rest；
Comparator U1With comparator U2Non-inverting input terminal formed digital electrode imbalance suppression circuit one group of input terminal；Comparator
U1With comparator U2Inverting input terminal meet reference voltage VCM simultaneously；Comparator U1Output termination shift register Shift
Rise input terminal up, comparator U2Output termination shift register Shift decline input terminal down；Shift register
The clock of Shift terminates external timing signal；The reset terminal rest of shift register Shift connects the output of reseting module Rest
End；First group of four output terminals A<4:1>of shift register are divided into 2 tunnels, are sent into reseting module Rest, another way difference all the way
Connect NMOS tube M21~M24Grid；Second group of four output end B<4:1>of shift register are divided into 2 tunnels, are sent into all the way multiple
Position module Rest, another way are separately connected NMOS tube M11~M14Grid；Current source I1A termination power, current source I1It is another
One termination NMOS tube M14With NMOS tube M24Source electrode and resistance R1One end；Resistance R1Other end NMOS tube M13And NMOS
Pipe M23Source electrode and resistance R2One end；Resistance R2Other end NMOS tube M12With NMOS tube M22Source electrode and resistance R3
One end；Resistance R3Other end NMOS tube M11With NMOS tube M12Source electrode and NMOS tube M5Grid and drain electrode；NMOS tube
M5Grounded drain；
NMOS tube M11~M14Drain electrode be connected after, form wherein one in one group of output end of digital electrode imbalance suppression circuit
It is a, NMOS tube M21~M24Drain electrode be connected after, formed digital electrode imbalance suppression circuit one group of output end in another.
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| CN114531120A (en) * | 2022-01-04 | 2022-05-24 | 电子科技大学 | High-performance 8-channel bioelectric signal instrument amplifier |
| CN115005842A (en) * | 2022-08-09 | 2022-09-06 | 之江实验室 | Frequency-modulated brain-computer interface chip input impedance enhancing method and system |
| CN115005842B (en) * | 2022-08-09 | 2022-11-15 | 之江实验室 | Frequency-modulated brain-computer interface chip input impedance enhancing method and system |
| CN115337021A (en) * | 2022-10-19 | 2022-11-15 | 之江实验室 | Method and system for removing baseline drift applied to electrocardio acquisition |
| WO2024008200A1 (en) * | 2022-12-29 | 2024-01-11 | 杭州万高科技股份有限公司 | Control circuit for fully-differential capacitive feedback amplifier, and control method |
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