CN114531133B - Bulk acoustic wave filter chip packaging method and packaging structure - Google Patents

Bulk acoustic wave filter chip packaging method and packaging structure Download PDF

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CN114531133B
CN114531133B CN202210424172.6A CN202210424172A CN114531133B CN 114531133 B CN114531133 B CN 114531133B CN 202210424172 A CN202210424172 A CN 202210424172A CN 114531133 B CN114531133 B CN 114531133B
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spacing
bulges
acoustic wave
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bulge
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CN114531133A (en
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不公告发明人
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Shenzhen Newsonic Technologies Co Ltd
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02—Details
    • H03H9/05—Holders; Supports
    • H03H9/10—Mounting in enclosures
    • H03H9/1007—Mounting in enclosures for bulk acoustic wave [BAW] devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/52—Mounting semiconductor bodies in containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H3/00—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
    • H03H3/007—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
    • H03H3/02—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/46—Filters
    • H03H9/54—Filters comprising resonators of piezoelectric or electrostrictive material

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Acoustics & Sound (AREA)
  • Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)
  • Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)

Abstract

The invention provides a bulk acoustic wave filter chip packaging method and a packaging structure. The packaging method of the bulk acoustic wave filter chip comprises the following steps: etching a substrate bottom liner of the bulk acoustic wave filter chip packaging structure to form a filter wafer mounting groove on the substrate bottom liner; the surface of the bottom of the filter wafer mounting groove is provided with a first spacing bulge, a second spacing bulge, a third spacing bulge and a fourth spacing bulge, wherein the shapes and the sizes of the first spacing bulge, the second spacing bulge, the third spacing bulge and the fourth spacing bulge are different; the bulk acoustic wave filter chip is inversely welded in the filter wafer mounting groove; performing plastic packaging on the bulk acoustic wave filter chip to form a plastic packaging layer; and covering a cover plate outside the plastic package layer, and bonding and packaging the cover plate and the substrate bottom lining. The packaging structure is obtained by the packaging method.

Description

Bulk acoustic wave filter chip packaging method and packaging structure
Technical Field
The invention provides a bulk acoustic wave filter chip packaging method and a packaging structure, and belongs to the technical field of thin film filters.
Background
The film bulk acoustic wave filter wafer is composed of a series of FBAR filter chips formed by connecting a plurality of FBAR resonators in series and in parallel, each resonator is provided with a cavity structure, and a piezoelectric and electrode laminated film structure suspended on the cavity structure. Since the piezoelectric and electrode laminated film structure is very thin and is easy to be damaged, the thin film bulk acoustic filter wafer cannot be directly thinned. Wafer level packaging is usually performed on the wafer of the film bulk acoustic filter, that is, the piezoelectric and electrode laminated film structure is placed under the cover, and at this time, the cover and the substrate of the wafer of the film bulk acoustic filter are thinned, and the film structure does not directly receive pressure and shearing force during thinning, so as to avoid the damage of the film. However, the thin film bulk acoustic filter wafer is subjected to wafer level packaging, and a cover body is added, so that the miniaturization of chip particles is not facilitated even if the thin film bulk acoustic filter wafer is subsequently thinned.
Disclosure of Invention
The invention provides a bulk acoustic wave filter chip packaging method and a packaging structure, which solve the problems of poor filter performance caused by overlarge thickness and incomplete transverse vibration wave consumption of the conventional film filter packaging structure, and adopt the following technical scheme:
a bulk acoustic wave filter chip packaging method comprises the following steps:
etching a substrate bottom lining of the bulk acoustic wave filter chip packaging structure to form a filter wafer mounting groove on the substrate bottom lining; the surface of the bottom of the filter wafer mounting groove is provided with a first spacing bulge, a second spacing bulge, a third spacing bulge and a fourth spacing bulge which are different in shape and size;
the bulk acoustic wave filter chip is inversely welded in the filter wafer mounting groove;
performing plastic packaging on the bulk acoustic wave filter chip to form a plastic packaging layer;
and covering a cover plate outside the plastic package layer, so that the cover plate and the substrate bottom lining are subjected to bonding packaging.
Further, to the etching processing is carried out to the substrate end liner of the bulk acoustic wave filter chip packaging structure, make the filter wafer mounting groove is formed on the substrate end liner, including:
acquiring a substrate bottom lining of a bulk acoustic wave filter chip packaging structure;
planning a mounting position and a mounting area corresponding to each bulk acoustic wave filter chip on the substrate according to the number of the bulk acoustic wave filter chips with packages and the size of the bulk acoustic wave filter chips;
carrying out laser engraving according to the positions and the sizes of the first interval bulges, the second interval bulges, the third interval bulges and the fourth interval bulges in the mounting area in a laser engraving mode to form an engraving pattern;
and etching according to the imprinting pattern, wherein the bottom surface of the groove on the substrate bottom lining is provided with a filter wafer mounting groove with a first interval bulge, a second interval bulge, a third interval bulge and a fourth interval bulge which are different in shape and size.
Further, flip-chip bonding the bulk acoustic wave filter chip in the filter wafer mounting groove includes:
arranging a second bonding pad on the upper surface of the first interval bulge;
arranging a first bonding pad on one side of the surface of an upper electrode of a piezoelectric layer of the bulk acoustic wave filter chip, wherein the first bonding pad and the second bonding pad are in corresponding positions;
and welding the first bonding pad and the second bonding pad to enable the bulk acoustic wave filter chip to be in flip-chip welding in the filter wafer mounting groove.
Furthermore, two groups of first spacing bulges, second spacing bulges and third spacing bulges are arranged on the bottom surface of the filter wafer mounting groove; the two groups of first spacing bulges, the second spacing bulges and the third spacing bulges are arranged on the bottom surface of the filter wafer mounting groove in a mirror symmetry manner; the fourth spacing protrusions are disposed on the axis of symmetry between the two sets of first spacing protrusions, the second spacing protrusions, and the third spacing protrusions, and the center line of the fourth spacing protrusions coincides with the axis of symmetry between the two sets of first spacing protrusions, the second spacing protrusions, and the third spacing protrusions.
Furthermore, the first spacing bulges are arranged on one side of the groove wall close to the filter wafer mounting groove; the third spacing bulge is arranged at one side close to the fourth spacing bulge; the second spacing projection is disposed between the first spacing projection and the third spacing projection.
Furthermore, the first spacing bulges, the second spacing bulges and the fourth spacing bulges adopt isosceles trapezoid bulge structures with different heights, and the lengths of the upper bottom edges and the lower bottom edges of the first spacing bulges, the second spacing bulges and the fourth spacing bulges are also different from each other; the third spacing bulges adopt a non-isosceles trapezoid-shaped bulge structure, and the length of the waist edge of the third spacing bulges, which is close to the fourth spacing bulges, is greater than that of the waist edge of the third spacing bulges, which is close to the second spacing bulges.
Further, the ratio conditions between the first spacing projection, the second spacing projection, the third spacing projection and the fourth spacing projection are as follows:
the height dimension proportion conditions among the first spacing projections, the second spacing projections, the third spacing projections and the fourth spacing projections are as follows:
H4<H2<H1<H3and, in addition,
0.92H≤H3<0.95H；
0.87×[H3-0.23×（H-H3）]≤H1<H3；
0.71×[H1-0.27×（H3-H1）]≤H2<H1；
0.83×[H2-0.34×（H1-H2）]≤H4<H2；
wherein H represents the total depth of the filter wafer mounting groove; h1、H2、H3And H4The height sizes of the first spacing bulges, the second spacing bulges, the third spacing bulges and the fourth spacing bulges are correspondingly represented respectively;
the dimensional proportion conditions of the upper bottom edges among the first spacing bulges, the second spacing bulges, the third spacing bulges and the fourth spacing bulges are as follows:
D2<D1<D4<D3and, in addition,
0.60D3≤D4≤0.77D3；
0.70D4≤D1≤0.82D4；
0.48D4≤D2≤0.64D4；
wherein D is1、D2、D3And D4The height sizes of the first spacing bulges, the second spacing bulges, the third spacing bulges and the fourth spacing bulges are correspondingly represented respectively;
the base angle ratio conditions among the first spacing projections, the second spacing projections, the third spacing projections and the fourth spacing projections are as follows:
W2≤W1；
0.75W2≤W4≤0.83W2；
0.78W2≤W31≤W1；
0.63W31≤W32≤0.75W31；
wherein, W1、W2And W4The base angle angles of the first spacing projection, the second spacing projection and the fourth spacing projection are respectively and correspondingly represented; w31And W32A base angle representing a larger one and a smaller one of the two base angles of the third spacing projection, respectively.
A bulk acoustic wave filter chip packaging structure comprises a substrate bottom liner, a bulk acoustic wave filter chip, a plastic packaging layer and a cover plate; the bulk acoustic wave filter chip is arranged in a filter wafer mounting groove of the substrate bottom lining in an inverted manner, and a first interval bulge, a second interval bulge, a third interval bulge and a fourth interval bulge which are different in shape and size are arranged on the surface of the bottom of the filter wafer mounting groove; a plastic packaging layer is arranged on one side of the lower electrode of the chip; a cover plate is arranged on the outer side of the plastic packaging layer; and the cover plate and the substrate bottom lining form a packaging structure in a bonding mode.
Further, the bulk acoustic wave filter chip includes a piezoelectric layer, an upper electrode, and a lower electrode; the upper electrode and the lower electrode are respectively arranged on two sides of the piezoelectric layer; the surface of the piezoelectric layer at one side provided with the upper electrode is provided with a first bonding pad; the position of the first pad corresponds to the position of the first spacing bump; a second bonding pad is arranged on the first spacing bulge; and the bulk acoustic wave filter chip is fixedly arranged in the filter wafer mounting groove through welding between the first bonding pad and the second bonding pad.
Further, the ratio conditions between the first spacing projection, the second spacing projection, the third spacing projection and the fourth spacing projection are as follows:
the height dimension proportion conditions among the first spacing projections, the second spacing projections, the third spacing projections and the fourth spacing projections are as follows:
H4<H2<H1<H3and, in addition,
0.92H≤H3<0.95H；
0.87×[H3-0.23×（H-H3）]≤H1<H3；
0.71×[H1-0.27×（H3-H1）]≤H2<H1；
0.83×[H2-0.34×（H1-H2）]≤H4<H2；
wherein H represents the total depth of the filter wafer mounting groove; h1、H2、H3And H4The height dimensions of the first spacing bump, the second spacing bump, the third spacing bump and the fourth spacing bump are correspondingly represented respectively;
the dimensional proportion conditions of the upper bottom edges among the first spacing bulges, the second spacing bulges, the third spacing bulges and the fourth spacing bulges are as follows:
D2<D1<D4<D3and, in addition,
0.60D3≤D4≤0.77D3；
0.70D4≤D1≤0.82D4；
0.48D4≤D2≤0.64D4；
wherein D is1、D2、D3And D4The height dimensions of the first spacing bump, the second spacing bump, the third spacing bump and the fourth spacing bump are correspondingly represented respectively;
the base angle ratio conditions among the first spacing projections, the second spacing projections, the third spacing projections and the fourth spacing projections are as follows:
0.90W1≤W2≤W1；
0.75W2≤W4≤0.83W2；
0.78W2≤W31≤W1；
0.63W31≤W32≤0.75W31；
wherein, W1、W2And W4The base angle angles of the first spacing projection, the second spacing projection and the fourth spacing projection are correspondingly represented respectively; w is a group of31And W32A base angle corresponding to a larger one and a smaller one of the two base angles representing the third spaced apart projections, respectively.
The invention has the beneficial effects that:
according to the bulk acoustic wave filter chip packaging method and the packaging structure, the chip wafer is embedded into the substrate bottom lining in a mode of arranging the wafer mounting groove on the substrate bottom lining, so that the whole thickness of the packaged chip can be reduced to the maximum extent, the minimization of the packaged chip can be realized to the maximum extent, and the mounting firmness between the chip wafer and the substrate bottom lining can be effectively improved. Meanwhile, the thickness of the bottom lining of the substrate is greatly reduced, so that the thickness of the bottom lining of the substrate is reduced, and the transverse vibration mode of the thin film filter cannot be completely eliminated due to the insufficient thickness of the bottom lining in the vibration process, so that the problem of poor performance of the filter is caused. Therefore, the bottom of the wafer mounting groove of the substrate bottom lining is provided with bulges with different heights and sizes; the amplitude of the vibration transverse wave is reduced and eliminated through the protrusions with different heights and sizes, so that the influence of the vibration transverse wave on the performance of the filter is reduced to the maximum extent while the thickness of the substrate bottom lining is greatly reduced, and the performance of the thin film filter is improved.
Drawings
FIG. 1 is a first flow chart of the method of the present invention;
FIG. 2 is a second flow chart of the method of the present invention;
FIG. 3 is a schematic view of the structure of the present invention;
(1, a piezoelectric layer; 2, a lower electrode; 3, an upper electrode; 4, a first pad; 5, a second pad; 6, a molding layer; 7, a chip substrate; 8, a cover plate; 9, a substrate; 91, a first spacing projection; 92, a second spacing projection; 93, a third spacing projection; 94, a fourth spacing projection).
Detailed Description
The preferred embodiments of the present invention will be described in conjunction with the accompanying drawings, and it should be understood that they are presented herein only to illustrate and explain the present invention and not to limit the present invention.
The embodiment of the invention provides a bulk acoustic wave filter chip packaging method, which comprises the following steps of:
s1, etching the substrate of the bulk acoustic wave filter chip packaging structure to form a filter wafer mounting groove on the substrate; the surface of the bottom of the filter wafer mounting groove is provided with a first spacing bulge, a second spacing bulge, a third spacing bulge and a fourth spacing bulge, wherein the shapes and the sizes of the first spacing bulge, the second spacing bulge, the third spacing bulge and the fourth spacing bulge are different;
s2, inversely installing and welding the bulk acoustic wave filter chip in the filter wafer installation groove;
s3, performing plastic package on the bulk acoustic wave filter chip to form a plastic package layer;
and S4, covering a cover plate on the plastic package layer to bond and package the cover plate and the substrate bottom lining.
As shown in fig. 2, the etching process is performed on a substrate bottom liner of the bulk acoustic wave filter chip package structure to form a filter wafer mounting groove on the substrate bottom liner, and the method includes:
s101, obtaining a substrate bottom lining of a bulk acoustic wave filter chip packaging structure;
s102, planning a mounting position and a mounting area corresponding to each bulk acoustic wave filter chip on the substrate according to the number of the bulk acoustic wave filter chips with packages and the size of the bulk acoustic wave filter chips;
s103, laser engraving is carried out in the mounting area according to the positions and the sizes of the first interval bulges, the second interval bulges, the third interval bulges and the fourth interval bulges in a laser engraving mode to form engraving patterns;
and S104, etching according to the imprinting pattern, wherein the bottom surface of the groove is provided with a filter wafer mounting groove with a first interval bulge, a second interval bulge, a third interval bulge and a fourth interval bulge which are different in shape and size.
Wherein, flip-chip bonding in the filter wafer mounting groove the bulk acoustic wave filter chip includes:
s201, arranging a second pad on the upper surface of the first interval bulge;
s202, arranging a first bonding pad on one side of the surface of an upper electrode of a piezoelectric layer of the bulk acoustic wave filter chip, wherein the first bonding pad and the second bonding pad are in corresponding positions;
and S203, welding the first bonding pad and the second bonding pad, and enabling the bulk acoustic wave filter chip to be in flip-chip welding in the filter wafer mounting groove.
The working principle of the technical scheme is as follows: firstly, etching a substrate bottom lining of the bulk acoustic wave filter chip packaging structure to form a filter wafer mounting groove on the substrate bottom lining; the surface of the bottom of the filter wafer mounting groove is provided with a first spacing bulge, a second spacing bulge, a third spacing bulge and a fourth spacing bulge, wherein the shapes and the sizes of the first spacing bulge, the second spacing bulge, the third spacing bulge and the fourth spacing bulge are different; then, the bulk acoustic wave filter chip is inversely installed and welded in the filter wafer installation groove; performing plastic packaging on the bulk acoustic wave filter chip to form a plastic packaging layer; and finally, covering a cover plate outside the plastic package layer to bond and package the cover plate and the substrate bottom lining.
The effect of the above technical scheme is: according to the bulk acoustic wave filter chip packaging method, the chip wafer is embedded into the substrate bottom lining in a mode of arranging the wafer mounting groove in the substrate bottom lining, the whole thickness of the packaged chip can be reduced to the maximum extent, the minimization of the packaged chip is realized to the maximum extent, and the mounting firmness between the chip wafer and the substrate bottom lining can be effectively improved. Meanwhile, the thickness of the bottom lining of the substrate is greatly reduced, so that the thickness of the bottom lining of the substrate is reduced, and the transverse vibration mode of the thin film filter cannot be completely eliminated due to the insufficient thickness of the bottom lining in the vibration process, so that the problem of poor performance of the filter is caused. Therefore, the bottom of the wafer mounting groove of the substrate bottom lining is provided with bulges with different heights and sizes; the amplitude of the vibration transverse wave is reduced and eliminated through the protrusions with different heights and sizes, so that the influence of the vibration transverse wave on the performance of the filter is reduced to the maximum extent while the thickness of the substrate bottom lining is greatly reduced, and the performance of the thin film filter is improved.
In an embodiment of the present invention, as shown in fig. 3, two sets of first spacing protrusions, second spacing protrusions, and third spacing protrusions are disposed on a bottom surface of the filter wafer mounting groove; the two groups of first spacing bulges, the second spacing bulges and the third spacing bulges are arranged on the bottom surface of the filter wafer mounting groove in a mirror symmetry manner; the fourth spacing protrusions are disposed on the axis of symmetry between the two sets of first spacing protrusions, the second spacing protrusions, and the third spacing protrusions, and the center line of the fourth spacing protrusions coincides with the axis of symmetry between the two sets of first spacing protrusions, the second spacing protrusions, and the third spacing protrusions.
The first spacing bulges are arranged on one side of the groove wall close to the filter wafer mounting groove; the third spacing bulge is arranged at one side close to the fourth spacing bulge; the second spacing projection is disposed between the first spacing projection and the third spacing projection.
The first spacing bulges, the second spacing bulges and the fourth spacing bulges adopt isosceles trapezoid projection structures with different heights, and the lengths of the upper bottom edges and the lower bottom edges of the first spacing bulges, the second spacing bulges and the fourth spacing bulges are different from each other; the third spacing bulges are of a non-isosceles trapezoid-shaped bulge structure, and the length of the waist edge of the third spacing bulges, which is close to the fourth spacing bulges, is greater than that of the waist edge of the second spacing bulges.
Specifically, the proportion conditions among the first spacing projection, the second spacing projection, the third spacing projection and the fourth spacing projection are as follows:
the height dimension proportion condition among the first spacing bulges, the second spacing bulges, the third spacing bulges and the fourth spacing bulges is as follows:
H4<H2<H1<H3and, in addition,
0.92H≤H3<0.95H；
0.87×[H3-0.23×（H-H3）]≤H1<H3；
0.71×[H1-0.27×（H3-H1）]≤H2<H1；
0.83×[H2-0.34×（H1-H2）]≤H4<H2；
wherein H represents the total depth of the filter wafer mounting groove; h1、H2、H3And H4The height dimensions of the first spacing bump, the second spacing bump, the third spacing bump and the fourth spacing bump are correspondingly represented respectively;
the dimensional proportion conditions of the upper bottom edges among the first spacing bulges, the second spacing bulges, the third spacing bulges and the fourth spacing bulges are as follows:
D2<D1<D4<D3and, in addition,
0.60D3≤D4≤0.77D3；
0.70D4≤D1≤0.82D4；
0.48D4≤D2≤0.64D4；
wherein D is1、D2、D3And D4Respectively correspondingly represent a first spacing bump, a second spacing bump, a third spacing bump and a fourth spacing bumpThe height dimension of the protrusion;
the base angle ratio conditions among the first spacing projections, the second spacing projections, the third spacing projections and the fourth spacing projections are as follows:
W2≤W1；
0.75W2≤W4≤0.83W2；
0.78W2≤W31≤W1；
0.63W31≤W32≤0.75W31；
wherein, W1、W2And W4The base angle angles of the first spacing projection, the second spacing projection and the fourth spacing projection are correspondingly represented respectively; w is a group of31And W32A base angle representing a larger one and a smaller one of the two base angles of the third spacing projection, respectively.
The working principle and the effect of the technical scheme are as follows: the thickness of the bottom lining of the wafer to be packaged is greatly reduced, so that the thickness of the bottom lining of the wafer to be packaged is reduced, and the transverse vibration mode of the thin film filter cannot be completely eliminated due to the insufficient thickness of the bottom lining in the vibration process, so that the problem of poor performance of the filter is easily caused. Therefore, a first spacing bump, a second spacing bump, a third spacing bump and a fourth spacing bump with different heights and sizes are arranged at the bottom of the wafer mounting groove of the wafer substrate to be packaged; the amplitude of the transverse vibration wave is reduced and eliminated through the protrusions with four different structures, so that the influence of the transverse vibration wave on the performance of the filter is reduced to the maximum extent while the thickness of the bottom lining of the wafer to be packaged is greatly reduced, and the performance of the thin film filter is improved.
On the other hand, different size parameters of the first spacing bulges, the second spacing bulges, the third spacing bulges and the fourth spacing bulges are set through the specific proportional relation, bulges and cavities with different sizes and gradients can be formed on the substrate, the continuity of the solid substrate for the transverse vibration wave conduction can be reduced in the transverse vibration process, meanwhile, the continuity of the transverse vibration wave conduction is further reduced through different heights and different side surface gradients and structures of the bulges in the transverse vibration wave conduction process due to different heights and other parameters, so that the amplitude of the transverse vibration wave is counteracted and consumed to the maximum extent, and the influence of the transverse vibration wave on the performance of the filter is reduced.
The embodiment of the invention provides a bulk acoustic wave filter chip packaging structure, as shown in fig. 3, the bulk acoustic wave filter chip packaging structure comprises a substrate bottom liner, a bulk acoustic wave filter chip, a plastic packaging layer and a cover plate; the bulk acoustic wave filter chip is arranged in a filter wafer mounting groove of the substrate bottom lining in an inverted manner, and a first interval bulge, a second interval bulge, a third interval bulge and a fourth interval bulge which are different in shape and size are arranged on the surface of the bottom of the filter wafer mounting groove; a plastic packaging layer is arranged on one side of the lower electrode of the chip; a cover plate is arranged on the outer side of the plastic packaging layer; and the cover plate and the substrate bottom lining form a packaging structure in a bonding mode.
The bulk acoustic wave filter chip comprises a piezoelectric layer, an upper electrode and a lower electrode; the upper electrode and the lower electrode are respectively arranged on two sides of the piezoelectric layer; the surface of the piezoelectric layer on the side provided with the upper electrode is provided with a first bonding pad; the position of the first pad corresponds to the position of the first spacing bump; a second bonding pad is arranged on the first spacing bulge; and the bulk acoustic wave filter chip is fixedly arranged in the filter wafer mounting groove through welding between the first bonding pad and the second bonding pad.
The proportion condition among the first spacing projections, the second spacing projections, the third spacing projections and the fourth spacing projections is as follows:
the height dimension proportion conditions among the first spacing projections, the second spacing projections, the third spacing projections and the fourth spacing projections are as follows:
H4<H2<H1<H3and, in addition,
0.92H≤H3<0.95H；
0.87×[H3-0.23×（H-H3）]≤H1<H3；
0.71×[H1-0.27×（H3-H1）]≤H2<H1；
0.83×[H2-0.34×（H1-H2）]≤H4<H2；
wherein H represents the total depth of the filter wafer mounting groove; h1、H2、H3And H4The height dimensions of the first spacing bump, the second spacing bump, the third spacing bump and the fourth spacing bump are correspondingly represented respectively;
the dimensional proportion conditions of the upper bottom edges among the first spacing bulges, the second spacing bulges, the third spacing bulges and the fourth spacing bulges are as follows:
D2<D1<D4<D3and, in addition,
0.60D3≤D4≤0.77D3；
0.70D4≤D1≤0.82D4；
0.48D4≤D2≤0.64D4；
wherein D is1、D2、D3And D4The height dimensions of the first spacing bump, the second spacing bump, the third spacing bump and the fourth spacing bump are correspondingly represented respectively;
the base angle ratio conditions among the first spacing projections, the second spacing projections, the third spacing projections and the fourth spacing projections are as follows:
0.90W1≤W2≤W1；
0.75W2≤W4≤0.83W2；
0.78W2≤W31≤W1；
0.63W31≤W32≤0.75W31；
wherein, W1、W2And W4Respectively indicate a first spacing bump, a second spacing bump and a fourth spacing bumpThe base angle of (d); w31And W32A base angle corresponding to a larger one and a smaller one of the two base angles representing the third spaced apart projections, respectively.
The principle and the effect of the technical scheme are as follows: the bulk acoustic wave filter chip package packaging structure that this embodiment provided is through the mode that sets up wafer mounting groove on the base plate end liner with the embedded chip wafer to the base plate end liner in, through this kind of mode not only can furthest's reduction the whole thickness after the chip package, the at utmost realizes the minimizing of chip package to, can also effectively improve the installation fastness between chip wafer and the base plate end liner. Meanwhile, the thickness of the bottom lining of the substrate is greatly reduced, so that the thickness of the bottom lining of the substrate is reduced, and the transverse vibration mode of the thin film filter cannot be completely eliminated due to the insufficient thickness of the bottom lining in the vibration process, so that the problem of poor performance of the filter is caused. Therefore, the bottom of the wafer mounting groove of the substrate bottom lining is provided with bulges with different heights and sizes; the amplitude of the vibration transverse waves is reduced and eliminated through the protrusions with different heights and sizes, so that the influence of the vibration transverse waves on the performance of the filter is reduced to the maximum extent while the thickness of the substrate bottom lining is greatly reduced, and the performance of the thin film filter is improved.
The thickness of the wafer substrate to be packaged is greatly reduced, so that the thickness of the bottom of the wafer substrate to be packaged is reduced, and the transverse vibration mode of the thin-film filter cannot be completely eliminated due to the insufficient thickness of the substrate in the vibration process, so that the problem of poor performance of the filter is caused. Therefore, a first spacing bump, a second spacing bump, a third spacing bump and a fourth spacing bump with different heights and sizes are arranged at the bottom of the wafer mounting groove of the wafer substrate to be packaged; the amplitude of the transverse vibration wave is reduced and eliminated through the protrusions with four different structures, so that the influence of the transverse vibration wave on the performance of the filter is reduced to the maximum extent while the thickness of the bottom lining of the wafer to be packaged is greatly reduced, and the performance of the thin film filter is improved.
On the other hand, different size parameters of the first spacing bulges, the second spacing bulges, the third spacing bulges and the fourth spacing bulges are set through the specific proportional relation, bulges and cavities with different sizes and gradients can be formed on the substrate, the continuity of the solid substrate for the transverse vibration wave conduction can be reduced in the transverse vibration process, meanwhile, the continuity of the transverse vibration wave conduction is further reduced through different heights and different side surface gradients and structures of the bulges in the transverse vibration wave conduction process due to different heights and other parameters, so that the amplitude of the transverse vibration wave is counteracted and consumed to the maximum extent, and the influence of the transverse vibration wave on the performance of the filter is reduced.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.

Claims (7)

1. A bulk acoustic wave filter chip packaging method is characterized by comprising the following steps:
etching a substrate bottom liner of a bulk acoustic wave filter chip packaging structure to form a filter wafer mounting groove on the substrate bottom liner; the surface of the bottom of the filter wafer mounting groove is provided with a first spacing bulge, a second spacing bulge, a third spacing bulge and a fourth spacing bulge, wherein the shapes and the sizes of the first spacing bulge, the second spacing bulge, the third spacing bulge and the fourth spacing bulge are different;
the bulk acoustic wave filter chip is inversely welded in the filter wafer mounting groove;
performing plastic packaging on the bulk acoustic wave filter chip to form a plastic packaging layer;
covering a cover plate outside the plastic package layer to bond and package the cover plate and the substrate bottom lining;
two groups of first spacing bulges, second spacing bulges and third spacing bulges are arranged on the surface of the bottom of the filter wafer mounting groove; the two groups of first spacing bulges, the second spacing bulges and the third spacing bulges are arranged on the bottom surface of the filter wafer mounting groove in a mirror symmetry mode; the fourth spacing projection is arranged on the axis of the symmetry axis between the two groups of first spacing projections, the second spacing projections and the third spacing projections, and the center line of the fourth spacing projection is overlapped with the axis of the symmetry axis between the two groups of first spacing projections, the second spacing projections and the third spacing projections;
the first spacing bulges are arranged on one side of the groove wall close to the filter wafer mounting groove; the third spacing bulge is arranged at one side close to the fourth spacing bulge; the second spacing projection is disposed between the first spacing projection and the third spacing projection.
2. The bulk acoustic wave filter chip packaging method according to claim 1, wherein etching a substrate of the bulk acoustic wave filter chip packaging structure to form a filter wafer mounting groove on the substrate comprises:
acquiring a substrate bottom lining of a bulk acoustic wave filter chip packaging structure;
planning a mounting position and a mounting area corresponding to each bulk acoustic wave filter chip on the substrate according to the number of the bulk acoustic wave filter chips with packages and the size of the bulk acoustic wave filter chips;
laser engraving is carried out in the mounting area according to the positions and the sizes of the first interval bulges, the second interval bulges, the third interval bulges and the fourth interval bulges in a laser engraving mode to form an engraving pattern;
and etching according to the imprinting pattern, wherein the bottom surface of the groove is provided with a filter wafer mounting groove with a first interval bulge, a second interval bulge, a third interval bulge and a fourth interval bulge which are different in shape and size.
3. The bulk acoustic wave filter chip packaging method according to claim 1, wherein flip-chip bonding the bulk acoustic wave filter chip in the filter wafer mounting groove comprises:
arranging a second bonding pad on the upper surface of the first interval bulge;
arranging a first bonding pad on one side of the surface of an upper electrode of a piezoelectric layer of the bulk acoustic wave filter chip, wherein the first bonding pad and the second bonding pad are corresponding in position;
and welding the first bonding pad and the second bonding pad to enable the bulk acoustic wave filter chip to be in flip-chip welding in the filter wafer mounting groove.
4. The bulk acoustic wave filter chip packaging method according to claim 1, wherein the first spacing bump, the second spacing bump and the fourth spacing bump are isosceles trapezoid bump structures having different heights, and lengths of upper and lower bases of the first spacing bump, the second spacing bump and the fourth spacing bump are also different from each other; the third spacing bulges are of a non-isosceles trapezoid-shaped bulge structure, and the length of the waist edge of the third spacing bulges, which is close to the fourth spacing bulges, is greater than that of the waist edge of the second spacing bulges.
5. The bulk acoustic wave filter chip packaging method according to claim 1, wherein the ratio condition among the first spacing bump, the second spacing bump, the third spacing bump, and the fourth spacing bump is as follows:
the height dimension proportion conditions among the first spacing projections, the second spacing projections, the third spacing projections and the fourth spacing projections are as follows:
H4<H2<H1<H3and, in addition,
0.92H≤H3<0.95H；
0.87×[H3-0.23×（H-H3）]≤H1<H3；
0.71×[H1-0.27×（H3-H1）]≤H2<H1；
0.83×[H2-0.34×（H1-H2）]≤H4<H2；
wherein H represents the total depth of the filter wafer mounting groove; h1、H2、H3And H4The height dimensions of the first spacing bump, the second spacing bump, the third spacing bump and the fourth spacing bump are correspondingly represented respectively;
the dimensional proportion conditions of the upper bottom edges among the first spacing bulges, the second spacing bulges, the third spacing bulges and the fourth spacing bulges are as follows:
D2<D1<D4<D3and, in addition,
0.60D3≤D4≤0.77D3；
0.70D4≤D1≤0.82D4；
0.48D4≤D2≤0.64D4；
wherein D is1、D2、D3And D4The height sizes of the first spacing bulges, the second spacing bulges, the third spacing bulges and the fourth spacing bulges are correspondingly represented respectively;
the base angle ratio conditions among the first spacing projections, the second spacing projections, the third spacing projections and the fourth spacing projections are as follows:
W2≤W1；
0.75W2≤W4≤0.83W2；
0.78W2≤W31≤W1；
0.63W31≤W32≤0.75W31；
wherein, W1、W2And W4The base angle angles of the first spacing projection, the second spacing projection and the fourth spacing projection are respectively and correspondingly represented; w is a group of31And W32A base angle corresponding to a larger one and a smaller one of the two base angles representing the third spaced apart projections, respectively.
6. A bulk acoustic wave filter chip packaging structure is characterized by comprising a substrate bottom liner, a bulk acoustic wave filter chip, a plastic packaging layer and a cover plate; the bulk acoustic wave filter chip is arranged in a filter wafer mounting groove of the substrate bottom lining in an inverted manner, and a first interval bulge, a second interval bulge, a third interval bulge and a fourth interval bulge which are different in shape and size are arranged on the surface of the bottom of the filter wafer mounting groove; a plastic packaging layer is arranged on one side of the lower electrode of the chip; a cover plate is arranged on the outer side of the plastic packaging layer; the cover plate and the substrate bottom liner form a packaging structure in a bonding mode;
the proportion condition among the first spacing projections, the second spacing projections, the third spacing projections and the fourth spacing projections is as follows:
the height dimension proportion condition among the first spacing bulges, the second spacing bulges, the third spacing bulges and the fourth spacing bulges is as follows:
H4<H2<H1<H3and, in addition,
0.92H≤H3<0.95H；
0.87×[H3-0.23×（H-H3）]≤H1<H3；
0.71×[H1-0.27×（H3-H1）]≤H2<H1；
0.83×[H2-0.34×（H1-H2）]≤H4<H2；
wherein H represents the total depth of the filter wafer mounting groove; h1、H2、H3And H4The height sizes of the first spacing bulges, the second spacing bulges, the third spacing bulges and the fourth spacing bulges are correspondingly represented respectively;
the proportion condition of the sizes of the upper bottom edges among the first spacing bulges, the second spacing bulges, the third spacing bulges and the fourth spacing bulges is as follows:
D2<D1<D4<D3and, in addition,
0.60D3≤D4≤0.77D3；
0.70D4≤D1≤0.82D4；
0.48D4≤D2≤0.64D4；
wherein D is1、D2、D3And D4The height sizes of the first spacing bulges, the second spacing bulges, the third spacing bulges and the fourth spacing bulges are correspondingly represented respectively;
the base angle ratio conditions among the first spacing projections, the second spacing projections, the third spacing projections and the fourth spacing projections are as follows:
0.90W1≤W2≤W1；
0.75W2≤W4≤0.83W2；
0.78W2≤W31≤W1；
0.63W31≤W32≤0.75W31；
wherein, W1、W2And W4The base angle angles of the first spacing projection, the second spacing projection and the fourth spacing projection are respectively and correspondingly represented; w is a group of31And W32A base angle representing a larger one and a smaller one of the two base angles of the third spacing projection, respectively.
7. The bulk acoustic wave filter chip package structure according to claim 6, wherein the bulk acoustic wave filter chip comprises a piezoelectric layer, an upper electrode, and a lower electrode; the upper electrode and the lower electrode are respectively arranged on two sides of the piezoelectric layer; the surface of the piezoelectric layer at one side provided with the upper electrode is provided with a first bonding pad; the position of the first pad corresponds to the position of the first spacing bump; a second bonding pad is arranged on the first spacing bulge; and the bulk acoustic wave filter chip is fixedly arranged in the filter wafer mounting groove through welding between the first bonding pad and the second bonding pad.
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Publication number Priority date Publication date Assignee Title
EP0744830A1 (en) * 1994-10-20 1996-11-27 Japan Energy Corporation Surface acoustic wave device and production method thereof
CN112886939A (en) * 2020-12-25 2021-06-01 杭州左蓝微电子技术有限公司 Film bulk acoustic resonator, preparation method thereof and filter
CN114362716A (en) * 2021-12-23 2022-04-15 苏州汉天下电子有限公司 Resonator, filter, communication equipment and manufacturing method thereof

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Publication number Priority date Publication date Assignee Title
US10371667B2 (en) * 2015-11-16 2019-08-06 Qorvo Us, Inc. BAW sensor with passive mixing structures
CN113852360B (en) * 2021-11-30 2022-02-15 深圳新声半导体有限公司 Surface acoustic wave filter packaging method and packaging structure

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0744830A1 (en) * 1994-10-20 1996-11-27 Japan Energy Corporation Surface acoustic wave device and production method thereof
CN112886939A (en) * 2020-12-25 2021-06-01 杭州左蓝微电子技术有限公司 Film bulk acoustic resonator, preparation method thereof and filter
CN114362716A (en) * 2021-12-23 2022-04-15 苏州汉天下电子有限公司 Resonator, filter, communication equipment and manufacturing method thereof

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