CN114530121B

CN114530121B - Display module and display device

Info

Publication number: CN114530121B
Application number: CN202210272471.2A
Authority: CN
Inventors: 程海涛; 陈晶; 刘乾乾; 毕鑫
Original assignee: BOE Technology Group Co Ltd; Chengdu BOE Optoelectronics Technology Co Ltd
Current assignee: BOE Technology Group Co Ltd; Chengdu BOE Optoelectronics Technology Co Ltd
Priority date: 2022-03-18
Filing date: 2022-03-18
Publication date: 2023-09-29
Anticipated expiration: 2042-03-18
Also published as: CN114530121A

Abstract

A display module and a display device are provided. The display module includes: a display screen and a driving circuit; the display screen comprises a display area, a first binding area and a second binding area which are positioned on two opposite sides of the display area along a second direction, wherein the display area comprises a plurality of light-emitting elements which are arranged in an array; the driving circuit comprises a plurality of first driving circuits and a plurality of second driving circuits, the first driving circuits and the second driving circuits are respectively connected with the light-emitting elements, the first driving circuits are connected with the corresponding display chips through first binding areas, and the second driving circuits are connected with the corresponding display chips through second binding areas; the first driving lines of the same column of light emitting elements in the second direction are connected to the same display chip, and the second driving lines of the same column of light emitting elements in the second direction are connected to the same display chip.

Description

Display module and display device

Technical Field

The embodiment of the disclosure relates to the technical field of display, in particular to a display module and a display device.

Background

Along with the intelligent transformation of automobiles, the technology of on-board OLED (Organic Light-Emitting Diode) display is also rapidly developing. Compared with the traditional LED vehicle-mounted display technology, the vehicle-mounted OLED display technology has the characteristics of uniform and soft light source, light weight, strong plasticity and the like. On-board OLED display technology presents further challenges due to the complex environmental conditions. In some technologies, the brightness of different areas of the same OLED car tail lamp is different, the longitudinal brightness uniformity is poor, and the user experience is affected.

Disclosure of Invention

The embodiment of the disclosure provides a display module and a display device, which can solve the problem of poor uniformity of longitudinal brightness of vehicle-mounted OLED display.

The embodiment of the disclosure provides a display module, including: a display screen and a driving circuit; the display screen comprises a display area, a first binding area and a second binding area which are positioned on two opposite sides of the display area along a second direction, wherein the display area comprises a plurality of light-emitting elements which are arranged in an array; the driving circuit comprises a plurality of first driving circuits and a plurality of second driving circuits, the first driving circuits and the second driving circuits are respectively connected with the light-emitting elements, the first driving circuits are connected with corresponding display chips through the first binding areas, and the second driving circuits are connected with the corresponding display chips through the second binding areas; the first driving lines of the same column of light emitting elements along the second direction are connected to the same display chip, and the second driving lines of the same column of light emitting elements along the second direction are connected to the same display chip.

In an exemplary embodiment, the light emitting element is an LED light source, or the light emitting element is an OLED light source.

In an exemplary embodiment, the display area includes a plurality of element regions arranged in an array, the element regions including one or more adjacent light emitting elements, the first driving lines of the element regions being connected to the same display chip, and the second driving lines of the element regions being connected to the same display chip.

In an exemplary embodiment, the display area includes a plurality of display sections arranged along a first direction, the display sections including a column of element regions along the second direction, the first direction intersecting the second direction; wherein the first driving circuit of the display partition is connected to the same display chip; the second driving lines of the display section are connected to the same display chip.

In an exemplary embodiment, the sum of the lengths of the first and second driving lines of each element region is equal within the same display section.

In an exemplary embodiment, the first driving line and the second driving line of the same display section are connected to the same display chip; alternatively, the first driving line and the second driving line of the same display section are respectively connected to different display chips.

In an exemplary embodiment, the first driving line and the second driving line of the same display section are connected to the same display chip, including: the first driving circuit and the second driving circuit of the same display partition are connected to the same pin of the same display chip; or the first driving circuit and the second driving circuit of the same display partition are connected to different pins of the same display chip.

In an exemplary embodiment, the first driving line and the second driving line are connected to the first bonding area and the second bonding area through gaps of adjacent display partitions, respectively.

In an exemplary embodiment, the first driving line and the second driving line of the same display section are connected to different display chips, including: the different display chips are respectively positioned at one side of the first binding area far away from the display area, and one side of the second binding area far away from the display area; the first driving circuit is connected with the display chip on one side of the first binding area far away from the display area through the gap of the adjacent display area, and the second driving circuit is connected with the display chip on one side of the second binding area far away from the display area through the gap of the adjacent display area.

In an exemplary embodiment, the display area includes a plurality of display sub-areas arranged along the first direction, and the display sub-areas include two adjacent display sub-areas, each display sub-area is connected to two display chips, and adjacent display sub-areas between adjacent display sub-areas are connected to the same display chip.

In an exemplary embodiment, each display sub-area is connected to two display chips, including: the first driving circuit of each display subarea in each display subarea is connected with a display chip positioned at one side of the first binding area far away from the display area, and the second driving circuit of each display subarea in each display subarea is connected with a display chip positioned at one side of the second binding area far away from the display area.

In an exemplary embodiment, the display area includes a plurality of display units arranged along the first direction, and the display units include two or more adjacent display sub-areas, each display unit is connected to two display chips, and adjacent display sub-areas between adjacent display units are connected to the same display chip.

The embodiment of the invention also provides a display device which comprises the display module.

The display module set provided by the embodiment sets up first binding area and second binding area in the relative both sides of display area, and first drive circuit and second drive circuit are connected with corresponding display chip through the first binding area and the second binding area that are located the relative both sides of display area respectively. The routing path of the driving circuit between the light emitting element and the display chip is the sum of the paths of the first driving circuit and the second driving circuit, so that the routing paths of the driving circuits between different light emitting elements and the display chip are the same or similar, the IR voltage drop degree of the light emitting elements at different positions is equivalent, and the brightness uniformity of the light emitting elements close to the binding area and the light emitting elements far away from the binding area is ensured. The problem that the longitudinal brightness uniformity of the vehicle-mounted OLED display is poor is solved.

Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.

Drawings

The accompanying drawings are included to provide a further understanding of the disclosed embodiments and are incorporated in and constitute a part of this specification, illustrate embodiments of the disclosure and together with the description serve to explain, without limitation, the disclosed embodiments.

FIG. 1 is a schematic view of a display area of a taillight of some technologies;

FIG. 2 is a schematic view of the driving structure of the tail light of FIG. 1;

fig. 3 is a schematic structural diagram of a dashed area C in fig. 2;

FIG. 4 is a schematic diagram of the driving circuit of the display partition in FIG. 3;

FIG. 5 is a schematic diagram of a display chip for controlling a first display partition;

FIG. 6 is a schematic diagram of a display area in an exemplary embodiment;

FIG. 7 is a schematic view of a display area in another exemplary embodiment;

fig. 8 is a schematic structural diagram of a display module according to an exemplary embodiment of the disclosure;

fig. 9 is a schematic view of the structure of the dotted line area D in fig. 8;

FIG. 10 is a schematic diagram of the driving circuit of the partition shown in FIG. 9;

FIG. 11 is a schematic diagram showing the first driving circuit and the second driving circuit of the first display partition in FIG. 10 connected to the same pin of the same display chip;

FIG. 12 is a schematic diagram showing the first driving circuit and the second driving circuit of the first display partition in FIG. 10 connected to different pins of the same display chip;

FIG. 13 is a schematic diagram of the first and second driving circuits of the first and second display partitions of FIG. 10 connected to different display chips;

FIG. 14 is a schematic diagram showing a connection between a display unit and a display chip when each display unit includes a display sub-area;

FIG. 15 is a schematic diagram showing a connection mode between a display unit and a display chip when each display unit includes two display sub-areas;

FIG. 16 is a schematic diagram of the driving circuit of the partition shown in FIG. 15;

FIG. 17 is a schematic diagram of adjacent display areas of adjacent display sub-areas connecting different display chips;

fig. 18 is a schematic diagram of adjacent display areas of adjacent display sub-areas connecting the same display chips.

Detailed Description

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. Note that embodiments may be implemented in a number of different forms. One of ordinary skill in the art can readily appreciate the fact that the manner and content may be varied into a wide variety of forms without departing from the spirit and scope of the present disclosure. Accordingly, the present disclosure should not be construed as being limited to the following description of the embodiments. Embodiments of the present disclosure and features of embodiments may be combined with each other arbitrarily without conflict.

In the drawings, the size of each constituent element, the thickness of a layer, or a region may be exaggerated for clarity. Accordingly, one aspect of the present disclosure is not necessarily limited to this dimension, and the shapes and sizes of the various components in the drawings do not reflect actual proportions. Further, the drawings schematically show ideal examples, and one mode of the present disclosure is not limited to the shapes or numerical values shown in the drawings, and the like.

The ordinal numbers of "first", "second", "third", etc. in the present specification are provided to avoid mixing of constituent elements, and are not intended to be limited in number.

In the present specification, for convenience, words such as "middle", "upper", "lower", "front", "rear", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like, which indicate an azimuth or a positional relationship, are used to describe positional relationships of constituent elements with reference to the drawings, only for convenience of description and simplification of the description, and do not indicate or imply that the apparatus or elements referred to must have a specific azimuth, be configured and operated in a specific azimuth, and thus are not to be construed as limiting the present disclosure. The positional relationship of the constituent elements is appropriately changed according to the direction in which the respective constituent elements are described. Therefore, the present invention is not limited to the words described in the specification, and may be appropriately replaced according to circumstances.

In this specification, the terms "mounted," "connected," and "connected" are to be construed broadly, unless explicitly stated or limited otherwise. For example, it may be a fixed connection, a removable connection, or an integral connection; may be a mechanical connection, or an electrical connection; may be directly connected, or indirectly connected through intermediate members, or may be in communication with the interior of two elements. The specific meaning of the terms in this disclosure will be understood by those of ordinary skill in the art in the specific context.

In this specification, "electrically connected" includes a case where constituent elements are connected together by an element having some electric action. The "element having a certain electric action" is not particularly limited as long as it can transmit an electric signal between the connected constituent elements. Examples of the "element having some electric action" include not only an electrode and a wiring but also a switching element such as a transistor, a resistor, an inductor, a capacitor, other elements having various functions, and the like.

In the present specification, "parallel" means a state in which two straight lines form an angle of-10 ° or more and 10 ° or less, and therefore, a state in which the angle is-5 ° or more and 5 ° or less is also included. The term "perpendicular" refers to a state in which the angle formed by two straight lines is 80 ° or more and 100 ° or less, and thus includes a state in which the angle is 85 ° or more and 95 ° or less.

Concept interpretation:

element region: adjacent one or more light emitting elements form an element region, and the display region includes one or more element regions arranged in an array.

Display partition: a row or column of element regions of a display area is referred to as a display section, and the display section is described in this disclosure as including a column of element regions.

Display subregion: two adjacent display sections are referred to as one display sub-section.

And a display unit: the adjacent display sub-area or areas are referred to as a display unit.

In some technologies, an OLED taillight is provided with a plurality of display chips on one side of a display area, and the OLED light sources of each element area of the display area are independently controlled by the plurality of display chips. The driving mode is different from the common driving mode of OLED display screens (such as display devices of mobile phones and the like), and driving circuits such as pixel driving circuits, grid driving circuits and the like are not needed. Fig. 1 is a schematic view of a display area of a tail lamp in some technologies, and fig. 2 is a schematic view of a driving structure of the tail lamp in fig. 1. As shown in fig. 1 and 2, the display area 10 of the OLED taillight includes a plurality of triangular element areas, each of which is composed of a plurality of OLED light emitting elements (not shown), and each of which may be identical in shape and area, and may control light emission of each of the light emitting elements in the element areas after the display chip is connected to the element areas. The display area 10 includes a plurality of display sections 20 arranged in the first direction X, and each display section 20 includes four display sections 20 included in 4 element area dotted line areas C arranged in the second direction Y. A plurality of binding areas 30 are disposed at one side of the display area 10 along the second direction Y, and the trace of each display area 20 is connected to a corresponding display chip through the corresponding binding area 30, and a single display chip can control one or more display areas 20 to emit light. In fig. 2, the first direction X and the second direction Y intersect, the driving mode of the OLED taillight is single-side driving, and the display area 20 of the whole display area 10 is driven by a plurality of display chips IC1, IC2, …, ICN.

Fig. 3 is a schematic structural diagram of a dashed area C in fig. 2. FIG. 4 is a schematic diagram of the driving circuit of the display partition in FIG. 3. Fig. 5 is a schematic diagram of a display chip for controlling a first display area. In fig. 3 and 4 two adjacent display sub-areas are shown, each comprising two adjacent display sub-areas 20, a first display sub-area comprising element areas 1 to 4, a second display sub-area comprising element areas 5 to 8, a third display sub-area comprising element areas 9 to 12, and a fourth display sub-area comprising element areas 13 to 16. The driving lines of the different element regions are led out via the bonding region 30 (i.e., the region shown by the dotted line frame) located at one side of the display region 10, and connected to the corresponding display chip. As shown in fig. 5, each display section 20 in the dashed line area C in fig. 2 may be controlled by one display chip, and in fig. 5, the connection relationship between the first display section and the display chip is schematically illustrated by taking the element areas 1 and 4 as examples, and one end of the light emitting element is connected to the display chip, and the other end is grounded.

Referring to fig. 3 to 5, since the bonding region 30 is located at one side of the display region 10, the routing path of the driving circuit between the element region close to the bonding region 30 and the display chip is shorter, and the routing path of the driving circuit between the element region far from the bonding region 30 and the display chip is longer. Under the influence of the IR drop, the element region close to the bonding region 30 is made brighter than the element region far from the bonding region 30, and the element region brightness is made nonuniform in the second direction Y. The longer the display area 10 is in the second direction Y, the more noticeable the brightness difference becomes.

In addition, when the display area 10 has a longer length along the first direction X, a plurality of display chips need to be disposed to control the display areas 20, and due to differences in the positions and working environments of the different display chips, there is a certain difference in the working states of the different display chips, there is a possibility that the brightness of the display areas 20 controlled by the different display chips is different, so that the brightness is not uniform in the first direction X.

The embodiment of the disclosure provides a display module, including: a display screen and a driving circuit; the display screen comprises a display area, a first binding area and a second binding area which are positioned on two opposite sides of the display area along a second direction, wherein the display area comprises a plurality of light-emitting elements which are arranged in an array;

the driving circuit comprises a plurality of first driving circuits and a plurality of second driving circuits, the first driving circuits and the second driving circuits are respectively connected with the light-emitting elements, the first driving circuits are connected with the corresponding display chips through first binding areas, and the second driving circuits are connected with the corresponding display chips through second binding areas; the first driving lines of the same column of light emitting elements in the second direction are connected to the same display chip, and the second driving lines of the same column of light emitting elements in the second direction are connected to the same display chip.

In the scheme of the embodiment of the disclosure, a first binding area and a second binding area are arranged on two opposite sides of a display area, and a first driving circuit and a second driving circuit are connected with corresponding display chips through the first binding area and the second binding area which are positioned on two opposite sides of the display area respectively. The routing path of the driving circuit between the light emitting element and the display chip is the sum of the paths of the first driving circuit and the second driving circuit, so that the routing paths of the driving circuits between different light emitting elements and the display chip are the same or similar, the IR voltage drop degree of the light emitting elements at different positions is equivalent, and the brightness uniformity of the light emitting elements close to the binding area and the light emitting elements far away from the binding area is ensured.

The display module provided by the embodiment of the disclosure can be applied to a taillight, and can improve the uneven display brightness of the light-emitting element along the second direction caused by IR pressure drop. The display module provided by the embodiment of the disclosure can also be applied to other display devices, and the disclosure is not limited thereto.

In the display module provided by the embodiment of the disclosure, the light emitting element may be configured as an LED light source, or an OLED light source, or other light sources, which is not limited in this disclosure.

In an exemplary embodiment, the display area includes a plurality of element regions arranged in an array, the element regions including one or more light emitting elements adjacent to each other, a first driving line of the element regions being connected to the same display chip, and a second driving line of the element regions being connected to the same display chip.

In this embodiment mode, each element region on the display region may be the same, and the first driving line and the second driving line may be connected to the element region and capable of controlling light emission of each light emitting element in the element region. The routing paths of the driving circuits between each element area and the display chip are the same or similar, the IR voltage drop degree of the element areas at different positions is equivalent, and the brightness uniformity of the element areas close to the binding area and the element areas far from the binding area is ensured.

In an exemplary embodiment, the display area includes a plurality of display sections arranged along a first direction, the display sections including a column of element regions in a second direction, the first direction intersecting the second direction. Wherein, the first driving circuit of the display partition is connected to the same display chip; the second driving lines of the display section are connected to the same display chip.

In an exemplary embodiment, a first driving line and a second driving line of the same display section are connected to the same display chip, comprising: the first driving circuit and the second driving circuit of the same display partition are connected to the same pin of the same display chip; alternatively, the first driving line and the second driving line of the same display section are connected to different pins of the same display chip.

In an exemplary embodiment, the first and second driving lines are connected to the first and second bonding regions, respectively, through gaps of adjacent display partitions.

In an exemplary embodiment, the first driving line and the second driving line of the same display section are connected to different display chips, comprising: the different display chips are respectively positioned at one side of the first binding area far away from the display area, and one side of the second binding area far away from the display area; the first driving circuit is connected with the display chip on one side of the first binding area far away from the display area through the gap of the adjacent display area, and the second driving circuit is connected with the display chip on one side of the second binding area far away from the display area through the gap of the adjacent display area.

In an exemplary embodiment, the display area includes a plurality of display sub-areas arranged along the first direction, the display sub-areas include two adjacent display sub-areas, each display sub-area is connected to two display chips, and adjacent display sub-areas between adjacent display sub-areas are connected to the same display chip.

In an exemplary embodiment, the display area includes a plurality of display units arranged along the first direction, the display units include two or more adjacent display sub-areas, each display unit is connected to two display chips, and adjacent display sub-areas between adjacent display units are connected to the same display chip.

The technical contents of the present disclosure will be described in detail by means of specific examples.

Fig. 6 is a schematic diagram of a display area in an exemplary embodiment. Fig. 7 is a schematic view of a display area in another exemplary embodiment. As shown in fig. 6, in the display module provided in the embodiment of the present disclosure, the shape of the display area 10 may be square, the display area 10 includes element areas arranged in an array, each element area may be square, each element area may include one light emitting element, or each element area may include a plurality of adjacent light emitting elements, where the shape of the adjacent light emitting elements after being combined is square. As shown in fig. 7, the display region 10 may be square in shape, each element region may be circular in shape, each element region may include one light emitting element, or each element region may include a plurality of adjacent light emitting elements which are combined to be circular in shape. In other embodiments, the shape of the display region 10 or the shape of the element region may be any of the following: triangle, circle, other quadrilateral, polygon, etc., which is not limiting to the present disclosure. The display area 10 may be provided with different patterns by controlling the light emission of different element regions of the display area 10 or by controlling the light emission of different light emitting elements in the element regions, and dynamic display of the patterns may be provided.

Fig. 8 is a schematic structural diagram of a display module according to an exemplary embodiment of the disclosure. In fig. 8, the display area 10 has a parallelogram shape, the element areas have an equilateral triangle shape, and a plurality of element areas are arranged in an array on the display area 10 along a first direction X and a second direction Y which intersect each other. The display section 20 includes a row of light emitting elements arranged in the second direction Y, and a plurality of display sections 20 are arranged in the first direction X. The display module further comprises a first binding area A and a second binding area B which are arranged on two opposite sides of the display area 10 along the second direction Y, and a plurality of binding areas are respectively arranged in the first binding area A and the second binding area B. The display module further comprises a first driving circuit and a second driving circuit which are respectively connected with the light-emitting elements, wherein the first driving circuit is connected with corresponding display chips through a first binding area A, and the second driving circuit is connected with corresponding display chips through a second binding area B. In fig. 8, the first direction X is a long side direction of the display area 10, the second direction Y is a short side direction of the display area 10, and the first bonding area a and the second bonding area B are respectively disposed in the long side direction of the display area 10.

Fig. 9 is a schematic diagram of the structure of the dashed area D in fig. 8. As shown in fig. 9, the dotted line area D includes four display sections of a first display section, a second display section, a third display section, and a fourth display section, which are sequentially arranged from left to right, wherein the first display section and the second display section may be referred to as a first display sub-section, and the third display section and the fourth display section may be referred to as a second display sub-section. The first driving line of each display section may be connected to one display chip, the second driving line of each display section may be connected to one display chip, the first driving line and the second driving line of each display section may be connected to the same display chip, or may be connected to two display chips, respectively. Different display sections may be connected to the same display chip, e.g. a first drive line of a first display sub-section may be connected to one display chip and a second drive line of a second display sub-section may be connected to one display chip. As shown in fig. 9, the first display section includes element regions 1 to 4, the second display section includes element regions 5 to 8, the third display section includes element regions 9 to 12, and the fourth display section includes element regions 13 to 16. The first display subarea comprises element areas 1 to 8, first driving circuits of the element areas 1 to 8 are respectively 1a to 8a, and the first driving circuits 1a to 8a can be connected with corresponding display chips after passing through the same binding area of the first binding area A; the second driving circuits of the element areas 1 to 8 are 1B to 8B respectively, and the second driving circuits 1B to 8B can be connected with the corresponding display chips after passing through the same binding area of the second binding area B; the second display subarea comprises element areas 9 to 16, the first driving circuits of the element areas 9 to 16 are 9a to 16a respectively, and the first driving circuits 9a to 16a can be connected with corresponding display chips after passing through the other binding area of the first binding area A; the second driving circuits 9b to 16b of the element regions 9 to 16 are respectively 9b to 16b, and the second driving circuits 9b to 16b may be connected to the corresponding display chips after passing through the same bonding region as the second driving circuits 1b to 8 b.

Fig. 10 is a schematic diagram of the driving circuit of the partition shown in fig. 9. As shown in fig. 10, each element region is commonly driven by a first driving line and a second driving line connected to the element region, and the first driving line and the second driving line of each display region may be connected to the same display chip from a gap between adjacent element regions, or may be connected to different display chips. In this embodiment, the element regions are in bilateral driving mode, the routing path of the driving circuit between each element region and the corresponding display chip is the sum of the paths of the first driving circuit and the second driving circuit, and the routing paths of the driving circuit between the element region in each display partition and the corresponding display chip are identical or similar, so that the IR voltage drop degree of the element regions at different positions of each display partition is equivalent, and the brightness uniformity of the element regions of the same display partition can be ensured.

Still taking fig. 8 as an example, the display chips may be respectively disposed on a side of the first bonding area a away from the display area 10 and a side of the second bonding area B away from the display area 10, the first driving circuit led out of each bonding area in fig. 8 may be respectively connected to one display chip located on a side of the first bonding area a away from the display area 10, and the second driving circuit led out of each bonding area may be connected to one display chip located on a side of the second bonding area B away from the display area 10. The element area of each display sub-area is controlled by the coupling of two display chips located on both sides of the display area 10 along the second direction Y, respectively, along the first direction X, and the adjacent display sub-area is controlled by at least one identical display chip. The design reduces the brightness difference of adjacent display areas controlled by different display chips due to the working state difference of the different display chips, and even if the length of the display module along the first direction X is longer, the brightness uniformity along the first direction X can be ensured under the condition that more display chips are arranged.

The display chip may have a plurality of pins, each of which may be independently output. The first driving line and the second driving line of the same display section may be connected to the same pin of the same display chip; alternatively, the first driving line and the second driving line of the same display section may be connected to different pins of the same display chip; alternatively, the first driving line and the second driving line of the same display section may be connected to different display chips. In fig. 11 to 13, the connection between the first driving circuit and the second driving circuit and the display chip is illustrated by taking the first display partition and the second display partition as examples. Fig. 11 is a schematic diagram of the first driving circuit and the second driving circuit of the first display area in fig. 10 connected to the same PIN of the same display chip, and as shown in fig. 11, one end of the first driving circuit 1a to 4a and one end of the second driving circuit 1b to 4b are connected to the same PIN of the same display chip, the other end is connected to the corresponding element area, the element area is grounded, and fig. 11 only illustrates the element area 1 and the element area 4 as examples, and illustration of other element areas is omitted. Fig. 12 is a schematic diagram of the first driving circuit and the second driving circuit of the first display area in fig. 10 connected to different pins of the same display chip, as shown in fig. 12, one ends of the first driving circuits 1a to 4a and the second driving circuits 1b to 4b are respectively connected to different pins of the same display chip, the other ends are connected to corresponding element areas, the element areas are grounded, and fig. 12 only illustrates the element areas 1 and 4 as examples, and illustration of other element areas is omitted. Fig. 13 is a schematic diagram of connection of the first driving circuit and the second driving circuit of the first display partition and the second display partition in fig. 10 to different display chips, as shown in fig. 13, one end of the first driving circuit 1a to 8a is connected to the first display chip IC1, the other end is connected to the corresponding element area, the element area is grounded, one end of the second driving circuit 1b to 8b is connected to the second display chip IC2, the other end is connected to the corresponding element area, the element areas of the first display partition and the second display partition are driven by the first display chip IC1 and the second display chip IC2 together, and in fig. 13, only the element area 1, the element area 4, the element area 5 and the element area 8 are taken as examples for illustration, and other element areas are omitted. The connection modes of the first driving circuit and the second driving circuit can be set according to the need, when the number of display partitions is small, the connection mode shown in fig. 11 or fig. 12 can be adopted, when the number of display partitions is large, the connection mode shown in fig. 13 can be adopted, or the connection modes shown in fig. 11-13 can be used in a matched mode in one display module, for example, one or more adjacent display subareas can be called one display unit, different display subareas can adopt the same connection mode inside each display unit, any one of the connection modes shown in fig. 11-13 can be adopted between the display subareas and the display chip, and the connection modes adopted by different display units can be different; or within each display unit, different display sub-areas may be connected in different ways, which is not limited by the present disclosure.

Next, taking the connection mode of each display partition and the display chip in the display unit as an example, the adjacent display sub-areas between adjacent display units are controlled by the same display chip, the display module of the disclosure will be described. Fig. 14 is a schematic diagram showing a connection manner between a display unit and a display chip when each display unit includes a display sub-area. Fig. 15 is a schematic diagram showing a connection manner between a display unit and a display chip when each display unit includes two display sub-areas.

As shown in fig. 14, four thickened rectangles in the first direction X represent a first display unit, a second display unit, a third display unit, and a fourth display unit, respectively, in order. Since each display unit comprises one display sub-area, the four bolded rectangles may represent the first display sub-area 41, the second display sub-area 42, the third display sub-area 43 and the fourth display sub-area 44, respectively. As shown in fig. 14, the first display sub-area 41 may be controlled by the display chip a and the display chip b in a coupled manner, the second display sub-area 42 may be controlled by the display chip b and the display chip c in a coupled manner, the third display sub-area 43 may be controlled by the display chip c and the display chip d in a coupled manner, and the fourth display sub-area 44 may be controlled by the display chip d and the display chip a in a coupled manner. The first display sub-area 41 and the second display sub-area 42 are connected to the same display chip b, the second display sub-area 42 and the third display sub-area 43 are connected to the same display chip c, and the third display sub-area 43 and the fourth display sub-area 44 are connected to the same display chip d. The display chip a and the display chip c are connected with the corresponding display subareas through the first driving circuit, and the display chip b and the display chip d are connected with the corresponding display subareas through the second driving circuit. The positions of the different display chips in fig. 14 may be changed, and other connection manners may be adopted between the display unit and the display chip, which is not limited in the present disclosure.

As shown in fig. 15, four thickened rectangles in the first direction X represent a first display unit, a second display unit, a third display unit, and a fourth display unit, respectively, in order. The first display unit comprises a first display sub-area 41 and a second display sub-area 42, the second display unit comprises a third display sub-area 43 and a fourth display sub-area 44, the third display unit comprises a fifth display sub-area 45 and a sixth display sub-area 46, and the fourth display unit comprises a seventh display sub-area 47 and an eighth display sub-area 48. The first display sub-area 41 and the second display sub-area 42 are each controlled by a display chip a and a display chip b in a coupled manner, the third display sub-area 43 and the fourth display sub-area 44 are each controlled by a display chip a and a display chip d in a coupled manner, the fifth display sub-area 45 and the sixth display sub-area 46 are each controlled by a display chip c and a display chip d in a coupled manner, and the seventh display sub-area 47 and the eighth display sub-area 48 are each controlled by a display chip c and a display chip b in a coupled manner. The adjacent display subareas between the first display unit and the second display unit are a second display subarea 42 and a third display subarea 43, and the second display subarea 42 and the third display subarea 43 are connected with the same display chip a. The adjacent display subareas between the second display unit and the third display unit are a fourth display subarea 44 and a fifth display subarea 45, and the fourth display subarea 44 and the fifth display subarea 45 are connected with the same display chip d. The adjacent display subregions between the third display unit and the fourth display unit are a sixth display subregion 46 and a seventh display subregion 47, and the sixth display subregion 46 and the seventh display subregion 47 are connected with the same display chip c. The display chip a and the display chip c are connected with the corresponding display subareas through the first driving circuit, and the display chip b and the display chip d are connected with the corresponding display subareas through the second driving circuit. The positions of the different display chips in fig. 15 may be changed, and other connection manners may be adopted between the display unit and the display chip, which is not limited in the present disclosure.

Fig. 16 is a schematic diagram of the driving circuit of the partition shown in fig. 15. Only the connection of a part of the element region is illustrated in fig. 16. The first driving circuit of the first display subarea 41 to the fourth display subarea 44 is connected with the display chip a, the first driving circuit of the fifth display subarea 45 to the eighth display subarea 48 is connected with the display chip c, the second driving circuit of the third display subarea 43 to the sixth display subarea 46 is connected with the display chip d, the second driving circuits of the first display subarea 41, the second display subarea 42, the seventh display subarea 47 and the eighth display subarea 48 are connected with the display chip b, and the first driving circuit and the second driving circuit corresponding to the same element area are connected with the corresponding element area and the element area is grounded.

In the case where the display area 10 has a short length in the first direction X and contains fewer display areas, a connection method as shown in fig. 14 may be adopted. When the display area 10 has a longer length in the first direction X and includes a larger number of display areas, a connection method as shown in fig. 15 may be adopted. The present disclosure is not limited in this regard.

The fact that the same display chip is arranged in adjacent display subareas in the application is beneficial to more uniform brightness display of different display subareas for theoretical analysis. Taking bilateral driving as an example, fig. 17 is a schematic diagram of adjacent display areas of adjacent display subareas connecting different display chips, and fig. 18 is a schematic diagram of adjacent display areas of adjacent display subareas connecting the same display chips. In fig. 17, the first display sub-area 41 and the second display sub-area 42 are controlled by the display chip a and the display chip c, respectively. In fig. 18, the first display sub-area 41 is controlled by the coupling of the display chip a and the display chip b, the second display sub-area 42 is controlled by the coupling of the display chip b and the display chip c, and the adjacent display sub-areas of the first display sub-area 41 and the second display sub-area 42 are connected to the same display chip b. Assuming that each display chip has a basic brightness contribution of X to the display partition, and based on the difference in the operating states of the different display chips, display chip a, display chip B, and display chip C have additional brightness contributions of A, B, C, respectively, and a > B > C. That is, the display chip a contributes most to the brightness of the display area, and is x+a, the display chip B contributes most to the brightness of the display area, and the display chip C contributes least to the brightness of the display area, and is x+c. And calculating the brightness difference ratio of the adjacent display subareas by adopting a brightness difference ratio calculation formula, wherein the brightness difference of the adjacent display subareas is the difference between the brightness maximum value and the brightness minimum value, and the brightness difference ratio of the adjacent display subareas is the ratio of the brightness difference to the brightness maximum value. The difference in brightness between the first display sub-area and the second display sub-area for the schemes of fig. 17 and 18 is shown in table one.

List one

As shown in table one, in the scheme of fig. 17, the brightness of the left display area and the right display area of the first display sub-area 41 is x+a, and the brightness of the first display sub-area 41 is 2x+2a. The brightness of the left display area and the right display area of the second display sub-area 42 are both x+c, and the brightness of the second display sub-area 42 is 2x+2c. The luminance of the first display sub-area 41 is at a luminance maximum. The luminance difference between the first display sub-area 41 and the second display sub-area 42 of the scheme of fig. 17 is (2x+2a) - (2x+2c) =2a-2C. The luminance ratio of the first display sub-area 41 and the second display sub-area 42 of the scheme of fig. 17 is (2A-2C)/(2x+2a) = (a-C)/(x+a).

As shown in table one, in the scheme of fig. 18, if the luminance of the left display area of the first display sub-area 41 is x+a and the luminance of the right display area is x+b, the luminance of the first display sub-area 41 is 2x+a+b. The luminance of the left display area of the second display sub-area 42 is x+b, and the luminance of the right display area is x+c, and the luminance of the second display sub-area 42 is 2x+b+c. The luminance of the first display sub-area 41 is at a luminance maximum. The luminance difference between the first display sub-area 41 and the second display sub-area 42 of the scheme of fig. 18 is (2x+a+b) - (2x+b+c) =a-C. The luminance ratio of the first display sub-area 41 and the second display sub-area 42 of the scheme of fig. 18 is (a-C)/(2x+a+b). It can be seen that the luminance difference between the first display sub-area 41 and the second display sub-area 42 in the scheme of fig. 18 is smaller, and the luminance ratio is smaller, which means that in the scheme of fig. 18, since the same display chip B is used for controlling the adjacent display sub-areas, the adjacent display sub-areas are driven in a coupled manner, so that the difference of the overall luminance is reduced. Therefore, the scheme provided by the application can effectively reduce the display brightness non-uniformity caused by the difference of the driving sources and improve the uniformity of the brightness of adjacent display subareas.

Based on the inventive concept of the foregoing embodiments, the embodiments of the present invention further provide a display device including a display module employing the foregoing embodiments. The display device may be: any product or component with display function such as a taillight, a display, a digital photo frame, a navigator and the like.

Although the embodiments of the present invention are described above, the embodiments are only used for facilitating understanding of the present invention, and are not intended to limit the present invention. Any person skilled in the art can make any modification and variation in form and detail without departing from the spirit and scope of the present disclosure, but the scope of the present disclosure is to be determined by the appended claims.

Claims

1. A display module, comprising: a display screen and a driving circuit; the display screen comprises a display area, a first binding area and a second binding area which are positioned on two opposite sides of the display area along a second direction, wherein the display area comprises a plurality of light-emitting elements which are arranged in an array;

the driving circuit comprises a plurality of first driving circuits and a plurality of second driving circuits, the first driving circuits and the second driving circuits are respectively connected with the light-emitting elements, the first driving circuits are connected with corresponding display chips through the first binding areas, and the second driving circuits are connected with the corresponding display chips through the second binding areas;

The first driving lines of the same column of light emitting elements along the second direction are connected to the same display chip, and the second driving lines of the same column of light emitting elements along the second direction are connected to the same display chip;

the display area comprises a plurality of element areas which are arranged in an array, and each element area comprises one or more adjacent light-emitting elements; the display area comprises a plurality of display subareas arranged along a first direction, the display subareas comprise a column of element areas along the second direction, and the first direction is intersected with the second direction; wherein the first driving circuit of the display partition is connected to the same display chip; the second driving circuit of the display partition is connected to the same display chip;

the display area comprises a plurality of display subareas which are arranged along a first direction, each display subarea comprises two adjacent display subareas, each display subarea is connected with two display chips, and adjacent display subareas among the adjacent display subareas are connected with the same display chip.

2. The display module of claim 1, wherein the light emitting element is an LED light source or the light emitting element is an OLED light source.

3. The display module of claim 1, wherein the first driving lines of the element region are connected to the same display chip, and the second driving lines of the element region are connected to the same display chip.

4. The display module of claim 1, wherein the sum of the first drive line and the second drive line lengths of each element region is equal within the same display section.

5. The display module of claim 1, wherein the first and second drive lines of a same display section are connected to a same display chip; or alternatively, the process may be performed,

the first driving line and the second driving line of the same display section are respectively connected to different display chips.

6. The display module of claim 5, wherein the first and second drive lines of the same display section are connected to the same display chip, comprising:

the first driving circuit and the second driving circuit of the same display partition are connected to the same pin of the same display chip; or alternatively, the process may be performed,

the first driving circuit and the second driving circuit of the same display partition are connected to different pins of the same display chip.

7. The display module assembly of claim 5, wherein the first and second drive lines are connected to the first and second bonding regions, respectively, through gaps of adjacent display segments.

8. The display module of claim 5, wherein the first and second drive lines of the same display section are connected to different display chips, comprising:

the different display chips are respectively positioned at one side of the first binding area far away from the display area, and one side of the second binding area far away from the display area;

the first driving circuit is connected with the display chip on one side of the first binding area far away from the display area through the gap of the adjacent display area, and the second driving circuit is connected with the display chip on one side of the second binding area far away from the display area through the gap of the adjacent display area.

9. The display module of claim 1, wherein each display sub-area is connected to two display chips, comprising:

the first driving circuit of each display subarea in each display subarea is connected with a display chip positioned at one side of the first binding area far away from the display area, and the second driving circuit of each display subarea in each display subarea is connected with a display chip positioned at one side of the second binding area far away from the display area.

10. The display module of claim 1, wherein the display area comprises a plurality of display units arranged along a first direction, the display units comprise two or more adjacent display sub-areas, each display unit is connected with two display chips, and adjacent display sub-areas between adjacent display units are connected with the same display chip.

11. A display device comprising the display module of any one of claims 1 to 10.