CN110676298A - Array substrate and OLED display panel - Google Patents
Array substrate and OLED display panel Download PDFInfo
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- CN110676298A CN110676298A CN201910944857.1A CN201910944857A CN110676298A CN 110676298 A CN110676298 A CN 110676298A CN 201910944857 A CN201910944857 A CN 201910944857A CN 110676298 A CN110676298 A CN 110676298A
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/131—Interconnections, e.g. wiring lines or terminals
Abstract
The invention provides an array substrate and an OLED display panel, and belongs to the technical field of display, wherein the array substrate comprises a substrate, a first power supply line and a second power supply line, wherein the first power supply line and the second power supply line are arranged on the substrate; the first power supply line and the second power supply line are oppositely arranged, and a plurality of first signal lines and a plurality of second signal lines are alternately arranged between the first power supply line and the second power supply line; each first signal line is connected with a plurality of pixel units, one end of each first signal line is connected with the first power supply line, and the other end of each first signal line is grounded; each second signal line is connected with a plurality of pixel units, one end of each second signal line is connected with the second power supply line, and the other end of each second signal line is grounded. The array substrate and the display panel provided by the invention reduce the brightness difference of the display panel and improve the brightness uniformity of the display panel.
Description
Technical Field
The invention relates to the technical field of display, in particular to an array substrate and an OLED display panel.
Background
In the display field, an Organic Light-Emitting Diode (OLED) display panel has the characteristics of self-luminescence, high contrast, low energy consumption, wide viewing angle, high response speed, simple manufacturing and the like, and has a wide development prospect.
The OLED display panel comprises a plurality of pixel units which are arranged in an array mode, the pixel units in the same column are connected through a conducting wire, and the pixel units in the same column can achieve display by applying voltage to the conducting wire. However, when the OLED display panel displays, the wires have a resistance voltage drop due to the resistance voltage division of the wires in the OLED display panel, that is, when a current passes through the wires in the display panel, a certain voltage drop occurs on the wires, and the pixel units located at different positions are affected by the voltage drop to cause different light emitting luminances of the pixel units, thereby causing uneven display luminance of the OLED display panel.
Disclosure of Invention
The embodiment of the invention provides an array substrate and an OLED display panel, which can enable the display brightness of the OLED display panel to be uniform.
In order to achieve the above purpose, the embodiment of the invention adopts the following technical scheme:
in one aspect, an array substrate is provided, including a substrate, and a first power supply line and a second power supply line disposed on the substrate; the first power supply line and the second power supply line are oppositely arranged, and a plurality of first signal lines and a plurality of second signal lines are alternately arranged between the first power supply line and the second power supply line; each first signal line is connected with a plurality of pixel units, one end of each first signal line is connected with the first power supply line, and the other end of each first signal line is grounded; each second signal line is connected with a plurality of pixel units, one end of each second signal line is connected with the second power supply line, and the other end of each second signal line is grounded.
Further, one end of the first power supply line is provided with a power supply point, and one end of the second power supply line is provided with a power supply point; the current flow direction through the first power supply line and the current flow direction through the second power supply line are opposite.
Further, a first conducting wire and a second conducting wire are arranged on the substrate; one end of the first wire is connected with a first end of the first power supply line, and the other end of the first wire is connected with the power supply point;
one end of the second wire is connected with the second end of the second power supply wire, and the other end of the second wire is connected with the power supply point;
and the first end of the first wire and the first end of the second wire are oppositely arranged, and the voltage of the first end of the first power supply line is equal to the voltage of the second end of the second power supply line.
Furthermore, the length, the cross-sectional area and the material of the first conducting wire are the same as those of the second conducting wire.
Further, the first lead and the second lead are respectively located on both sides of the first power supply line in the extending direction of the first power supply line; the first conducting wire is arranged in a broken line or a winding mode, and the second conducting wire is arranged in a straight line.
Further, a plurality of the feeding points are provided at equal intervals on the first feeder line in an extending direction of the first feeder line; the second feeder line is provided with a plurality of feeder points at equal intervals along an extending direction of the second feeder line.
Further, a power supply point is arranged at the midpoint position of the first power supply line, and a power supply point is arranged at the midpoint position of the second power supply line.
Further, the substrate includes a display region and a non-display region.
In another aspect, the embodiment of the invention provides an OLED display panel including the array substrate.
Further, the array substrate comprises a substrate; the display panel is provided with a frame which covers a non-display area of the substrate.
Compared with the prior art, the array substrate and the OLED display panel provided by the embodiment of the invention have the following advantages;
the array substrate and the OLED display panel provided by the embodiment of the invention comprise a first power supply line and a second power supply line which are oppositely arranged, wherein a first signal line and a second signal line are alternately arranged between the first power supply line and the second power supply line; the first signal line and the second signal line are electrically connected with the pixel unit, and provide power signals for the pixel unit and enable the pixel unit to be lightened.
One end of the first signal line is connected to the first power supply line, the other end of the first signal line extends towards the second power supply line and is not connected with the second power supply line, the voltage drop on the first signal line is gradually increased from the first power supply line to the second power supply line, and the brightness of the pixel unit connected with the first signal line is gradually darkened; one end of the second signal line is connected to the second power supply line, the other end of the second signal line extends towards the first power supply line and is not connected with the first power supply line, the voltage drop of the second signal line is gradually reduced from the first power supply line to the second power supply line, and the brightness of the pixel unit connected with the second signal line is gradually lightened; compared with the prior art, the first signal line and the second signal line are alternately arranged, so that the brightness difference of the display panel is reduced, and the brightness uniformity of the display panel is improved.
In addition to the technical problems solved by the present invention, the technical features constituting the technical solutions, and the advantages brought by the technical features of the technical solutions described above, other technical problems solved by the array substrate and the OLED display panel provided by the present invention, other technical features included in the technical solutions, and advantages brought by the technical features will be further described in detail in the detailed description of the embodiments.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments of the present invention or the prior art will be briefly described below, it is obvious that the drawings in the following description are only a part of the embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a schematic diagram of a layout structure of a circuit in a display panel in the prior art;
fig. 2 is a first schematic view illustrating an arrangement structure of power supply lines and signal lines in an array substrate according to an embodiment of the present invention;
fig. 3 is a second schematic view of an arrangement structure of power supply lines and signal lines in the array substrate according to an embodiment of the present invention.
Description of reference numerals:
10-a substrate; 11-a display area;
12-a non-display area; 20-VDD supply line;
21-a first supply line; 22-a second supply line;
a 30-VSS supply line; 40-a driving chip;
a 50-VDD signal line; 51-a first signal line;
52-second signal line; 61-first power supply point;
62-a second power supply point; 71-a first wire;
72-second conductor.
Detailed Description
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below. It is to be understood that the described embodiments are merely a few embodiments of the invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
As shown in fig. 1, in a conventional Organic Light Emitting Diode (OLED) display panel, a power signal required for normal operation is provided to a pixel unit through a signal trace to implement image display; it is generally necessary to form various traces in the frame region thereof, such as the VDD supply line 20 and the VSS supply line 30, for supplying the high voltage and the low voltage to the pixel unit, respectively.
The array substrate is defined according to the part of the substrate 10 where the pixel units are arranged, the area of the substrate 10 where the pixel units are located can be defined as a display area 11, a non-display area 12 is arranged outside the display area, and a plurality of pixel units can be arranged in the display area 11 in an array manner; the non-display area 12 is used for arranging a VDD power supply line 20 and a VSS signal line 30, wherein the driving chip 40 is disposed in the non-display area 12, the driving chip 40 is communicated with a grid-shaped VDD signal line 50 arranged in the display area 11 through the VDD power supply line 20, that is, a path is formed among the driving chip 40, the VDD power supply line 20 and the VDD signal line 50, and power signals are provided for a plurality of pixel units in the display area 11 and the pixel units are lighted.
However, because the VDD signal line 50 itself has a resistance, in the process that the VDD power signal is transmitted from the side of the VDD signal line 50 close to the driving chip 40 to the side far from the driving chip 40, a voltage loss is generated on the VDD signal line 50, so that a significant voltage drop is generated at two ends of the VDD signal line 50, which causes a difference in the input power voltages of the pixel units located at different positions; when the display panel is lit, the brightness of the display area 11 far away from the driving chip 40 is significantly darker than the brightness of the display area 11 near the driving chip 40, resulting in poor brightness uniformity of the display panel.
As shown in fig. 2, an array substrate according to an embodiment of the present invention for solving the above problems includes a substrate 10, and a first power supplying line 21 and a second power supplying line 22 disposed on the substrate 10; the first power supply line 21 and the second power supply line 22 are arranged oppositely, and a plurality of first signal lines 51 and a plurality of second signal lines 52 are alternately arranged between the first power supply line 21 and the second power supply line 22; each first signal line 51 is connected with a plurality of pixel units, and one end of each first signal line 51 is connected with the first power supply line 21, and the other end is grounded; each of the second signal lines 52 is connected with a plurality of pixel units, and one end of each of the second signal lines 52 is connected with the second power supply line 22 and the other end is grounded.
Specifically, for the convenience of describing the signal lines and the power supply lines disposed on the array substrate, the following definitions are applied to the portions of the non-display area 12 in this embodiment: defining a mounting area of the chip 40 in the non-display area 12 as a lower frame area; the area opposite to the lower frame area is the upper frame area, and the left and right sides of the display area 11 are the left frame area and the right frame area, respectively, so that the upper frame area, the lower frame area, the left frame area, and the right frame area are all located around the display area 12, and together form the non-display area 12.
The non-display area 12 is used for arranging various metal wires and can provide working voltage and signals for various devices on the array substrate; in this embodiment, the substrate 10 is provided with a first power supplying line 21 and a second power supplying line 22, the first power supplying line 21 and the second power supplying line 22 can be located in the upper frame region and the lower frame region respectively, the first power supplying line 21 and the second power supplying line 22 are arranged oppositely, and the first power supplying line 21 and the second power supplying line 22 are connected to power supplying points respectively to provide voltages for lighting the pixel units in the display region 11.
A plurality of signal lines are alternately provided between the first power supply line 21 and the second power supply line 22, and the plurality of signal lines can be divided into two types according to the connection mode: a first signal line 51 and a second signal line 52; the first signal line 51 and the second signal line 52 are located in the display region 11; each of the first signal lines 51 and each of the second signal lines 52 are electrically connected to a plurality of pixel units.
One end of the first signal line 51 is electrically connected to the first power supply line 21, one end of the first signal line 51, which is far away from the first power supply line 21, can extend along a direction perpendicular to the arrangement direction of the first power supply line 21 and is close to the second power supply line 22, and one end of the first signal line 51, which is far away from the first power supply line 21, is not communicated with the second power supply line 22; the second signal lines 52 and the first signal lines 51 are alternately arranged, one end of each second signal line 52 is electrically connected with the second power supply line 22, one end of each second signal line 52 far away from the second power supply line 22 extends towards the first power supply line 21, and the extending direction is perpendicular to the arrangement direction of the second power supply line 22; one end of the second signal line 52 remote from the second power supplying line 22 is not communicated with the first power supplying line 21.
In this embodiment, the first power supplying line 21 and the second power supplying line 22 may be a VDD power supplying line 20, the pixel unit is connected to the VDD power supplying line 20 through a signal line and can receive a VDD signal to provide a high level for the VDD power supplying line, the pixel unit is further connected to a VSS power supplying line 30, and one end of the VSS power supplying line is grounded, that is, a path is formed among the VDD power supplying line, the pixel unit and the VSS power supplying line, and a lighting voltage is provided for the pixel unit.
Since the first signal line 51 and the second signal line 52 have voltage drops themselves, the voltage drop of the first signal line 51 gradually increases along the direction from the first power supplying line 21 to the second power supplying line 22, which means that the brightness of a column of pixel units connected to the first signal line 51 gradually becomes dark; the voltage drop of the second signal line 52 along the direction from the second power supplying line 22 to the first power supplying line 21 is gradually increased, which means that the brightness of the pixel unit in a column connected to the second signal line 52 is gradually decreased, that is, the brightness of the pixel unit in a column connected to the second signal line 52 is gradually increased along the direction from the first power supplying line 21 to the second power supplying line 22.
In this embodiment, the first signal lines 51 and the second signal lines 52 are alternately disposed in the display area 11, so that the brightness difference of the pixel units at different positions can be compensated, the brightness display at each position of the display panel is more uniform, and the display effect of the display panel is improved.
In this embodiment, the driving chip 40 and the first power supplying line 21 are located in the lower frame region, the first power supplying line 21 is disposed close to the display region 11, the first power supplying line 21 can be transversely disposed in the lower frame region, the second power supplying line 22 is opposite to the first power supplying line 21, the second power supplying line 22 is located in the upper frame region, and the second power supplying lines 22 are transversely distributed in the upper frame region; the first signal line 51 and the second signal line 52 are disposed perpendicular to the first power supplying line 21 and the second power supplying line 22, that is, the first signal line 51 and the second signal line 52 may be disposed vertically on the display region 11. It is understood that the first power supplying line 21 and the second power supplying line 22 can be arranged according to the requirement of brightness compensation, for example, the first power supplying line 21 can be arranged at the left and right sides of the display area 11, that is, the first power supplying line 21 can be arranged in the left frame and the right frame, and the lateral brightness difference of the display panel can be compensated.
On the basis of the above-described embodiment, at least one first power supply point 61 is provided in the lower frame region of the substrate 10, at least one second power supply point 62 is provided in the upper frame region of the substrate 10, and the first power supply point 61 communicates with the first power supply line 21 and supplies a voltage to the first power supply line 21, and the second power supply line 22 communicates with the second power supply point 62 and supplies a voltage to the second power supply line 22.
If one feeding point is connected to both the first feeding line 21 and the second feeding line 22, the length of the first feeding line 21 can be made equal to the length of the second feeding line 22 when the first feeding line 21 and the second feeding line 22 are made of the same material; therefore, the power supply lines can be connected to the middle positions of the first power supply line 21 and the second power supply line 22 respectively, so that the voltage drop gradients on the first power supply line 21 and the second power supply line 22 are the same, and the brightness of the display panel can be compensated conveniently, so that the brightness of the display panel is uniform.
In addition, the first power supplying line 21 and the second power supplying line 22 can be respectively connected with two power supplying points, that is, the first power supplying line 21 is connected with the two first power supplying points 61, and the two first power supplying points 61 are symmetrically distributed along the center of the first power supplying line 21; the second feeder line 22 is connected to two second feeder points 62, and the two second feeder points 62 are symmetrical along the center of the second feeder line 22, so that the voltages at all places on the first feeder line 21 are equal, the voltages at all places on the second feeder line 22 are equal, and the voltage introduced by the first feeder line 21 is the same as the voltage introduced by the second feeder line 22.
It is understood that three or more feeding points may be connected to the first feeding line 21 and the second feeding line 22, and the feeding points may be connected to the first feeding line 21 and the second feeding line 22 at equal intervals; that is, a plurality of first feeding points 61 may be uniformly connected to the first power feeding line 21, and a plurality of second feeding points 62 may be uniformly connected to the second power feeding line 22, so that voltages at the first power feeding line 21 and the second power feeding line 22 are equal to each other.
In this embodiment, it is preferable that the voltages of the first power supplying line 21 and the second power supplying line 22 are set to be equal, the first power supplying line 21 is connected to one end of the first signal line 51, the second power supplying line 22 is connected to the other end of the second signal line 52, and the voltage drop variation gradient of the first signal line 51 is the same as the voltage drop variation gradient of the second signal line 52, so that the effect of compensating the vertical luminance of the same region is optimized, and the luminance of the display panel is more uniform.
As shown in fig. 3, the present invention provides another embodiment in which one end of the first power supplying line 21 is provided with one power supplying point and one end of the second power supplying line 22 is provided with one power supplying point, and the current flowing through the first power supplying line 21 and the current flowing through the second power supplying line 22 are in opposite directions.
Specifically, the first power supplying line 21 includes a first end and a second end, the second power supplying line 22 includes a first end and a second end, and the first power supplying line 21 and the second power supplying line 22 are oppositely arranged, the first end of the first power supplying line 21 is connected with the first power supplying point 61, the second end of the second power supplying line 22 is connected with the second power supplying point 62, and the power supplying voltages introduced by the first power supplying point 61 and the second power supplying point 62 are the same, so that the voltage of the first end of the first power supplying line 21 is equal to the voltage of the second end of the second power supplying line 22; the current direction of the first power supply line 21 is from the first end to the second end, and the voltage drop of the first power supply line 21 gradually increases from the first end to the second end; the current direction of the second power supplying line 22 is that the second end flows to the first end, and the voltage drop of the second power supplying line 22 gradually increases from the second end to the first end.
In this embodiment, the first end of the first power supplying line 21 is connected to a power supplying point, and the second end of the second power supplying line 22 is connected to a power supplying point, so that not only the longitudinal brightness difference of the display panel can be compensated, but also the lateral brightness of the display panel can be compensated, and the brightness uniformity of the display panel is further improved.
Another embodiment of the present invention provides another connection method for the power supply lines and the power supply points, wherein a first conductive line 71 and a second conductive line 72 are respectively disposed along two ends of the first power supply line 21 and the second power supply line 22, the first conductive line 71 can be located in a left frame region of the substrate 10, the second conductive line 72 can be located in a right frame region of the substrate 10, and the first conductive line 71 and the second conductive line 72 are disposed opposite to each other. In this way, the first supply point 61 connected to the first supply line 21 and the second supply point 62 connected to the second supply line 22 can be arranged in the upper or lower frame region of the substrate 10.
In the present embodiment, the first power supply line 21 is provided in the lower bezel region, and the second power supply line 22 is provided in the upper bezel region; in order to facilitate the arrangement of the feeding points, a first feeding point 61 and a second feeding point 62 may be respectively provided at both sides of the first power feeding line 21, wherein the first feeding point 61 is connected to one end of a first wire 71, and the other end of the first wire 71 is connected to a first end of the first power feeding line 21. The second feeding point 62 may be located at a second end of the first feeding line 21 and opposite to a second end of the second feeding line 22, the second feeding point 62 being connected to one end of a second wire 72, the other end of the second wire 72 being connected to the second end of the second feeding line 22.
The same supply voltage for lighting the pixel units is respectively introduced into the first supply point 61 and the second supply point 62, and since the first conducting wire 71 and the second conducting wire 72 have resistances, voltage loss (voltage division) is caused, and the voltage division generated on the first conducting wire 71 needs to be the same as the voltage division generated on the second conducting wire 72, so as to ensure that the voltage of the first end of the first power supply line 21 is the same as the voltage of the second end of the second power supply line 22.
On the basis of the above-described embodiment, the first wire 71 and the second wire 72 are arranged in a convenient manner, and the divided voltage generated by the first wire 71 is ensured to be the same as the divided voltage generated by the second wire 72; in this embodiment, the first conductive line 71 and the second conductive line 72 can be made of the same material, and have the same cross-sectional area and length. For example, the first conductive line 71 and the second conductive line 72 may be made of copper foil, and the embodiment is not limited thereto. It is understood that, in the present embodiment, there is no limitation on the form of the first wire 71 and the second wire 72 laid on the substrate 10, for example, the first wire 71 may be bent and coiled on the substrate 10 in the left frame region, and the second wire 72 may be arranged in a straight line in the right frame region.
The embodiment also provides an OLED display panel, which includes an array substrate and a frame, where the array substrate includes a substrate 10, the substrate 10 includes a display area 11 and a non-display area 12, and the frame covers the non-display area 12, that is, the frame can cover an upper frame area, a lower frame area, a left frame area, and a right frame area of the substrate 10; the display region 11 is provided with a plurality of pixel cells arranged in an array, and the non-display region 12 is provided with a first power supplying line 21, a second power supplying line 22, a first power supplying point 61 connected to the first power supplying line 21, and a second power supplying point 62 connected to the second power supplying line 22.
Because the first signal line and the second signal line have voltage drop, the brightness of a column of pixel units connected with the first signal line is gradually darkened along the direction from the first power supply line to the second power supply line; the brightness of the pixel units in the row connected with the second signal line gradually becomes bright, the brightness difference of the pixel units at different positions on the substrate can be compensated, the brightness of each position of the OLED display panel is more uniform, and the display effect of the display panel is improved.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.
Claims (10)
1. An array substrate is characterized by comprising a substrate, a first power supply line and a second power supply line, wherein the first power supply line and the second power supply line are arranged on the substrate;
the first power supply line and the second power supply line are oppositely arranged, and a plurality of first signal lines and a plurality of second signal lines are alternately arranged between the first power supply line and the second power supply line;
each first signal line is connected with a plurality of pixel units, one end of each first signal line is connected with the first power supply line, and the other end of each first signal line is grounded; each second signal line is connected with a plurality of pixel units, one end of each second signal line is connected with the second power supply line, and the other end of each second signal line is grounded.
2. The array substrate of claim 1, wherein one end of the first supply line is provided with a supply point, and one end of the second supply line is provided with a supply point;
the current flow direction through the first power supply line and the current flow direction through the second power supply line are opposite.
3. The array substrate of claim 2, wherein a first conductive line and a second conductive line are disposed on the substrate;
one end of the first wire is connected with a first end of the first power supply line, and the other end of the first wire is connected with the power supply point;
one end of the second wire is connected with the second end of the second power supply wire, and the other end of the second wire is connected with the power supply point;
and the first end of the first wire and the first end of the second wire are oppositely arranged, and the voltage of the first end of the first power supply line is equal to the voltage of the second end of the second power supply line.
4. The array substrate of claim 3, wherein the length, cross-sectional area, and material of the first conductive lines are the same as the length, cross-sectional area, and material of the second conductive lines.
5. The array substrate according to claim 3 or 4, wherein the first and second conductive lines are respectively located on both sides of the first supply line in an extending direction of the first supply line;
the first conducting wire is arranged in a broken line or a winding mode, and the second conducting wire is arranged in a straight line.
6. The array substrate of claim 1, wherein the first feed line has a plurality of feed points disposed at equal intervals along an extending direction of the first feed line;
the second feeder line is provided with a plurality of feeder points at equal intervals along an extending direction of the second feeder line.
7. The array substrate of claim 1, wherein the midpoint of the first supply line is provided with a supply point, and the midpoint of the second supply line is provided with a supply point.
8. The array substrate of claim 1, wherein the substrate comprises a display area and a non-display area.
9. An OLED display panel comprising the array substrate according to any one of claims 1 to 8.
10. The OLED display panel of claim 9, wherein the array substrate includes a substrate;
the display panel is provided with a frame which covers a non-display area of the substrate.
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| CN114530121A (en) * | 2022-03-18 | 2022-05-24 | 成都京东方光电科技有限公司 | Display module and display device |
Citations (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1255240A1 (en) * | 1997-02-17 | 2002-11-06 | Seiko Epson Corporation | Active matrix electroluminescent display with two tft's and storage capacitor |
| KR100732811B1 (en) * | 2006-07-19 | 2007-06-27 | 삼성에스디아이 주식회사 | Organic light emitting display device |
| CN101110442A (en) * | 2006-07-21 | 2008-01-23 | 统宝光电股份有限公司 | Image display system |
| US20110102402A1 (en) * | 2009-11-04 | 2011-05-05 | Sam-Il Han | Organic light emitting display and method of manufacturing the same |
| CN102081903A (en) * | 2009-12-01 | 2011-06-01 | 三星移动显示器株式会社 | Organic light emitting display |
| CN102082151A (en) * | 2009-09-30 | 2011-06-01 | 卡西欧计算机株式会社 | Thin film transistor array substrate, light-emitting panel and manufacturing method thereof as well as electronic device |
| CN107195660A (en) * | 2017-05-27 | 2017-09-22 | 上海天马有机发光显示技术有限公司 | Organic electroluminescence display panel and display device |
| CN107887421A (en) * | 2017-10-30 | 2018-04-06 | 武汉天马微电子有限公司 | A kind of display panel and display device |
| US20180182274A1 (en) * | 2016-12-27 | 2018-06-28 | Samsung Display Co., Ltd. | Display panel and method for detecting cracks in display panel |
| CN108335667A (en) * | 2018-04-20 | 2018-07-27 | 武汉华星光电半导体显示技术有限公司 | Oled display panel and display device |
| CN108364982A (en) * | 2018-02-01 | 2018-08-03 | 武汉华星光电半导体显示技术有限公司 | OLED display |
-
2019
- 2019-09-30 CN CN201910944857.1A patent/CN110676298B/en active Active
Patent Citations (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1255240A1 (en) * | 1997-02-17 | 2002-11-06 | Seiko Epson Corporation | Active matrix electroluminescent display with two tft's and storage capacitor |
| KR100732811B1 (en) * | 2006-07-19 | 2007-06-27 | 삼성에스디아이 주식회사 | Organic light emitting display device |
| CN101110442A (en) * | 2006-07-21 | 2008-01-23 | 统宝光电股份有限公司 | Image display system |
| CN102082151A (en) * | 2009-09-30 | 2011-06-01 | 卡西欧计算机株式会社 | Thin film transistor array substrate, light-emitting panel and manufacturing method thereof as well as electronic device |
| US20110102402A1 (en) * | 2009-11-04 | 2011-05-05 | Sam-Il Han | Organic light emitting display and method of manufacturing the same |
| CN102081903A (en) * | 2009-12-01 | 2011-06-01 | 三星移动显示器株式会社 | Organic light emitting display |
| US20180182274A1 (en) * | 2016-12-27 | 2018-06-28 | Samsung Display Co., Ltd. | Display panel and method for detecting cracks in display panel |
| CN107195660A (en) * | 2017-05-27 | 2017-09-22 | 上海天马有机发光显示技术有限公司 | Organic electroluminescence display panel and display device |
| CN107887421A (en) * | 2017-10-30 | 2018-04-06 | 武汉天马微电子有限公司 | A kind of display panel and display device |
| CN108364982A (en) * | 2018-02-01 | 2018-08-03 | 武汉华星光电半导体显示技术有限公司 | OLED display |
| CN108335667A (en) * | 2018-04-20 | 2018-07-27 | 武汉华星光电半导体显示技术有限公司 | Oled display panel and display device |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114530121A (en) * | 2022-03-18 | 2022-05-24 | 成都京东方光电科技有限公司 | Display module and display device |
| CN114530121B (en) * | 2022-03-18 | 2023-09-29 | 成都京东方光电科技有限公司 | Display module and display device |
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| CN110676298B (en) | 2022-06-03 |
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