CN114530121A

CN114530121A - Display module and display device

Info

Publication number: CN114530121A
Application number: CN202210272471.2A
Authority: CN
Inventors: 程海涛; 陈晶; 刘乾乾; 毕鑫
Original assignee: BOE Technology Group Co Ltd; Chengdu BOE Optoelectronics Technology Co Ltd
Current assignee: BOE Technology Group Co Ltd; Chengdu BOE Optoelectronics Technology Co Ltd
Priority date: 2022-03-18
Filing date: 2022-03-18
Publication date: 2022-05-24
Anticipated expiration: 2042-03-18
Also published as: CN114530121B

Abstract

A display module and a display device are provided. The display module assembly includes: a display screen and a driving circuit; the display screen comprises a display area, a first binding area and a second binding area, wherein the first binding area and the second binding area are positioned on two opposite sides of the display area along a second direction; the driving circuit comprises a plurality of first driving circuits and a plurality of second driving circuits, the first driving circuits and the second driving circuits are respectively connected with the light-emitting elements, the first driving circuits are connected with the corresponding display chips through the first binding regions, and the second driving circuits are connected with the corresponding display chips through the second binding regions; the first driving lines of the light-emitting elements in the same column along the second direction are connected to the same display chip, and the second driving lines of the light-emitting elements in the same column along the second direction are connected to the same display chip.

Description

Display module and display device

Technical Field

The embodiment of the disclosure relates to the technical field of display, in particular to a display module and a display device.

Background

Along with the transformation of automobile intelligence, the display technology of the OLED (Organic Light-Emitting Diode) on the vehicle is also rapidly developing. Compared with the traditional LED vehicle-mounted display technology, the vehicle-mounted OLED display technology has the characteristics of uniform and soft light source, light weight, strong plasticity and the like. Due to the complex environmental conditions, the vehicle-mounted OLED display technology faces more challenges. In some technologies, the brightness of different areas of the same OLED tail lamp is different, the uniformity of the longitudinal brightness is not good, and the user experience is influenced.

Disclosure of Invention

The embodiment of the disclosure provides a display module and a display device, which can solve the problem that the uniformity of the longitudinal brightness of a vehicle-mounted OLED display is not good.

The embodiment of the present disclosure provides a display module, including: a display screen and a driving circuit; the display screen comprises a display area, a first binding area and a second binding area, wherein the first binding area and the second binding area are positioned on two opposite sides of the display area along a second direction; the driving circuit comprises a plurality of first driving circuits and a plurality of second driving circuits, the first driving circuits and the second driving circuits are respectively connected with the light-emitting elements, the first driving circuits are connected with the corresponding display chips through the first binding regions, and the second driving circuits are connected with the corresponding display chips through the second binding regions; the first driving lines of the light-emitting elements in the same column along the second direction are connected to the same display chip, and the second driving lines of the light-emitting elements in the same column along the second direction are connected to the same display chip.

In an exemplary embodiment, the light emitting element is an LED light source, or the light emitting element is an OLED light source.

In an exemplary embodiment, the display region includes a plurality of element regions arranged in an array, the element regions include one or more adjacent light emitting elements, the first driving lines of the element regions are connected to a same display chip, and the second driving lines of the element regions are connected to a same display chip.

In an exemplary embodiment, the display area includes a plurality of display sections arranged in a first direction, the display sections include a column of element regions in a second direction, and the first direction intersects the second direction; the first driving circuit of the display subarea is connected to the same display chip; the second driving lines of the display partitions are connected to the same display chip.

In an exemplary embodiment, the sum of the lengths of the first driving lines and the second driving lines of each element region is equal in the same display region.

In an exemplary embodiment, the first driving circuit and the second driving circuit of the same display partition are connected to the same display chip; or, the first driving circuit and the second driving circuit of the same display partition are respectively connected to different display chips.

In an exemplary embodiment, the first driving circuit and the second driving circuit of the same display partition are connected to the same display chip, including: the first driving circuit and the second driving circuit of the same display partition are connected to the same pin of the same display chip; or the first driving circuit and the second driving circuit of the same display partition are connected to different pins of the same display chip.

In an exemplary embodiment, the first driving line and the second driving line are respectively connected to the first bonding region and the second bonding region through a gap between adjacent display partitions.

In an exemplary embodiment, the first driving circuit and the second driving circuit of the same display partition are connected to different display chips, including: the different display chips are respectively positioned on one side of the first binding area far away from the display area and one side of the second binding area far away from the display area; the first driving line is connected with a display chip on one side, far away from the display area, of the first binding area through a gap of the adjacent display partition, and the second driving line is connected with a display chip on one side, far away from the display area, of the second binding area through a gap of the adjacent display partition.

In an exemplary embodiment, the display area includes a plurality of display sub-areas arranged along the first direction, the display sub-areas include two adjacent display sub-areas, each display sub-area is connected with two display chips, and the adjacent display sub-areas between the adjacent display sub-areas are connected with the same display chip.

In an exemplary embodiment, each of the display sub-regions is connected to two display chips, and includes: the first driving circuit of each display subarea in each display subarea is connected with the display chip which is positioned at one side of the first binding area far away from the display area, and the second driving circuit of each display subarea in each display subarea is connected with the display chip which is positioned at one side of the second binding area far away from the display area.

In an exemplary embodiment, the display area includes a plurality of display units arranged along a first direction, the display units include two or more adjacent display sub-areas, each display unit is connected with two display chips, and the adjacent display sub-areas between the adjacent display units are connected with the same display chip.

The embodiment of the invention also provides a display device which comprises the display module.

The display module set forth in this embodiment sets up first binding region and second binding region in the relative both sides of display area, and first drive circuit and second drive circuit are connected with the display chip that corresponds through the first binding region and the second binding region that are located the relative both sides of display area respectively. The routing distance of the driving circuit between the light-emitting element and the display chip is the sum of the distances of the first driving circuit and the second driving circuit, so that the routing distances of the driving circuits between different light-emitting elements and the display chip are the same or similar, the IR voltage drop degrees of the light-emitting elements at different positions are equivalent, and the uniform brightness of the light-emitting elements close to the binding region and the light-emitting elements far away from the binding region is ensured. The problem of on-vehicle OLED show that vertical luminance homogeneity is not good is solved.

Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.

Drawings

The accompanying drawings are included to provide a further understanding of the disclosed embodiments and are incorporated in and constitute a part of this specification, illustrate embodiments of the disclosure and together with the example serve to explain the principles of the disclosure and not to limit the disclosure.

FIG. 1 is a schematic view of a display area of a tail light of some prior art vehicles;

FIG. 2 is a schematic view of a driving structure of the tail light of FIG. 1;

FIG. 3 is a schematic structural diagram of a dashed line region C in FIG. 2;

FIG. 4 is a schematic diagram of the driving circuit for the display section shown in FIG. 3;

FIG. 5 is a diagram illustrating a display chip controlling a first display partition;

FIG. 6 is a schematic illustration of a display area in an exemplary embodiment;

FIG. 7 is a schematic illustration of a display area in another exemplary embodiment;

FIG. 8 is a schematic structural diagram of a display module according to an exemplary embodiment of the present disclosure;

FIG. 9 is a schematic structural diagram of a dashed line region D in FIG. 8;

FIG. 10 is a schematic diagram of the driving circuit for the display section of FIG. 9;

FIG. 11 is a diagram illustrating that the first driving circuit and the second driving circuit of the first display partition in FIG. 10 are connected to the same pin of the same display chip;

FIG. 12 is a diagram of the first driving circuit and the second driving circuit of the first display partition in FIG. 10 connected to different pins of the same display chip;

FIG. 13 is a schematic diagram of the first and second driving lines of the first and second display partitions of FIG. 10 connected to different display chips;

FIG. 14 is a schematic diagram illustrating a connection between a display unit and a display chip when each display unit includes a display sub-area;

FIG. 15 is a schematic diagram of the connection between a display unit and a display chip when each display unit includes two display sub-regions;

FIG. 16 is a schematic diagram of the driving circuit for the display section of FIG. 15;

FIG. 17 is a schematic diagram of adjacent display sub-regions connecting different display chips;

FIG. 18 is a diagram of adjacent display sub-regions connecting the same display chip.

Detailed Description

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. Note that the embodiments may be implemented in a plurality of different forms. Those skilled in the art can readily appreciate the fact that the forms and details may be varied into a variety of forms without departing from the spirit and scope of the present disclosure. Therefore, the present disclosure should not be construed as being limited to the contents described in the following embodiments. The embodiments and features of the embodiments in the present disclosure may be arbitrarily combined with each other without conflict.

In the drawings, the size of each component, the thickness of layers, or regions may be exaggerated for clarity. Therefore, one aspect of the present disclosure is not necessarily limited to the dimensions, and the shapes and sizes of the respective components in the drawings do not reflect a true scale. Further, the drawings schematically show ideal examples, and one embodiment of the present disclosure is not limited to the shapes, numerical values, and the like shown in the drawings.

The ordinal numbers such as "first", "second", "third", and the like in the present specification are provided for avoiding confusion among the constituent elements, and are not limited in number.

In this specification, for convenience, words such as "middle", "upper", "lower", "front", "rear", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicating orientations or positional relationships are used to explain positional relationships of constituent elements with reference to the drawings, only for convenience of description and simplification of description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed in a specific orientation, and be operated, and thus, should not be construed as limiting the present disclosure. The positional relationship of the components is changed as appropriate in accordance with the direction in which each component is described. Therefore, the words described in the specification are not limited to the words described in the specification, and may be replaced as appropriate.

In this specification, the terms "mounted," "connected," and "connected" are to be construed broadly unless otherwise specifically indicated and limited. For example, it may be a fixed connection, or a removable connection, or an integral connection; can be a mechanical connection, or an electrical connection; either directly or indirectly through intervening components, or both may be interconnected. The specific meaning of the above terms in the present disclosure can be understood in specific instances by those of ordinary skill in the art.

In this specification, "electrically connected" includes a case where constituent elements are connected together by an element having some kind of electrical action. The "element having some kind of electrical action" is not particularly limited as long as it can transmit an electrical signal between connected components. Examples of the "element having some kind of electric function" include not only an electrode and a wiring but also a switching element such as a transistor, a resistor, an inductor, a capacitor, other elements having various functions, and the like.

In the present specification, "parallel" means a state in which an angle formed by two straight lines is-10 ° or more and 10 ° or less, and therefore, includes a state in which the angle is-5 ° or more and 5 ° or less. The term "perpendicular" refers to a state in which the angle formed by two straight lines is 80 ° or more and 100 ° or less, and therefore includes a state in which the angle is 85 ° or more and 95 ° or less.

Concept interpretation:

an element region: the adjacent one or more light emitting elements constitute an element region, and the display region includes one or more element regions arranged in an array.

And (4) displaying the subareas: a row or a column of element regions of the display area is referred to as a display partition, and the display partition includes a column of element regions in this disclosure as an example.

Display sub-region: two adjacent display sections are referred to as a display sub-section.

A display unit: one or more display sub-regions adjacent to each other are referred to as a display unit.

In some technologies, the OLED tail lamp is provided with a plurality of display chips on one side of the display area, and the plurality of display chips are used for independently controlling the OLED light sources of the respective element areas of the display area. The driving mode is different from the driving mode of a common OLED display screen (such as a display device of a mobile phone) and does not need to be provided with a pixel driving circuit, a grid driving circuit and other driving circuits. Fig. 1 is a schematic view of a display area of a tail light in some technologies, and fig. 2 is a schematic view of a driving structure of the tail light in fig. 1. As shown in fig. 1 and 2, the display area 10 of the OLED tail lamp includes a plurality of triangular element regions, each of the element regions is composed of a plurality of OLED light emitting elements (not shown), the shape and area of each element region may be the same, and after a display chip is connected to the element region, the light emission of each light emitting element in the element region may be controlled. The display area 10 includes a plurality of display sections 20 arranged in the first direction X, and each display section 20 includes four display sections 20 included in a 4-element-area dotted-line area C arranged in the second direction Y. A plurality of binding regions 30 are disposed on one side of the display region 10 along the second direction Y, the routing of each display partition 20 is connected to a corresponding display chip through the corresponding binding region 30, and a single display chip can control one or more display partitions 20 to emit light. In fig. 2, the first direction X intersects the second direction Y, the driving method of the OLED tail lamp is single-side driving, and the display partitions 20 of the whole display area 10 are driven by a plurality of display chips IC1, IC2, …, ICN.

Fig. 3 is a schematic structural diagram of a dashed line region C in fig. 2. FIG. 4 is a schematic diagram of the driving circuit of the display section shown in FIG. 3. Fig. 5 is a schematic diagram of controlling the first display partition by using one display chip. Two adjacent display sub-regions are illustrated in fig. 3 and 4, each display sub-region comprising two adjacent display sections 20, a first display section comprising element regions 1 to 4, a second display section comprising element regions 5 to 8, a third display section comprising element regions 9 to 12, and a fourth display section comprising element regions 13 to 16. The driving lines of the different element regions are led out via the bonding region 30 (i.e., the region indicated by the dotted line frame) located at one side of the display region 10, and connected to the corresponding display chips. As shown in fig. 5, each display area 20 in the dashed line area C in fig. 2 can be controlled by one display chip, and fig. 5 schematically illustrates the connection relationship between the first display area and the display chip by taking the

element areas

1 and 4 as examples, and one end of the light emitting element is connected to the display chip and the other end is grounded.

Referring to fig. 3 to 5, since the bonding region 30 is located at one side of the display region 10, the routing path of the driving circuit between the display chip and the component region close to the bonding region 30 is short, and the routing path of the driving circuit between the display chip and the component region far from the bonding region 30 is long. Under the influence of the IR drop, the brightness of the device region near the bonding region 30 is brighter than that of the device region far from the bonding region 30, and the non-uniform brightness of the device region occurs in the second direction Y. The longer the length of the display area 10 in the second direction Y, the more noticeable such a difference in luminance will be.

Moreover, when the length of the display area 10 along the first direction X is long, a plurality of display chips need to be arranged to control the display partitions 20, and due to differences in positions and working environments of different display chips, working states of different display chips may have a certain difference, and luminances of the display partitions 20 controlled by different display chips may have different differences, so that the luminance may also be non-uniform in the first direction X.

The embodiment of the present disclosure provides a display module, including: a display screen and a driving circuit; the display screen comprises a display area, a first binding area and a second binding area, wherein the first binding area and the second binding area are positioned on two opposite sides of the display area along a second direction;

the driving circuit comprises a plurality of first driving circuits and a plurality of second driving circuits, the first driving circuits and the second driving circuits are respectively connected with the light-emitting elements, the first driving circuits are connected with the corresponding display chips through the first binding regions, and the second driving circuits are connected with the corresponding display chips through the second binding regions; the first driving lines of the light-emitting elements in the same column along the second direction are connected to the same display chip, and the second driving lines of the light-emitting elements in the same column along the second direction are connected to the same display chip.

In the scheme of the embodiment of the disclosure, a first binding region and a second binding region are arranged on two opposite sides of a display region, and a first driving circuit and a second driving circuit are respectively connected with corresponding display chips through the first binding region and the second binding region which are positioned on the two opposite sides of the display region. The routing distance of the driving circuit between the light-emitting element and the display chip is the sum of the first driving circuit and the second driving circuit, so that the routing distances of the driving circuits between different light-emitting elements and the display chip are the same or similar, the IR voltage drop degrees of the light-emitting elements at different positions are equivalent, and the uniform brightness of the light-emitting elements close to the binding region and the light-emitting elements far away from the binding region is ensured.

The display module that this disclosed embodiment provided can be applied to the tail lamp in, can improve the uneven condition of the luminous element display luminance along the second direction that the IR pressure drop brought. The display module provided by the embodiment of the disclosure can also be applied to other display devices, and the disclosure does not limit the display module.

In the display module provided by the embodiment of the present disclosure, the light emitting element may be configured as an LED light source, or an OLED light source, or other forms of light sources, which is not limited in the present disclosure.

In one exemplary embodiment, the display region includes a plurality of element regions arranged in an array, the element regions include one or more adjacent light emitting elements, the first driving lines of the element regions are connected to the same display chip, and the second driving lines of the element regions are connected to the same display chip.

In this embodiment mode, each element region in the display region may be the same, and the first driving wiring and the second driving wiring may be connected to the element region and may be capable of controlling light emission of each light emitting element in the element region. The routing path of the driving circuit between each element area and the display chip is the same or similar, the IR voltage drop degree of the element areas at different positions is equivalent, and the brightness uniformity of the element areas close to the binding area and the element areas far away from the binding area is ensured.

In one exemplary embodiment, the display area includes a plurality of display sections arranged in a first direction, the display sections include a column of element regions in a second direction, and the first direction intersects the second direction. The first driving circuit of the display subarea is connected to the same display chip; the second driving lines of the display partitions are connected to the same display chip.

In an exemplary embodiment, the first driving lines and the second driving lines of the same display partition are connected to the same display chip; or, the first driving circuit and the second driving circuit of the same display partition are respectively connected to different display chips.

In an exemplary embodiment, the first driving lines and the second driving lines of the same display partition are connected to the same display chip, including: the first driving circuit and the second driving circuit of the same display partition are connected to the same pin of the same display chip; or the first driving circuit and the second driving circuit of the same display partition are connected to different pins of the same display chip.

In an exemplary embodiment, the first driving line and the second driving line are connected to the first bonding region and the second bonding region through a gap between adjacent display partitions, respectively.

In an exemplary embodiment, the first driving lines and the second driving lines of the same display partition are connected to different display chips, including: the different display chips are respectively positioned on one side of the first binding area far away from the display area and one side of the second binding area far away from the display area; the first driving line is connected with a display chip on one side, far away from the display area, of the first binding area through a gap of the adjacent display partition, and the second driving line is connected with a display chip on one side, far away from the display area, of the second binding area through a gap of the adjacent display partition.

In an exemplary embodiment, each of the display sub-regions is connected to two display chips, including: the first driving circuit of each display subarea in each display subarea is connected with the display chip which is positioned at one side of the first binding area far away from the display area, and the second driving circuit of each display subarea in each display subarea is connected with the display chip which is positioned at one side of the second binding area far away from the display area.

The technical contents of the present disclosure will be described in detail below by specific embodiments.

FIG. 6 is a schematic illustration of a display area in an exemplary embodiment. Fig. 7 is a schematic view of a display area in another exemplary embodiment. As shown in fig. 6, in the display module provided in the embodiment of the present disclosure, the shape of the display area 10 may be a square, the display area 10 includes element regions arranged in an array, the shape of each element region may be a square, and each element region may include one light emitting element, or each element region may include a plurality of adjacent light emitting elements, and the shape of the combination of the plurality of adjacent light emitting elements is a square. As shown in fig. 7, the shape of the display region 10 may be a square, the shape of each element region may be a circle, and each element region may include one light emitting element, or each element region may include a plurality of adjacent light emitting elements whose combined shape is a circle. In other embodiments, the shape of the display area 10 or the shape of the element region may be any of the following: triangular, circular, other shapes, quadrilateral and polygonal, etc., as the present disclosure does not limit. The dynamic display of the pattern can be presented by controlling different element regions of the display area 10 to emit light, or by controlling different light-emitting elements in the element regions to emit light, presenting different patterns in the display area 10.

Fig. 8 is a schematic structural diagram of a display module according to an exemplary embodiment of the disclosure. In fig. 8, the display area 10 is shaped like a parallelogram, the element regions are equilateral triangles having the same shape, and the plurality of element regions are arranged in an array on the display area 10 in the first direction X and the second direction Y intersecting each other. The display section 20 includes a row of light emitting elements arranged in the second direction Y, and the plurality of display sections 20 are arranged in the first direction X. The display module further comprises a first binding area A and a second binding area B which are arranged on two opposite sides of the display area 10 along the second direction Y, and a plurality of binding areas are respectively arranged in the first binding area A and the second binding area B. The display module further comprises a first driving circuit and a second driving circuit which are respectively connected with the light-emitting elements, the first driving circuit is connected with the corresponding display chip through the first binding region A, and the second driving circuit is connected with the corresponding display chip through the second binding region B. In fig. 8, the first direction X is a long side direction of the display area 10, the second direction Y is a short side direction of the display area 10, the first binding area a and the second binding area B are respectively disposed in the long side direction of the display area 10, in other embodiments, the first direction X and the second direction Y may be interchanged, that is, the first binding area a and the second binding area B may be disposed in the short side direction of the display area 10, and the first driving circuit and the second driving circuit may be led out from the short side direction of the display area and connected to a corresponding display chip, which is not limited by the present disclosure.

Fig. 9 is a schematic structural diagram of a dashed line region D in fig. 8. As shown in fig. 9, the dotted line area D includes four display partitions, namely, a first display partition, a second display partition, a third display partition and a fourth display partition, which are sequentially arranged from left to right, where the first display partition and the second display partition may be referred to as a first display sub-area, and the third display partition and the fourth display partition may be referred to as a second display sub-area. The first driving line of each display partition may be connected to one display chip, the second driving line of each display partition may be connected to one display chip, and the first driving line and the second driving line of each display partition may be connected to the same display chip, or may be connected to two display chips, respectively. The different display sub-regions may be connected to the same display chip, e.g. the first drive lines of a first display sub-region may be connected to one display chip and the second drive lines of a second display sub-region may be connected to one display chip. As shown in fig. 9, the first display section includes element regions 1 to 4, the second display section includes element regions 5 to 8, the third display section includes element regions 9 to 12, and the fourth display section includes element regions 13 to 16. The first display sub-area comprises element areas 1 to 8, first driving lines of the element areas 1 to 8 are respectively 1a to 8a, and the first driving lines 1a to 8a can be connected with corresponding display chips after passing through the same binding area of the first binding area A; second driving lines 1B to 8B of the element regions 1 to 8 are respectively connected with corresponding display chips after passing through the same binding region of the second binding region B; the second display sub-area comprises element areas 9 to 16, the first driving lines of the element areas 9 to 16 are respectively 9a to 16a, and the first driving lines 9a to 16a can be connected with the corresponding display chips after passing through another binding area of the first binding area A; the second driving lines 9b to 16b of the element regions 9 to 16 are respectively connected to the corresponding display chips after passing through the same bonding region as the second driving lines 1b to 8 b.

FIG. 10 is a schematic diagram of the driving circuit of the display section shown in FIG. 9. As shown in fig. 10, each element region is commonly driven by the first driving wiring and the second driving wiring connected to the element region, and the first driving wiring and the second driving wiring of each display partition may be connected to the same display chip from a gap between adjacent element regions, or may be connected to different display chips. In this embodiment, the element regions are driven in a bilateral driving manner, the routing path of the driving circuit between each element region and the corresponding display chip is the sum of the first driving circuit and the second driving circuit, and the routing paths of the driving circuits between the element regions in each display partition and the corresponding display chips are the same or similar, so that the IR drop degrees of the element regions at different positions of each display partition are equivalent, and the brightness uniformity of the element regions of the same display partition can be ensured.

Still taking fig. 8 as an example, the display chips may be respectively disposed on a side of the first bonding region a away from the display region 10, and a side of the second bonding region B away from the display region 10, the first driving circuit led out from each bonding region in fig. 8 is respectively connected to one display chip located on a side of the first bonding region a away from the display region 10, and the second driving circuit led out from each bonding region is respectively connected to one display chip located on a side of the second bonding region B away from the display region 10. The element area of each display sub-area is coupled and controlled by two display chips respectively located at two sides of the display area 10 along the second direction Y along the first direction X, and the adjacent display sub-areas are controlled by at least one same display chip. This kind of design has reduced because the operating condition difference of different display chips brings by the adjacent luminance difference that shows the subregion of different display chip controls, even if the length of display module assembly along first direction X is longer, under the more condition of the display chip of setting, still can guarantee along the luminance uniformity of first direction X.

The display chip may have multiple pins, each of which may have a separate output. The first driving circuit and the second driving circuit of the same display partition can be connected to the same pin of the same display chip; or the first driving circuit and the second driving circuit of the same display partition can be connected to different pins of the same display chip; alternatively, the first driving lines and the second driving lines of the same display section may be connected to different display chips. In fig. 11 to 13, the connection between the first driving circuit and the second driving circuit and the display chip is illustrated by taking the first display partition and the second display partition as examples. Fig. 11 is a schematic diagram of the first driving lines and the second driving lines of the first display sub-area in fig. 10 being connected to the same PIN of the same display chip, and as shown in fig. 11, one ends of the first driving lines 1a to 4a and the second driving lines 1b to 4b are connected to the same PIN of the same display chip, the other ends are connected to the corresponding device areas, and the device areas are grounded, where fig. 11 only illustrates the

device areas

1 and 4 as an example, and other device areas are omitted. Fig. 12 is a schematic diagram of the first driving lines and the second driving lines of the first display partition in fig. 10 being connected to different pins of the same display chip, as shown in fig. 12, one ends of the first driving lines 1a to 4a and the second driving lines 1b to 4b are respectively connected to different pins of the same display chip, the other ends are connected to corresponding device regions, and the device regions are grounded, where fig. 12 illustrates only the device region 1 and the device region 4 as an example, and other device regions are omitted from being illustrated. Fig. 13 is a schematic diagram of the first driving lines and the second driving lines of the first display sub-area and the second display sub-area in fig. 10 connected to different display chips, as shown in fig. 13, one ends of the first driving lines 1a to 8a are connected to the first display chip IC1, the other ends are connected to corresponding element areas, the element areas are grounded, one ends of the second driving lines 1b to 8b are connected to the second display chip IC2, the other ends are connected to corresponding element areas, the element areas are grounded, the element areas of the first display sub-area and the second display sub-area are driven by the first display chip IC1 and the second display chip IC2, only the element area 1, the element area 4, the element area 5, and the element area 8 are taken as examples in fig. 13, and other element areas are not shown. The connection manner of the first driving lines and the second driving lines may be set as required, when the number of the display partitions is small, the connection manner shown in fig. 11 or 12 may be adopted, when the number of the display partitions is large, the connection manner shown in fig. 13 may be adopted, or the connection manners shown in fig. 11 to 13 may be used in a display module in a matching manner, for example, one or more adjacent display sub-regions may be referred to as a display unit, in each display unit, different display sub-regions may adopt the same connection manner, any one of the connection manners shown in fig. 11 to 13 may be adopted between the display partitions and the display chip, and the connection manners adopted by different display units may be different; or different connection modes can be adopted for different display subareas inside each display unit, which is not limited by the disclosure.

In the following, the display module of the present disclosure is described by taking as an example that the connection mode of each display partition inside the display unit is completely the same as that of the display chip, and the adjacent display sub-areas between the adjacent display units are controlled by the same display chip. FIG. 14 is a schematic diagram illustrating a connection manner between a display unit and a display chip when each display unit includes a display sub-region. FIG. 15 is a schematic diagram of a connection method between a display unit and a display chip when each display unit includes two display sub-regions.

As shown in fig. 14, four bold rectangles in the first direction X respectively represent a first display unit, a second display unit, a third display unit, and a fourth display unit in this order. Since each display unit comprises one display sub-area, the four bold rectangles may represent the first display sub-area 41, the second display sub-area 42, the third display sub-area 43 and the fourth display sub-area 44, respectively. As shown in FIG. 14, a first display sub-area 41 may be controlled by the coupling of a display chip a and a display chip b, a second display sub-area 42 may be controlled by the coupling of a display chip b and a display chip c, a third display sub-area 43 may be controlled by the coupling of a display chip c and a display chip d, and a fourth display sub-area 44 may be controlled by the coupling of a display chip d and a display chip a. The first display sub-area 41 and the second display sub-area 42 are connected to the same display chip b, the second display sub-area 42 and the third display sub-area 43 are connected to the same display chip c, and the third display sub-area 43 and the fourth display sub-area 44 are connected to the same display chip d. The display chip a and the display chip c are connected with the corresponding display subarea through the first driving circuit, and the display chip b and the display chip d are connected with the corresponding display subarea through the second driving circuit. The positions of the different display chips in fig. 14 may be exchanged, and other connection manners may be adopted between the display unit and the display chips, which is not limited in this disclosure.

As shown in fig. 15, four bold rectangles in the first direction X respectively represent a first display unit, a second display unit, a third display unit, and a fourth display unit in this order. The first display unit comprises a first display sub-area 41 and a second display sub-area 42, the second display unit comprises a third display sub-area 43 and a fourth display sub-area 44, the third display unit comprises a fifth display sub-area 45 and a sixth display sub-area 46, and the fourth display unit comprises a seventh display sub-area 47 and an eighth display sub-area 48. The first display sub-area 41 and the second display sub-area 42 are both controlled by the coupling of the display chip a and the display chip b, the third display sub-area 43 and the fourth display sub-area 44 are both controlled by the coupling of the display chip a and the display chip d, the fifth display sub-area 45 and the sixth display sub-area 46 are both controlled by the coupling of the display chip c and the display chip d, and the seventh display sub-area 47 and the eighth display sub-area 48 are both controlled by the coupling of the display chip c and the display chip b. The adjacent display subareas between the first display unit and the second display unit are a second display subarea 42 and a third display subarea 43, and the second display subarea 42 and the third display subarea 43 are connected with the same display chip a. The adjacent display subareas between the second display unit and the third display unit are a fourth display subarea 44 and a fifth display subarea 45, and the fourth display subarea 44 and the fifth display subarea 45 are connected with the same display chip d. The adjacent display subareas between the third display unit and the fourth display unit are a sixth display subarea 46 and a seventh display subarea 47, and the sixth display subarea 46 and the seventh display subarea 47 are connected with the same display chip c. The display chip a and the display chip c are connected with the corresponding display subarea through the first driving circuit, and the display chip b and the display chip d are connected with the corresponding display subarea through the second driving circuit. The positions of the different display chips in fig. 15 may be exchanged, and other connection manners may be adopted between the display unit and the display chips, which is not limited in this disclosure.

FIG. 16 is a schematic diagram of the driving circuit of the display section shown in FIG. 15. Only a part of the element region is shown in fig. 16. The first driving lines of the first display sub-area 41 to the fourth display sub-area 44 are connected with the display chip a, the first driving lines of the fifth display sub-area 45 to the eighth display sub-area 48 are connected with the display chip c, the second driving lines of the third display sub-area 43 to the sixth display sub-area 46 are connected with the display chip d, the second driving lines of the first display sub-area 41, the second display sub-area 42, the seventh display sub-area 47 and the eighth display sub-area 48 are connected with the display chip b, the first driving line and the second driving line corresponding to the same element area are connected with the corresponding element area, and the element area is grounded.

In the case where the display region 10 has a short length in the first direction X and includes a small number of display sections, a connection method as shown in fig. 14 may be employed. In the case where the display region 10 is long in the first direction X and includes many display sections, a connection method as shown in fig. 15 may be employed. The present disclosure is not so limited.

In the following, the theoretical analysis is performed on the brightness display of different display subareas more uniformly by arranging the same display chip in the adjacent display subareas. Taking the dual-edge driving as an example, fig. 17 is a schematic diagram of connecting different display chips to adjacent display partitions of adjacent display sub-regions, and fig. 18 is a schematic diagram of connecting the same display chip to adjacent display partitions of adjacent display sub-regions. In fig. 17, the first display sub-area 41 and the second display sub-area 42 are controlled by the display chip a and the display chip c, respectively. In fig. 18, the first display sub-area 41 is controlled by the coupling of the display chip a and the display chip b, the second display sub-area 42 is controlled by the coupling of the display chip b and the display chip c, and the adjacent display sub-areas of the first display sub-area 41 and the second display sub-area 42 are connected to the same display chip b. Assuming that each display chip has a basic brightness contribution of X to the display partition, the display chips a, B and C respectively have an additional brightness contribution of A, B, C based on the difference of the operating states of the different display chips, and A > B > C. That is, the luminance contribution of the display chip a to the display partition is X + a, the luminance contribution of the display chip B to the display partition is X + B, and the luminance contribution of the display chip C to the display partition is X + C. And calculating the brightness difference ratio of the adjacent display sub-areas by adopting a brightness difference ratio calculation formula, wherein the brightness difference of the adjacent display sub-areas is the difference between the brightness maximum value and the brightness minimum value, and the brightness difference ratio of the adjacent display sub-areas is the ratio of the brightness difference to the brightness maximum value. Then the brightness difference between the first display sub-area and the second display sub-area for the schemes of fig. 17 and 18 is shown in table one.

Watch 1

As shown in table one, in the scheme of fig. 17, the luminance of the left display sub-area and the luminance of the right display sub-area of the first display sub-area 41 are both X + a, and the luminance of the first display sub-area 41 is 2X + 2A. The luminance of the left display sub-area and the luminance of the right display sub-area of the second display sub-area 42 are both X + C, and then the luminance of the second display sub-area 42 is 2X + 2C. The luminance of the first display sub-area 41 is the maximum luminance value. The luminance difference between the first display sub-area 41 and the second display sub-area 42 of the scheme of fig. 17 is (2X +2A) - (2X +2C) ═ 2A-2C. The luminance ratio of the first and

second display sub-regions

41 and 42 of the scheme of fig. 17 is (2A-2C)/(2X +2A) ═ a-C)/(X + a.

As shown in table one, in the scheme of fig. 18, the luminance of the left display sub-area of the first display sub-area 41 is X + a, and the luminance of the right display sub-area is X + B, so that the luminance of the first display sub-area 41 is 2X + a + B. The luminance of the left display sub-area of the second display sub-area 42 is X + B, and the luminance of the right display sub-area is X + C, so the luminance of the second display sub-area 42 is 2X + B + C. The luminance of the first display sub-area 41 is the maximum luminance value. The luminance difference between the first display sub-area 41 and the second display sub-area 42 of the scheme of fig. 18 is (2X + a + B) - (2X + B + C) ═ a-C. The luminance ratio of the first and

second display sub-regions

41 and 42 of the scheme of fig. 18 is (a-C)/(2X + a + B). It can be seen that the luminance difference between the first display sub-area 41 and the second display sub-area 42 in the scheme of fig. 18 is smaller, and the luminance ratio is also smaller, which indicates that in the scheme of fig. 18, since the same display chip B is used for control in the adjacent display sub-areas, the adjacent display sub-areas are driven in a coupling manner, and the difference of the overall luminance is reduced. Therefore, the scheme provided by the application can effectively reduce the display brightness nonuniformity caused by the driving source difference and improve the brightness uniformity of adjacent display sub-areas.

Based on the inventive concept of the foregoing embodiment, an embodiment of the present invention further provides a display apparatus, which includes the display module according to the foregoing embodiment. The display device may be: any product or component with a display function, such as a tail lamp, a display, a digital photo frame, a navigator and the like.

Although the embodiments of the present invention have been described above, the above description is only for the convenience of understanding the present invention, and is not intended to limit the present invention. It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.

Claims

1. A display module, comprising: a display screen and a driving circuit; the display screen comprises a display area, a first binding area and a second binding area, wherein the first binding area and the second binding area are positioned on two opposite sides of the display area along a second direction;

the driving circuit comprises a plurality of first driving circuits and a plurality of second driving circuits, the first driving circuits and the second driving circuits are respectively connected with the light-emitting elements, the first driving circuits are connected with the corresponding display chips through the first binding regions, and the second driving circuits are connected with the corresponding display chips through the second binding regions;

the first driving lines of the light-emitting elements in the same column along the second direction are connected to the same display chip, and the second driving lines of the light-emitting elements in the same column along the second direction are connected to the same display chip.

2. The display module of claim 1, wherein the light emitting element is an LED light source or an OLED light source.

3. The display module of claim 1, wherein the display area comprises a plurality of element regions arranged in an array, the element regions comprise one or more adjacent light-emitting elements, the first driving lines of the element regions are connected to a same display chip, and the second driving lines of the element regions are connected to a same display chip.

4. The display module of claim 3, wherein the display area comprises a plurality of display sections arranged along a first direction, the display sections comprising a column of element regions along a second direction, the first direction intersecting the second direction; wherein the content of the first and second substances,

the first driving lines of the display subareas are connected to the same display chip; the second driving lines of the display partitions are connected to the same display chip.

5. The display module according to claim 4, wherein the sum of the lengths of the first driving lines and the second driving lines of each cell area is equal in the same display sub-area.

6. The display module according to claim 4, wherein the first driving circuit and the second driving circuit of the same display region are connected to the same display chip; alternatively, the first and second electrodes may be,

the first driving circuit and the second driving circuit of the same display partition are respectively connected to different display chips.

7. The display module of claim 6, wherein the first driving circuit and the second driving circuit of the same display partition are connected to the same display chip, comprising:

the first driving circuit and the second driving circuit of the same display partition are connected to the same pin of the same display chip; alternatively, the first and second electrodes may be,

the first driving circuit and the second driving circuit of the same display partition are connected to different pins of the same display chip.

8. The display module of claim 6, wherein the first driving line and the second driving line are connected to the first bonding region and the second bonding region through a gap between adjacent display partitions, respectively.

9. The display module of claim 6, wherein the first driving circuit and the second driving circuit of the same display partition are connected to different display chips, comprising:

the different display chips are respectively positioned on one side of the first binding area far away from the display area and one side of the second binding area far away from the display area;

the first driving line is connected with a display chip on one side, far away from the display area, of the first binding area through a gap of the adjacent display partition, and the second driving line is connected with a display chip on one side, far away from the display area, of the second binding area through a gap of the adjacent display partition.

10. The display module assembly of claim 4, wherein the display area comprises a plurality of display sub-areas arranged along the first direction, the display sub-areas comprise two adjacent display sub-areas, each display sub-area is connected with two display chips, and the adjacent display sub-areas between the adjacent display sub-areas are connected with the same display chip.

11. The display module of claim 10, wherein each display sub-region is connected to two display chips, comprising:

the first driving circuit of each display subarea in each display subarea is connected with the display chip which is positioned at one side of the first binding area far away from the display area, and the second driving circuit of each display subarea in each display subarea is connected with the display chip which is positioned at one side of the second binding area far away from the display area.

12. The display module of claim 10, wherein the display area comprises a plurality of display units arranged along the first direction, the display units comprise two or more adjacent display sub-areas, each display unit is connected with two display chips, and the adjacent display sub-areas between the adjacent display units are connected with the same display chip.

13. A display device, comprising the display module according to any one of claims 1 to 12.