CN109298577B - Display panel and display device - Google Patents
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- CN109298577B CN109298577B CN201811457078.0A CN201811457078A CN109298577B CN 109298577 B CN109298577 B CN 109298577B CN 201811457078 A CN201811457078 A CN 201811457078A CN 109298577 B CN109298577 B CN 109298577B
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/13338—Input devices, e.g. touch panels
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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Abstract
The embodiment of the invention discloses a display panel and a display device, wherein the display panel comprises: the pixel units are arranged in an array mode, each pixel unit comprises M sub-pixels, M is an integer and is more than or equal to 2; a plurality of data lines and a plurality of scan lines; at least two sub-pixels of the same pixel unit are electrically connected to the same data line; in the same pixel unit, the sub-pixels electrically connected to the same data line are electrically connected to different scan lines. Compared with the prior art, the display panel provided by the embodiment of the invention can reduce the number of data lines, thereby being beneficial to reducing wiring and further being beneficial to realizing the narrow frame design of the display panel and the display device.
Description
Technical Field
The invention relates to the technical field of display, in particular to a display panel and a display device.
Background
With the development of display technology, to improve user experience, high screen ratio is becoming an important development direction of display devices. Screen aspect ratio is understood to be the proportion of the visible area of a display device to the total area of the plane in which it is located. In order to increase the screen occupation ratio, the area occupied by the frame area of the display device needs to be reduced, so that the area occupied by the non-display area is reduced.
However, the conventional display panel has a large number of wirings, which results in a large area of the non-display region, and is not favorable for the narrow frame design of the display panel and the display device.
Disclosure of Invention
The invention provides a display panel and a display device, which are used for reducing the number of data lines, thereby being beneficial to reducing wiring and further being beneficial to realizing the narrow frame design of the display panel and the display device.
In a first aspect, an embodiment of the present invention provides a display panel, including:
the pixel units are arranged in an array mode, each pixel unit comprises M sub-pixels, M is an integer and is more than or equal to 2;
a plurality of data lines and a plurality of scan lines;
at least two sub-pixels of the same pixel unit are electrically connected to the same data line; in the same pixel unit, the sub-pixels electrically connected to the same data line are electrically connected to different scan lines.
In a second aspect, embodiments of the present invention further provide a display device, where the display device includes any one of the display panels provided in the first aspect.
The display panel provided by the embodiment of the invention comprises a plurality of pixel units arranged in an array, wherein each pixel unit comprises M sub-pixels, M is an integer and is more than or equal to 2; a plurality of data lines and a plurality of scan lines; at least two sub-pixels of the same pixel unit are electrically connected to the same data line; in the same pixel unit, the sub-pixels electrically connected to the same data line are electrically connected to different scanning lines, so that the number of data lines electrically connected to the sub-pixels in the same pixel unit can be reduced, and therefore, the reduction of wiring in the display panel is facilitated, and the realization of the narrow frame design of the display panel is facilitated.
Drawings
Fig. 1 is a schematic structural diagram of a display panel provided in the prior art;
fig. 2 is a schematic structural diagram of a display panel according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 7 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 8 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 9 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 10 is a schematic structural diagram of a display device according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
Fig. 1 is a schematic structural diagram of a display panel provided in the prior art. Referring to fig. 1, the display panel 00 includes: a display area 00A and a non-display area 00N surrounding the display area 00A, wherein a plurality of pixel units 001 arranged in an array are arranged in the display area 00A, and each pixel unit 001 includes 3 sub-pixels 001P; also comprises a plurality of sweep lines 002 and a plurality of data lines 003; each sub-pixel 001P in the same pixel unit 001 is electrically connected to one data line 003. This results in more wiring in the non-display area 00N of the display panel 00, and exemplarily, more wiring in the fan-out area (Fanout), so that the more wiring needs a larger lower step space to be arranged, thereby resulting in a larger area occupied by the non-display area 00N in the entire display panel 00, which is not favorable for the narrow frame design of the display panel 00.
In view of the foregoing problems, embodiments of the present invention provide a display panel, in which at least two sub-pixels in a same pixel unit are electrically connected to a same data line, so that the number of data lines electrically connected to the sub-pixels in the same pixel unit is smaller than the number of sub-pixels in the pixel unit, thereby reducing the number of data lines, reducing the number of display panel wires, and facilitating the implementation of a narrow frame design of the display panel.
Exemplarily, fig. 2 is a schematic structural diagram of a display panel according to an embodiment of the present invention. Referring to fig. 2, the display panel 10 includes: a plurality of pixel units 101 arranged in an array, each pixel unit 101 including M (for example, M is 3 in fig. 2) sub-pixels 101P, where M is an integer and M ≧ 2; a plurality of data lines 103 and a plurality of scan lines 102; at least two sub-pixels 101P of the same pixel unit 101 are electrically connected to the same data line 103; in the same pixel unit 101, the sub-pixels 101P electrically connected to the same data line 103 are electrically connected to different scan lines 102.
Among them, the display panel 10 may include a display area 10A and a non-display area 10N surrounding the display area 10A. The display area 10A is used for arranging the pixel units 101 to display the to-be-displayed picture by emitting light through the pixel units 101; the non-display region 10N is used for wiring and routing a driving circuit 106, wherein the driving circuit 106 is used for providing driving signals (which may include, for example, a switch control signal and a data signal) to the pixel unit 101 through signal lines (which may include, for example, a scanning line 102 and a data line 103) electrically connected to the pixel unit 101 so as to make the pixel unit 101 emit light. The non-display region 101N may include a lower step region 105, and the driving circuit 106 is disposed in the lower step region 105.
For example, the display panel 10 may be a liquid crystal display panel or a light emitting diode display panel or other types of display panels known to those skilled in the art, and the embodiment of the invention is not limited thereto.
Each pixel unit 101 includes M sub-pixels 101P, and each sub-pixel can correspondingly display light of different colors, so that the display panel 10 can realize color display.
Illustratively, M may be 3, that is, each pixel unit 101 includes three sub-pixels 101P, and the display colors of the three sub-pixels may be different from each other, and illustratively, the display colors thereof are red, green and blue, respectively, so that a color picture and a white picture can be normally displayed by using the display colors of the three sub-pixels.
Illustratively, the value of M may be 4, that is, each pixel unit 101 includes four sub-pixels 101P, and the display colors of the four sub-pixels may be different from each other, and illustratively, the display colors may be red, green, blue, and white, respectively, so that a color picture and a white picture can be normally displayed by using the display colors of the four sub-pixels, and the brightness of the display picture is high. Of course, the display colors of the four word pixels may be the same, and for example, two blue colors, one red color and one green color, so that a color picture and a white picture can be displayed by using the four word pixels, and when the blue component in the picture is large, the display mode of the display panel can be adjusted to the eye protection mode.
It should be noted that the value of M is 3 or 4, and the display color of each sub-pixel is only an exemplary illustration of the display panel 10 according to the embodiment of the present invention, but the display panel 10 according to the embodiment of the present invention is not limited thereto. In other embodiments, the number of the sub-pixels 101P in the pixel unit 101 (i.e. the value of M) and the display color of the sub-pixels 101P may be set according to actual requirements of the display panel 10, which is not limited in the embodiment of the present invention.
The scan line 102 may be used to provide a switch control line or a control signal for the sub-pixel 101P in the pixel unit 101, so as to determine whether the sub-pixel 101P electrically connected thereto displays a color; the data line 103 is used for providing a data signal to the sub-pixel 101P in the pixel unit 101 to determine the gray level (i.e. the brightness level) of the sub-pixel 101P electrically connected thereto.
By electrically connecting at least two sub-pixels 101P in the same pixel unit 101 to the same data line 103, the number of data lines 103 electrically connected to the sub-pixels 101P in the same pixel unit 101 can be smaller than the number of sub-pixels 101P in the pixel unit 101, so that the number of data lines in the entire display panel 10 can be reduced, which is beneficial to reducing the wiring in the display panel 10, and thus the space required by the wiring in the display panel 10 (i.e., the area occupied in the non-display region 10N) can be reduced, which is beneficial to reducing the frame of the display panel 10, i.e., realizing the narrow frame design of the display panel 10.
Meanwhile, in the pixel unit 101, the sub-pixels 101P electrically connected to the same data line 103 are electrically connected to different scan lines 102, so that the different scan lines 102 can be used to provide switch control signals to the sub-pixels 101P connected to the same data line 103 in a time-sharing manner, so as to realize the sequential brightness of the sub-pixels 101P, thereby realizing the normal display of the display panel 10.
Illustratively, in the display panel 10 shown in fig. 2, each pixel unit 101 includes three sub-pixels 101P, and the three sub-pixels 101P in the same pixel unit 101 are all electrically connected to the same data line 103. Therefore, compared with the display panel of the prior art shown in fig. 1, the display panel provided in the embodiment of the present application can reduce the number of the data lines 103 from three to one, and thus can reduce the number of the wirings electrically connected to the data lines 103 in the non-display region to 1/3 in the prior art, so as to reduce the area of the non-display region 10N corresponding to the part of the wirings, and can also be understood as reducing the area of the non-display region 10N corresponding to the lower step, so as to make the lower frame of the display panel 10 narrower, which is beneficial to realizing the narrow frame design of the display panel 10.
It should be noted that fig. 2 only exemplarily shows that the three sub-pixels 101P in the same pixel unit 101 are all electrically connected to the same data line 103, but the present invention is not limited to the display panel 10 provided in the embodiment of the present invention. In other embodiments, the M sub-pixels 101P in the same pixel unit 101 may be electrically connected to different data lines 103 in groups according to actual requirements of the display panel 10, which is not limited in the embodiment of the present invention.
Next, it should be noted that fig. 2 only exemplarily shows that the display panel 10 includes 3 columns and 4 rows of pixel units 101, but does not limit the display panel 10 provided in the embodiment of the present invention. In other embodiments, the number of the pixel units 101 in the display panel 10 and the array arrangement of the pixel units 101 may be set according to actual requirements of the display panel 10, which is not limited in the embodiments of the present invention.
Optionally, with reference to fig. 2, the M sub-pixels 101P in the same pixel unit 101 are sequentially arranged along the first direction Y; the data lines 103 extend in a first direction Y, and are arranged in a second direction X, the first direction Y intersecting the second direction X; the scanning lines 102 and the data lines 103 are arranged in a crossed manner to define sub-pixel regions 101PT, and each sub-pixel region 101PT is provided with a sub-pixel 101P; m (exemplarily, M takes a value of 3 in fig. 2) scan lines 102 are disposed corresponding to one pixel unit 101, and M sub-pixels 101P are electrically connected to the M scan lines 102 in a one-to-one correspondence.
The parallel arrangement direction (i.e., the first direction Y) of the sub-pixels 101P is the same as the extending direction of the data line 103, so that the sub-pixels 101P located on one side of the data line 103 can be electrically connected to the data line 103, and the layout of the display panel 10 is simple, and the design difficulty and the manufacturing difficulty are low.
For example, fig. 2 shows that three sub-pixels 101P in the same pixel unit 101 are all electrically connected to the same data line 103, three scan lines 102 are disposed corresponding to the pixel unit 101, and the three sub-pixels 101P in the same pixel unit 101 are electrically connected to the three scan lines 102 in a one-to-one correspondence. Therefore, the layout corresponding to the display panel 10 is simple, and the design difficulty and the manufacturing difficulty of the display panel 10 are low.
It should be noted that, on the basis of fig. 2, in other embodiments, two sub-pixels 101P (which may be referred to as a first sub-pixel and a second sub-pixel) of three sub-pixels 101P of the same pixel unit 101 may be electrically connected to the same data line 103 (which may be referred to as a first data line), and another sub-pixel 101P (which may be referred to as a third sub-pixel) may be electrically connected to another data line (which may be referred to as a second data line); at this time, the first sub-pixel and the second sub-pixel are electrically connected to two different scan lines 102 (may be referred to as a first scan line and a second scan line), respectively, and the third sub-pixel may be electrically connected to the other scan line (may be referred to as a third scan line) or one of the first scan line and the second scan line.
Of course, based on the inventive concept presented in this application, the electrical connection manner between the sub-pixel 101P and the data line 103 and the scan line 102 in the same pixel unit 101 may also be set according to the actual requirement of the display panel 10, which is not limited in this embodiment of the invention.
Optionally, fig. 3 is a schematic structural diagram of another display panel provided in the embodiment of the present invention. With reference to fig. 2 and 3, the pixel unit 101 further includes M (for example, M in fig. 2 and 3 takes a value of 3) switching sub-units 107, where the switching sub-unit 107 includes a control terminal 107G, an input terminal 107S, and an output terminal 107D; the input ends 107S of M switch subunits 107 in the same pixel unit 101 are respectively electrically connected with the same data line 103, the output end 107D of each switch subunit 107 is respectively electrically connected with one subpixel 101P, and the control end 107G of the switch subunit 107 is electrically connected with one scan line 102 which is arranged next to the subpixel 101P electrically connected with the switch subunit 107; in the two sub-pixels 101P adjacently disposed in the first direction Y, the structures of the two switching sub-units 107 are symmetrical with respect to the second direction X.
With such an arrangement, the data line 103 can be prevented from being distorted, so that the design difficulty and the manufacturing process difficulty of the data line 103 can be reduced. In addition, in the application process of the display panel 10, the loss of the data line 103 is small, so that the performance attenuation of the data line 103 can be reduced, the service life of the data line 103 can be prolonged, the long-term stability of the display panel 10 can be improved, and the service life of the display panel 10 can be prolonged.
For example, the switching sub-unit 107 may be a thin film transistor, and in this case, the control terminal 107G, the input terminal 107S, and the output terminal 107D of the switching sub-unit 107 may respectively correspond to a gate, a source, and a drain of the thin film transistor.
It should be noted that fig. 3 only exemplarily shows the related structure of one pixel unit 101, and the structure of each pixel unit 101 may be arranged according to this structure in the whole display panel 10, or the whole display panel 10 may include the structures of a plurality of different pixel units 101 shown in the embodiments of the present invention, and the embodiments of the present invention are not limited thereto.
In addition, it should be noted that fig. 3 only illustrates the structure of the switch subunit 107 by using one thin film transistor for example, but the structure is not limited to the display panel 10 provided in the embodiment of the present invention. In other embodiments, the switch subunit 107 can be any type of pixel driving circuit (for example, one or more thin film transistors can be included, and one or more storage capacitors can be included) known to those skilled in the art according to the actual requirements of the display panel 10, and the embodiment of the invention is not limited thereto.
Optionally, fig. 4 is a schematic structural diagram of another display panel provided in an embodiment of the present invention. Referring to fig. 4, M (for example, M in fig. 4 takes a value of 3) sub-pixels 101P in the same pixel unit 101 are sequentially arranged along the second direction X; each data line 103 includes a main line portion 1031 and a sub line portion 1032, and the sub pixel 101P is electrically connected to the sub line portion 1032; the main line part 1031 is arranged to intersect the scanning line 102, and defines pixel unit regions 101T, and each pixel unit region 101T is provided with one pixel unit 101; m scanning lines 102 are provided corresponding to one pixel unit 101, and the M scanning lines 102 are provided between two pixel units 101 adjacent in the first direction Y; wherein the first direction Y intersects the second direction X.
With this arrangement, the arrangement of the sub-pixels 101P in the pixel unit 101 is not changed, but only the wiring manner of the scan lines 102 and the data lines 103 is changed based on the structure of the display panel 10 shown in fig. 1, so as to reduce the number of the data lines 103.
It should be noted that fig. 4 only exemplarily shows that the sub-pixels 101P in the same pixel unit 101 are all electrically connected to the same data line 103, but the present invention is not limited to the display panel 10 provided in the embodiment of the present invention. In other embodiments, the number of the sub-pixels 101P electrically connected to the same data line 103 in the same pixel unit 101 may also be set according to actual requirements of the display panel 10, which is not limited in the embodiment of the present invention.
Optionally, the display panel 10 is a light emitting diode display panel or a liquid crystal display panel.
So configured, the inventive concept of the present application can be applied to different types of display panels 10.
For example, if the display panel 10 is a light emitting diode display panel, each sub-pixel 101P in the pixel unit 101 of the display panel 10 may include a cathode and an anode that are oppositely disposed, and a light emitting layer located between the cathode and the anode; when the switch subunit 107 (i.e. the pixel driving circuit) controls a set voltage difference between the cathode and the anode (or can be understood as a set current flowing between the cathode and the anode), the light emitting layer emits light of a preset color and a preset intensity, and thus, the led display panel can display a to-be-displayed image by coordinating the light emitted by each pixel unit on the entire array substrate. If the display panel 10 is a liquid crystal display panel, the liquid crystal display panel may include an array substrate and a color film substrate (which also includes a pixel electrode and a common electrode, where the pixel electrode is disposed on the array substrate side, and the common electrode may be disposed on the array substrate side, or may be disposed on the color film substrate side, which is not limited in this embodiment of the present invention), which are disposed opposite to each other, and a liquid crystal layer located between the array substrate and the color film substrate, where the liquid crystal layer may rotate under the driving of a voltage difference between the pixel electrode and the common electrode, so as to allow light of a preset intensity to pass through a filter film of the preset color, so that light of the preset color and the preset intensity may be displayed at corresponding positions of the pixel units, and thus, the liquid crystal display panel may display a picture to be displayed by coordinating light emitted from each pixel unit on the entire liquid crystal display panel.
It should be noted that the inventive concept of the present application can also be applied to other types of display panels known to those skilled in the art, and the present invention is not limited thereto.
Alternatively, if the display panel 10 is a liquid crystal display panel, the liquid crystal molecules in the liquid crystal display panel may be arranged in a single domain orientation manner or in a pseudo-double domain orientation manner.
By the arrangement, the design flexibility of the liquid crystal display panel can be improved; it is also understood that the inventive concept of the present application can be applied to liquid crystal display panels of different display modes.
Fig. 5 is a schematic structural diagram of another display panel according to an embodiment of the present invention, showing an arrangement manner of liquid crystal molecules with a single domain orientation. Fig. 6 is a schematic structural diagram of another display panel according to an embodiment of the present invention, showing an arrangement manner of liquid crystal molecules adopting a pseudo-dual domain orientation. Referring to fig. 5 and 6, in the liquid crystal display panel, the shapes of the sub-pixels 101P in fig. 5 can be arranged in the same manner, and when the display panel is designed, only one sub-pixel 101P needs to be designed, and then the sub-pixels 101P are arranged according to a required array to obtain a design drawing of the display panel; in fig. 6, two sub-pixels 101P adjacent to each other along the second direction X are axially symmetrically distributed along the first direction Y, when the display panel is designed, one sub-pixel 101P may be designed first, then the sub-pixel 101P is turned over along the first direction Y to obtain a symmetric sub-pixel, the sub-pixel and the symmetric sub-pixel form a sub-pixel pair, and then the sub-pixel pair is arranged according to a required array to obtain a design drawing of the display panel.
It should be noted that fig. 5 and fig. 6 only exemplarily show the sub-pixels 101P in 2 rows and 4 columns, which is only a partial structure of the display panel 10 and does not constitute a limitation on the display panel 10 provided in the embodiment of the present invention. In other embodiments, the number and the array arrangement of the sub-pixels 101P may be set according to the actual requirements of the display panel 10, which is not limited in the embodiment of the present invention.
Alternatively, with continued reference to any of fig. 2-6, each pixel cell 101 includes three subpixels 101P.
Illustratively, the display colors of the three sub-pixels 101P are red, green, and blue, respectively.
This arrangement is advantageous for displaying a color picture and displaying a white picture by the display panel 10.
It should be noted that the number and color of the sub-pixels 101P in the pixel unit 101 may also be set according to the actual display requirement of the display panel 10, which is not limited in the embodiment of the present invention.
Optionally, fig. 7 is a schematic structural diagram of another display panel according to an embodiment of the present invention. Referring to fig. 7, the display panel 10 may further include a plurality of touch traces 104; the touch routing lines 104 and the data lines 103 extend along a first direction Y and are arranged along a second direction X, and the first direction Y is crossed with the second direction X; along the second direction X, one touch trace 104 is disposed every N pixel units 101, where N is a positive integer greater than or equal to 1.
The display panel can integrate a touch function by disposing the touch trace 104 and the touch electrode (described in detail below).
The extending directions and the arrangement directions of the touch traces 104 and the data lines 103 are respectively the same, which is beneficial to simplifying the layout design of the display panel 10 and reducing the overall manufacturing process difficulty of the display panel 10.
Exemplarily, fig. 7 shows that one touch trace 104 is disposed at intervals of 2 pixel units 101 along the second direction X, and thus, the number of touch traces 104 can be reduced, which is beneficial to reducing the wiring and further beneficial to implementing the narrow frame design of the display panel 10.
It should be noted that the value of N may also be set according to the actual touch requirement of the display panel 10, for example, if the touch sensitivity and accuracy are required to be higher, the value of N may be smaller; if higher touch sensitivity is not required, i.e., the requirements on touch sensitivity and accuracy are lower, the value of N may be larger, which is not limited in the embodiments of the present invention.
Optionally, fig. 8 is a schematic structural diagram of another display panel according to an embodiment of the present invention. Referring to fig. 8, in the display panel 10, one touch trace 104 is disposed every other one pixel unit 101 along the second direction X.
Thus, the display panel 101 has higher touch sensitivity and higher touch accuracy. In addition, the touch traces 104 are uniformly distributed in the whole display panel 10, and the electrical interference of the signals on the touch traces 104 to each pixel unit 101 is the same, so that the electrical performance uniformity of each pixel unit 101 in the whole display panel 10 is favorably high, and the display panel 10 is favorably ensured to have a better image display effect.
It should be noted that fig. 7 and fig. 8 only exemplarily show that the display panel 10 includes 3 columns and 4 rows of pixel units 101, which is only a partial structure of the display panel 10 and does not constitute a limitation on the display panel 10 provided in the embodiment of the present invention. In other embodiments, the number of the pixel units 101 in the display panel 10 and the array arrangement of the pixel units 101 may be set according to actual requirements of the display panel 10, which is not limited in the embodiments of the present invention.
Optionally, with continued reference to fig. 3, 5, or 6, the display panel 10 further includes a common electrode layer 101C; the touch trace 104 and the data line 103 are located on the same film layer, and the touch trace 104 is electrically connected with the common electrode layer 101C through the via hole 108; the vertical projection of the via hole 108 on the common electrode layer 101C does not overlap with the vertical projection of the sub-pixel 101P on the common electrode layer 101C; in a plane of the display panel 10, the M sub-pixels 101P in the same pixel unit 101 are arranged in parallel along a predetermined direction (for example, the first direction Y is taken as the predetermined direction in fig. 3, 5 and 6), and the via 108 is disposed between two adjacent rows of the sub-pixels 101P.
The touch trace 104 and the data line 103 are disposed on the same layer, and the touch trace 104 and the data line 103 can be formed by using the same material in the same process step. Therefore, on one hand, new materials and new equipment are not introduced, and meanwhile, the process steps for manufacturing the display panel 10 are not increased, so that the manufacturing process flow of the display panel 10 is simplified; on the other hand, while the touch function is integrated, the number of film layers of the display panel 10 is not increased, which is beneficial to realizing the light and thin design of the display panel 10.
The electrode blocks in the common electrode layer 101C can be reused as touch electrodes. In the display stage, the common electrode layer 101C is used as a common electrode for implementing the display function; in the touch stage, the common electrode layer 101C is used as a touch electrode for implementing a touch function. Like this, through with sharing time multiplex of common electrode layer 101C, be favorable to simplifying display panel 10's membranous layer structure, reduce the electrode quantity in display panel 10 to be favorable to reducing the line quantity of walking of being connected with the electrode electricity, and then be favorable to reducing the wiring in display panel 10, be favorable to realizing display panel 10's narrow frame design.
Illustratively, the first direction Y is a column direction, the second direction X is a row direction, the sub-pixels 101P are arranged along the column direction, and the via hole 108 is disposed between two adjacent columns of the sub-pixels 101P. Therefore, irregular arrangement of the sub-pixels 101P caused by the arrangement of the via holes 108 between the sub-pixels 101P in the same column can be avoided, and meanwhile, the via holes 108 and the sub-pixels 101P are located in different columns, so that the via holes do not occupy the area of the opening area of the pixel unit 101, thereby being beneficial to improving the opening area of the pixel unit 101 in the display panel 10.
It should be noted that, a vertical projection of the via hole 108 on the common electrode layer 101C and a vertical projection of the scan line 102 on the common electrode layer 101C may or may not overlap, and this is not limited in this embodiment of the present invention.
It should be noted that fig. 3, fig. 5, and fig. 6 only exemplarily show a gate layer (including a gate and a scan line), an active layer, a source-drain electrode layer (including a source, a drain, a data line, and a touch trace shown below), a pixel electrode layer (electrically connected to the drain, and also formed in the same layer as the source-drain electrode layer), and a common electrode layer, which are sequentially stacked on a substrate, and are only a partial film layer of a display panel, and do not limit the display panel provided in the embodiment of the present invention. In other embodiments, the film layer structure of the display panel and the stacking order of the film layers may be set according to the actual requirements of the display panel, which is not limited in this embodiment of the present invention.
Optionally, fig. 9 is a schematic structural diagram of another display panel according to an embodiment of the present invention. Referring to fig. 9, one via 108 is located between adjacent four pixel units 101, and the common electrodes 101C corresponding to the four pixel units 101 adjacent to the same via 108 are electrically connected through the via 108.
By such arrangement, the number of the via holes 108 can be reduced, so that the area occupied by the opening is reduced, and the opening area of the pixel unit 101 in the display panel 10 is increased; on the other hand, the coupling capacitance caused by the electrical connection structure in the via hole 108 can be reduced, so that the signal interference caused by the via hole 108 can be reduced, the image display effect of the display panel 10 can be improved, and the touch accuracy and the touch sensitivity of the display panel 10 can be improved.
On the basis of the foregoing embodiments, an embodiment of the present invention further provides a display device, and fig. 10 is a schematic structural diagram of the display device according to the embodiment of the present invention. Referring to fig. 10, the display device 30 includes the display panel 10 in the foregoing embodiment, and therefore the display device 30 provided in the embodiment of the present invention also has the beneficial effects described in the foregoing embodiment, which are not described again here. For example, the display device 30 may include a mobile phone, a computer, a smart wearable device, and other types of display devices known to those skilled in the art, which is not limited by the embodiments of the present invention.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious modifications, rearrangements, combinations and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims (9)
1. A display panel, comprising:
the pixel units are arranged in an array mode, each pixel unit comprises M sub-pixels, M is an integer and is more than or equal to 2;
a plurality of data lines and a plurality of scan lines;
at least two sub-pixels of the same pixel unit are electrically connected to the same data line; in the same pixel unit, the sub-pixels electrically connected to the same data line are electrically connected to different scanning lines;
the M sub-pixels in the same pixel unit are sequentially arranged along a first direction; the data lines extend along the first direction and are arranged along a second direction, and the first direction is crossed with the second direction; the scanning lines and the data lines are arranged in a crossed mode, sub-pixel regions are limited, and each sub-pixel region is provided with one sub-pixel; m scanning lines are arranged corresponding to one pixel unit, and the M sub-pixels are electrically connected with the M scanning lines in a one-to-one correspondence manner;
the pixel unit also comprises M switch subunits, and each switch subunit comprises a control end, an input end and an output end; the input ends of the M switch subunits in the same pixel unit are respectively and electrically connected with the same data line, the output end of each switch subunit is respectively and electrically connected with one sub-pixel, and the control end of each switch subunit is electrically connected with one scanning line which is arranged next to the sub-pixel electrically connected with the switch subunit; in two sub-pixels adjacently arranged along the first direction, the structures of two switch sub-units are symmetrical about the second direction;
the control end, the input end and the output end of the switch subunit respectively correspond to a grid electrode, a source electrode and a drain electrode, and the source electrode, the drain electrode and the data line are on the same layer;
in the layout design of the display panel, the source electrode of the switch subunit comprises a first polygonal part and a first straight line part which are communicated, the first polygonal part comprises a first side edge deviating from the first straight line part, the first straight line part comprises a second side edge deviating from the first polygonal part, and the length of the first side edge is greater than that of the second side edge in the second direction.
2. The display panel according to claim 1, wherein the display panel is a light emitting diode display panel or a liquid crystal display panel.
3. The display panel according to claim 2, wherein the liquid crystal molecules in the liquid crystal display panel are arranged in a single domain orientation manner or in a pseudo-double domain orientation manner.
4. The display panel of claim 1, wherein each of the pixel units comprises three sub-pixels.
5. The display panel of claim 1, further comprising a plurality of touch traces;
the touch routing lines and the data lines extend along a first direction and are arranged along a second direction, and the first direction is crossed with the second direction;
and arranging one touch wire at intervals of N pixel units along the second direction, wherein N is a positive integer greater than or equal to 1.
6. The display panel according to claim 5, wherein one touch trace is disposed every other one pixel unit along the second direction.
7. The display panel according to claim 5, further comprising a common electrode layer;
the touch wire and the data line are positioned on the same film layer, and the touch wire and the common electrode layer are electrically connected through a via hole;
the vertical projection of the via hole on the common electrode layer is not overlapped with the vertical projection of the sub-pixel on the common electrode layer;
in the plane of the display panel, the M sub-pixels in the same pixel unit are arranged in parallel along a preset direction, and the via holes are arranged between two adjacent rows of the sub-pixels.
8. The display panel according to claim 7, wherein one via hole is located between four adjacent pixel units, and common electrodes corresponding to the four pixel units adjacent to the same via hole are electrically connected through the via hole.
9. A display device characterized by comprising the display panel according to any one of claims 1 to 8.
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| TWI735304B (en) * | 2020-08-05 | 2021-08-01 | 友達光電股份有限公司 | Pixel array substrate |
| CN113012629A (en) * | 2020-12-08 | 2021-06-22 | 重庆康佳光电技术研究院有限公司 | Display panel and electronic device |
| EP4325471A4 (en) * | 2022-07-05 | 2024-08-28 | Jiangxi Mtc Visual Display Co Ltd | Led lamp panel structure |
| CN115100971A (en) * | 2022-07-05 | 2022-09-23 | 深圳市兆驰晶显技术有限公司 | LED arrangement structure |
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| CN102707526A (en) * | 2012-06-13 | 2012-10-03 | 深圳市华星光电技术有限公司 | Liquid crystal display panel |
| CN102914923A (en) * | 2012-08-27 | 2013-02-06 | 友达光电股份有限公司 | Display panel |
| CN104951143A (en) * | 2015-07-27 | 2015-09-30 | 京东方科技集团股份有限公司 | Array substrate, touch panel and display device |
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| JP5301895B2 (en) * | 2008-07-01 | 2013-09-25 | 株式会社ジャパンディスプレイ | Liquid crystal display |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102707526A (en) * | 2012-06-13 | 2012-10-03 | 深圳市华星光电技术有限公司 | Liquid crystal display panel |
| CN102914923A (en) * | 2012-08-27 | 2013-02-06 | 友达光电股份有限公司 | Display panel |
| CN104951143A (en) * | 2015-07-27 | 2015-09-30 | 京东方科技集团股份有限公司 | Array substrate, touch panel and display device |
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