CN114512498A - Display panel, display device and manufacturing method of display panel - Google Patents
Display panel, display device and manufacturing method of display panel Download PDFInfo
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 28
- 239000010409 thin film Substances 0.000 claims abstract description 65
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 46
- 239000000758 substrate Substances 0.000 claims abstract description 23
- 238000000034 method Methods 0.000 claims description 38
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 34
- 230000008569 process Effects 0.000 claims description 24
- 238000005224 laser annealing Methods 0.000 claims description 23
- 238000002425 crystallisation Methods 0.000 claims description 14
- 230000008025 crystallization Effects 0.000 claims description 14
- 230000007547 defect Effects 0.000 claims description 14
- 229920005591 polysilicon Polymers 0.000 description 20
- 238000010586 diagram Methods 0.000 description 11
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- 230000008878 coupling Effects 0.000 description 4
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- 238000005859 coupling reaction Methods 0.000 description 4
- 239000010408 film Substances 0.000 description 4
- 230000009286 beneficial effect Effects 0.000 description 2
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
- H01L27/1274—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor
- H01L27/1285—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor using control of the annealing or irradiation parameters, e.g. using different scanning direction or intensity for different transistors
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
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Abstract
The application discloses display panel, display device and display panel's manufacturing method relates to and shows technical field, includes: a substrate; a polycrystalline silicon thin film on the substrate, the polycrystalline silicon thin film including a plurality of first boundaries extending in a first direction; the sub-pixel regions are arranged in the display panel in an array manner, the width of each sub-pixel region along the second direction is D1, the distance of the adjacent first boundaries along the second direction is D2, and D1 x n1＝D2*n2Wherein n is1And n2Are all positive integers; the first direction intersects the second direction. The display panel quality can be effectively improved by limiting the relation between the width of the sub-pixel area and the width of the adjacent first boundary.
Description
Technical Field
The present disclosure relates to the field of display technologies, and in particular, to a display panel, a display device, and a method for manufacturing the display panel.
Background
A conventional display panel controls a Light Emitting unit such as an OLED (Organic Light-Emitting Diode) and an lcd (liquid Crystal display) using a switching element such as a Thin Film Transistor (TFT); however, the preparation of the thin film transistor element in the display panel generally forms a polycrystalline silicon thin film serving as a channel of the thin film transistor element on a substrate so that the thin film transistor element has an effect of switching control. At present, the mainstream technology for preparing the polysilicon thin film is Excimer Laser Annealing (ELA), which scans an amorphous silicon layer by using a Laser beam to crystallize the amorphous silicon layer to form the polysilicon thin film; however, when the excimer laser annealing technology is adopted, the polysilicon thin film has the characteristic of periodic crystallization change, and a plurality of boundaries are formed on the formed polysilicon thin film along the scanning direction of the laser beam.
In the related art, when manufacturing a thin film transistor, the luminance of a display panel is usually uneven, and thus there is a need to improve the process of manufacturing a polysilicon thin film to improve the uneven luminance of the display panel.
Disclosure of Invention
In view of the above, the present disclosure provides a display panel, a display device and a method for manufacturing the display panel, which can effectively improve the quality of the display panel by defining the relationship between the width of the sub-pixel region and the width of the adjacent first boundary.
In order to solve the technical problem, the application has the following technical scheme:
in a first aspect, the present application provides a display panel comprising:
a substrate;
a polycrystalline silicon thin film on the substrate, the polycrystalline silicon thin film including a plurality of first boundaries extending in a first direction;
a sub-pixel region arranged in the display panel, wherein the sub-pixel region has a width D1 along the second direction, and a distance D2, D1 × n1＝D2*n2Wherein n is1And n2Are all positive integers; the first direction intersects the second direction.
In a second aspect, the present application further provides a display device, including a display panel, where the display panel is the display panel provided in the present application.
In a third aspect, the present application further provides a method for manufacturing a display panel, including:
manufacturing an amorphous silicon layer on a substrate;
forming a polycrystalline silicon thin film on the amorphous silicon layer by adopting a multi-time excimer laser annealing process, wherein the polycrystalline silicon thin film comprises a plurality of first boundaries extending along a first direction; making multiple sub-pixel regions arranged in the displayIn the display panel, the width of the sub-pixel region along the second direction is D1, the distance between adjacent first boundaries along the second direction is D2, and D1 × n1＝D2*n2Wherein n is1And n2Are all positive integers.
Compared with the prior art, the display panel, the display device and the manufacturing method of the display panel provided by the invention at least realize the following beneficial effects:
according to the display panel, the display device and the manufacturing method of the display panel, the uneven brightness of the display panel is improved by limiting the step size of the laser beam, namely, the size of the adjacent first boundary; in this embodiment, the display panel further includes sub-pixel regions arranged in an array, a width of the sub-pixel region along the second direction is D1, a size of the adjacent first boundary along the second direction is D2, D1 × n1＝D2*n2(ii) a In this way, the integral multiple of the size of the sub-pixel area along the second direction is equal to the integral multiple of the size of the first boundary along the second direction, so that the defect of periodic uneven intervals of the first boundary caused by uneven energy of the excimer laser beams can be overcome, and the phenomenon of uneven brightness of the display panel can be further improved.
Drawings
The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the application and together with the description serve to explain the application and not to limit the application. In the drawings:
fig. 1 is a schematic top view of a display panel according to an embodiment of the present disclosure;
fig. 2 is a schematic top view of a display panel according to an embodiment of the present disclosure;
fig. 3 is a schematic structural diagram of a display panel according to an embodiment of the present disclosure;
fig. 4 is a schematic partial structure diagram of a display panel according to an embodiment of the present disclosure;
fig. 5 is a schematic partial structure diagram of a display panel according to an embodiment of the present disclosure;
fig. 6 is a top view of a display device according to an embodiment of the invention;
fig. 7 is a flowchart illustrating a method for manufacturing a display panel according to an embodiment of the invention;
FIG. 8 is a flow chart of a method for fabricating a polysilicon thin film according to an embodiment of the present invention;
FIG. 9 is a flow chart illustrating a method for fabricating a polysilicon thin film according to an embodiment of the present invention;
fig. 10 is a schematic diagram illustrating the formation of a first boundary according to an embodiment of the present invention.
Detailed Description
As used in the specification and in the claims, certain terms are used to refer to particular components. As one skilled in the art will appreciate, manufacturers may refer to a component by different names. The description and claims do not intend to distinguish between components that differ in name but not function. In the following description and in the claims, the terms "include" and "comprise" are used in an open-ended fashion, and thus should be interpreted to mean "include, but not limited to. "substantially" means within an acceptable error range, within which a person skilled in the art can solve the technical problem to substantially achieve the technical result. Furthermore, the term "coupled" is intended to encompass any direct or indirect electrical coupling. Thus, if a first device couples to a second device, that connection may be through a direct electrical coupling or through an indirect electrical coupling via other devices and couplings. The description which follows is a preferred embodiment of the present application, but is made for the purpose of illustrating the general principles of the application and not for the purpose of limiting the scope of the application. The protection scope of the present application shall be subject to the definitions of the appended claims. The same parts between the embodiments are not described in detail.
The following detailed description is to be read in connection with the drawings and the detailed description.
Fig. 1 is a schematic top view structure diagram of a display panel provided in an embodiment of the present application, and fig. 2 is a schematic top view structure diagram of another display panel provided in the embodiment of the present application, please refer to fig. 1 and fig. 2, in which a display panel 100 provided in the present application includes:
a substrate 10;
a polycrystalline silicon thin film 20 on the substrate 10, the polycrystalline silicon thin film 20 including a plurality of first boundaries 21 extending in a first direction S1;
the sub-pixel regions 30 are arranged in the display panel 100 in an array, the width of each sub-pixel region 30 along the second direction S2 is D1, the distance between adjacent first boundaries 21 along the second direction S2 is D2, D1 × n1 is D2 × n2, wherein n1 and n2 are both positive integers; the first direction S1 intersects the second direction S2.
Specifically, as shown in fig. 1 and fig. 2, in the display panel 100 of the present embodiment, the polysilicon thin film 20 is formed on the substrate 10 by using an excimer laser annealing technology, and the substrate 10 may be a glass substrate 10 or a flexible substrate 10; because the excimer laser beam of the excimer laser annealing technology has a certain shape, the excimer laser beam can only act on partial regions of the amorphous silicon layer when the excimer laser annealing technology is executed each time, and the excimer laser beam of the excimer laser annealing technology is rectangular, the width (the size along the second direction S2) of the excimer laser beam is far larger than the length (the size along the first direction S1) of the excimer laser beam; wherein the polycrystalline silicon thin film 20 is formed on the amorphous silicon layer by an excimer laser annealing process, in the actual laser beam scanning process, the amorphous silicon layer is divided into a plurality of regions 22, the laser beam scans the first region to form a first crystalline region 23, the laser beam is stepped in the second direction S2, forming a second crystalline region 24 in the second area, and sequentially forming a plurality of crystalline regions, each step of the laser beam having the same size, optionally, each crystalline region extending in the first direction S1, which is the same as the length of the excimer laser beam extending in the first direction S1 within an error tolerance, the size of each of the crystal regions in the second direction S2 is the same as the size of the excimer laser beam in the second direction S2 within an error tolerance, and thus, a plurality of crystallization regions are formed on the entire amorphous silicon layer on the substrate 10, and the plurality of crystallization regions constitute the polycrystalline silicon thin film 20.
Further, when the excimer laser beam scans the amorphous silicon layer, since the energy at the edge of the excimer laser beam is smaller than the threshold energy, when the polysilicon thin film 20 is formed by scanning the amorphous silicon layer, a boundary, i.e. a first boundary 21, indicating a crystallization defect area is formed at a portion where the energy of the excimer laser beam is smaller than the threshold energy, and meanwhile, the phenomenon of uneven brightness of the display panel occurs due to the periodic unevenness of the crystallization defect area, which affects the quality of the display panel.
In view of this, the present embodiment improves the uneven brightness of the display panel by defining the step size of the laser beam, i.e. by defining the size of the adjacent first boundary 21; in the embodiment, the display panel further includes sub-pixel regions 30 arranged in an array, a width of the sub-pixel region 30 along the second direction S2 is D1, and a size of the adjacent first boundary 21 along the second direction S2 is D2, D1 × n1＝D2*n2(ii) a Optionally, D2 refers to the distance between the center points of adjacent first boundaries 21; wherein the first direction S1 intersects the second direction S2, optionally the first direction S1 is perpendicular to the second direction S2; in this way, the integral multiple of the size of the sub-pixel region 30 along the second direction S2 is equal to the integral multiple of the size of the first boundary 21 along the second direction S2, so that the defect of periodic unevenness of the intervals of the first boundary 21 caused by energy unevenness of the excimer laser beam can be overcome, and the phenomenon of uneven brightness of the display panel can be further improved.
It should be noted that the embodiment shown in fig. 1 only schematically shows the position relationship between the polysilicon thin film 20 and the first boundary 21, and does not represent the actual size, wherein the size of the first boundary 21 does not represent the actual size; the embodiment shown in fig. 2 only schematically shows a schematic positional relationship diagram of 4 first boundaries 21 provided with 2 sub-pixel regions 30, and does not represent actual dimensions.
Fig. 3 is another schematic structural diagram of a display panel provided in an embodiment of the present application, please refer to fig. 3 in combination with fig. 2, in an alternative embodiment of the present application, n1＝2，n2＝3。
It should be noted that the embodiment shown in fig. 2 only schematically shows a schematic diagram of a position relationship between the first boundary 21 and the edge of the sub-pixel area 30, and does not represent an actual manufacturing situation; the embodiment shown in fig. 3 only schematically shows a position relationship diagram where the first boundary 21 and the edge of the sub-pixel region 30 are not overlapped, and does not represent an actual manufacturing situation.
Specifically, please refer to fig. 3 in combination with fig. 2, wherein n is the same as n in the present embodiment1＝2，n23, it is understood that D1 × 2 — D2 × 3, i.e., the size of the 2 sub-pixel regions 30 along the second direction S2 is exactly the same as the 3 laser beam scanning steps, so that the crystallization defects formed during the laser beam scanning process are uniform, thereby making it difficult for the human eye to recognize, and further selecting the optimal laser beam scanning step.
In the present embodiment, D1 is greater than 20 μm, D2 is less than 30 μm, and the scanning pitch of the laser beam in a small size range is limited, so that the crystallization defects can be more uniform, and the uneven brightness of the display panel can be more effectively improved.
Fig. 4 is a schematic partial structure view of another display panel provided in an embodiment of the present application, please refer to fig. 4, in an alternative embodiment of the present application, further including:
a plurality of data lines D extending in a first direction S1 and arranged in a second direction S2;
a plurality of gate lines S extending in the second direction S2, arranged in the first direction S1, crossing the data lines D to define sub-pixel regions 30, the width of the sub-pixel regions 30 in the second direction S2 being the distance between the adjacent data lines D.
It should be noted that the embodiment shown in fig. 4 only schematically illustrates that the distance between the adjacent data lines D along the second direction S2 is the size of the sub-pixel area 30 along the second direction S2, and does not represent an actual size.
Specifically, as shown in fig. 4, the display panel in this embodiment further includes a plurality of data lines D and a plurality of gate lines S, and optionally, the data lines D extend along a first direction S1 and are arranged along a second direction S2, and the gate lines S extend along a second direction S2 and are arranged along a first direction S1; it can also be understood that the data lines D are arranged to cross the gate lines S in an insulating manner and define a plurality of regions, i.e., the sub-pixel regions 30 having a size in the first direction S1 greater than a size in the second direction S2; it is understood that one sub-pixel is correspondingly disposed in the sub-pixel region 30, and the sub-pixel may be one of a red sub-pixel, a green sub-pixel, or a blue sub-pixel; each sub-pixel area 30 is also correspondingly provided with a thin film transistor, and the thin film transistor is used for controlling the corresponding sub-pixel to be lightened, so that the lightening of the display panel is further realized; in this embodiment, the width of the sub-pixel region 30 along the second direction S2 is the distance between the adjacent data lines D, that is, the brightness unevenness of the display panel can be improved by limiting the size of the sub-pixel region 30 along the second direction S2 and the size of the adjacent first boundary 21 along the second direction S2, so as to improve the quality of the display panel.
With continuing reference to fig. 2-4, in an alternative embodiment of the present application, the method further includes:
and the pixel driving circuit is used for driving the sub-pixels and comprises a thin film transistor, and the polycrystalline silicon thin film 20 forms a channel 40 of the thin film transistor.
It should be noted that, in the embodiments shown in fig. 2 to fig. 4, the positional relationship of the channel in the sub-pixel region 30 is only schematically shown, and does not represent the actual size;
specifically, as shown in fig. 2 to fig. 4, the display panel 100 of the present embodiment further includes a pixel driving circuit, the pixel driving circuit is used for driving sub-pixels, and the sub-pixels are located in the sub-pixel region 30; alternatively, the pixel driving circuit includes a thin film transistor, which is located in the sub-pixel region 30; the thin film transistor in the embodiment further comprises a source drain layer and a grid layer, wherein the source drain is arranged oppositely and located on the same layer, an insulating layer is arranged between the source drain layer and the grid layer, an active layer is arranged between the source drain layer and the grid layer, orthographic projections of the source drain on the light-emitting surface of the display panel are overlapped with orthographic projections of the active layer on the light-emitting surface of the display panel respectively, the polycrystalline silicon thin film 20 formed in the embodiment is a channel of the active layer, after voltage is applied to the grid layer, an electric field is formed between the grid and the active layer, current carriers in the active layer start to move under the action of the electric field to generate current, and when the channel reaches saturated current, the thin film transistor is started, so that conduction between the source drain is realized.
Optionally, the channel in this embodiment may be a "zigzag channel," a "W" channel, or an "N" channel, and this application is not limited in any way, and is determined according to the actual situation.
It should be noted that, in the embodiment shown in fig. 2, the first boundary 21 overlaps with the edge of the sub-pixel region 30, wherein the overlapping region of the first boundary 21 and the channel may display a first luminance, the non-overlapping region of the first boundary 21 and the channel may display a second luminance, and the first luminance is less than the second luminance, that is, a periodic variation of the second luminance, the first luminance and the first luminance may be present in the display panel, and the periodic variation of the luminance is uniform, so that the phenomenon of uneven luminance of the display panel is improved; in the embodiment shown in fig. 3, the first boundary 21 does not overlap with the edge of the sub-pixel area 30, i.e. the display panel exhibits the second luminance-the first luminance, and the luminance period also varies uniformly, which can also improve the uneven luminance of the display panel.
Please refer to fig. 1, in an alternative embodiment of the present application, further including: a light emitting element; the light emitting element is electrically connected to the pixel driving circuit.
Specifically, the display panel 100 in the present embodiment further includes a light emitting element (not shown in the figure), optionally, the light emitting element is an OLED light emitting element; the display panel further comprises an array substrate, the thin film transistor in the embodiment is located on the array substrate, the light-emitting element is located on one side of the array substrate, which is close to the light-emitting surface of the display panel, and the pixel driving circuit can control the light-emitting element to be turned on.
Fig. 5 is a schematic view of another partial structure of a display panel provided in an embodiment of the present application, please refer to fig. 5, which in an alternative embodiment of the present application, further includes:
the plurality of first power signal lines PVDD extend in the first direction S1 and are arranged in the second direction S2, and a width of the sub-pixel in the second direction S2 is a distance between adjacent first power signal lines PVDD.
It should be noted that the embodiment shown in fig. 5 only schematically shows the relationship between the size of the adjacent first power signal lines PVDD along the second direction S2 and the size of the sub-pixel area 30 along the second direction S2, and does not represent the actual size.
Specifically, as shown in fig. 5, the display panel 100 of the present embodiment further includes a plurality of first power signal lines PVDD, wherein the first power signal lines PVDD extend along a first direction S1 and are arranged along a second direction S2; alternatively, the first power supply signal line PVDD is a PVDD power supply signal line; in this embodiment, the width of the sub-pixel region along the second direction S2 is the distance between the adjacent first power signal lines PVDD; it can be understood that, the distance between the center lines of the adjacent first power lines is D2, and the uneven brightness of the display panel can be improved by limiting the dimension of the adjacent first power signal lines PVDD along the second direction S2 and the dimension of the adjacent first boundary 21 along the second direction S2, thereby improving the quality of the display panel.
With continued reference to fig. 1, in an alternative embodiment of the present application, the first boundary 21 is a crystallized defect region formed by an excimer laser annealing process.
Specifically, referring to fig. 1, in the present embodiment, the first boundary 21 is a crystallized defect region formed by an excimer laser annealing process, wherein the first boundary 21 is in a stripe shape, and when the first boundary 21 overlaps with the channel, two stripe shapes are represented when the display panel displays; by adjusting the period variation of the first boundary 21, the uneven brightness of the display panel is improved, and the quality of the display panel is improved.
Based on the same inventive concept, the present invention further provides a display device 200, fig. 6 is a top view of the display device according to the embodiment of the present invention, please refer to fig. 6, the display device 200 includes a display panel 100, wherein the display panel 100 is the display panel 100 according to the embodiment of the present invention.
Please refer to fig. 6, wherein an embodiment of the display device 200 provided in the present application can refer to the embodiment of the display panel 100, and repeated portions are not repeated. The display device provided by the application can be embodied as: any product or component with practical functions such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator and the like.
Based on the same inventive concept, the present invention further provides a manufacturing method of a display panel, and fig. 7 is a flowchart of the manufacturing method of the display panel provided in the embodiment of the present invention, where the manufacturing method is used to manufacture the display panel provided in the embodiment of the present invention, and the method includes:
s101, manufacturing an amorphous silicon layer on the substrate 10;
s102, forming a polycrystalline silicon film 20 on the amorphous silicon layer by adopting a multi-time excimer laser annealing process, wherein the polycrystalline silicon film 20 comprises a plurality of first boundaries 21 extending along a first direction S1; a plurality of sub-pixel regions 30 are formed and arranged in the display panel 100 in an array, the width of the sub-pixel region 30 along the second direction is D1, the distance between adjacent first boundaries 21 along the second direction S2 is D2, D1 × n1＝D2*n2Wherein n1 and n2 are both positive integers.
Specifically, referring to fig. 7, the method for manufacturing the display panel 100 according to the present embodiment includes:
s101, providing a substrate 10, and manufacturing an amorphous silicon layer on the substrate 10, wherein the amorphous silicon layer does not have a function of controlling the conduction of the thin film transistor, and a polycrystalline silicon thin film 20 needs to be manufactured on the amorphous silicon thin film;
s102, forming a polycrystalline silicon thin film 20 on the amorphous silicon thin film manufactured in the step S101 by adopting an excimer laser annealing process, wherein the polycrystalline silicon thin film 20 is a channel of a thin film transistor; wherein, the polysilicon film 20 includes a plurality of first boundaries 21 along a first direction S1; meanwhile, a thin film transistor array layer is manufactured on the substrate 10, the thin film transistor array layer comprises a grid electrode, an active layer, a source electrode and a drain electrode which are sequentially stacked, a data line D and the source electrode or the drain electrode are manufactured at the same layer, the data line D extends along a first direction S1 and is arranged along a second direction S2, the distance between every two adjacent data lines D along a second direction S2 is D1, the size of every two adjacent first boundaries 21 along a second direction S2 is D2, and D1 n is enabled1＝D2*n2，n1And n2Are all positive integers; in this way, the integral multiple of the size of the sub-pixel region 30 along the second direction S2 is equal to the integral multiple of the size of the first boundary 21 along the second direction S2, so that the defect of periodic unevenness of the intervals of the first boundary 21 caused by energy unevenness of the excimer laser beam can be overcome, and the phenomenon of uneven brightness of the display panel can be further improved.
Fig. 8 is a flowchart illustrating a method for manufacturing a polysilicon thin film according to an embodiment of the present invention, fig. 9 is another flowchart illustrating a method for manufacturing a polysilicon thin film according to an embodiment of the present invention, fig. 10 is a schematic diagram illustrating a formation of a first boundary according to an embodiment of the present invention, and referring to fig. 8 to 10, in an alternative embodiment of the present invention, a multiple excimer laser annealing process is employed, such that a specific process of forming a polysilicon thin film 20 on an amorphous silicon layer is as follows:
s201, performing an excimer laser annealing process on the first region of the amorphous silicon layer by using an excimer laser beam, and forming a first crystalline region 23 on the amorphous silicon layer;
s202, moving the excimer laser beam along the second direction S2, and performing an excimer laser annealing process on the second region of the amorphous silicon layer to form a second crystalline region 24; wherein the first and second crystalline regions 23 and 24 are arranged in the second direction S2;
s203, repeating the step of forming the second crystallization area 24 until the amorphous silicon layer forms the polycrystalline silicon film 20; wherein the spacing between adjacent first boundaries 21 along the second direction S2 is equal to the step of the excimer laser beam.
Specifically, referring to fig. 8 to 10, in the present embodiment, the process of forming the polysilicon thin film 20 on the amorphous silicon layer by the multiple excimer laser annealing process includes:
s201, performing an excimer laser annealing process on the first region of the amorphous silicon layer by using an excimer laser beam, and forming a first crystalline region 23 on the amorphous silicon layer; because the energy of the excimer laser beam edge is less than the threshold energy, when the amorphous silicon thin film is scanned to form the polysilicon thin film 20, a boundary, namely a first boundary 21, which represents a crystallization defect area is formed at a part where the energy of the excimer laser beam is less than the threshold energy, it can also be understood that each crystallization area has one crystallization defect area;
s202, the excimer laser beam is stepped along the second direction S2, and the excimer laser annealing process is performed on the second region of the amorphous silicon layer to form a second crystalline region 24, where the second crystalline region 24 also has a crystalline defect region, that is, a first boundary 21; wherein the first and second crystalline regions 23 and 24 are arranged in the second direction S2;
and S203, repeating the step S202, and sequentially forming a plurality of crystallization regions along the second direction S2 until the amorphous silicon layer forms the polysilicon thin film 20, wherein each crystallization region comprises a first boundary 21, and the distance between adjacent first boundaries 21 along the second direction S2 is equal to the step distance of the excimer laser beam.
Through the above process, the polysilicon thin film 20 is obtained, the polysilicon thin film 20 is used as a channel of the thin film transistor, the quality of the polysilicon thin film 20 determines the quality of the display panel 100, and in order to ensure the quality of the display panel, the phenomenon of uneven brightness of the display panel is improved by adjusting the periodic variation of the first boundary 21, so that the quality of the display panel is improved.
In an alternative embodiment of the present application, three times the step distance traveled by the excimer laser beam is equal to two times the spacing between the adjacent data lines D.
Specifically, as shown in fig. 2 and fig. 3, the traveling direction of the excimer laser beam is perpendicular to the extending direction of the data line D, the size of the sub-pixel area 30 along the first direction S1 is larger than the size of the sub-pixel area 30 along the second direction S2, and the relationship between the size of the adjacent first boundary 21 along the second direction S2 and the size of the sub-pixel area 30 along the second direction S2 is defined, so that the overlapping area between the first boundary 21 and the channel is more uniform, the uneven brightness of the display panel can be more effectively improved, and the quality of the display panel can be improved.
Referring to fig. 9, in an alternative embodiment of the present application, the traveling direction of the excimer laser beam is perpendicular to the extending direction of the data line D.
According to the embodiments, the application has the following beneficial effects:
according to the display panel, the display device and the manufacturing method of the display panel, the uneven brightness of the display panel is improved by limiting the step size of the laser beam, namely, the size of the adjacent first boundary; in this embodiment, the display panel further includes sub-pixel regions arranged in an array, a width of the sub-pixel region along the second direction is D1, a size of the adjacent first boundary along the second direction is D2, D1 × n1＝D2*n2(ii) a In this way, the integral multiple of the size of the sub-pixel area along the second direction is equal to the integral multiple of the size of the first boundary along the second direction, so that the defect of periodic uneven intervals of the first boundary caused by uneven energy of the excimer laser beams can be overcome, and the phenomenon of uneven brightness of the display panel can be further improved.
The foregoing description shows and describes several preferred embodiments of the present application, but as aforementioned, it is to be understood that the application is not limited to the forms disclosed herein, but is not to be construed as excluding other embodiments and is capable of use in various other combinations, modifications, and environments and is capable of changes within the scope of the inventive concept as expressed herein, commensurate with the above teachings, or the skill or knowledge of the relevant art. And that modifications and variations may be effected by those skilled in the art without departing from the spirit and scope of the application, which is to be protected by the claims appended hereto.
Claims (12)
1. A display panel, comprising:
a substrate;
a polycrystalline silicon thin film on the substrate, the polycrystalline silicon thin film including a plurality of first boundaries extending in a first direction;
a sub-pixel region arranged in the display panel in an array, wherein the sub-pixel region has a width D1 along the second direction, and a distance D2, D1 n adjacent to the first boundary along the second direction1＝D2*n2Wherein n is1And n2Are all positive integers; the first direction intersects the second direction.
2. Root of herbaceous plantThe display panel of claim 1, wherein n is1＝2，n2＝3。
3. The display panel according to claim 1, further comprising:
a plurality of data lines extending in a first direction and arranged in a second direction;
and the plurality of gate lines extend along the second direction, are arranged along the first direction, are crossed with the data lines in an insulated manner to define the sub-pixel regions, and the width of each sub-pixel region along the second direction is the distance between the adjacent data lines.
4. The display panel according to claim 1, further comprising:
and the pixel driving circuit is used for driving the sub-pixels and comprises a thin film transistor, and the polycrystalline silicon thin film forms a channel of the thin film transistor.
5. The display panel according to claim 4, further comprising: a light emitting element; the light emitting element is electrically connected to the pixel driving circuit.
6. The display panel according to claim 1, further comprising:
and a plurality of first power signal lines extending along the first direction and arranged along the second direction, wherein the width of each sub-pixel along the second direction is the distance between adjacent first power signal lines.
7. The display panel of claim 1, wherein the first boundary is a crystallized defect region formed by an excimer laser annealing process.
8. A display device comprising the display panel according to any one of claims 1 to 7.
9. A method for manufacturing a display panel is characterized by comprising the following steps:
manufacturing an amorphous silicon layer on a substrate;
forming a polycrystalline silicon thin film on the amorphous silicon layer by adopting a multi-time excimer laser annealing process, wherein the polycrystalline silicon thin film comprises a plurality of first boundaries extending along a first direction; manufacturing a plurality of sub-pixel regions, arranging the sub-pixel regions in the display panel in an array manner, wherein the width of each sub-pixel region along the second direction is D1, the distance between the adjacent first boundaries along the second direction is D2, and D1 × n1＝D2*n2Wherein n is1And n2Are all positive integers.
10. The manufacturing method of claim 9, wherein the multiple excimer laser annealing process is adopted, so that the specific process of forming the polycrystalline silicon thin film on the amorphous silicon layer is as follows:
performing an excimer laser annealing process on the first region of the amorphous silicon layer by using an excimer laser beam to form a first crystalline region on the amorphous silicon layer;
moving the excimer laser beam along a second direction, and performing an excimer laser annealing process on a second region of the amorphous silicon layer to form a second crystalline region; wherein the first crystalline region and the second crystalline region are arranged in a second direction;
repeating the step of forming the second crystallization region until the amorphous silicon layer forms the polycrystalline silicon thin film; wherein a pitch of adjacent first boundaries in the second direction is equal to a pitch of the excimer laser beam.
11. The method of claim 10, wherein three times the step distance traveled by the excimer laser beam is equal to two times the pitch between adjacent data lines.
12. The method of claim 10, wherein the excimer laser beam travels in a direction perpendicular to the extending direction of the data line.
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| CN202111611603.1A CN114512498A (en) | 2021-12-27 | 2021-12-27 | Display panel, display device and manufacturing method of display panel |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202111611603.1A CN114512498A (en) | 2021-12-27 | 2021-12-27 | Display panel, display device and manufacturing method of display panel |
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