CN114447117A - Array substrate and display panel - Google Patents
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- CN114447117A CN114447117A CN202210049112.0A CN202210049112A CN114447117A CN 114447117 A CN114447117 A CN 114447117A CN 202210049112 A CN202210049112 A CN 202210049112A CN 114447117 A CN114447117 A CN 114447117A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78633—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with a light shield
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136222—Colour filters incorporated in the active matrix substrate
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- Microelectronics & Electronic Packaging (AREA)
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- General Physics & Mathematics (AREA)
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- Crystallography & Structural Chemistry (AREA)
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Abstract
The application provides an array substrate and a display panel, wherein the array substrate comprises a first substrate; the active layer is positioned on one side of the first substrate and comprises an active section and contact sections arranged on two sides of the active section; the grid electrode corresponds to the active section of the active layer; the array substrate further comprises a first color resistance layer, the first color resistance layer is located on one side, far away from the grid electrode, of the active layer, at least part of orthographic projection of the first color resistance layer on the first substrate covers orthographic projection of the active section on the first substrate, the first color resistance layer at least comprises a first color resistance layer and a second color resistance layer which are arranged on the first substrate in a stacked mode, the colors of the first color resistance layer and the second color resistance layer are different, therefore most of light entering the active section is shielded, the illumination leakage current phenomenon caused by the light is reduced, the performance of the array substrate is stable, and the requirements of the high-brightness display panel are met.
Description
Technical Field
The application relates to the technical field of display, in particular to an array substrate and a display panel.
Background
With the development and progress of science and technology, the liquid crystal display has the advantages of thin body, electricity saving, no radiation and the like, and is widely applied. Most of the liquid crystal displays on the market are backlight type liquid crystal displays, which include a liquid crystal panel and a backlight module (backlight module).
In the conventional liquid crystal array substrate, an active layer of a thin film transistor includes a channel region, which is very sensitive to light, and when an active segment of the active layer is irradiated by light, an electronic hole generated by a photoelectric effect has a very large influence on electrical performance and stability of an element, which is difficult to satisfy the requirement of a high-brightness display product.
Disclosure of Invention
The embodiment of the application provides an array substrate and a display panel, which are used for improving the stability of the array substrate and further meeting the requirement of a high-brightness display panel.
In order to achieve the above object, the technical solutions provided in the embodiments of the present application are as follows:
an embodiment of the application provides an array substrate, including
A first substrate;
the active layer is positioned on one side of the first substrate and comprises an active section and contact sections arranged on two sides of the active section;
a gate corresponding to an active segment of the active layer;
the array substrate further comprises a first color resistance layer, the first color resistance layer is located on one side, away from the grid electrode, of the active layer, the orthographic projection of the first color resistance layer on the first substrate at least partially covers the orthographic projection of the active section on the first substrate, the first color resistance layer at least comprises a first color resistance layer and a second color resistance layer, the first color resistance layer and the second color resistance layer are arranged on the first substrate in a stacked mode, and the colors of the first color resistance layer and the second color resistance layer are different.
In the array substrate provided in the embodiment of the present application, the first color resistance layer, the active layer, and the gate electrode are sequentially stacked on one side of the first substrate; wherein the content of the first and second substances,
the orthographic projection of the active segment on the first substrate is positioned in the orthographic projection of the first color resistance layer on the first substrate.
In the array substrate provided by the embodiment of the application, the gate electrode, the active layer and the first color resistance layer are sequentially stacked on one side of the first substrate; wherein the content of the first and second substances,
the orthographic projection of the first color resistance layer on the first substrate covers the orthographic projection of the active section on the first substrate.
In the array substrate provided in the embodiment of the present application, the array substrate further includes a source electrode, a drain electrode, and a pixel electrode, the source electrode and the drain electrode are located between the active layer and the first color resist layer and are disposed at two ends of the active layer, and the pixel electrode is located on one side of the first color resist layer away from the active layer; wherein the content of the first and second substances,
the first color resistance layer is provided with a first through hole, and the pixel electrode is connected with the drain electrode through the first through hole.
In the array substrate provided in the embodiment of the present application, the first color resist layer is one of a blue color resist layer, a green color resist layer and a red color resist layer, and the second color resist layer is another one of the blue color resist layer, the green color resist layer and the red color resist layer.
In the array substrate provided in the embodiment of the present application, the first color resist layer is a red color resist layer, the second color resist layer is a blue color resist layer, an orthographic projection of the first color resist layer on the first substrate covers an orthographic projection of the active segment on the first substrate, and an orthographic projection of the second color resist layer on the first substrate overlaps with an orthographic projection of the active segment on the first substrate.
In the array substrate provided in the embodiment of the present application, the first color resist layer further includes a third color resist layer disposed on a side of the second color resist layer away from the first color resist layer, and colors of the first color resist layer, the second color resist layer, and the third color resist layer are different.
In the array substrate provided by the embodiment of the application, the array substrate includes a transparent region and a non-transparent region adjacent to the transparent region, the active layer and the first color resist layer are both located in the non-transparent region, and the first color resist layer and the active layer are arranged opposite to each other.
In the array substrate provided in the embodiment of the present application, the array substrate further includes a second color resist layer located in the light-transmitting area, and the second color resist layer and the first color resist layer are disposed.
An embodiment of the present application further provides a display panel, which includes any one of the array substrates, a color film substrate disposed opposite to the array substrate, a liquid crystal layer located between the array substrate and the color film substrate, and a backlight module located on one side of the array substrate away from the color film substrate.
The beneficial effects of the embodiment of the application are as follows: the application provides an array substrate and a display panel, wherein the array substrate comprises a first substrate, an active layer and a grid electrode, the active layer is positioned on one side of the first substrate, the active layer comprises an active section and contact sections arranged on two sides of the active section, and the grid electrode corresponds to the active section of the active layer; wherein; according to the embodiment of the application, the first color resistance layer is arranged and located on one side, far away from the grid electrode, of the active layer, at least part of orthographic projection of the first color resistance layer on the first substrate covers the orthographic projection of the active section on the first substrate, the first color resistance layer at least comprises the first color resistance layer and the second color resistance layer which are arranged on the first substrate in a stacked mode, the first color resistance layer and the second color resistance layer are different in color, so that most of light entering the active section is shielded, the light leakage current phenomenon caused by the light is reduced, the performance of the array substrate is stable, and the requirement of high-brightness display products is met.
Drawings
The technical solution and other advantages of the present application will become apparent from the detailed description of the embodiments of the present application with reference to the accompanying drawings.
Fig. 1 is a schematic cross-sectional view of a conventional array substrate;
fig. 2 is a first cross-sectional view of an array substrate according to an embodiment of the present disclosure;
FIG. 3 is a graph of Id-Vg curve of a conventional array substrate;
FIG. 4 is a graph of Id-Vg provided in an embodiment of the present application;
fig. 5 is a second cross-sectional view of an array substrate according to an embodiment of the present disclosure;
fig. 6 is a schematic cross-sectional view of a third array substrate according to an embodiment of the present disclosure;
fig. 7 is a first cross-sectional view of a display panel according to an embodiment of the present disclosure;
fig. 8 is a second cross-sectional view of a display panel according to an embodiment of the present disclosure.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application. Furthermore, it should be understood that the detailed description and specific examples, while indicating exemplary embodiments of the invention, are given by way of illustration and explanation only, and are not intended to limit the scope of the invention. In the present application, unless indicated to the contrary, the use of the directional terms "upper" and "lower" generally refer to the upper and lower positions of the device in actual use or operation, and more particularly to the orientation of the figures of the drawings; while "inner" and "outer" are with respect to the outline of the device.
Referring to fig. 1, a cross-sectional view of a conventional array substrate is shown.
The conventional array substrate 1 includes a first substrate 10, and a buffer layer 20, a gate electrode 31, a gate insulating layer 40, an active layer 50, an interlayer insulating layer 60, a second metal layer 70, a passivation layer 80, a planarization layer 90, and an electrode layer 100 sequentially stacked on one side of the first substrate 10, where the second metal layer 70 includes a source electrode 71 and a drain electrode 72, and the electrode layer 100 includes, but is not limited to, a pixel electrode 101.
The array substrate 1 includes a channel region (not labeled in the figure), the active layer 50 includes an active segment 51 located in the channel region, and since in the array substrate 1, the transmittance of the film layer located above the active segment 51 to light is high, the active segment 51 is easily irradiated by light, and when the active segment 51 is irradiated by light, the influence of electron holes generated by the photoelectric effect on the electrical performance and stability of the array substrate 1 is very large, which makes it difficult to meet the requirement of high brightness display products. Accordingly, the embodiment of the application provides an array substrate and a display panel, so as to improve the stability of the array substrate 1, and further meet the requirement of a high-brightness display panel.
Referring to fig. 2 to 7, the present application provides an array substrate and a display panel, where the display panel 4 includes the array substrate 1, a color film substrate 2 disposed opposite to the array substrate 1, a liquid crystal layer (not shown) located between the array substrate 1 and the color film substrate 2, and a backlight module 3 located on a side of the array substrate 1 away from the color film substrate 2; the array substrate 1 comprises a first substrate 10; an active layer 50 on one side of the first substrate 10, the active layer 50 including an active segment 51 and contact segments 52 disposed on both sides of the active segment 51; a gate electrode 31, the gate electrode 31 corresponding to the active segment 51 of the active layer 50; the array substrate 1 further includes a first color resist layer 110, the first color resist layer 110 is located on a side of the active layer 50 away from the gate 31, an orthogonal projection of the first color resist layer 110 on the first substrate 10 at least partially covers an orthogonal projection of the active segment 51 on the first substrate 10, the first color resist layer 110 at least includes a first color resist layer 111 and a second color resist layer 112 stacked on the first substrate, and colors of the first color resist layer 111 and the second color resist layer 112 are different.
It can be understood that, in the embodiment, the first color resistance layer 110 is disposed on the side of the active layer 50 away from the gate electrode 31, an orthographic projection of the first color resistance layer 110 on the first substrate 10 at least partially covers an orthographic projection of the active segment 51 on the first substrate 10, and the first color resistance layer 110 at least includes the first color resistance layer 111 and the second color resistance layer 112 stacked on the first substrate 10, and the colors of the first color resistance layer 111 and the second color resistance layer 112 are different, so that most of light incident on the active segment 51 is blocked, and a light leakage phenomenon caused by the light is reduced, so that the performance of the array substrate 1 is stable, and the requirement of a high-brightness display product is met; it should be noted that the light includes, but is not limited to, the light emitted from the array substrate 1 to the active segment 51 by the light source of the backlight module 3, the light reflected to the active segment 51 by the light source of the backlight module 3 after being emitted from the array substrate 1 to the color filter substrate 2, and the external light scattered to the active segment 51 by the display panel 4 in the display panel 4.
The technical solution of the present application will now be described with reference to specific embodiments.
Referring to fig. 2, a first cross-sectional view of an array substrate according to an embodiment of the present disclosure is shown.
The present embodiment provides an array substrate 1, where the array substrate 1 includes a first substrate 10, and a buffer layer 20, a first metal layer 30, a gate insulating layer 40, an active layer 50, an interlayer insulating layer 60, a second metal layer 70, a passivation layer 80, a planarization layer 90, and an electrode layer 100, which are sequentially stacked on one side of the first substrate 10, that is, the array substrate 1 is a bottom gate structure in this embodiment; it is understood that the array substrate 1 is a bottom gate structure, which is only used as an illustration and is not limited in this embodiment.
The first base 10 includes a first substrate 11, a spacer layer 12, and a second substrate 13 stacked in this order, where each of the first substrate 11 and the second substrate 13 may include a rigid substrate or a flexible substrate, and when both the first substrate 11 and the second substrate 13 are rigid substrates, a material may be metal or glass, and when both the first substrate 11 and the second substrate 13 are flexible substrates, a material may include at least one of acrylic resin, methacrylic resin, polyisoprene, vinyl resin, epoxy resin, polyurethane-based resin, cellulose resin, silicone resin, polyimide-based resin, and polyamide-based resin; the material of the spacer layer 12 includes, but is not limited to, silicon nitride (SiNx), silicon oxide (SiOx), and other materials with water absorption property, and the material of the first substrate 11, the material of the second substrate 13, and the material of the spacer layer 12 are not limited in this embodiment.
The materials of the first metal layer 30 and the second metal layer 70 each include, but are not limited to, at least one metal of molybdenum (Mo), aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), titanium (Ti), tantalum (Ta), and tungsten (W); the gate insulating layer 40 has a strong water-oxygen barrier capability and an insulating capability, and the material thereof includes, but is not limited to, silicon oxide, silicon nitride, silicon oxynitride, and the like or a stack thereof; the active layer 50 includes, but is not limited to, a polysilicon active layer or an oxide active layer; the passivation layer 80 is made of materials including, but not limited to, silicon oxide, silicon nitride, silicon oxynitride, etc., or a laminate thereof, and the electrode layer 100 is made of materials including, but not limited to, indium tin oxide and indium zinc oxide; in this embodiment, no specific limitation is imposed on the material of the gate electrode 31, the material of the first metal layer 30, the material of the second metal layer 70, the type of the active layer 50, the material of the electrode layer 100, and the material of the passivation layer 80.
In this embodiment, the first metal layer 30 includes, but is not limited to, a gate electrode 31, the active layer 50 includes an active segment 51 and a contact segment 52 disposed at two sides of the active segment, and the second metal layer 70 includes, but is not limited to, a source electrode 71 and a drain electrode 72 disposed at an interval, wherein the gate electrode 31 is disposed corresponding to the active segment 51, the contact segment 52 includes a first contact segment 521 and a second contact segment 522, the first contact segment 521 and the second contact segment 522 are separated by the active segment 51, the source electrode 71 is disposed opposite to the first contact segment 521 and connected to the first contact segment 521, and the drain electrode 72 is disposed opposite to the second contact segment 522 and connected to the second contact segment 522.
Further, the interlayer insulating layer 60 is opened with a first opening (not shown) exposing the first contact 521 and a second opening (not shown) exposing the second contact 522, the source electrode 71 is connected to the first contact 521 through the first opening, and the drain electrode 72 is connected to the second contact 522 through the second opening.
In this embodiment, the array substrate further includes a first color resist layer 110, the first color resist layer 110 is located on a side of the active layer 50 away from the gate electrode 31, specifically, the first color resist layer 110 is located between the passivation layer 80 and the flat layer 90, an orthogonal projection of the first color resist layer 110 on the first substrate 10 at least partially covers an orthogonal projection of the active segment 51 on the first substrate 10, the first color resist layer 110 at least includes a first color resist layer 111 and a second color resist layer 112 stacked on the first substrate 10, the first color resist layer 111 and the second color resist layer 112 have different colors, and the second color resist layer 112 is located between the first color resist layer 111 and the first substrate 10.
Referring to fig. 1 and 2, it can be known from the prior art that when the active segment 51 is irradiated by light, electron holes generated by the photoelectric effect, the influence on the electrical property and stability of the array substrate 1 is very large, it is difficult to meet the demand of high brightness display products, in the conventional array substrate 1, the interlayer insulating layer 60, the passivation layer 80 and the planarization layer 90 above the active segment 51 have high light transmittance, therefore, the active segment 51 is easily irradiated by light, and the orthographic projection of the active segment 51 on the first substrate 10 is at least partially covered by the orthographic projection of the first color-resist layer 110 on the first substrate 10, thereby, the light emitted from the active layer 50 to the gate 31 is blocked, and the light leakage current caused by the light emitted to the active section 51 in the display panel is reduced; specifically, the first color resist layer 110 at least includes a first color resist layer 111 and a second color resist layer 112 stacked on the first substrate 10, where the first color resist layer 111 and the second color resist layer 112 have different colors, and color resist material layers of two colors are stacked, so as to better shield the active segment 51.
In this embodiment, the first color resist layer 111 is one of a blue color resist layer, a green color resist layer and a red color resist layer, the second color resist layer 112 is another one of the blue color resist layer, the green color resist layer and the red color resist layer, an orthographic projection of the first color resist layer 111 on the first substrate 10 covers an orthographic projection of the active segment 51 on the first substrate 10, and an orthographic projection of the second color resist layer 112 on the first substrate 10 overlaps with an orthographic projection of the active segment 51 on the first substrate 10.
| R/B Stack | R/B-free Stack | |
| ΔVth | -0.1 | -0.4 |
TABLE 1
Specifically, please refer to fig. 3, fig. 4 and table 1; fig. 3 is an Id-Vg graph of a conventional array substrate; FIG. 4 is a graph of Id-Vg provided in the embodiments of the present application; table 1 shows the threshold voltage Vth values of the conventional array substrate and the array substrate provided in the embodiment of the present application; in fig. 3 and 4, the abscissa represents the gate voltage (V) and the ordinate represents the dc drain current (a).
In this embodiment, the first color resist layer 111 is a blue color resist layer, the second color resist layer 112 is a red color resist layer, as will be appreciated by those skilled in the art, blue resist materials transmit blue light and absorb light of other colors, red resist materials transmit red light and absorb light of other colors, therefore, in this embodiment, by setting the first color resist layer 111 as a blue color resist layer, and the second color resist layer 112 as a red color resist layer, the blue color resist layer can only pass through blue light, and the blue light cannot pass through the red color resist layer, the first color resist layer 110 formed by overlapping the blue color resist layer and the red color resist layer can shield most of light incident from the active layer 50 to the gate 31, so as to reduce the light leakage current caused by the light, so that the performance of the array substrate is stable, and the requirement of a high-brightness display product is met; as can be seen from table 1, when the first color resist layer 110 is disposed in the array substrate 1, and the first color resist layer 110 includes the first color resist layer 111 and the second color resist layer 112 which are disposed in a stacked manner, the threshold voltage Vth of the array substrate 1 is reduced to improve the switching characteristics thereof, thereby improving the quality of the product.
It is understood that, in this embodiment, the first color resist layer 111 is a blue color resist layer, and the second color resist layer 112 is a red color resist layer, which are only used for illustration, for example: in one embodiment, the first color resist layer 111 is a blue color resist layer, and the second color resist layer 112 is a green color resist layer; in one embodiment, the first color resist layer 111 is a green color resist layer, and the second color resist layer 112 is a blue color resist layer; in one embodiment, the first color resist layer 111 is a green color resist layer, and the second color resist layer 112 is a red color resist layer; in one embodiment, the first color resist layer 111 is a red color resist layer, and the second color resist layer 112 is a green color resist layer.
In this embodiment, the gate electrode 31 is located between the active layer 50 and the first substrate 10, and the gate electrode 31 is disposed corresponding to the active segment 51, and an orthographic projection of the active segment 51 on the first substrate 10 overlaps with an orthographic projection of the gate electrode 31 on the first substrate 10, so that light incident from the gate electrode 31 in a direction pointing to the active layer 50 is blocked, and a light leakage phenomenon caused by the light is reduced.
In this embodiment, the electrode layer 100 includes, but is not limited to, a pixel electrode 101, and the pixel electrode 101 is located on a side of the first color resist layer 110 away from the active layer 50; a first via 1101 is disposed on the first color resist layer 110, and the pixel electrode 101 is connected to the drain 72 through the first via 1101; specifically, in the present embodiment, the first via 1101 penetrates through the first color resist layer 111, the second color resist layer 112 and the passivation layer 80 and extends to the upper surface of the drain electrode 72.
Further, in this embodiment, the array substrate 1 includes a transparent region 1000 and a non-transparent region 2000 adjacent to the transparent region 1000, the active layer 50 and the first color resist layer 110 are both located in the non-transparent region 2000, and the first color resist layer 110 is disposed opposite to the active section 51, it can be understood that, in this embodiment, only by depositing the first color resist layer 110 in the non-transparent region 2000 and disposing the first color resist layer corresponding to the active section 51, most of the light emitted from the active layer 50 to the gate electrode 31 can be blocked, so that the light leakage current phenomenon caused by the light is reduced, the performance of the array substrate is stabilized, and the usage efficiency of the first color resist layer 110 is improved.
In this embodiment, the array substrate 1 further includes a second color resist layer 120 located in the light-transmitting region 1000, and the second color resist layer 120 and the first color resist layer 110 are disposed in the same layer; it can be understood that, in this embodiment, the array substrate 1 further includes pixels (labeled in the figure) located in the light-transmitting area 1000, the second color resist layer 120 is disposed opposite to the pixels, the second color resist layer 120 includes, but is not limited to, a blue color resist, a green color resist and a red color resist which are disposed at intervals, and a color resist having the same color as that of each of the pixels is disposed on each of the pixels, it should be noted that, since the pixels in the light-transmitting area 1000 need to be irradiated by a backlight to display the color corresponding to the pixels, in this embodiment, the pixels are disposed on each of the pixels to have the same color resist as that of the pixels, so as to implement the functions of the pixels; moreover, it can be understood that in the embodiment, the first color resist layer 110 and the second color resist layer 120 are arranged in the same layer, so that the first color resist layer 110 and the second color resist layer 120 can be manufactured through the same process, the manufacturing process is reduced, and the production cost of the array substrate is saved.
Referring to fig. 5, a second cross-sectional view of an array substrate according to an embodiment of the present disclosure is shown.
In this embodiment, the structure of the array substrate is similar to/the same as that of the array substrate provided in the above embodiment, and please refer to the description of the array substrate in the above embodiment, which is not repeated herein, and the difference between the two is only:
in this embodiment, the first color resist layer 110 further includes a third color resist layer 113 disposed on a side of the second color resist layer 112 away from the first color resist layer 111, and the first color resist layer 111, the second color resist layer 112 and the third color resist layer 113 have different colors.
Specifically, in this embodiment, the first color resist layer 111 is one of a blue color resist layer, a green color resist layer and a red color resist layer, the second color resist layer 112 is another one of the blue color resist layer, the green color resist layer and the red color resist layer, the third color resist layer 113 has a color different from that of the first color resist layer 111, and the third color resist layer 113 has a color different from that of the second color resist layer 112; further, in this embodiment, the first color resist layer 111 is a blue color resist layer, the second color resist layer 112 is a red color resist layer, and the third color resist layer 113 is a green color resist layer.
As will be appreciated by those skilled in the art, blue resist material transmits blue light and absorbs other colors of light, red resist material transmits red light and absorbs other colors of light, green resist material transmits green light and absorbs other colors of light, therefore, in this embodiment, by setting the first color resist layer 111 as a blue color resist layer, the second color resist layer 112 as a red color resist layer, the third color resist layer 113 is a green color resist layer, blue light cannot penetrate through the red color resist layer, and red light cannot penetrate through the green color resist layer, so that most of light rays emitted from the active layer 50 to the gate 31 can be blocked by the first color resist layer 110 formed by overlapping the blue color resist layer, the red color resist layer and the green color resist layer, and the light leakage phenomenon caused by the light rays can be reduced, so that the performance of the array substrate can be stabilized, and the requirement of a high-brightness display product can be met.
Referring to fig. 6, a third cross-sectional view of an array substrate according to an embodiment of the present disclosure is shown.
In this embodiment, the structure of the array substrate is similar to/the same as that of the array substrate provided in the above embodiment, and please refer to the description of the array substrate in the above embodiment, which is not repeated herein, and the difference between the two is only:
in this embodiment, the first color resist layer 110, the active layer 50 and the gate electrode 31 are sequentially stacked on one side of the first substrate 10; wherein an orthographic projection of the active segment 51 on the first substrate 10 is located within an orthographic projection of the first color resist layer 110 on the first substrate 10.
Specifically, the array substrate 1 includes a first substrate 10, and the buffer layer 20, the active layer 50, the gate insulating layer 40, the gate electrode 31, the active layer 50, the interlayer insulating layer 60, the second metal layer 70, the passivation layer 80, the planarization layer 90, and the electrode layer 100, which are sequentially stacked on one side of the first substrate 10, that is, the array substrate 1 is a top gate structure in this embodiment; it is understood that the array substrate 1 is a top gate structure, which is only used as an illustration and is not limited in this embodiment.
In this embodiment, the first color resist layer 110 is located between the active layer 50 and the first substrate 10, specifically, the first color resist layer 110 is located between the buffer layer 20 and the first substrate 10, and the buffer layer 20 covers the first color resist layer 110.
In this embodiment, the orthographic projection of the active segment 51 on the first substrate 10 is located in the orthographic projection of the first color barrier layer 110 on the first substrate 10, so that the light emitted from the first color barrier layer 110 in the direction pointing to the active layer 50 is shielded, and the light leakage phenomenon caused by the light is reduced; specifically, the first color resist layer 110 includes a first color resist layer 111 and a second color resist layer 112 stacked on the first substrate 10, the first color resist layer 111 and the second color resist layer 112 have different colors, and color resist material layers of two colors are stacked, so that the active section 51 is shielded from light better, and the device performance of the array substrate 1 is stabilized.
It can be understood that the first color resist layer 111 is one of a blue color resist layer, a green color resist layer and a red color resist layer, the second color resist layer 112 is another one of the blue color resist layer, the green color resist layer and the red color resist layer, in this embodiment, an orthographic projection of the active segment 51 on the first substrate 10 may be overlapped with an orthographic projection of the first color resist layer 111 on the first substrate 10, and an orthographic projection of the active segment 51 on the first substrate 10 may be overlapped with an orthographic projection of the second color resist layer 112 on the first substrate 10, that is, the first color resist layer 110 and the active segment 51 are arranged in alignment, so as to improve the use efficiency of the color resist.
It should be noted that, the first color resist layer 110 is located between the buffer layer 20 and the first substrate 10 for illustration only, and the position of the first color resist layer 110 is not particularly limited in this embodiment, for example, in an embodiment, the first color resist layer 110 may be located between the active layer 50 and the buffer layer 20.
It should be noted that, in an embodiment, the first color resist layer 110 may further include a third color resist layer 113 disposed on a side of the second color resist layer 112 away from the first color resist layer 111, colors of the first color resist layer 111, the second color resist layer 112 and the third color resist layer 113 are different, and in this embodiment, by disposing the first color resist layer 110 formed by overlapping the blue color resist layer, the red color resist layer and the green color resist layer, most of light rays incident from the active layer 50 to the gate electrode 31 may be blocked, so as to reduce an illumination leakage current phenomenon caused by the light rays, so that the performance of the array substrate is stable, and further, requirements of high-brightness display products are met.
Referring to fig. 7, a first cross-sectional view of a display panel provided in the embodiment of the present application is shown.
In this embodiment, the display panel 4 includes the array substrate 1 described in any of the embodiments above, a color filter substrate 2 disposed opposite to the array substrate 1, a liquid crystal layer (not shown in the figure) located between the array substrate 1 and the color filter substrate 2, and a backlight module 3 located on a side of the array substrate 1 away from the color filter substrate 2.
Specifically, in this embodiment, the display panel 4 includes the array substrate 1 in fig. 2 as an example to exemplify the technical solution of the present application; it is understood that the array substrate 1 has been described in detail in the above embodiments, and the description is not repeated here.
It should be noted that, in the embodiment, after the light source of the backlight module 3 is emitted from the array substrate 1 to the color filter substrate 2, a part of the light is reflected toward the direction of the active segment 51, as known in the prior art, when the active segment 51 is irradiated by light, an electron hole generated by a photoelectric effect, the influence on the electrical property and stability of the array substrate 1 is very large, it is difficult to meet the demand of high brightness display products, therefore, the present embodiment at least partially covers the orthographic projection of the active segment 51 on the first substrate 10 by disposing the orthographic projection of the first color resist layer 110 on the first substrate 10, so that the light emitted from the array substrate 1 to the color filter substrate 2 and reflected to the active segment 51 from the light source of the backlight module 3 is shielded, and further reduces the light leakage current phenomenon in the display panel 4 caused by the light entering the active segment 51.
Referring to fig. 8, a second cross-sectional view of a display panel according to an embodiment of the present application is shown.
In this embodiment, the display panel 4 includes the array substrate 1 described in any of the embodiments above, a color filter substrate 2 disposed opposite to the array substrate 1, a liquid crystal layer (not shown in the figure) located between the array substrate 1 and the color filter substrate 2, and a backlight module 3 located on a side of the array substrate 1 away from the color filter substrate 2.
Specifically, in this embodiment, the display panel 4 includes the array substrate 1 in fig. 6 as an example to exemplify the technical solution of the present application; it is understood that the array substrate 1 has been described in detail in the above embodiments, and the description is not repeated here.
It should be noted that, in the present embodiment, the light source of the backlight module 3 includes light emitted from the first substrate 10 toward the active segment 51, and as known in the prior art, when the active segment 51 is illuminated by light, the electronic voids generated by the photoelectric effect have a very large influence on the electrical performance and stability of the array substrate 1, and it is difficult to meet the requirement of high-brightness display products, therefore, in the present embodiment, the orthographic projection of the active segment 51 on the first substrate 10 is located in the orthographic projection of the first color resistance layer 110 on the first substrate 10, so that the light emitted from the first substrate 10 toward the active segment 51 of the light source of the backlight module 3 is shielded, and further, the light leakage current phenomenon caused by the light emitted into the active segment 51 in the display panel 4 is reduced.
In summary, the present application provides an array substrate and a display panel, where the array substrate includes a first base, an active layer and a gate, the active layer is located on one side of the first base, the active layer includes an active segment and contact segments disposed on two sides of the active segment, and the gate corresponds to the active segment of the active layer; the array substrate further comprises a first color resistance layer, the first color resistance layer is located on one side, far away from the grid electrode, of the active layer, at least part of orthographic projection of the first color resistance layer on the first substrate covers orthographic projection of the active section on the first substrate, the first color resistance layer at least comprises a first color resistance layer and a second color resistance layer which are arranged on the first substrate in a stacked mode, the colors of the first color resistance layer and the second color resistance layer are different, therefore most of light entering the active section is shielded, the illumination leakage current phenomenon caused by the light is reduced, the performance of the array substrate is stable, and the requirements of high-brightness display products are met.
In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
The above embodiments of the present application are described in detail, and specific examples are applied in the present application to explain the principles and implementations of the present application, and the description of the above embodiments is only used to help understand the technical solutions and core ideas of the present application; those of ordinary skill in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications or substitutions do not depart from the spirit and scope of the present disclosure as defined by the appended claims.
Claims (10)
1. An array substrate, comprising
A first substrate;
the active layer is positioned on one side of the first substrate and comprises an active section and contact sections arranged on two sides of the active section;
a gate corresponding to an active segment of the active layer;
the array substrate further comprises a first color resistance layer, the first color resistance layer is located on one side, away from the grid electrode, of the active layer, the orthographic projection of the first color resistance layer on the first substrate at least partially covers the orthographic projection of the active section on the first substrate, the first color resistance layer at least comprises a first color resistance layer and a second color resistance layer, the first color resistance layer and the second color resistance layer are arranged on the first substrate in a stacked mode, and the colors of the first color resistance layer and the second color resistance layer are different.
2. The array substrate of claim 1, wherein the first color resistance layer, the active layer and the gate electrode are sequentially stacked on one side of the first substrate; wherein the content of the first and second substances,
the orthographic projection of the active segment on the first substrate is positioned in the orthographic projection of the first color resistance layer on the first substrate.
3. The array substrate of claim 1, wherein the gate electrode, the active layer and the first color resistance layer are sequentially stacked on one side of the first substrate; wherein the content of the first and second substances,
the orthographic projection of the first color resistance layer on the first substrate covers the orthographic projection of the active section on the first substrate.
4. The array substrate of claim 3, further comprising a source electrode, a drain electrode, and a pixel electrode, wherein the source electrode and the drain electrode are disposed between the active layer and the first color resist layer and at two ends of the active layer, and the pixel electrode is disposed at a side of the first color resist layer away from the active layer; wherein the content of the first and second substances,
the first color resistance layer is provided with a first through hole, and the pixel electrode is connected with the drain electrode through the first through hole.
5. The array substrate of claim 1, wherein the first color resist layer is one of a blue color resist layer, a green color resist layer and a red color resist layer, and the second color resist layer is another one of the blue color resist layer, the green color resist layer and the red color resist layer.
6. The array substrate of claim 5, wherein the first color resist layer is a red color resist layer, the second color resist layer is a blue color resist layer, an orthographic projection of the first color resist layer on the first substrate covers an orthographic projection of the active segment on the first substrate, and an orthographic projection of the second color resist layer on the first substrate overlaps with an orthographic projection of the active segment on the first substrate.
7. The array substrate of claim 1, wherein the first color-resist layer further comprises a third color-resist layer disposed on a side of the second color-resist layer away from the first color-resist layer, and colors of the first color-resist layer, the second color-resist layer, and the third color-resist layer are different.
8. The array substrate of claim 1, wherein the array substrate comprises a transparent region and a non-transparent region adjacent to the transparent region, wherein the active layer and the first color resist layer are both located in the non-transparent region, and the first color resist layer is disposed opposite to the active region.
9. The array substrate of claim 8, further comprising a second color resist layer in the transparent region, wherein the second color resist layer is disposed on the same layer as the first color resist layer.
10. A display panel, comprising the array substrate according to any one of claims 1 to 9, a color filter substrate disposed opposite to the array substrate, a liquid crystal layer disposed between the array substrate and the color filter substrate, and a backlight module disposed on a side of the array substrate away from the color filter substrate.
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| WO2023221166A1 (en) * | 2022-05-18 | 2023-11-23 | 武汉华星光电技术有限公司 | Array substrate and method for preparing same, and display panel |
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| WO2023221166A1 (en) * | 2022-05-18 | 2023-11-23 | 武汉华星光电技术有限公司 | Array substrate and method for preparing same, and display panel |
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