CN114397957A - Low-power-consumption power management circuit for MCU chip, and MCU chip - Google Patents
Low-power-consumption power management circuit for MCU chip, and MCU chip Download PDFInfo
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- CN114397957A CN114397957A CN202210045590.4A CN202210045590A CN114397957A CN 114397957 A CN114397957 A CN 114397957A CN 202210045590 A CN202210045590 A CN 202210045590A CN 114397957 A CN114397957 A CN 114397957A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/266—Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3243—Power saving in microcontroller unit
Abstract
The application discloses a low-power consumption power management circuit for an MCU chip, and the MCU chip. The circuit comprises a power supply switching module, a power supply detection module and a control module, wherein the power supply switching module is used for receiving a control signal output by the power supply detection module, and the control signal is used for indicating the power supply switching module to switch a main power supply between a preset main power supply Vdd or a preset battery auxiliary power supply Vbat; the Vdd power supply detection module is used for detecting whether the main power supply exists and whether the power supply is stable or not, and outputting the control signal to the power supply switching module to switch the main power supply and the auxiliary power supply; the LDO combined circuit module at least comprises: the low-power LDO circuit is used for supplying voltage to the corresponding backup domain low-voltage device, and the normal LDO circuit is used for supplying voltage to the corresponding digital domain. The power management method and the power management system solve the technical problem that the effect of a low-power-consumption power management scheme is not good.
Description
Technical Field
The application relates to the field of microcontrollers, in particular to a low-power-consumption power management circuit for an MCU chip and the MCU chip.
Background
The MCU chip is always applied to the applications such as current Internet of things application, intelligent transportation, smart city and smart home everywhere, and the reduction of energy loss is also the current primary concern problem.
In the related technology, the low-power-consumption power management scheme in the MCU chip system can fully utilize an external power supply to improve the power supply selection of the MCU chip and improve the power supply efficiency of the chip, so that the chip can work normally and efficiently in different power supply application scenes. However, the low power consumption power management scheme cannot guarantee that the internal memory of the chip still maintains the validity of data after the power is off, and a low power consumption-based power efficient management scheme is not provided.
Aiming at the problem of poor effect of the low-power-consumption power management scheme in the related technology, an effective solution is not provided at present.
Disclosure of Invention
The main aim at of this application provides a low-power consumption power management circuit, MCU chip for MCU chip to solve the not good problem of low-power consumption power management scheme effect.
In order to achieve the above object, according to one aspect of the present application, there is provided a low power consumption power management circuit for an MCU chip.
A low-power consumption power management circuit for MCU chip according to this application includes: the power supply switching module is used for receiving a control signal output by the power supply detection module, and the control signal is used for indicating the power supply switching module to switch a main power supply between a preset main power supply Vdd or a preset battery auxiliary power supply Vbat; the Vdd power supply detection module is used for detecting whether the main power supply exists and whether the power supply is stable or not, and outputting the control signal to the power supply switching module to switch the main power supply and the auxiliary power supply; the LDO combined circuit module at least comprises: the low-power LDO circuit is used for supplying voltage to the corresponding backup domain low-voltage device, and the normal LDO circuit is used for supplying voltage to the corresponding digital domain.
Further, the power switching module is configured to receive a switch control signal output from the Vdd power switching module, and when the switch control signal is at a low level, the power switching module outputs Vddsw and is connected to the preset battery secondary power supply Vbat through a switch; when the switch control signal is at a high level, the power switching module outputs Vddsw and is connected to the preset main power supply Vdd through a switch.
Further, the low power consumption LDO circuit outputs Dvddlp for supplying voltage to the corresponding low voltage device in the backup domain, and the normal LDO circuit outputs Dvddd for supplying voltage to the corresponding digital domain.
Further, the normal LDO circuit is turned off under the condition that the MCU chip works in a low power consumption state.
Further, under the condition that the MCU chip works in a low power consumption state, a switch connected between the Dvddlp and the Dvddd is controlled, so that the Dvddp supplies power to the Dvddd voltage domain.
Further, the low-power LDO circuit is used for supplying voltage to a corresponding backup domain low-voltage device, and further includes: and supplying power to the clock crystal oscillator and the RTC functional circuit.
Further, the normal LDO circuit is configured to supply a voltage to a corresponding digital domain, and further includes: and supplying power to the memory unit and the low-voltage peripheral circuit of the MCU chip.
Further, the Vdd power detection module is further configured to, when detecting that the main power supply is absent or cannot stably supply power, supply power to the MCU chip through a preset secondary battery power supply Vbat, and supply power to a corresponding low-voltage circuit through the low-power LDO circuit that is circulated by the power switching module.
Further, the power switching module is configured to receive a control signal output by the power detection module, supply power to the MCU chip through a preset main power supply Vdd, and simultaneously turn off the preset secondary battery power supply Vbat.
In order to achieve the above object, according to another aspect of the present application, there is provided an MCU chip including the low power management circuit.
A low-power consumption power management circuit for MCU chip in this application embodiment, the MCU chip, adopt the power supply switching module, Vdd power detection module, the mode of LDO composite circuit module combination, through detecting the switch of voltage characteristic conduct control power switching module on the main power supply Vdd, with this come better optimization power consumption distribution, when having reached and having reduced self circuit consumption, thereby better manage the purpose that makes its more high-efficient work to entering into MCU chip well, thereby realized reducing the consumption and improved the technological effect of power work efficiency, and then solved the not good technical problem of low-power consumption power management scheme effect.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this application, serve to provide a further understanding of the application and to enable other features, objects, and advantages of the application to be more apparent. The drawings and their description illustrate the embodiments of the invention and do not limit it. In the drawings:
FIG. 1 is a schematic diagram of a low power consumption power management circuit for an MCU chip according to an embodiment of the present application;
FIG. 2 is a schematic diagram of a low power consumption power management circuit for an MCU chip according to an embodiment of the present application;
FIG. 3 is a schematic diagram of a power detection circuit in a low power consumption power management circuit for an MCU chip according to an embodiment of the present application;
FIG. 4 is a power switch switching circuit in a low power consumption power management circuit for an MCU chip according to an embodiment of the present application;
FIG. 5 is a schematic block diagram of an LDO in a low-power-consumption power management circuit for an MCU chip according to an embodiment of the application.
Detailed Description
In order to make the technical solutions better understood by those skilled in the art, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only partial embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
It should be noted that the terms "first," "second," and the like in the description and claims of this application and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It should be understood that the data so used may be interchanged under appropriate circumstances such that embodiments of the application described herein may be used. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
In this application, the terms "upper", "lower", "left", "right", "front", "rear", "top", "bottom", "inner", "outer", "middle", "vertical", "horizontal", "lateral", "longitudinal", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings. These terms are used primarily to better describe the present application and its embodiments, and are not used to limit the indicated devices, elements or components to a particular orientation or to be constructed and operated in a particular orientation.
Moreover, some of the above terms may be used to indicate other meanings besides the orientation or positional relationship, for example, the term "on" may also be used to indicate some kind of attachment or connection relationship in some cases. The specific meaning of these terms in this application will be understood by those of ordinary skill in the art as appropriate.
Furthermore, the terms "mounted," "disposed," "provided," "connected," and "sleeved" are to be construed broadly. For example, it may be a fixed connection, a removable connection, or a unitary construction; can be a mechanical connection, or an electrical connection; may be directly connected, or indirectly connected through intervening media, or may be in internal communication between two devices, elements or components. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art as appropriate.
It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict. The present application will be described in detail below with reference to the embodiments with reference to the attached drawings.
As shown in fig. 1, which is a schematic structural diagram of a low power consumption power management circuit for an MCU chip according to an embodiment of the present application, the power management circuit includes: the power supply switching module 101 is configured to receive a control signal output by the power supply detection module, where the control signal is used to instruct the power supply switching module to switch a main power supply between a preset main power supply Vdd or a preset battery secondary power supply Vbat; a Vdd power detection module 102, configured to detect whether the main power source exists and whether power supply is stable, and output the control signal to the power switching module to switch the main power source and the auxiliary power source; the LDO combination circuit module 103 includes at least: the low-power LDO circuit is used for supplying voltage to the corresponding backup domain low-voltage device, and the normal LDO circuit is used for supplying voltage to the corresponding digital domain.
From the above description, it can be seen that the following technical effects are achieved by the present application:
adopt the power supply switching module, Vdd power detection module, the mode of LDO composite circuit module combination, through the switch that detects the voltage characteristic on the main power supply Vdd as control power supply switching module, with this come better optimization power consumption distribution, when having reached and having reduced self circuit consumption, thereby better manage the purpose that makes its more high-efficient work to entering into MCU chip power, thereby realized the technological effect that reduces the consumption and improve power work efficiency, and then solved the not good technical problem of low-power consumption power management scheme effect.
Besides, the power supply in the MCU chip is managed and controlled, the low-power consumption state optimization of the system is realized, and the power consumption of the power supply management unit is also as low as possible. In the whole power management scheme module, the power switching module 101 supplies power in a low power consumption state, and the power consumption and the on-resistance of its switch are related to the flowing current, so that the power consumption is limited as long as the current in the low power consumption state is low. The overall power consumption for the Vdd power detection module 102 is on the order of 1 uA. For the LDO combination circuit module 103, the low-power consumption LDO static power consumption is mainly considered, and since the low-power consumption LDO load is a backup domain and the fastest clock for internal work is 32KHz, the power consumption is low, and the load requirement can be satisfied when the power consumption is about 0.5uA magnitude. Therefore, the power consumption of the whole power management part can meet the application requirement of low power consumption of the system.
Receiving a control signal output by a power detection module in the power switching module 101, where the control signal is used to instruct the power switching module to switch a main power between a preset main power supply Vdd or a preset battery secondary power supply Vbat. That is, through the power switching module 101 connected to the main negative power supply, a stable and reliable power supply can be provided to the MCU chip by switching before the main power supply of the MCU chip is powered on and stable. It can be understood that, in the power supply switching module 101, power supply switching is realized by switching a power supply switch.
Preferably, in this embodiment, the power switching module 101 is configured to receive a control signal output by the power detection module, supply power to the MCU chip through a preset main power supply Vdd, and turn off the preset secondary battery power supply Vbat.
And detecting whether the main power supply exists and whether the power supply is stable in the Vdd power supply detection module 102, and outputting the control signal to the power supply switching module to switch the main power supply and the auxiliary power supply. That is, the Vdd power detection module 102 detects whether the main power exists and whether the power supply is stable, and outputs a signal to control the power switching module 101 to switch the main negative power.
Preferably, in this embodiment, the Vdd power detection module 102 is further configured to, when detecting that the main power supply is absent or cannot stably supply power, supply power to the MCU chip through a preset secondary battery power supply Vbat, and supply power to a corresponding low-voltage circuit through the low-power LDO circuit via the power switching module.
At least comprising at the LDO combination circuit module 103: the low-power LDO circuit is used for supplying voltage to the corresponding backup domain low-voltage device, and the normal LDO circuit is used for supplying voltage to the corresponding digital domain. The LDO module is used as the MCU chip to provide power for the low-voltage circuit. One part is a low-power consumption LDO circuit, the part of the circuit mainly supplies power for functions such as a backup domain register in a chip, a 32K clock crystal oscillator and an RTC, and the other part is a normal mode LDO circuit, and the part of the circuit mainly supplies power for functions such as a core digital part, Memories and some low-voltage peripheral circuits. Wherein the power supplies for the two LDO circuits are respectively the output from the power switching module and a main power supply Vdd.
In some embodiments, the low-power LDO circuit is configured to supply a voltage to a corresponding backup domain low-voltage device, and further includes: and supplying power to the clock crystal oscillator and the RTC functional circuit.
In some embodiments, the normal LDO circuit is configured to supply a voltage to a corresponding digital domain, further comprising: and supplying power to the memory unit and the low-voltage peripheral circuit of the MCU chip.
Fig. 2 is a schematic diagram of a low-power-consumption power management circuit for an MCU chip according to an embodiment of the present application, which mainly includes a power switching module, a power detection module, and an LDO combination circuit.
The main negative power supply input of the power switch switching module is Vdd and Vbat respectively. While the two power switches are controlled by the output signal Swctrl from the Vdd power detection block, the power switching block output Vddsw is connected to vbat through a switch when the signal is low, and is connected to Vdd through a switch when the signal is high. Wherein, Vddsw is used as the power supply of the low-power LDO in the LDO circuit, and the power supply of the LDO in the normal mode is Vdd; the low-power LDO outputs Dvddlp as a supply voltage of a low-voltage device in a backup domain, and the normal LDO outputs Dvddd as a supply voltage of a core digital domain.
It should be noted that, when the whole MCU chip operates in a low power consumption state, the normal LDO is turned off, and the switch connected between Dvddlp and Dvdd may be controlled by the control signal from the backup domain Lpctrl according to the actual application requirement, so that it is turned on, and the Dvddlp is used to supply power to the Dvdd voltage domain, so as to maintain the internal data thereof.
Preferably, in this embodiment, the low power LDO circuit outputs Dvddlp for supplying voltage to the corresponding low voltage device in the backup domain, and the normal LDO circuit outputs Dvdd for supplying voltage to the corresponding digital domain.
As a preferable preference in this embodiment, when the MCU chip operates in a low power consumption state, the normal LDO circuit is turned off.
Preferably, in this embodiment, when the MCU chip operates in a low power consumption state, the switch connected between Dvddlp and Dvdd is controlled to supply power to the Dvdd voltage domain through Dvddlp.
Preferably, in this embodiment, the power supply switching module is configured to receive a switch control signal output by the Vdd power supply switching module, and when the switch control signal is at a low level, the power supply switching module outputs Vddsw and is connected to the preset secondary battery power supply Vbat through a switch; when the switch control signal is at a high level, the power switching module outputs Vddsw and is connected to the preset main power supply Vdd through a switch.
Fig. 3 shows the operating principle of the power detection circuit in the low power consumption power management circuit for the MCU chip according to the embodiment of the present application. Where the abscissa of the graph represents time and the ordinate is the Vdd supply voltage. The entire power supply voltage Vdd change process from power-up to power-down process module output signal Swctrl is shown in fig. 3. In fig. 3, POR represents a power-on switching threshold of the power supply voltage, PDR is a power-off switching threshold, a difference between the two voltages is Vhys, and the hysteresis voltage prevents the high and low levels of the Swctrl signal from being switched back and forth when the power supply voltage is subjected to interference fluctuation. Tdly is the delay time after the Swctrl signal reaches the power-on threshold of POR, in order to switch the Swctrl signal high again after the Vdd output of the power supply is stable.
Further, as shown in fig. 4, the power switch switching circuit in the low power consumption power management circuit for MCU chip according to the embodiment of the present application, specifically, as a circuit structure for the power switch switching circuit. The main design part is a switch circuit formed by Msp1 tubes to Msp 12. The specific working principle is as follows:
when the switch control signal Swctrl is at a low level, the PMOS switching transistor gate terminal control signals c1_ Vdd/c2_ Vdd/c3_ Vdd, c1_ sw/c2_ sw/c3_ sw from Vdd to Vddsw are at a high level, the switches Msp1 to Msp6 are turned off, the PMOS switching transistor gate terminal control signals c1b _ Vbat/c2b _ Vbat/c3b _ Vbat and c1b _ sw/c2b _ sw/c3b _ sw from Vbat to Vddsw are at a low level, the switches Msp7 to Msp12 are turned on, and the Vddsw is connected to the Vbat power supply.
Further, when the switch control signal swctrl is at a high level, the gate signals of the switches Msp1 to Msp6 are controlled to be at a low level, the gate signals of the Msp7 to Msp12 are controlled to be at a high level, and the Vddsw is connected to the Vdd power supply. In the design, the switches are connected in parallel regardless of the Vdd-Vddsw path or the Vbat-Vddsw path, so that the relationship between Vdd or Vbat connection or disconnection and Vddsw is gradually and slowly related,
for example, when the switching tube of Vddsw connected with Vdd is turned on, Msp1/Msp2 is firstly turned on, Msp3/Msp4 is turned on after tens of ns, and Msp5/Msp6 is turned on again. Therefore, the power supply linear characteristic of the subsequent power supply circuit is better guaranteed.
In some embodiments, the design of the circuit structure is not restricted to the parallel connection of three branches in fig. 4, and a more branch design is also within the scope of the present application.
Fig. 5 is a schematic block diagram of an LDO in a low power consumption power management circuit for an MCU chip according to an embodiment of the present application, which mainly includes two LDO modules, one of which is a low power consumption LDO and the other of which is a normal mode LDO.
Specifically, for the low power consumption LDO, the power supply is from the switch module, and since the LDO combination circuit module 103 supplies power from Vbat or vdd, the low power consumption LDO is always in a working state as long as the MCU chip has power supply. For example, in some scenario applications vbat power is from the battery and there is still a voltage output even if Vdd power is lost vddsw. For a normal mode LDO whose operation state is controlled by its enable signal ldoen from the backup register area supplied by the low power LDO output power dvddlp, the high level normal mode LDO operates.
Further, in the low power mode, in order to reduce the leakage current of the digital core area, the normal mode LDO output voltage Dvdd may be pulled to zero, but if the internal circuit of the LDO is to be turned off to save data, the Lpctrl signal goes high, the Lpdvdd and the Dvdd transmission gate are connected to be turned on, and the Dvdd low-voltage area is supplied with power through Lpdvdd, and at this time, only the leakage current of the device exists in the Dvdd low-voltage area.
It should be noted that the steps illustrated in the flowcharts of the figures may be performed in a computer system such as a set of computer-executable instructions and that, although a logical order is illustrated in the flowcharts, in some cases, the steps illustrated or described may be performed in an order different than presented herein.
It will be apparent to those skilled in the art that the modules or steps of the present application described above may be implemented by a general purpose computing device, they may be centralized on a single computing device or distributed across a network of multiple computing devices, and they may alternatively be implemented by program code executable by a computing device, such that they may be stored in a storage device and executed by a computing device, or fabricated separately as individual integrated circuit modules, or fabricated as a single integrated circuit module from multiple modules or steps. Thus, the present application is not limited to any specific combination of hardware and software.
The embodiment of the application also provides an MCU chip which comprises the low-power-consumption power management circuit. Detect the voltage characteristic on the main power supply Vdd through the power detection module in the MCU chip and regard as the switch of control power switching module to this comes better optimization power consumption distribution, do not exist or can't reach the threshold value requirement when main power supply Vdd, and the chip is in the battery power supply this moment, its consumption current mainly circulates the low-power consumption LDO through the power switching module and supplies power for the low-voltage circuit that corresponds, along with Vdd power supply is normal, no matter be the branch road of low-power consumption control or normal LDO consumes the branch road, its supply voltage all comes from the Vdd power, close battery power supply branch road this moment and save battery energy. When the vdd power supply is normal and the low power consumption state is achieved, the output of the low power consumption LDO and the dvdd can be controlled to be matched with each other to achieve partial power supply of the low-voltage device, and the power supply efficiency of the system is improved.
The above description is only a preferred embodiment of the present application and is not intended to limit the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims (10)
1. A low-power consumption power management circuit for an MCU chip, comprising:
the power supply switching module is used for receiving a control signal output by the power supply detection module, and the control signal is used for indicating the power supply switching module to switch a main power supply between a preset main power supply Vdd or a preset battery auxiliary power supply Vbat;
the Vdd power supply detection module is used for detecting whether the main power supply exists and whether the power supply is stable or not, and outputting the control signal to the power supply switching module to switch the main power supply and the auxiliary power supply;
the LDO combined circuit module at least comprises: the low-power LDO circuit is used for supplying voltage to the corresponding backup domain low-voltage device, and the normal LDO circuit is used for supplying voltage to the corresponding digital domain.
2. The circuit of claim 1, wherein the power switching module is configured to receive the switch control signal output from the Vdd power switching module,
when the switch control signal is at a low level, the power supply switching module outputs Vddsw and is connected to the preset secondary battery power supply Vbat through a switch;
when the switch control signal is at a high level, the power switching module outputs Vddsw and is connected to the preset main power supply Vdd through a switch.
3. The circuit of claim 1, wherein the low power LDO circuit outputs Dvddlp for supplying voltage to a corresponding backup domain low voltage device and the normal LDO circuit outputs Dvdd for supplying voltage to a corresponding digital domain.
4. The circuit of claim 1, wherein the normal LDO circuit is turned off if the MCU chip is operating in a low power consumption state.
5. The circuit of claim 4, wherein a switch connected between the Dvddlp and the Dvddd is controlled to supply power to the Dvddd voltage domain through the Dvddlp when the MCU chip is operating in a low power consumption state.
6. The circuit of claim 1, wherein the low-power LDO circuit is configured to supply a voltage to a corresponding backup domain low-voltage device, further comprising: and supplying power to the clock crystal oscillator and the RTC functional circuit.
7. The circuit of claim 1, wherein the normal LDO circuit is configured to supply a voltage to a corresponding digital domain, further comprising: and supplying power to the memory unit and the low-voltage peripheral circuit of the MCU chip.
8. The circuit of claim 1, wherein the Vdd power detection module is further configured to, when detecting that the main power supply is not present or cannot supply power stably, supply power to the MCU chip through a preset secondary battery power supply Vbat, and supply power to a corresponding low-voltage circuit through the low-power LDO circuit via the power switching module.
9. The circuit of claim 8, wherein the power switching module is configured to receive a control signal output by the power detection module, and supply power to the MCU chip through a preset main power supply Vdd, and turn off the preset secondary battery power supply Vbat.
10. An MCU chip comprising a low power consumption power management circuit according to any one of claims 1 to 9.
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| CN202210045590.4A CN114397957A (en) | 2022-01-15 | 2022-01-15 | Low-power-consumption power management circuit for MCU chip, and MCU chip |
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| CN202210045590.4A CN114397957A (en) | 2022-01-15 | 2022-01-15 | Low-power-consumption power management circuit for MCU chip, and MCU chip |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN117251042A (en) * | 2023-11-20 | 2023-12-19 | 北京紫光芯能科技有限公司 | Method for reducing MCU power consumption |
| CN117293973A (en) * | 2023-11-21 | 2023-12-26 | 合众新能源汽车股份有限公司 | Power management method of domain controller and domain controller |
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