CN114397657A - On-orbit real-time SAR imaging method - Google Patents

Abstract

The application provides an on-orbit real-time SAR imaging method, which belongs to the technical field of satellite-borne SAR imaging, and solves the problems of poor imaging quality and long imaging time in the prior art; the method provided by the application adopts the HBM structure combined with the CS algorithm to form a parallel flow storage and calculation integrated framework, the SAR imaging speed can be effectively increased, and the overall SAR imaging speed can be increased by about 4 times under the same computing resources and storage resources.

Description

On-orbit real-time SAR imaging method

Technical Field

The invention relates to the technical field of SAR satellite imaging, in particular to an on-orbit real-time SAR imaging method.

Background

The satellite-borne Synthetic Aperture Radar (SAR) has high working orbit, wide lower coverage and wide application prospect. The traditional remote sensing satellite needs to process a plurality of link links through on-satellite storage, satellite-ground data transmission and ground receiving, has long time delay and slow response speed, and is difficult to meet the requirement of major event monitoring on the quick response capability of a satellite system. The on-orbit real-time SAR imaging technology can improve the real-time performance of the application of the satellite-borne SAR, explore the data value and meet the fast response requirement.

The research of the domestic satellite-borne SAR system is late, the research is started in 1980, the in-orbit real-time SAR imaging system is still in the exploration stage at present, units such as the China academy of sciences electronics, the China space technology research institute, the national defense science and technology university, the Nanjing aerospace university and the like conduct the exploration of in-orbit real-time SAR, a remote sensing I mark the arrival of the satellite-borne SAR, a remote sensing V is used for the detection of national and local resources, and the emission of satellites such as HJ-1C, a high score III, a sea silk I and the like provides a large amount of actual measurement data for the domestic SAR field, thereby promoting the further development of the domestic SAR imaging technology. However, the satellite-borne SAR has not really realized real-time processing so far, and remains in the ground verification stage.

The satellite-borne real-time SAR imaging has great significance in the fields of military reconnaissance, environmental monitoring, disaster early warning and the like. With wider application fields and growing technical requirements, higher index requirements are also provided for the satellite-borne SAR imaging technology, and particularly the real-time performance is yet to be further improved, which is mainly limited by the slow processing speed of SAR imaging.

Prior art 1: the chinese patent CN113406624A, which discloses a high-efficiency time-frequency hybrid imaging method for high-resolution spaceborne SAR, performs sub-aperture image fusion through the idea of sub-aperture frequency superposition, and avoids interpolation operation by performing superposition in the frequency domain, thus fundamentally avoiding aperture fusion errors. The method mainly improves the calculation efficiency from the angle of the algorithm, mainly solves the problem of aperture fusion error, and obtains a more accurate SAR imaging quality effect.

Prior art 2: the Chinese patent CN112330091A provides an on-orbit autonomous imaging task planning method for a satellite-borne SAR (synthetic aperture radar), which solves the problem of on-orbit autonomous imaging task planning of the satellite-borne SAR under a high-precision small-breadth multi-target imaging task, determines a reasonable target area observation sequence according to the ground target distribution characteristics, autonomously arranges imaging tasks, and finally obtains the imaging time and the imaging angle of each target point for guiding the SAR load to perform imaging observation on the target area. The intelligent planning is mainly made for the satellite-borne task, the speed of finishing the satellite-borne SAR imaging observation task is improved from the service level, although the speed of the whole observation task is improved, the imaging speed is not assisted, and the resource utilization rate is high only through task arrangement.

Prior art 3: the invention discloses a method and a system for quickly preprocessing high-resolution spaceborne SAR mass data, and particularly relates to a method and a system for quickly preprocessing the high-resolution spaceborne SAR mass data. The method focuses on preprocessing of SAR data, adopts accurate detection and cyclic extension judgment of a small amount of data for basic data, and provides efficient assistance for subsequent SAR data processing steps, so that SAR imaging speed is increased.

Prior art 4: chinese patent CN113156431 provides a method for implementing a time domain BP imaging algorithm based on multiple FPGAs, which is applied to a security inspection imaging device, and has faster imaging speed and lower operation power consumption compared with a CPU + GPU. This patent lies in rather than it difference:

the application field is as follows: patent CN113156431 is applied to security inspection equipment, and the patent is applied to satellites

The algorithm is as follows: patent CN113156431 uses the earliest occurring time domain BP algorithm, and this patent uses the frequency domain CS algorithm.

The number of chips: the patent only uses one FPGA chip to complete the whole SAR imaging algorithm, and the patent CN113156431 uses two FPGAs. The equipment volume of this patent is littleer, and the consumption is littleer. Prior art 5: a thesis of ' the science and newspaper of northwest industry university ' of satellite-borne SAR imaging and intelligent processing single-chip multiprocessing architecture ', an intelligent processing system of a satellite-borne SAR image needs to perform on-orbit real-time processing on imaging and a plurality of different task applications, so a banded Tile data processing scheme and a special multiprocessing architecture are designed by using a special chip, a Tile division and multi-Tile synchronous splicing strategy is provided, a data cache structure between processing units is designed, off-chip memory access bandwidth is greatly reduced, and parallel flow execution of a multi-task model is supported. The real-time performance of the on-orbit remote sensing intelligent processing platform can be improved by the framework. The thesis mashes SAR imaging processing and AI image recognition, comprehensively considers the process, improves the total real-time performance, but does not optimize the SAR imaging processing time, and the SAR imaging time is still long.

Prior art 6: a thesis of ' Saian electronic technology university ' on-board SAR real-time imaging technology research ' is based on the basic working principle of on-board SAR real-time imaging and demonstrates various indexes of on-board SAR real-time imaging according to parameters; designing a real-time imaging processing board card according to the real-time performance and large operand requirements of the satellite-borne SAR; the CS imaging algorithm is optimized, and the switching flow of the DDR3 SDRAM working state in a pipeline mode is designed; and the design of the satellite-borne SAR real-time imaging software is completed. In the aspect of real-time performance, the SAR imaging processing time in the paper is consumed too much in FFT data processing and DDR3 memory reading and writing, and the real-time problem cannot be really solved.

Disclosure of Invention

The patent provides an SAR imaging method, which is characterized in that: the method adopts an FPGA chip, and a large-capacity storage module and an imaging algorithm module are arranged on the FPGA chip;

the large-capacity storage module is an HBM (high frequency memory module), the HBM comprises a plurality of data channels, and the read-write port of each data channel is separated and can independently operate;

the number of the imaging algorithm modules is multiple, each imaging algorithm module corresponds to one data channel of the HBM, and the imaging algorithm modules and the HBM interact through a large-bandwidth AXI bus.

The mass storage module and the imaging algorithm module form a parallel flow storage and calculation integrated framework.

Preferably, there are 32 data channels in total.

Preferably, the imaging algorithm module employs a CS algorithm.

The CS algorithm has the advantage that the distance migration curves of all the distance units are preliminarily corrected to be the same as the distance migration curve at the reference distance before the signal is converted into the two-dimensional frequency domain. The curve function is only related to the azimuth direction and does not change along with the change of the distance, so that the distance migration correction can be completed through simple phase multiplication in a two-dimensional frequency domain, and the complex interpolation operation is avoided.

Preferably, the HBM is configured to receive raw echo data and output processed image processing data.

Preferably, the plurality of data channels are divided into first 16 channels and second 16 channels.

According to another aspect of the present invention, there is also provided a rail real-time SAR imaging method, characterized in that: the method comprises the following steps:

s1, receiving original echo data, storing the original echo data into the first 16 channels of the HBM for accumulation, and then performing azimuth Fourier transform and complementary distance migration correction;

s2: transposing the data subjected to the distance migration correction processing in the step S1 into the last 16 channels of the HBM, performing fourier transform on the data of each echo, performing secondary distance compression processing and consistent distance migration correction processing in a frequency domain, performing inverse fourier transform after the processing is completed, and performing distance-to-pulse pressure processing;

s3, the output of the pulse pressure from the distance direction in the step S2 is transposed and stored in the first 16 channels, and the storage sequence is shown in the table 1; and multiplying each line of data by a matched filter coefficient, performing phase correction, and performing inverse Fourier transform to obtain the image processing data.

1) The innovation point of the invention is that the idea of multi-channel parallel storage and calculation is used in each step of the imaging processing. The time of pure calculation is 16 times faster;

2) the patent accelerates the SAR imaging process from the perspective of a computing architecture. The HBM structure is adopted, the universality is higher than that of a proprietary chip, a DDR storage framework is abandoned, time consumption caused by reading and writing can be reduced, and the hardware size can be reduced;

3) by using the architecture integrating storage and calculation, the SAR imaging speed can be effectively increased, and the overall SAR imaging speed can be increased by about 4 times under the same calculation resources and storage resources.

Drawings

FIG. 1 is a flow of the main processing of the CS algorithm in the prior art;

FIG. 2 illustrates a prior art echo data storage method;

FIG. 3 is the IP structure of the HBM used in the present invention;

FIG. 4 is a block diagram of an FPGA design for a computing-integrated architecture for use with the present invention;

FIG. 5 is a schematic flow chart of the Chirp Scaling algorithm;

fig. 6 is a schematic diagram of an algorithm employing the HBM structure according to the present application.

The present invention is described in further detail below. The following examples are merely illustrative of the present invention and do not represent or limit the scope of the claims, which are defined by the claims.

DETAILED DESCRIPTION OF EMBODIMENT (S) OF INVENTION

The technical scheme of the invention is further explained by the specific implementation mode in combination with the attached drawings.

In the prior art, a CS algorithm is selected as an SAR imaging algorithm, and the CS algorithm is a frequency domain processing method of SAR. The principle is that the LFM signal has the characteristic of large time-bandwidth product to realize signal time shift. Theoretically, under a large scene and a squint condition, the line tone scaling algorithm has a better processing effect. The method is widely applied to satellite-borne SAR, and is a main processing flow of a traditional CS algorithm as shown in FIG. 1.

FIG. 5 shows the main calculation flow of the modified CS algorithm to adapt to the HBM structure

The CS algorithm starts with an azimuth FFT and ends with an azimuth IFFT, with the range-wise processing operations implicit therein. In the whole processing process, the CS algorithm only uses two operations: FFT/IFFT and complex multiplication. The method comprises five steps of azimuth FFT, Chirp Scaling, range direction processing, range migration correction, aroma residual error processing, azimuth compression and azimuth IFFT processing.

S1: azimuthal FFT processing

The baseband echo signal may be represented as:

weighting the antenna pattern, s₀For transmitting signal envelopes, t_aIs azimuth time, τ is range time, k_rFor frequency-modulated slope of the transmitted signal, R_sThe shortest slant distance between the target and the radar. The first exponential term in the formula represents the phase modulation in the distance direction and the second exponential term represents the phase modulation in the azimuth direction.

After azimuthal FFT, s, according to the stationary phase principle_r(τ,t_a；R_s) Expression s in the range-Doppler domain_r(τ,f_a；R_s) Comprises the following steps:

wherein C is a complex constant, R_fa(f_a,R_s) For representation of range migration in the range-doppler domain:

R_fa(f_a,R_s)＝R_s[1+C_s(f_a)]

K_s(f_a,R_s) For the actual distance versus chirp rate:

c as defined in formula_s(f_a) Called bending factor, it can be seen from the above formula that the distance migration curves of the targets at different distances are different due to different weights for the bending factor at different distances.

α (f) defined in formula_a,R_s) Referred to as a range distortion factor, which exists such that the range-to-chirp slope of different target echoes is not uniform, which if not compensated will result in range-to-defocus.

The first exponential term still represents the range-wise phase modulation and the second exponential term still represents the azimuth-wise phase modulation. Range migration of the target is the azimuth dependent Doppler frequency f_aAnd R_sThe distance to chirp slope of the target echo is also a function of f_aAnd R_sA function of the change.

S2: chirp Scaling process

The principle is that the phase of the target echo is finely adjusted, so that the distance compression result shifts on the position, and the distance migration curve of each distance unit target is adjusted to be consistent with the distance migration curve of the reference distance, so that the uniform distance migration correction can be performed on all the targets.

Constructing a Chirp Scaling factor:

Φ₁(τ,f_a；R_ref)＝exp{-jπK_s(f_a,R_ref)C_s(f_a)· [τ-2R_fa(f_a,R_ref)/c]²}

K_s(f_a,R_ref)≈K(f_a,R_s)

then for the distance R_sThe Chirp Scaling process at (a) can be expressed as:

wherein, theta_Δ(f_a；R_s) Phase residual introduced for Chirp Scaling process

τ(f_a) The change track of the phase center of the echo signal can be expressed as:

τ(f_a)＝2[R_s+R_refC_s(f_a)]/c

that is to say: the range migration curve of the target in the range-Doppler domain becomes:

the variable quantity is as follows:

s3: range-oriented processing and range migration correction

After Chirp Scaling processing, the signals are subjected to range-oriented FFT, and the signals are in a two-dimensional frequency domain (f)_τ,f_a) The expression above is:

in the formula, the first exponential term represents azimuth phase modulation and residual error phase; the second exponential term represents the distance modulation towards chirp; the third exponential term contains the actual range migration amount of each point target. Accordingly, the second phase factor of the CS algorithm is:

the first term in the formula is used for completing the distance direction processing and the secondary distance compression, and the second term is used for completing the distance migration correction.

S4: phase residual compensation, azimuth compression

Signal S after IFFT over distance₃(τ,f_a) Comprises the following steps:

the first exponential term represents the Chirp modulation of azimuth, and the second exponential term represents the Chirp Scaling process and phi₁(τ,f_a；R_ref) The phase residual introduced after multiplication. It follows that the third phase factor of the CS algorithm is:

Φ₃(τ,f_a) The first term is used to implement azimuth matched filtering and the second term is used to correct the phase residual.

S5: azimuthal IFFT processing

The final imaging result after the azimuth compression is completed by the azimuth IFFT processing is as follows:

wherein A is_a(t_a) And A_r(τ) is the envelope of the azimuth and range processing, respectively.

As shown in fig. 2, the echo data is stored in the DDR row by row or column by column; through the analysis of the CS algorithm steps, the CS algorithm is found to have a plurality of times of reading and writing of the large-capacity memory, the large-capacity memory reading and writing are needed once each new matrix is obtained, and the time for the memory reading and writing in the CS algorithm accounts for about half of the whole processing time. However, the existing large-capacity memory architecture is based on a DDR chip, the DDR chip only has one data port, and reading and writing cannot be performed simultaneously, so that the parallelism of the algorithm is greatly limited.

Example 1

The advent of High Bandwidth Memory (HBM) technology can effectively solve the problem of insufficient parallelism of CS algorithms. The HBM technology is a video card and video memory technology developed by AMD corporation, and the core of the HBM is a stacked design, in which a memory space is laid out to a three-dimensional space. The storage mode of the traditional video memory is based on plane distribution, all storage particles are uniformly distributed in a two-dimensional plane, except for using single particles with larger capacity, if the capacity needs to be expanded, more particles can be laid on a PCB, and the particles of the HBM video memory are concentrated and extend upwards together, so that the storage capacity which is several times that of the traditional video memory is realized.

On the other hand, a new communication mechanism is also introduced in the process that the HBM video memory solves the bottleneck of the memory controller, the bottommost layer of each cluster of HBM video memory particles is provided with an independent Base Die and integrates chips capable of managing the whole cluster of stacked particles, and the chips are directly communicated with the memory controller and can be used for collecting data in the stacked particles and helping the memory controller to control the memory controller. Each chip manages the particles independently, so that the multichannel parallel read-write capability is realized.

The storage architecture of the HBM is matched with the requirement of the multi-channel parallel read-write capability and the CS algorithm, and the operation speed of the algorithm can be greatly improved by applying the new architecture. According to the method, a large-capacity HBM is integrated in an FPGA chip, computing resources and storage resources are in the same chip, and the chip is used for realizing that a CS algorithm can be really integrated with storage and calculation through interaction between large-bandwidth AXI buses.

As shown in fig. 3, the IP of the HBM of the present invention shows that the read/write ports are separated and can be read/written simultaneously, and there are more than 32 data channels.

As shown in fig. 4, a storage and computation integration technology is used, the mass storage module and the imaging algorithm module are deployed in the same FPGA chip, and deep coupling is performed on the architecture.

Most of the parallel modes of processors including GPUs are data parallel, for example, C6678 has 8 cores, 8 cores can perform operations simultaneously, but data cannot be transmitted into 8 cores simultaneously, and only data can be transmitted sequentially. And it is also difficult to pipeline between functions with inheritance to data during the operation of each core (see fig. 6). The patent divides the data echo into 16 parts, and the 16 parts of data can be simultaneously input into 16 calculation modules. The computing module and the storage module use 16 parallel buses, and no catch delay exists in the middle, so that the parallelism in the computing process is fully excavated, and great performance improvement is brought. Assuming that there are D data in the CS algorithm task, each data calculation takes time t, and the serial calculation time is D × t. If parallel computing is adopted and the number of parallel units is P, the parallel computing time is about D × t/P, and ideally, the parallel computing can bring an acceleration ratio close to P.

In addition, a pipeline is formed in the CS calculation module, ABC in a red box in FIG. 6 represents each step of the CS algorithm, and data conflict and structure conflict do not exist among the sub-steps, so that each sub-step can be performed simultaneously with other sub-steps. The parallel between tasks is realized by the pipeline calculation, and each task is in different subtask execution stages at the same time. Ideally, the acceleration ratio of pipelined computation approaches the pipelined order indefinitely, as compared to serial computation.

The invention redesigns the realization process of the CS algorithm, and comprises the following specific steps:

s1, receiving the original echo data to accumulate, and performing direction FFT and complementary RCMC

The method comprises the steps of equally dividing data in each echo into 16 parts and storing the 16 parts into the first 16 channels of the HBM;

assuming that the number of echoes required for a SAR image is 16384, and there are 16384 data in each echo, the storage rule is shown in table 1:

TABLE 1

FFT is performed on each column of data in the table above, and complex multiplication is performed on each output frequency domain data and RCMC (range migration correction) coefficients. Since 16 data channels are used, 16 FFTs and 16 complex multiplications can be performed simultaneously, so that the time for all columns to complete the FFT and the time for RCMC processing is 16 times faster than in the conventional method.

S2 radial pulse compression

And (3) transposing the data subjected to the RCMC processing in the previous step and storing the data into the last 16 channels of the HBM, wherein the storage sequence is shown in a table 2:

TABLE 2

The data of each echo is subjected to FFT (Fourier transform), SRC and uniform RCMC processing in a frequency domain, IFFT (inverse Fourier transform) is carried out after the processing is finished, distance pulse pressure processing forms flowing water, and since echo components are stored for 16 components, 16384 pulses can be processed in parallel by 16 components, which is 16 times faster than the traditional distance pulse pressure processing.

S3 orientation pulse pressure, phase correction and inverse FFT

The output of the last step of distance-oriented pulse pressure is transposed and stored in the first 16 channels, and the storage sequence is shown in table 1.

Each column of data is multiplied by matched filter coefficients and phase corrected, followed by an inverse FFT, which 3 small steps also form a stream and parallel processing, which is 16 times faster.

The data read-write bandwidth of the invention is as follows: 400MHz, 32bit, 16 Gbps (400MHz is the HBM read-write frequency, 32bit is the number of bits of data, 16 is the number of channels); the data read and write bandwidth of DDR3 is generally: 1600MT/s × 64bit is 100Gbps, and because some extra overhead is also considered for DDR read and write, the data read and write speed is more than twice faster.

TABLE 3

Since the time T1 for reading and writing data in the conventional SAR imaging process is substantially the same as the calculated time T2, assuming that T1 is T2, then

The processing time Ttrad of the conventional SAR imaging processing method is 2T 1;

the processing time Tnew of the SAR imaging processing method is 9T 1/16.

Tnew≈Ttrad/4

To sum up, this patent has used the integrative technique of deposit and calculation, has carried out degree of depth flowing water and the parallel reconstruction of extensive scale to SAR imaging algorithm, has broken through the memory read-write restriction, has promoted the speed of SAR formation of image about 4 times.

Claims (10)

1. An SAR imaging method characterized by: the method adopts an FPGA chip, wherein a large-capacity storage module and an imaging algorithm module are arranged on the FPGA chip, and the FPGA chip is a parallel flow storage and computation integrated framework;

the large-capacity storage module is an HBM (high frequency memory module), the HBM comprises a plurality of data channels, and the read-write port of each data channel is separated and can independently operate;

the number of the imaging algorithm modules is multiple, each imaging algorithm module corresponds to one data channel of the HBM, and the imaging algorithm modules and the HBM interact through a large-bandwidth AXI bus;

the method comprises the following steps:

s1, receiving original echo data, storing the original echo data into the first 16 channels of the HBM for accumulation, and then performing azimuth Fourier transform and complementary distance migration correction;

s2: transposing the data subjected to the distance migration correction processing in the step S1 into the last 16 channels of the HBM, performing fourier transform on the data of each echo, performing secondary distance compression processing and consistent distance migration correction processing in a frequency domain, performing inverse fourier transform after the processing is completed, and performing distance-to-pulse pressure processing;

s3, the output of the pulse pressure from the distance direction in the step S2 is transposed and stored in the first 16 channels, and the sequence is stored; and multiplying each line of data by a matched filter coefficient, performing phase correction, and performing inverse Fourier transform to obtain the image processing data.

2. The SAR imaging method according to claim 1, characterized in that: the number of the on-chip memory read-write channels is 32.

3. The SAR imaging method according to claim 1, characterized in that: the imaging algorithm module adopts a CS algorithm.

4. The SAR imaging method according to claim 1, characterized in that: the HBM is used for receiving original echo data and rearranging the echo data output by each step of the CS algorithm.

5. The SAR imaging method according to claim 2, characterized in that: the plurality of data channels are divided into first 16 channels and last 16 channels.

6. The SAR imaging method according to claim 1, characterized in that: in step S1, the raw echo data is expressed as follows after being subjected to azimuth fourier transform:

wherein, C is a complex constant,

for the representation of range migration in the range-Doppler domain, K_s(f_a,R_s) Is the actual distance-to-chirp slope, C_s(f_a) Referred to as bending factor, W_aWeighting the antenna pattern, s₀For transmitting signal envelopes, t_aIs azimuth time, τ is range time, k_rFor frequency-modulated slope of the transmitted signal, R_sThe shortest slant distance between the target and the radar.

7. The SAR imaging method according to claim 1, characterized in that: in step S1, the supplementary distance free-movement correction is expressed as:

the term behind the right side of the equation is the amount of change.

8. The SAR imaging method according to claim 1, characterized in that: in step S2, the data after the secondary distance compression processing and the uniform distance migration correction processing is expressed as:

in the formula, the first exponential term represents azimuth phase modulation and residual error phase; the second exponential term represents the distance modulation towards chirp; the third exponential term comprises the actual range migration amount of each point target; accordingly, the second phase factor of the CS algorithm is:

the first term on the right side of the formula is used for completing range direction processing and secondary range compression, and the second term is used for completing range migration correction.

9. The SAR imaging method according to claim 1, characterized in that: in step S2, the data after the inverse fourier transform, distance-to-pulse pressure processing, is represented as:

wherein, the first exponential term represents the Chirp modulation of azimuth, and the second exponential term represents the Chirp Scaling process and phi₁(τ,f_a；R_ref) Phase residual error introduced after multiplication; and the third phase factor of the CS algorithm is:

Φ₃(τ,f_a) The first term is used to implement azimuth matched filtering and the second term is used to correct the phase residual.

10. The SAR imaging method according to claim 1, characterized in that: in step S3, the image processing data is expressed as:

wherein A is_a(t_a) And A_r(τ) is the envelope of the azimuth and range processing, respectively.

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