CN114389691B

CN114389691B - Optical module

Info

Publication number: CN114389691B
Application number: CN202210079617.1A
Authority: CN
Inventors: 王凤来
Original assignee: Hisense Broadband Multimedia Technology Co Ltd
Current assignee: Hisense Broadband Multimedia Technology Co Ltd
Priority date: 2022-01-24
Filing date: 2022-01-24
Publication date: 2024-02-27
Anticipated expiration: 2042-01-24
Also published as: CN114389691A

Abstract

The optical module comprises a circuit board and an optical receiving assembly, wherein the optical receiving assembly comprises an optical detector, a transimpedance amplifier and an MCU, the transimpedance amplifier generates a real-time RXLOS state value and reports the real-time RXLOS state value to the MCU, and the MCU writes the real-time RXLOS state value into a second register and waits for reading by an upper computer; the MCU judges the current RXLOS state value in the second register after monitoring the reading action of the upper computer, and does not write zero operation to the second register when the current RXLOS state value is a first preset value, wherein the first preset value represents a no-light state, zero value in the process of error reading to zero writing operation by the upper computer is avoided, and the reliability of the RXLOS alarm function of the optical module is ensured.

Description

Optical module

Technical Field

The application relates to the technical field of optical communication, in particular to an optical module.

Background

The RXLOS (Receive Loss of Signal, loss of received signal) alarm function can reflect whether the received signal is normal or not, and when the received signal is not lost, the RXLOS status value is 0; when the received signal is lost, the RXLOS state value is 1, and in the optical module product, an RXLOS signal pin is designed, and the upper computer receives the response value of the RXLOS through the RXLOS signal pin, so that the response value is responded and processed in time.

Because the speed is fast, the encapsulation is small, the power consumption is low and so on, the 40G QSFP (four-way SFP interface) +encapsulation optical module is developed rapidly, but because the encapsulation is small, the RXLOS signal pin is not designed in the structure, and the upper computer can not acquire the RXLOS state through the RXLOS signal pin.

Disclosure of Invention

The embodiment of the application provides an optical module which provides RXLOS function for a 40G QSFP+ packaged optical module.

The optical module provided in the embodiment of the application includes:

a circuit board;

a light receiving assembly electrically connected to the circuit board, comprising:

a photodetector for converting the received optical signal into a current signal;

the transimpedance amplifier is electrically connected with the optical detector and is used for amplifying and converting the current signal into a voltage signal and generating a real-time RXLOS state value according to the voltage signal;

the MCU comprises a second register, wherein the second register is used for storing a current RXLOS state value and is used for:

after the fact that the upper computer reads the second register and the current RXLOS state value in the second register is a first preset value is monitored, zero writing operation is not carried out on the second register, and the first preset value represents a no-light state;

also used for: the real-time RXLOS status value is written into the second register.

Drawings

In order to more clearly illustrate the technical solutions of the present disclosure, the drawings that need to be used in some embodiments of the present disclosure will be briefly described below, and it is apparent that the drawings in the following description are only drawings of some embodiments of the present disclosure, and other drawings may be obtained according to these drawings to those of ordinary skill in the art. Furthermore, the drawings in the following description may be regarded as schematic diagrams, not limiting the actual size of the products, the actual flow of the methods, the actual timing of the signals, etc. according to the embodiments of the present disclosure.

Fig. 1 is a connection diagram of an optical communication system according to some embodiments;

fig. 2 is a block diagram of an optical network terminal according to some embodiments;

FIG. 3 is a block diagram of an optical module according to some embodiments;

fig. 4 is an exploded view of a light module according to some embodiments;

FIG. 5 is a schematic diagram of the internal structure of an optical module according to some embodiments;

fig. 6 is an interactive schematic diagram of structures of an optical module according to some embodiments.

Detailed Description

The following description of the embodiments of the present disclosure will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all, of the embodiments of the present disclosure. All other embodiments obtained by one of ordinary skill in the art based on the embodiments provided by the present disclosure are within the scope of the present disclosure.

Throughout the specification and claims, unless the context requires otherwise, the word "comprise" and its other forms such as the third person referring to the singular form "comprise" and the present word "comprising" are to be construed as open, inclusive meaning, i.e. as "comprising, but not limited to. In the description of the specification, the terms "one embodiment", "some embodiments", "exemplary embodiment", "example", "specific example", "some examples", "and the like are intended to indicate that a particular feature, structure, material, or characteristic associated with the embodiment or example is included in at least one embodiment or example of the present disclosure. The schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics may be combined in any suitable manner in any one or more embodiments or examples.

The terms "first" and "second" are used below for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the embodiments of the present disclosure, unless otherwise indicated, the meaning of "a plurality" is two or more.

In describing some embodiments, expressions of "coupled" and "connected" and their derivatives may be used. For example, the term "connected" may be used in describing some embodiments to indicate that two or more elements are in direct physical or electrical contact with each other. As another example, the term "coupled" may be used in describing some embodiments to indicate that two or more elements are in direct physical or electrical contact. However, the term "coupled" or "communicatively coupled (communicatively coupled)" may also mean that two or more elements are not in direct contact with each other, but yet still co-operate or interact with each other. The embodiments disclosed herein are not necessarily limited to the disclosure herein.

At least one of "A, B and C" has the same meaning as at least one of "A, B or C," both include the following combinations of A, B and C: a alone, B alone, C alone, a combination of a and B, a combination of a and C, a combination of B and C, and a combination of A, B and C.

"A and/or B" includes the following three combinations: only a, only B, and combinations of a and B.

The use of "adapted" or "configured to" herein is meant to be an open and inclusive language that does not exclude devices adapted or configured to perform additional tasks or steps.

As used herein, "about," "approximately" or "approximately" includes the stated values as well as average values within an acceptable deviation range of the particular values as determined by one of ordinary skill in the art in view of the measurement in question and the errors associated with the measurement of the particular quantity (i.e., limitations of the measurement system).

In the optical communication technology, light is used to carry information to be transmitted, and an optical signal carrying the information is transmitted to an information processing device such as a computer through an information transmission device such as an optical fiber or an optical waveguide, so as to complete the transmission of the information. Since the optical signal has a passive transmission characteristic when transmitted through an optical fiber or an optical waveguide, low-cost and low-loss information transmission can be realized. Further, since a signal transmitted by an information transmission device such as an optical fiber or an optical waveguide is an optical signal and a signal that can be recognized and processed by an information processing device such as a computer is an electrical signal, it is necessary to perform mutual conversion between the electrical signal and the optical signal in order to establish an information connection between the information transmission device such as an optical fiber or an optical waveguide and the information processing device such as a computer.

The optical module realizes the function of interconversion between the optical signal and the electric signal in the technical field of optical fiber communication. The optical module comprises an optical port and an electric port, the optical module realizes optical communication with information transmission equipment such as optical fibers or optical waveguides through the optical port, realizes electric connection with an optical network terminal (for example, optical cat) through the electric port, and is mainly used for realizing power supply, I2C signal transmission, data signal transmission, grounding and the like; the optical network terminal transmits the electric signal to information processing equipment such as a computer through a network cable or wireless fidelity (Wi-Fi).

Fig. 1 is a connection diagram of an optical communication system according to some embodiments. As shown in fig. 1, the optical communication system mainly includes a remote server 1000, a local information processing device 2000, an optical network terminal 100, an optical module 200, an optical fiber 101, and a network cable 103.

One end of the optical fiber 101 is connected to the remote server 1000, and the other end is connected to the optical network terminal 100 through the optical module 200. The optical fiber itself can support long-distance signal transmission, such as signal transmission of several kilometers (6-8 kilometers), on the basis of which, if a repeater is used, it is theoretically possible to realize ultra-long-distance transmission. Thus, in a typical optical communication system, the distance between the remote server 1000 and the optical network terminal 100 may typically reach several kilometers, tens of kilometers, or hundreds of kilometers.

One end of the network cable 103 is connected to the local information processing device 2000, and the other end is connected to the optical network terminal 100. The local information processing apparatus 2000 may be any one or several of the following: routers, switches, computers, cell phones, tablet computers, televisions, etc.

The physical distance between the remote server 1000 and the optical network terminal 100 is greater than the physical distance between the local information processing apparatus 2000 and the optical network terminal 100. The connection between the local information processing device 2000 and the remote server 1000 is completed by an optical fiber 101 and a network cable 103; and the connection between the optical fiber 101 and the network cable 103 is made by the optical module 200 and the optical network terminal 100.

The optical module 200 includes an optical port and an electrical port. The optical port is configured to connect with the optical fiber 101 such that the optical module 200 establishes a bi-directional optical signal connection with the optical fiber 101; the electrical port is configured to be accessed into the optical network terminal 100 such that the optical module 200 establishes a bi-directional electrical signal connection with the optical network terminal 100. The optical module 200 performs mutual conversion between optical signals and electrical signals, so that a connection is established between the optical fiber 101 and the optical network terminal 100. For example, an optical signal from the optical fiber 101 is converted into an electrical signal by the optical module 200 and then input to the optical network terminal 100, and an electrical signal from the optical network terminal 100 is converted into an optical signal by the optical module 200 and input to the optical fiber 101.

The optical network terminal 100 includes a substantially rectangular parallelepiped housing (housing), and an optical module interface 102 and a network cable interface 104 provided on the housing. The optical module interface 102 is configured to access the optical module 200, so that the optical network terminal 100 and the optical module 200 establish a bidirectional electrical signal connection; the network cable interface 104 is configured to access the network cable 103 such that the optical network terminal 100 establishes a bi-directional electrical signal connection with the network cable 103. A connection is established between the optical module 200 and the network cable 103 through the optical network terminal 100. By way of example, since the optical network terminal 100 transmits an electrical signal from the optical module 200 to the network cable 103 and transmits a signal from the network cable 103 to the optical module 200, the optical network terminal 100 can monitor the operation of the optical module 200 as a host computer of the optical module 200. The upper computer of the optical module 200 may include an optical line terminal (Optical Line Terminal, OLT) or the like in addition to the optical network terminal 100.

The remote server 1000 establishes a bidirectional signal transmission channel with the local information processing device 2000 through the optical fiber 101, the optical module 200, the optical network terminal 100 and the network cable 103.

Fig. 2 is a block diagram of an optical network terminal according to some embodiments, and fig. 2 only shows a structure of the optical network terminal 100 related to the optical module 200 in order to clearly show a connection relationship between the optical module 200 and the optical network terminal 100. As shown in fig. 2, the optical network terminal 100 further includes a PCB circuit board 105 disposed in the housing, a cage 106 disposed on a surface of the PCB circuit board 105, and an electrical connector disposed inside the cage 106. The electrical connector is configured to access an electrical port of the optical module 200; the heat sink 107 has a convex portion such as a fin that increases the heat dissipation area.

The optical module 200 is inserted into the cage 106 of the optical network terminal 100, the optical module 200 is fixed by the cage 106, and heat generated by the optical module 200 is transferred to the cage 106 and then diffused through the heat sink 107. After the optical module 200 is inserted into the cage 106, the electrical port of the optical module 200 is connected with an electrical connector inside the cage 106, so that the optical module 200 establishes a bi-directional electrical signal connection with the optical network terminal 100. In addition, the optical port of the optical module 200 is connected to the optical fiber 101, so that the optical module 200 establishes a bi-directional electrical signal connection with the optical fiber 101.

Fig. 3 is a block diagram of an optical module according to some embodiments, and fig. 4 is an exploded view of an optical module according to some embodiments. As shown in fig. 3 and 4, the optical module 200 includes a housing, a circuit board 105 disposed in the housing, and an optical transceiver assembly.

The housing includes an upper housing 201 and a lower housing 202, the upper housing 201 being capped on the lower housing 202 to form the above-described housing having two openings 204 and 205; the outer contour of the housing generally presents a square shape.

In some embodiments of the present disclosure, the lower housing 202 includes a bottom plate and two lower side plates disposed at both sides of the bottom plate and perpendicular to the bottom plate; the upper case 201 includes a cover plate, and two upper side plates disposed at two sides of the cover plate and perpendicular to the cover plate, and two side walls are combined with the two side plates to realize that the upper case 201 is covered on the lower case 202.

The direction of the connection line of the two openings 204 and 205 may be identical to the length direction of the optical module 200 or not identical to the length direction of the optical module 200. Illustratively, opening 204 is located at the end of light module 200 (left end of fig. 3) and opening 205 is also located at the end of light module 200 (right end of fig. 3). Alternatively, the opening 204 is located at the end of the light module 200, while the opening 205 is located at the side of the light module 200. The opening 204 is an electrical opening, and the golden finger of the circuit board 105 extends out of the opening 204 and is inserted into an upper computer (such as the optical network terminal 100); the opening 205 is an optical port configured to be connected to the external optical fiber 101, so that the optical fiber 101 is connected to an optical transceiver module inside the optical module 200.

By adopting the assembly mode of combining the upper shell 201 and the lower shell 202, devices such as the circuit board 105, the optical transceiver component and the like are conveniently installed in the shell, and the upper shell 201 and the lower shell 202 can form packaging protection for the devices. In addition, when devices such as the circuit board 105 are assembled, the positioning component, the heat dissipation component and the electromagnetic shielding component of the devices are conveniently arranged, and the automatic implementation and production are facilitated.

In some embodiments, the upper housing 201 and the lower housing 202 are generally made of metal materials, which is beneficial to electromagnetic shielding and heat dissipation.

In some embodiments, the optical module 200 further includes an unlocking member 203 located on an outer wall of the housing, and the unlocking member 203 is configured to achieve a fixed connection between the optical module 200 and the host computer, or release the fixed connection between the optical module 200 and the host computer.

Illustratively, the unlocking member 203 is located on the outer walls of the two lower side plates of the lower housing 202, and includes a snap-in member that mates with the cage of the host computer (e.g., cage 106 of the optical network terminal 100). When the optical module 200 is inserted into the cage of the upper computer, the optical module 200 is fixed in the cage of the upper computer by the clamping component of the unlocking component 203; when the unlocking member 203 is pulled, the engaging member of the unlocking member 203 moves along with the unlocking member, so as to change the connection relationship between the engaging member and the host computer, so as to release the engagement relationship between the optical module 200 and the host computer, and thus the optical module 200 can be pulled out from the cage of the host computer.

The circuit board 105 includes circuit traces, electronic components, and chips, which are connected together by circuit traces according to a circuit design to perform functions such as power supply, electrical signal transmission, and grounding. The electronic components may include, for example, capacitors, resistors, transistors, metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET). The chips may include, for example, a micro control unit (Microcontroller Unit, MCU), limiting amplifier (limiting amplifier), clock data recovery chip (Clock and Data Recovery, CDR), power management chip, digital signal processing (Digital Signal Processing, DSP) chip.

The circuit board 105 is generally a hard circuit board, and the hard circuit board can also realize a bearing function due to the relatively hard material, for example, the hard circuit board can stably bear chips; the hard circuit board can also be inserted into an electrical connector in the upper computer cage.

The circuit board 105 further includes a gold finger formed on an end surface thereof, the gold finger being composed of a plurality of pins independent of each other. The circuit board 105 is inserted into the cage 106 and is connected by a gold finger to an electrical connector in the cage 106. The golden finger may be disposed on a surface of only one side of the circuit board 105 (for example, an upper surface shown in fig. 4), or may be disposed on surfaces of both upper and lower sides of the circuit board 105, so as to adapt to a situation where the number of pins is large. The golden finger is configured to establish electrical connection with the upper computer to achieve power supply, grounding, I2C signal transmission, data signal transmission and the like. Of course, flexible circuit boards may also be used in some optical modules. The flexible circuit board is generally used in cooperation with the rigid circuit board to supplement the rigid circuit board.

The optical transceiver module includes an optical transmitting module 206 and an optical receiving module 207 for respectively implementing transmission of optical signals and reception of optical signals. In this embodiment, the light emitting component 206 may be packaged in a coaxial TO, physically separated from the circuit board, and electrically connected by a flexible board; the light receiving assembly 207 is also packaged in a coaxial TO, physically separated from the circuit board, and electrically connected by a flexible board. In another common implementation, may be provided on the surface of the circuit board 105; in addition, the light emitting element 206 and the light receiving element 207 may be combined together to form an integrated structure for light transmission and reception.

Fig. 5 is a schematic partial structure of an optical module according to an embodiment of the present invention. As shown in fig. 5, in the optical module provided in this embodiment of the present application, the surface of one end of the circuit board 105 is provided with gold fingers in a row, the circuit board 105 is provided with an MCU, the gold fingers in a row are composed of one gold finger independent from each other, the circuit board 105 is inserted into an electrical connector in a cage, an electrical connection is established between the gold fingers and an upper computer, and the MCU is electrically connected with the gold fingers. The light receiving element 207 includes a photodetector 301, a transimpedance amplifier chip (also referred to as a transimpedance amplifier, TIA) 302, and a limiting amplifier chip (also referred to as a limiting amplifier, LIA) 303. The essence of a chip is the integration of a circuit, which may be integrated into a chip, and some of the functions in a chip may also be implemented by circuitry on a circuit board. The function of the chip can be realized by the chip, the circuit, and the main chip combined with the peripheral circuit. Different functions can be integrated by the same chip, and the change of the integrated form of the circuit still belongs to the protection scope of the invention. Specifically, the form of the photodetector in the embodiment of the present application may be a PIN photodiode in addition to an avalanche photodiode; the purpose of the photodetector is to convert the received optical signal linearly low into an electrical signal with as little additional noise as possible, and the type of photodetector whose wavelength is in the low-loss region of the optical fiber and which can be reliably used in optical fiber communication systems is mainly composed of PIN photodiodes and Avalanche Photodiodes (APDs). The PIN photodiode has low sensitivity to light power overload, an APD needs to design a bias circuit, and the reverse working voltage needed by the lock during working is large; A40G QSFP S R4 optical module is a low-power optical module for short-distance transmission, and a PIN photodiode is selected.

In the process of receiving the optical signal, the optical detector 301 is configured to receive the optical signal sent by the external device, and convert the optical signal sent by the external device into an electrical signal; an input pin of the transimpedance amplifying chip 302 is connected with an output pin of the light receiving component 207 and is used for converting an electric signal output by the light receiving component 207 into a voltage signal; the high-frequency signal input pin of the limiting amplification chip 303 is connected with the output pin of the transimpedance amplification chip 302, and is used for amplifying the first voltage signal output by the transimpedance amplification chip 302; the input pin of the clock data recovery chip is connected with the high-frequency signal output pin of the limiting amplifying chip 303, and is used for shaping the voltage signal output by the limiting amplifying chip 303, and the output pin of the clock data recovery chip is connected with the golden finger. The golden finger is connected with the upper computer, so that signals received by the optical module can be sent to the upper computer.

In actual operation, whether the optical module can work normally is related to whether the optical module can work normally or not by the receiving component, the RXLOS (Receive Loss of Signal Alarm, received signal loss alarm) function can reflect whether the receiving signal is normal or not, and when the receiving signal is not lost, the RXLOS state value is 0; when the received signal is lost, the RXLOS state value is 1, and in the optical module product, an RXLOS signal pin is designed, and the upper computer receives the response value of the RXLOS through the RXLOS signal pin, so that the response value is responded and processed in time. "1" characterizes a no light state, i.e., an optical signal loss state; "0" characterizes the light state, i.e. the light signal is received normally; it will be appreciated that other numbers may be used to characterize the matt state or related states.

The 40G qsfp+ packaged optical module includes four transmission channels, and in this embodiment, a transmission channel is first described as an example.

In order to highlight the objects, embodiments and technical effects of the embodiment of the present application, the embodiment of the present application is specifically described below with reference to fig. 6.

The input pin of the transimpedance amplifying chip 302 is connected with the output pin of the light receiving component 207, and is used for converting the electric signal output by the light receiving component 207 into a voltage signal, generating a real-time RXLOS state value according to the voltage signal, reporting the real-time RXLOS state value to the MCU, and storing the real-time RXLOS state value in the first register by the MCU. The process of the transimpedance amplification chip generating the real-time RXLOS state value according to the voltage signal can comprise the following steps: the TIA converts the current signal into a voltage signal, and holds the voltage signal as an RSSI signal (light reception intensity indication signal); the analog-to-digital converter in the TIA samples the voltage of the RSSI signal, converts the analog voltage of the RSSI signal into a digital signal, is called a sampling value (ADC value), obtains the received optical power according to the sampling value, and then generates a corresponding RXLOS state value according to the comparison relation between the received optical power and a threshold value, specifically, when the received optical power is smaller than the threshold value, the optical signal is considered to be lost, and the RXLOS state value is 1; when the received light power is larger than the threshold value, the received light signal is considered to be normal, and the RXLOS state value is 0; then reporting 1 or 0 to the MCU, and storing the 1 or 0 into a first register by the MCU; therefore, stored in the first register is the RXLOS status value generated by the TIA in real time.

The 40G qsfp+ package optical module complies with the SFF8436 protocol, the SFF8436 protocol specifying a register for the host computer to read, and for ease of distinction, this register, which is well specified by the protocol, is described in the embodiments of the present application as a second register for storing the RXLOS status value read by the host computer.

It will be appreciated that since the protocol specifies that the upper computer reads the RXLOS state value from the second register, the upper computer cannot directly read the corresponding RXLOS state value from the first register. Based on this, in the embodiment of the application, the MCU periodically reads the real-time RXLOS status value from the first register, and then writes it into the second register, waiting for the upper computer to read. Whenever the upper computer reads the value in the second register, the upper computer can read the current LOS state of the optical module due to the RXLOS state value of the real-time state in the first register stored in the second register, so that the upper computer can respond to and process the RXLOS signal in time. In this sense, the first register stores the real-time RXLOS state value and the second register stores the current RXLOS state value, with "current" being relative to the upper computer read time.

Thus, the MCU periodically reads the RXLOS status value from the first register and then writes it to the second register, waiting for the upper computer to read, as defined by the MCU reading the RXLOS status value from the first register and then writing it to the second register at a period of 50 ms.

The SFF8436 protocol specifies that the host computer write zeros to the second register after reading the RXLOS state value from the second register. Because the zero value is also used for representing the no-light state, the zero writing operation of the MCU to the second register can be just collided during a certain reading, if the value stored by the second register is 1 at the moment, namely, the optical signal LOS occurs, after the zero writing operation, the upper computer can read 0 at the moment, the host computer can consider that the optical module does not report the RX LOS, but the real situation is not the same, and the higher the frequency of the upper computer accessing the second register is, the higher the probability of misread 0 is, and the authenticity reported by the RX LOS in the scene is abnormal.

It should be noted that, the "zero" value during the zero writing operation in the embodiment of the present application does not characterize the RXLOS state value.

In this embodiment of the present application, the upper computer communicates with the optical module through the I2C bus, when the upper computer reads a value from the second register, this action may be monitored through the I2C bus, when the MCU monitors that the upper computer reads a value from the second register, it is determined whether the current RXLOS state value in the second register is "1", when the current RXLOS state value in the second register is "1", the MCU does not perform zero writing operation on the second register, so that optical signal loss actually occurs can be avoided, and the situation that the upper computer mistakenly does not occur optical signal loss occurs is avoided.

In this embodiment of the present application, the upper computer communicates with the optical module through the I2C bus, when the upper computer reads a value from the second register, the action may be monitored through the I2C bus, when the MCU monitors that the upper computer reads a value from the second register, it is determined whether the current RXLOS state value in the second register is "1", and when the current RXLOS state value in the second register is "0", the MCU performs a zero writing operation on the second register.

In the embodiment of the application, before the MCU performs the zero writing operation on the second register, the MCU judges the specific RXLOS state value stored in the second register, then determines whether the zero writing operation is performed or not, can avoid the upper computer from misreading a zero value in the zero writing operation process, and ensures the reliability of the RXLOS alarm function of the optical module.

In this embodiment of the present application, after the MCU monitors that the upper computer reads a value from the second register, it determines whether the current RXLOS state value in the second register is "1", when the current RXLOS state value in the second register is "1", the MCU does not perform zero writing operation on the second register, "or" when the upper computer reads a value from the second register, this action may be monitored through the I2C bus, when the MCU monitors that the upper computer reads a value from the second register, it determines whether the current RXLOS state value in the second register is "1", when the current RXLOS state value in the second register is "0", and the MCU performs zero writing operation on the second register, which is defined as the first thread.

The MCU periodically reads the RXLOS state value from the first register, then writes the RXLOS state value into the second register and waits for reading by the upper computer, and is defined as a second thread.

In the embodiment of the application, the first thread and the second thread independently run.

In some embodiments, when the period time of the upper computer accessing the second register is shorter, that is, after the first accessing the second register is finished, the MCU performs zero writing operation on the second register just finished, at this time, the upper computer performs zero writing operation on the second register again, and the MCU does not write the real-time RX LOS state value in the first register into the second register yet, if the value stored in the second register at this time is 1, that is, after the optical signal LOS occurs, the zero writing operation is performed, the upper computer reads 0 at this time, the host computer considers that the optical module does not report RX LOS, but the actual situation is not the same, and the higher the frequency of the upper computer accessing the second register, the greater the probability of misread to 0 is, under this situation, the authenticity of the RX LOS reporting is abnormal. The method specifically comprises the following steps: the upper computer and the optical module are communicated through the I2C bus, when the upper computer reads the numerical value from the second register, the action can be monitored through the I2C bus, after the MCU monitors that the upper computer reads the numerical value from the second register, whether the current RXLOS state value in the second register is 1 is judged, when the current RXLOS state value in the second register is 1, the MCU does not perform zero writing operation on the second register, and when the current RXLOS state value in the second register is 0, the MCU performs zero writing operation on the second register.

In some embodiments, the time when the upper computer reads from the second register for the first time is T1 time, the time when the MCU writes zero to the second register is T2 time, the time when the MCU writes the real-time RXLOS status value stored in the first register into the second register is T3 time, and the time when the upper computer reads from the second register for the second time is T4 time. The time interval from the time T1 to the time T4 is long enough to finish the zero writing of the MCU to the second register and the writing of the real-time RXLOS state value, so that the situation that the upper computer reads the RXLOS state value as a true value can be ensured, if the time interval from the time T1 to the time T4 is short, the situation that the MCU writes the zero writing of the MCU to the second register and the writing of the real-time RXLOS state value is not finished is not enough to finish the zero writing operation of the MCU to the second register for a period of time, but the MCU does not successfully write the real-time RXLOS state value in the first register into the second register, if the value stored at the moment is 1, namely the optical signal LOS occurs, after the zero writing action, the upper computer reads 0 at the moment, the host computer considers that the optical module does not report the RX LOS, but the true situation is not so, and the higher the probability of the error reading to 0 is larger when the frequency of the upper computer accesses the second register, the true LOS appears, the situation is that the error reading of the error is zero writing of the second register is carried out, the error value is avoided, and the error reading of the error is carried out in the second register is avoided, and the error reading of the zero writing of the optical module is carried out in the second register, and the error reading operation is carried out in the zero writing of the second register is ensured.

In summary, before the MCU writes the zero operation to the second register, the MCU in this embodiment of the present application may determine how much the RXLOS status value stored in the second register is, and then determine whether to write the zero operation, so as to avoid the host computer from misreading to the zero value in the process of writing the zero operation, and ensure the reliability of the RXLOS alarm function of the optical module.

The foregoing is merely a specific embodiment of the disclosure, but the protection scope of the disclosure is not limited thereto, and any person skilled in the art who is skilled in the art will recognize that changes or substitutions are within the technical scope of the disclosure. Therefore, the protection scope of the present disclosure shall be subject to the protection scope of the claims.

Claims

1. An optical module, comprising:

a circuit board;

2. The light module of claim 1, wherein the MCU is further configured to:

and after the upper computer is monitored to read from the second register, and when the current RXLOS state value in the second register is a second preset value, performing zero writing operation on the second register, wherein the second preset value represents a light state.

3. The light module of claim 1, wherein the MCU further comprises a first register;

the first register is for storing the real-time RXLOS state value from the transimpedance amplifier;

the MCU is used for reading the real-time RXLOS state value from the first register and writing the real-time RXLOS state value into the second register.

4. The optical module according to claim 3, wherein a first thread runs independently of a second thread, and the first thread does not perform zero writing operation on the second register when the current RXLOS status value in the second register is a first preset value after the upper computer is monitored to read from the second register;

the second thread includes reading the real-time RXLOS state value from the first register and writing to the second register.

5. The optical module according to claim 3, wherein a first thread runs independently of a second thread, and the first thread performs zero writing operation on the second register when the current RXLOS status value in the second register is a second preset value after the upper computer is monitored to read from the second register;

6. A light module as claimed in claim 3, wherein the MCU periodically reads the real time RXLOS status value from the first register.

7. The optical module of claim 1, wherein the write zero operation does not characterize an RXLOS state.

8. The light module of claim 5 wherein the first preset value is 1 and the second preset value is 0.

9. The optical module of claim 1, wherein the light receiving assembly further comprises:

and the limiting amplifier is used for limiting the voltage signal output by the transimpedance amplifier.

10. The optical module of claim 1, wherein the photodetector is a PIN photodiode or an APD photodiode.