CN114335195A

CN114335195A - Gallium nitride Schottky barrier diode with sub-vertical structure and manufacturing method thereof

Info

Publication number: CN114335195A
Application number: CN202111675137.3A
Authority: CN
Inventors: 邵春林; 闫怀宝; 闫发旺
Original assignee: Jiangxi Yuhongjin Material Technology Co ltd
Current assignee: Jiangxi Yuhongjin Material Technology Co ltd
Priority date: 2021-12-31
Filing date: 2021-12-31
Publication date: 2022-04-12

Abstract

The invention discloses a gallium nitride Schottky barrier diode with a sub-vertical structure and a manufacturing method thereof, wherein the gallium nitride Schottky barrier diode comprises a substrate (1), a buffer layer (2) and n which are sequentially arranged from bottom to top⁺-GaN epitaxial layers (3a), n^‑-a GaN epitaxial layer (3b), n^‑-a Schottky electrode providing region (13b) on the upper surface of the GaN epitaxial layer (3b), n⁺-the partially exposed portion of the upper surface of the GaN epitaxial layer (3a) is an ohmic electrode providing region (13 a); a first insulating protective layer (6a) coveringCovering the ohmic electrode region (13a) and the Schottky electrode region (13b), and covering n⁺-GaN epitaxial layer (3a) and n^‑-a step side wall face formed by the GaN epitaxial layer (3b), the first insulating protection layer (6a) provided with an ohmic electrode (4) in a window formed on the ohmic electrode providing region (13a), the first insulating protection layer (6a) provided with a schottky electrode (5) in a window formed on the schottky electrode providing region (13 b). The Schottky barrier diode increases forward current and improves reverse breakdown voltage.

Description

Gallium nitride Schottky barrier diode with sub-vertical structure and manufacturing method thereof

Technical Field

The invention relates to the technical field of third-generation semiconductor materials and devices, in particular to a structure of a gallium nitride Schottky barrier diode with a sub-vertical structure and a manufacturing method thereof.

Background

The Schottky Barrier Diode (SBD) is a key component of a rectifier circuit, changes physical characteristics such as voltage, current, frequency, conduction state and the like in the circuit by utilizing the unidirectional conductivity of the component, realizes functions such as power switching and power conversion, and is a core component in application fields such as chinese industrial processing, automobile manufacturing, wireless communication, consumer electronics, power grid transmission and transformation, new energy and the like, and more attracts attention and is applied in the industrial electronics upgrading process. And thus, higher demands are made on its forward current characteristics, reverse withstand voltage characteristics, and operating characteristics under high-frequency conditions.

The schottky barrier diode manufactured by the traditional technology has the technical problems of large reverse leakage current, low reverse withstand voltage and poor stability, so that the manufacture of the diode with small reverse leakage current, high reverse withstand voltage and good stability is an urgent requirement of the market.

The present invention has been made to solve the above problems.

Disclosure of Invention

Gallium nitride (GaN) -based materials have the characteristics of high electron mobility, high electron saturation velocity, wide forbidden bandwidth, high breakdown field and the like, so SBD devices made of semiconductor GaN materials are widely concerned as devices capable of stably operating in more severe working environments.

The first aspect of the present invention provides a gallium nitride schottky barrier diode with a sub-vertical structure, which includes:

substrate 1 and buffer layer 2 and n sequentially arranged from bottom to top on upper surface of substrate 1⁺GaN epitaxial layers 3a and n^--GaN epitaxial layer 3b, said n^-A region 13b for providing a schottky electrode on the upper surface of the GaN epitaxial layer 3b, n⁺The upper surface of GaN epitaxial layer 3a is partially exposed, and the exposed portion is ohmic electrode providing region 13 a;

a first insulating protection layer 6a, the first insulating protection layer 6a covering the ohmic electrode disposition region 13a and the schottky electrode disposition region 13b, and the first insulating protection layer 6a further covering n⁺GaN epitaxial layers 3a and n^-On the step sidewall surface formed by GaN epitaxial layer 3b, the first insulating protection layer 6a is formed with windows on the upper surfaces of the ohmic electrode disposition region 13a and the schottky electrode disposition region 13b, respectively;

a schottky electrode 5 provided in a window portion of the schottky electrode providing region 13b, wherein an edge of the schottky electrode 5 is covered on the first insulating protective layer 6a to form a field plate structure;

and an ohmic electrode 4, wherein the ohmic electrode 4 is arranged in the window of the ohmic electrode arrangement region 13 a.

Wherein, said n^-GaN epitaxial layer 3b is a drift layer as a sub-vertical gallium nitride Schottky barrier diode of the present invention, and n is adjusted^-The thickness of GaN epitaxial layer 3b is such as to conveniently obtain the desired reverse breakdown voltage of the schottky barrier diode.

Preferably, the diode further includes a second insulating protective layer 6b disposed on the first insulating protective layer 6a, a partial region of the schottky electrode 5, and a partial region of the ohmic electrode 4.

The substrate 1 employed in the present invention is based on the fact that an epitaxial layer (i.e., n) is to be formed thereon^-GaN epitaxial layers 3b and n⁺The material of the GaN epitaxial layer 3a) and the preparation method, ease of starting and price are suitably selected. The invention takes into account and extendsSapphire is preferred as the substrate for reasons such as matching of the lattice and thermal expansion coefficient of the layer and cost, and other substrates such as silicon carbide, silicon, germanium, oxides (zinc oxide, lithium aluminum oxide, magnesium oxide, LiGaO2, etc.), iii-v compounds in the periodic table (GaN, GaAs, AlN, AlGaN, etc.), borides (AlInN), etc. may be used.

In order to obtain a good epitaxial material, it is necessary to consider matching of lattice and thermal expansion coefficient between the substrate 1 and the epitaxial material, and the buffer layer 2 is generally used as a transition layer between the substrate 1 and the epitaxial layer. In selecting the material of the buffer layer 2, not only lattice and thermal expansion coefficient matching between the substrate 1 and the epitaxial material but also the composition, structure and method of forming each layer as the material of the device layer, which is epitaxial on the buffer layer 2, are considered. In the present invention, a GaN layer grown at a low temperature is preferably used as the buffer layer 2, and a III-V compound material such as AlN can be used.

Preferably, the film thickness of the buffer layer 2 is 1-30 nm, more preferably 1-10 nm, and most preferably 3-10 nm, the dislocation density of the buffer layer 2 should be as small as possible, otherwise the subsequent film forming quality is affected, and preferably, the dislocation density is controlled to be 1 × 10¹¹/cm²The following.

Preferably, the ohmic electrode 4 sequentially comprises a titanium layer, an aluminum layer, a nickel layer and a gold layer from bottom to top, the thickness of the titanium layer is 10-30nm, the thickness of the aluminum layer is 80-150nm, the thickness of the nickel layer is 30-60nm, and the thickness of the gold layer is 50-500 nm. Wherein the titanium layer and the n⁺The GaN epitaxial layer 3a constitutes an ohmic contact.

Preferably, the schottky electrode 5 sequentially comprises a nickel nitride layer and a gold layer from bottom to top, the thickness of the nickel nitride layer is 10-30nm, the thickness of the gold layer is 50-500nm, and the nickel nitride layer and the n^-GaN epitaxial layer 3b constitutes a schottky contact.

A second aspect of the present invention provides a method for manufacturing a sub-vertical gallium nitride schottky barrier diode, including the steps of:

A. sequentially growing a buffer layer 2, n on a substrate 1⁺GaN epitaxial layers 3a, n^--a GaN epitaxial layer 3 b;

B. at n^-Etching a partial region of GaN epitaxial layer 3b to form n^-Removing GaN epitaxial layer 3b to expose n⁺The region of GaN epitaxial layer 3a constitutes ohmic electrode-providing region 13a, n not etched^-The GaN epitaxial layer 3b region constitutes a schottky electrode arrangement region 13 b;

C. on the upper surface of ohmic electrode region 13a, on the upper surface of Schottky electrode region 13b and n⁺GaN epitaxial layers 3a and n^-Depositing a first insulating protective layer 6a on the step sidewall surface formed by the GaN epitaxial layer 3b, the first insulating protective layer 6a having windows formed on the upper surfaces of the ohmic electrode disposition region 13a and the schottky electrode disposition region 13b, respectively;

D. depositing a nickel nitride layer on a window part of the upper surface of the Schottky electrode arrangement region 13b by using a nitrogen ion assisted injection type electron beam nickel evaporation method, then depositing a gold layer on the nickel nitride layer by using an electron beam evaporation method to form a Schottky electrode 5, and covering the edge of the Schottky electrode 5 on the first insulating protection layer 6a to form a field plate structure;

E. an ohmic electrode 4 is formed on the upper surface window portion of the ohmic electrode disposition region 13a by an electron beam evaporation process.

Preferably, the substrate 1 is sapphire with a thickness of 430 μm, and the plane orientation of the epitaxial growth plane of the substrate is the C-plane and is inclined by 0.15 degrees to the m-plane.

The buffer layer 2 can be formed by a known film formation method such as a metal organic chemical vapor phase epitaxy method (MOCVD method) or a molecular beam epitaxy method (MBE method).

Preferably, the metal organic chemical vapor phase epitaxy method (MOCVD method) is adopted to remove trimethyl gallium (TMGa) and NH₃As a raw material, a GaN layer deposited at a low temperature is used as a buffer layer 2, and the thickness of the GaN layer is 10-30 nm.

Preferably, said n⁺GaN epitaxial layers 3a and n^-GaN epitaxial layer 3b is deposited by metal organic chemical vapor phase epitaxy, n⁺The thickness of the GaN epitaxial layer 3a is 3-5 μm, n^-The thickness of the GaN epitaxial layer 3b is 1 to 3 μmN is⁺GaN epitaxial layers 3a and n^-The GaN epitaxial layer 3b is an n-type doped gallium nitride layer, which is formed by doping gallium nitride with a tetravalent element (e.g., silicon or germanium), the carrier of which is an electron; more preferably, n is⁺GaN epitaxial layers 3a and n^-GaN epitaxial layer 3b is formed with SiH₄As doping source, the doping concentration is 1 × 10¹⁸cm^-3～1×10¹⁹cm^-3And 8X 10¹⁵cm^-3～5×10¹⁷cm^-3Within the range.

Preferably, a silicon dioxide insulating film layer is deposited as the first insulating protection layer 6a by a PECVD method;

preferably, the forming process of the ohmic electrode 4 includes depositing a titanium layer, an aluminum layer, a nickel layer and a gold layer on the local area surface of the ohmic electrode setting region 13a (i.e., the window portion of the upper surface of the ohmic electrode setting region 13a) by an electron beam evaporation process in sequence, and performing heat treatment in a nitrogen atmosphere at 500 ℃ to 950 ℃ for 10 to 300 seconds; the thickness of the titanium layer is 10-30nm, the thickness of the aluminum layer is 80-150nm, the thickness of the nickel layer is 30-60nm, the thickness of the gold layer is 50-500nm, and the titanium layer and the n are arranged⁺The GaN epitaxial layer 3a constitutes an ohmic contact.

Preferably, the forming process of the schottky electrode 5 includes depositing a nickel nitride layer and a gold layer in sequence from bottom to top on the local area surface of the schottky electrode setting region 13b (i.e., the window portion of the upper surface of the schottky electrode setting region 13b), wherein the thickness of the nickel nitride layer is 10-30nm, and the thickness of the gold layer is 50-500 nm. Wherein the nickel nitride film layer and n^-The GaN epitaxial layer forms a schottky barrier contact.

Preferably, the diode further includes a second insulating protection layer 6b, and the second insulating protection layer 6b is deposited on the first insulating protection layer 6a, a partial region of the schottky electrode 5, and a partial region of the ohmic electrode 4 by using a PECVD method; the second insulating and protective layer 6b is deposited by means of PECVD, preferably in SiO₂The insulating film layer is a second insulating protection layer 6b with a thickness of 100-500 nm.

The sub-vertical structure of the present invention refers to a structure in which the schottky electrode and the ohmic electrode are not disposed on the same surface, nor on the opposite upper and lower surfaces of the device, such as: the surface provided with the Schottky electrode and the surface provided with the ohmic electrode form a step structure.

Compared with the prior art, the invention has the following beneficial effects:

1. the GaN Schottky barrier diode with the sub-vertical structure can be used in a harsh high-temperature environment, and meanwhile, the reverse recovery speed of the device is high, so that the GaN Schottky barrier diode with the sub-vertical structure is suitable for being used in a high-frequency circuit and the power conversion efficiency of a microwave system is improved.

2. Compared with the conventional Schottky barrier diode with a planar structure, the GaN Schottky barrier diode with the sub-vertical structure increases forward current and improves reverse breakdown voltage.

3. The invention uses the high-quality nickel nitride film layer manufactured by the method of nitrogen ion auxiliary injection type electron beam evaporation nickel to replace the metal layer, the nickel nitride layer and the n deposited by the traditional method^-And a Schottky barrier contact with excellent characteristics formed by the GaN epitaxial layer, thereby realizing a Schottky barrier diode with small reverse leakage current and stable performance.

4. The field plate structure is adopted at the edge of the Schottky electrode, so that the electric field intensity of the edge region of the Schottky electrode is relieved, and the reverse voltage withstanding property of the Schottky barrier diode is further improved.

5. According to the invention, the region of the upper surface of the whole Schottky barrier diode except the ohmic electrode and the Schottky electrode is covered with the insulating layer, so that the surface is prevented from generating leakage current, and the Schottky barrier diode is protected from being influenced by the outside.

Drawings

FIG. 1 is a schematic cross-sectional view of a GaN Schottky barrier diode according to the present invention;

FIG. 2 is a top view of an ohmic electrode placement region and a Schottky electrode placement region of a GaN Schottky barrier diode according to one embodiment of the present invention;

FIG. 3 is a top view of an ohmic electrode placement region and a Schottky electrode placement region of a GaN Schottky barrier diode according to one embodiment of the present invention;

FIG. 4 is a top view of an ohmic electrode placement region and a Schottky electrode placement region of a GaN Schottky barrier diode according to one embodiment of the present invention;

description of reference numerals: 1. substrate, 2, buffer layer, 3a, n⁺GaN epitaxial layer, 3b, n^--GaN epitaxial layer, 4, ohmic electrode, 5, schottky electrode, 6a, first insulating layer, 6b, second insulating layer, 13a, ohmic electrode placement area; 13b, a Schottky electrode setting region.

Detailed Description

For better understanding of the purpose, structure and function of the present invention, a gan schottky barrier diode with a sub-vertical structure will be described in further detail with reference to the accompanying drawings.

A sub-vertical structure gan schottky barrier diode, comprising:

a first insulating protection layer 6a, the first insulating protection layer 6a covering the ohmic electrode disposition region 13a and the schottky electrode disposition region 13b, and the first insulating protection layer 6a further covering n⁺GaN epitaxial layers 3a and n^-On the step side wall surface formed by the GaN epitaxial layer 3b, the first insulating protective layer 6a is respectively on the ohmic electrode disposition region 13a and the schottky electrodeA window is formed on the upper surface of the base electrode setting region 13 b;

Wherein, said n^- GaN epitaxial layer 3b is a drift layer as a sub-vertical gallium nitride Schottky barrier diode of the present invention, and n is adjusted^-The thickness of GaN epitaxial layer 3b is such as to conveniently obtain the desired reverse breakdown voltage of the schottky barrier diode.

The ohmic electrode 4 sequentially comprises a titanium layer, an aluminum layer, a nickel layer and a gold layer from bottom to top, wherein the titanium layer and the n⁺ GaN epitaxial layer 3a constituting an ohmic contact, the titanium layer being in contact with said n⁺The region where GaN epitaxial layer 3a contacts is an ohmic contact region.

The Schottky electrode 5 sequentially comprises a nickel nitride layer and a gold layer from bottom to top, wherein the nickel nitride layer and the n^- GaN epitaxial layer 3b forming a Schottky contact, a nickel nitride layer with said n^-The region contacted by GaN epitaxial layer 3b is a schottky contact region.

The present invention will be described in further detail with reference to examples.

Example 1

In the gan schottky barrier diode using sapphire as the substrate 1 disclosed in this embodiment, a C-plane sapphire having a thickness of 430 μm and an inclination angle of 0.15 degrees to the m-plane is selected as the substrate, and the specific manufacturing method is as follows:

z1: placing the substrate 1 with clean surface on the tray of MOCVD reaction furnace, performing surface re-cleaning treatment at high temperature (1020 ℃) in reducing atmosphere, and cooling to 550 ℃ to obtain gallium trimethyl gallium (TMGa) and ammonia (NH) as organic compounds of gallium₃) As a raw material, low-temperature growth of GaN material is carried out to form a GaN buffer layer 2, and then the temperature is gradually increased to crystallize the atomic sequence of the low-temperature GaN material. Wherein the thickness of the GaN buffer layer 2 is controlled to 10 nm.

Z2 epitaxial growth of n by metal organic chemical vapor phase epitaxy⁺GaN epitaxial layers 3a and n^- GaN epitaxial layer 3b, trimethyl gallium (TMGa) as gallium source and ammonia (NH) as nitrogen source being introduced into the reactor₃) The epitaxial growth conditions are as follows: the furnace pressure was 760Torr, the temperature was 1050 ℃ and the molar ratio of the group V/III element was 3600. With SiH as a doping gas₄Doping the source with Si to obtain n⁺GaN epitaxial layers 3a and n^- GaN epitaxial layer 3b, adjusting the doping gas SiH₄The epitaxial layers with different doping concentrations can be obtained by adjusting the flow of the organic compound (TMGa) of gallium, the growth rate can be controlled, the growth time can be controlled, and the expected thickness can be obtained⁺ GaN epitaxial layer 3a having a thickness of 5 μm and a doping concentration of 5X 10¹⁸cm^-3。 n^- GaN epitaxial layer 3b having a thickness of 1.5 μm and a doping concentration of 8X 10¹⁶cm^-3。

Z3: at n^-Uniformly coating photoresist on the surface of the GaN epitaxial layer 3b, and carrying out processes such as pre-baking, exposure, development and the like to enable n^-Photoresist is remained on partial area of the surface of the GaN epitaxial layer 3b, the photoresist is used as a mask, and then the plasma etching method is adopted to etch the n without the photoresist area^- GaN epitaxial layer 3b is removed, exposing n⁺ GaN epitaxial layer 3a, exposed n⁺The upper surface of GaN epitaxial layer 3a is provided with ohmic electrode-providing regions 13a, and the unetched n is then removed^-Photoresist on the GaN epitaxial layer 3b region (i.e., schottky electrode arrangement region 13 b).

Z4: on the entire surface of the chip, i.e., the ohmic electrode formation region 13a, the Schottky electrode formation region 13b, and n, by the PECVD method^-GaN epitaxial layers 3b and n⁺Depositing SiO on the side wall surface of the step formed by the GaN epitaxial layer 3a₂And the thickness of the insulating film layer is 500 nm.

Z5: in SiO₂Uniformly coating photoresist on the surface of the insulating film layerBaking, exposing, developing, etc. to remove the photoresist on the ohmic contact region to be formed on the ohmic electrode setting region 13a, and reserving the photoresist on the non-ohmic contact region, and using the photoresist as a mask, and then adopting a wet etching method, i.e. using BHF to etch and remove the SiO on the ohmic contact region to be formed₂An insulating film layer exposing n of the ohmic contact region to be formed⁺ GaN epitaxial layer 3a, followed by the sequential evaporation of a titanium layer, an aluminum layer, a nickel layer and a gold layer by electron beam evaporation, each layer having a thickness of 10nm, 100nm, 30nm, 150nm, respectively. And stripping the metal layer in the non-ohmic contact area by a gold stripping method, removing the residual photoresist on the surface of the chip, and then performing heat treatment in a nitrogen atmosphere at 820 ℃ for 30 seconds to form the ohmic electrode 4.

Z6: uniformly coating photoresist on the surface of the semi-finished chip on which the ohmic electrode 4 is formed, removing the photoresist on the Schottky electrode setting region 13b on which the Schottky contact region is to be formed through the processes of prebaking, exposing, developing and the like, reserving the photoresist on the non-Schottky contact region on the surface of the chip, using the photoresist as a mask, adopting a wet etching method, namely using BHF to etch SiO on the Schottky contact region to be formed₂Removing the insulating film layer to expose n of the region to be formed with Schottky contact^-And removing the photoresist on the surface of the non-Schottky contact region on the surface of the chip by using the GaN epitaxial layer.

Then coating photoresist on the surface of the chip, exposing the region to be formed with the Schottky electrode by photoetching, depositing a nickel nitride film with the thickness of 15nm by adopting a nitrogen ion-assisted injection type electron beam nickel evaporation method, and depositing the nickel nitride film by depositing n of the region to be deposited with the nickel nitride film^-Nitrogen ion Current Density at GaN epitaxial layer of 0.02 μ Acm^-2Ion arrival at n^-The energy of the GaN epitaxial layer surface is controlled between 20eV and 30eV, a good compact nickel nitride thin film layer can be obtained under the condition, and an electron beam evaporation gold thin film is adopted, wherein the thickness of the thin film is 500 nm. Stripping the metal layer in the non-Schottky electrode region by a gold stripping method to enable the edge of the Schottky electrode 5 to cover the first insulating layer 6a to form a field plate structure, and finishingFabrication of schottky electrode 5. And removing the residual photoresist on the surface of the chip.

Preferably, a second insulating protection layer 6b can also be arranged on the surface of the diode according to the following steps;

depositing SiO on the whole surface of the chip by using a PECVD method₂And the thickness of the insulating film layer is 300 nm. Uniformly coating photoresist on the surface of the chip, prebaking, exposing, developing and other processes to ensure that the photoresist is not reserved above the region corresponding to part of the ohmic electrode 4 and part of the Schottky electrode 5 on the surface of the chip, and adopting a wet etching method, namely using BHF to etch part of SiO above the region of the ohmic electrode 4 and the region of the Schottky electrode 5₂And removing the insulating film layer to expose the pad areas of the ohmic electrode 4 and the Schottky electrode 5, covering the second insulating protection layer 6b on the first insulating protection layer 6a, covering a part of the edge of the second insulating protection layer 6b on the edge of the ohmic electrode 4, covering a part of the edge on the edge of the Schottky electrode 5, and removing the photoresist on the surface of the chip to complete the manufacture of the Schottky diode.

In this embodiment, a plan view of the ohmic electrode formation region 13a and the schottky electrode formation region 13b of the sub-vertical schottky barrier diode is shown in fig. 2. On the surface of the square chip, two rectangular regions are divided, that is, an ohmic electrode formation region 13a on the right side and a schottky electrode formation region 13b on the left side. The ohmic electrode 4 and the schottky electrode 5 are provided on the ohmic electrode providing region 13a and the schottky electrode providing region 13b, respectively. The area ratio of the ohmic electrode formation region 13a to the schottky electrode formation region 13b is in the range of 1: (1-1.5).

The shapes and positions of the ohmic electrode formation region and the schottky electrode formation region are not limited to the above description, and there are many other options, for example: as shown in fig. 3, the circular region in the center of the chip is a schottky electrode formation region 13b, and the region other than the schottky electrode formation region 13b is an ohmic electrode formation region 13 a. The area ratio of the ohmic electrode formation region 13a to the schottky electrode formation region 13b is in the range of 1: (1-1.5).

As shown in fig. 4, the schottky electrode region 13b is disposed in the center of the chip and is an irregular pattern region, the ohmic electrode region 13a is disposed around the schottky electrode region 13b, the schottky electrode 5 is disposed in the center of the chip, and the ohmic electrode 4 is disposed at one corner of the chip.

The distance between the ohmic electrode 4 and the Schottky electrode 5 is 2-20 microns, preferably 10 microns. For the field plate structure of the schottky electrode, the first insulating layer 6a is embedded under the schottky electrode 5 to be 1 to 10 micrometers, preferably 5 micrometers.

In the present invention, the nickel nitride film and n of the Schottky electrode 5^-The GaN epitaxial layer 3b forms a schottky contact, which becomes the most important component of the GaN schottky barrier diode, and performs the function of the nonlinear rectifying characteristic of the schottky barrier diode.

The nickel nitride film of the Schottky electrode is deposited by a nitrogen ion auxiliary injection type electron beam nickel evaporation method, the ratio of the number of nitrogen ions generated by a nitrogen ion gun to the electron beam nickel evaporation rate and the energy of the nitrogen ions reaching the deposition surface of the Schottky electrode are adjusted, and NiN and Ni can be obtained₂N or Ni₃N or a mixed film layer thereof.

The nickel nitride film layer formed by adopting the nitrogen ion auxiliary injection type electron beam nickel evaporation method replaces the traditional metal to form Schottky contact, thereby reducing the reverse leakage current and improving the stability of the Schottky barrier diode.

In the invention, the sapphire with relatively low price is used as the substrate, so that the manufacturing cost of the product is reduced. The Schottky diode with the sub-vertical structure is provided by changing the method that the conventional plane structure is adopted by the Schottky diode with the sapphire as the substrate, so that the reverse voltage withstanding characteristic of the Schottky diode is improved, and the forward current density of the Schottky diode is improved. Relatively high performance devices are obtained with inexpensive substrates.

In addition, in the structure of the Schottky electrode, the field plate structure is definitely adopted, so that the electric field intensity at the edge of the Schottky electrode is relieved, and the reverse breakdown voltage of the device is further improved. In summary, the invention improves the forward and reverse characteristics of the schottky barrier diode comprehensively from two aspects of the structure of the device and the manufacturing process of the device.

It is to be understood that the present invention has been described with reference to certain embodiments, and that various changes in the features and embodiments, or equivalent substitutions may be made therein by those skilled in the art without departing from the spirit and scope of the invention. In addition, many modifications may be made to adapt a particular situation or material to the teachings of the invention without departing from the essential scope thereof. Therefore, it is intended that the invention not be limited to the particular embodiment disclosed, but that the invention will include all embodiments falling within the scope of the appended claims.

Claims

1. A sub-vertical structure gan schottky barrier diode, comprising:

the buffer layer structure comprises a substrate (1), and a buffer layer (2) and a buffer layer n which are sequentially arranged from bottom to top on the upper surface of the substrate (1)⁺-GaN epitaxial layers (3a) and n^--a GaN epitaxial layer (3 b); n is^--a schottky electrode arrangement region (13b) on the upper surface of the GaN epitaxial layer (3b), said n⁺-the upper surface of the GaN epitaxial layer (3a) is partially exposed, said exposed portion being an ohmic electrode disposition region (13 a);

a first insulating protection layer (6a), the first insulating protection layer (6a) covering the ohmic electrode arrangement region (13a) and the Schottky electrode arrangement region (13b), and the first insulating protection layer (6a) further covering the n⁺-GaN epitaxial layer (3a) and n^--a GaN epitaxial layer (3b) on the step side wall surface, said first insulating protective layer (6a) having windows formed on the upper surfaces of said ohmic electrode layout region (13a) and said schottky electrode layout region (13b), respectively;

a Schottky electrode (5) which is provided in a window portion of the Schottky electrode providing region (13b), wherein an edge of the Schottky electrode (5) is covered on the first insulating protective layer (6a) to form a field plate structure;

an ohmic electrode (4), the ohmic electrode (4) being disposed in a window of the ohmic electrode disposition region (13 a).

2. The sub-vertical structure schottky barrier diode as described in claim 1, further comprising a second insulating protective layer (6b) provided on the first insulating protective layer (6a), a partial region of the schottky electrode (5) and a partial region of the ohmic electrode (4).

3. The sub-vertical structure schottky barrier diode as claimed in claim 1, wherein the substrate (1) is one of sapphire, silicon carbide, silicon, germanium, zinc oxide, lithium aluminum oxide, magnesium oxide, LiGaO2, GaN, GaAs, AlN, AlGaN, AlInN or ZrB 2.

4. The sub-vertical structure GaN Schottky barrier diode according to claim 1, wherein the ohmic electrode (4) comprises, from bottom to top, a Ti layer with a thickness of 10-30nm, an Al layer with a thickness of 80-150nm, a Ni layer with a thickness of 30-60nm, and a Au layer with a thickness of 50-500nm, wherein the Ti layer and the n layer are sequentially disposed on the substrate, and the substrate is disposed on the substrate⁺-the GaN epitaxial layer (3a) constitutes an ohmic contact.

5. The gallium nitride Schottky barrier diode with a sub-vertical structure according to claim 1, wherein the Schottky electrode (5) comprises a nickel nitride layer and a gold layer in sequence from bottom to top, the thickness of the nickel nitride layer is 10-30nm, the thickness of the gold layer is 50-500nm, wherein the nickel nitride layer and the n^--the GaN epitaxial layer (3b) constitutes a schottky contact.

6. The GaN Schottky barrier diode with the sub-vertical structure according to claim 6, wherein the thickness of the buffer layer (2) is 1-30 nm, and the dislocation density is controlled to be 1 x 10¹¹/cm²The following.

7. The method of manufacturing a sub-vertical structure gan schottky barrier diode according to claim 1, comprising the steps of:

A. sequentially growing a buffer layer (2) and n on a substrate (1)⁺-GaN epitaxial layers (3a), n^--a GaN epitaxial layer (3 b);

B. at n^--etching a local area of the GaN epitaxial layer (3b) to n^--removing the GaN epitaxial layer (3b) to expose n⁺-the region of the GaN epitaxial layer (3a) constituting an ohmic electrode arrangement region (13a), n not etched^--the GaN epitaxial layer (3b) region constitutes a schottky electrode arrangement region (13 b);

C. on the upper surface of the ohmic electrode mounting region (13a), on the upper surface of the Schottky electrode mounting region (13b), and on n⁺-GaN epitaxial layer (3a) and n^--depositing a first insulating protective layer (6a) on the step sidewall face formed by the GaN epitaxial layer (3b), said first insulating protective layer (6a) having windows formed on the upper surfaces of said ohmic electrode disposition region (13a) and said schottky electrode disposition region (13b), respectively;

D. depositing a nickel nitride layer on the window part of the upper surface of the Schottky electrode arrangement region (13b) by using a nitrogen ion assisted injection type electron beam nickel evaporation method, then depositing a gold layer on the nickel nitride layer by using an electron beam evaporation method to form a Schottky electrode (5), and covering the edge of the Schottky electrode (5) on the first insulating protection layer (6a) to form a field plate structure;

E. and forming an ohmic electrode (4) on the upper surface window part of the ohmic electrode arrangement region (13a) by using an electron beam evaporation process.

8. The method of claim 7, wherein n is the same as n⁺-GaN epitaxial layers (3a) and n^--the GaN epitaxial layer (3b) is deposited by metal organic chemical vapor phase epitaxy, n⁺-the thickness of the GaN epitaxial layer (3a) is 3-5 μm, n^-The thickness of the GaN epitaxial layer (3b) is 1 to 3 μm.

9. The method of manufacturing a sub-vertical structure gan schottky barrier diode as described in claim 7, wherein the formation of the ohmic electrode (4) comprises depositing a titanium layer, an aluminum layer, a nickel layer and a gold layer on the partial surface of the ohmic electrode formation region (13a) by an electron beam evaporation process in this order, and heat-treating the deposited layers in a nitrogen atmosphere at 500 ℃ to 950 ℃ for 10 to 300 seconds.

10. The method of manufacturing a sub-vertical structure gan schottky barrier diode according to claim 7, wherein the diode further comprises a second insulating protection layer (6b), and the second insulating protection layer (6b) is deposited on the first insulating protection layer (6a), a partial region of the schottky electrode (5), and a partial region of the ohmic electrode (4) by PECVD.