CN114300592A - Mini LED epitaxial structure and manufacturing method thereof - Google Patents
Mini LED epitaxial structure and manufacturing method thereof Download PDFInfo
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 13
- 238000004544 sputter deposition Methods 0.000 claims abstract description 162
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims abstract description 48
- 229910002601 GaN Inorganic materials 0.000 claims abstract description 47
- 150000004767 nitrides Chemical class 0.000 claims abstract description 42
- 239000000758 substrate Substances 0.000 claims abstract description 30
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 claims description 17
- 238000000034 method Methods 0.000 claims description 16
- 230000004888 barrier function Effects 0.000 claims description 5
- 229910052738 indium Inorganic materials 0.000 claims description 4
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 4
- 238000000137 annealing Methods 0.000 claims description 3
- 238000009825 accumulation Methods 0.000 abstract description 5
- 230000007547 defect Effects 0.000 description 5
- 230000009286 beneficial effect Effects 0.000 description 4
- 230000000903 blocking effect Effects 0.000 description 4
- 238000005036 potential barrier Methods 0.000 description 4
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 229910052594 sapphire Inorganic materials 0.000 description 3
- 239000010980 sapphire Substances 0.000 description 3
- 239000000463 material Substances 0.000 description 2
- 230000006911 nucleation Effects 0.000 description 2
- 238000010899 nucleation Methods 0.000 description 2
- 208000033999 Device damage Diseases 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 230000004913 activation Effects 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
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Abstract
The invention provides a Mini LED epitaxial structure and a manufacturing method thereof.A nitride buffer layer grows on a substrate layer, and then a first sputtering layer is sputtered on the nitride buffer layer; growing an N-type gallium nitride layer on the first sputtering layer; sputtering a second sputtering layer on the N-type gallium nitride layer; growing a stress buffer layer on the second sputtering layer; sputtering a third sputtering layer on the stress buffer layer; growing a quantum well layer on the third sputtering layer; finally, a substrate layer, a nitride buffer layer, a first sputtering layer, an N-type gallium nitride layer, a second sputtering layer, a stress buffer layer, a third sputtering layer and a quantum well layer which are sequentially stacked are obtained; according to the invention, the sputtering layers are arranged between the layers with obvious lattice mismatch to offset the influence of stress, and the layers of stress are offset by arranging the plurality of sputtering layers, so that the influence of final accumulation on the quantum well layer is avoided, and the quality of the finished Mini LED chip is ensured.
Description
Technical Field
The invention relates to the field of semiconductor light-emitting devices, in particular to a Mini LED epitaxial structure and a manufacturing method thereof.
Background
Light Emitting Diodes (LEDs) based on gan have superior light emitting properties and low cost, and thus have been widely used in the fields of illumination, displays, and backlight brackets. An epitaxial wafer in the LED is a basic structure of the LED, and generally comprises a substrate layer and layers which are sequentially stacked on the substrate layer, and the effect of light emission is realized in a matching way; the substrate layer is usually sapphire, and lattice mismatch and thermal mismatch exist between the gallium nitride substrate layer and the sapphire substrate layer, so that a large stress action exists between layers in the epitaxial structure, a gecko defect exists in the final epitaxial structure, the quality of a quantum well layer is easily deteriorated, the luminous efficiency of the LED is finally lowered, and particularly in a miniaturized Mini-LED, the driving current used by the LED is usually only in the microampere level, and the influence of the stress is more obvious.
Disclosure of Invention
The technical problem to be solved by the invention is as follows: a Mini LED epitaxial structure and a manufacturing method thereof are provided, so that the quality of a Mini LED chip is improved.
In order to solve the technical problems, the invention adopts a technical scheme that:
a method for manufacturing a Mini LED epitaxial structure comprises the following steps:
s1, after growing a nitride buffer layer on the substrate layer, sputtering a first sputtering layer on the nitride buffer layer;
s2, growing an N-type gallium nitride layer on the first sputtering layer;
s3, sputtering a second sputtering layer on the N-type gallium nitride layer;
s4, growing a stress buffer layer on the second sputtering layer;
s5, sputtering a third sputtering layer on the stress buffer layer;
and S6, growing a quantum well layer on the third sputtering layer.
In order to solve the technical problem, the invention adopts another technical scheme as follows:
a Mini LED epitaxial structure comprises a substrate layer, a nitride buffer layer, a first sputtering layer, an N-type gallium nitride layer, a second sputtering layer, a stress buffer layer, a third sputtering layer and a quantum well layer which are sequentially stacked.
The invention has the beneficial effects that: arranging a first sputtering layer between the nitride buffer layer and the N-type gallium nitride layer, sputtering a second sputtering layer between the N-type gallium nitride layer and the stress buffer layer, and sputtering a third sputtering layer between the stress buffer layer and the quantum well layer; the influence of stress is offset by arranging the sputtering layers between the layers with obvious lattice mismatch, the influence of the stress on the quality of the epitaxial structure is avoided, the stress is offset layer by arranging the plurality of sputtering layers, the influence of final accumulation on a quantum well layer is avoided, the luminous efficiency of the Mini LED chip is ensured, the quality of the epitaxial structure is finally ensured, and the quality of a finished product Mini LED chip is ensured.
Drawings
Fig. 1 is a flowchart illustrating steps of a method for fabricating a Mini LED epitaxial structure according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a Mini LED epitaxial structure according to an embodiment of the present invention;
description of reference numerals:
1. a substrate layer; 2. a nitride buffer layer; 31. a first sputtered layer; 32. a second sputtered layer; 33. a third sputtered layer; 6. a quantum well layer; 7. an electron blocking layer; 8. a P-type gallium nitride layer.
Detailed Description
In order to explain technical contents, achieved objects, and effects of the present invention in detail, the following description is made with reference to the accompanying drawings in combination with the embodiments.
Referring to fig. 1, a method for manufacturing a Mini LED includes the steps of:
s1, after growing a nitride buffer layer on the substrate layer, sputtering a first sputtering layer on the nitride buffer layer;
s2, growing an N-type gallium nitride layer on the first sputtering layer;
s3, sputtering a second sputtering layer on the N-type gallium nitride layer;
s4, growing a stress buffer layer on the second sputtering layer;
s5, sputtering a third sputtering layer on the stress buffer layer;
and S6, growing a quantum well layer on the third sputtering layer.
From the above description, the beneficial effects of the present invention are: arranging a first sputtering layer between the nitride buffer layer and the N-type gallium nitride layer, sputtering a second sputtering layer between the N-type gallium nitride layer and the stress buffer layer, and sputtering a third sputtering layer between the stress buffer layer and the quantum well layer; the influence of stress is offset by arranging the sputtering layers between the layers with obvious lattice mismatch, the influence of the stress on the quality of the epitaxial structure is avoided, the stress is offset layer by arranging the plurality of sputtering layers, the influence of final accumulation on a quantum well layer is avoided, the luminous efficiency of the Mini LED chip is ensured, the quality of the epitaxial structure is finally ensured, and the quality of a finished product Mini LED chip is ensured.
Further, the sputtering a first sputtering layer on the nitride buffer layer, the S3, and the S5 in the S1 includes:
sputtering the first sputtering layer, the second sputtering layer or the third sputtering layer by a sputtering device at the temperature of 500-700 ℃.
From the above description, when sputtering each sputtering layer by the sputtering device at the temperature of 500-.
Further, the sputtering a first sputtering layer on the nitride buffer layer in S1 includes:
and sputtering a first sputtering layer with the thickness of 50-80nm on the nitride buffer layer by an aluminum nitride sputtering device.
As can be seen from the above description, the first sputtering layer is arranged between the nitride buffer layer and the N-type gallium nitride layer, and because the gallium nitride and the substrate layer are completely different components, the lattice mismatch therebetween is relatively significant, and the first sputtering layer with the thickness of 50-80nm is arranged at the position, so that the stress can be relatively effectively counteracted; in addition, the aluminum nitride material has large forbidden bandwidth and low lattice constant, can effectively solve the problem of lattice mismatch, and can effectively inhibit dislocation.
Further, the S3 includes:
and sputtering a second sputtering layer with the thickness of 30-60nm on the N-type gallium nitride layer by using an aluminum nitride sputtering device.
It can be known from the above description that the second sputtering layer is between the N-type gallium nitride and the stress buffer layer, and has similar main components, mainly different composition and growth environments such as temperature and pressure, so that the thickness of the second sputtering layer is smaller than that of the first sputtering layer, and the stress is released.
Further, the S5 includes:
and sputtering a third sputtering layer with the thickness of 5-30nm on the stress buffer layer by using an aluminum nitride sputtering device.
According to the description, the stress of the third sputtering layer is smaller between the stress buffer layer and the quantum well layer, so that the third sputtering layer with the thickness of 5-30m is arranged, the optimal cost performance is realized, and the influence of the stress generated by lattice mismatch accumulation on the recombination efficiency of electrons and holes in the space can be avoided by matching with the first sputtering layer and the second sputtering layer.
Further, the growing a nitride buffer layer on the substrate layer in S1 includes:
annealing at 950-1150 deg.C to grow 1.5-2.5 μm thick nitride buffer layer.
As can be seen from the above description, the nitride buffer layer is grown on the substrate layer first, which provides a better platform for the growth of the subsequent layers and is beneficial to the better adhesion of the subsequent layers.
Further, the growing a nitride buffer layer on the substrate layer in S1 includes:
after the longitudinal growth layer is grown at 950-1080 ℃, the temperature is raised to 1100-1150 ℃ to grow the transverse growth layer.
From the above description, it can be seen that the longitudinal growth layer is grown first, and then the lateral growth layer is grown, so that the final crystal quality is more perfect.
Further, the S2 includes:
growing an N-type gallium nitride layer with the thickness of 2-3 μm at the temperature of 1100-1200 ℃, wherein the doping concentration of Si is 5E18-3E19cm-3。
According to the above description, the stress buffer layer is further arranged, and the stress buffer layer is matched with the sputtering layer to release the stress together, so that the effect of counteracting the stress is improved.
Further, the S6 includes:
s61, growing an indium gallium nitride potential well at the temperature of 700-750 ℃;
s62, growing a gallium nitride barrier at 800-;
s63, repeating the S61 and the S62 until reaching a preset number.
From the above description, it can be known that the potential well and the potential barrier are respectively grown by controlling different temperatures, the precision of the quantum well layer during growth is ensured, the quality of the quantum well layer is improved, and the intensity and the luminous efficiency of the quantum well are improved by arranging a plurality of potential well-potential barrier structures.
Referring to fig. 2, a Mini LED chip epitaxial structure includes a substrate layer, a nitride buffer layer, a first sputtering layer, an N-type gallium nitride layer, a second sputtering layer, a stress buffer layer, a third sputtering layer, and a quantum well layer, which are sequentially stacked.
As can be seen from the above description, the beneficial effects of the invention are as follows: arranging a first sputtering layer between the nitride buffer layer and the N-type gallium nitride layer, sputtering a second sputtering layer between the N-type gallium nitride layer and the stress buffer layer, and sputtering a third sputtering layer between the stress buffer layer and the quantum well layer; the influence of stress is offset by arranging the sputtering layers between the layers with obvious lattice mismatch, the influence of the stress on the quality of the epitaxial structure is avoided, the stress is offset layer by arranging the plurality of sputtering layers, the influence of final accumulation on a quantum well layer is avoided, the luminous efficiency of the Mini LED chip is ensured, the quality of the epitaxial structure is finally ensured, and the quality of a finished product Mini LED chip is ensured.
The Mini LED epitaxial structure and the method for manufacturing the Mini LED epitaxial structure according to the present invention are applicable to the manufacture of an epitaxial wafer of an LED chip, a Mini LED chip or a Micro LED chip, and are used to improve the quality of the chip, and the following description is made by using specific embodiments:
referring to fig. 1, a first embodiment of the present invention is:
a method for manufacturing a Mini LED epitaxial structure specifically comprises the following steps:
s1, after growing a nitride buffer layer on the substrate layer, sputtering a first sputtering layer on the nitride buffer layer;
wherein the substrate layer can be sapphire (Al)2O3) Conventional substrate materials such as silicon (Si), silicon carbide (SiC), and the like, without limitation in this application;
wherein growing the nitride buffer layer on the substrate layer comprises:
s11, treating the preset substrate layer at high temperature of 1000-1200 ℃ in hydrogen atmosphere for 1-3 minutes, and growing a nucleation layer with the thickness of 20-50nm on the treated substrate at 800-850 ℃;
s12, annealing at 950-1150 ℃, and growing a nitride buffer layer with the thickness of 1.5-2.5 μm with the nucleation layer, specifically: after growing the longitudinal growth layer at 950-; wherein the nitride buffer layer is an undoped nitride buffer layer;
in an alternative embodiment, a nitride buffer layer is grown in the MOCVD reaction chamber based on the patterned substrate layer;
wherein sputtering a first sputtering layer on the nitride buffer layer comprises: sputtering the first sputtering layer by a sputtering device at the temperature of 500-700 ℃; wherein, the sputtering device can be an aluminum nitride (AlN) sputtering device, and a first aluminum nitride sputtering layer with the thickness of 50-80nm is sputtered on the nitride buffer layer by the aluminum nitride sputtering device;
the aluminum nitride can block dislocation and release stress, and simultaneously, current can be easily expanded in a transverse plane, so that device damage caused by overhigh local current density is avoided, and the ESD (Electro-Static discharge) resistance of the epitaxial structure is enhanced;
s2, growing an N-type gallium nitride (GaN) layer on the first sputtered layer, including: growing an N-type gallium nitride layer with the thickness of 2-3 μm at the temperature of 1100-1200 ℃, wherein the doping concentration of Si is 5E18-3E19cm-3；
S3, sputtering a second sputtering layer on the N-type gallium nitride layer;
sputtering the first sputtering layer by a sputtering device at the temperature of 500-700 ℃; wherein, the sputtering device can be an aluminum nitride (AlN) sputtering device, and a second aluminum nitride sputtering layer with the thickness of 30-60nm is sputtered on the nitride buffer layer by the aluminum nitride sputtering device;
s4, growing a stress buffer layer on the second sputtering layer, including: cooling to 800-950 ℃, and growing an N-type stress buffer layer, specifically:
s41 growing a superlattice potential well InxGa1-xN, quantum well layer (indium gallium nitride);
s42, regrowing a superlattice potential barrier gallium nitride, and forming a superlattice period by a superlattice potential well and a superlattice potential barrier;
s43, repeating S41 and S42 until reaching the preset times or the preset thickness; the preset times are 2-5, and the preset thickness is 50nm-100 nm;
s5, sputtering a third sputtering layer on the stress buffer layer;
sputtering the first sputtering layer by a sputtering device at the temperature of 500-700 ℃; wherein, the sputtering device can be an aluminum nitride (AlN) sputtering device, and a third aluminum nitride sputtering layer with the thickness of 5-30nm is sputtered on the nitride buffer layer by the aluminum nitride sputtering device;
in an alternative embodiment, the thicknesses of the first, second and third sputtered layers are tapered;
s6, growing a quantum well layer on the third sputtering layer, including:
s61, growing an indium gallium nitride (InGaN) potential well at the temperature of 700-750 ℃;
s62, growing a gallium nitride barrier at 800-;
s63, repeating the S61 and the S62 until reaching a preset time or a preset thickness, wherein the preset thickness is 120nm-300 nm;
s7, growing an electron barrier layer on the quantum well layer, including: heating to 950-1100 deg.C to grow P-type GaN hole activation layer (electron blocking layer) with Mg doping concentration of 5E19-5E20cm-3；
And S8, growing a P-type gallium nitride layer on the electron blocking layer.
Referring to fig. 2, the second embodiment of the present invention is:
a Mini LED epitaxial structure comprises a substrate layer 1, a nitride buffer layer 2, a first sputtering layer 31, an N-type gallium nitride layer 4, a second sputtering layer 32, a stress buffer layer 5, a third sputtering layer 33 and a quantum well layer 6 which are sequentially stacked;
and further comprising, an electron blocking layer 7 disposed on a side of the quantum well layer 6 remote from the third sputtered layer 33; the P-type gallium nitride layer 8 is arranged on one side, far away from the quantum well layer 6, of the electronic barrier layer 7;
the Mini LED epitaxial structure of the present embodiment may be manufactured by the method for manufacturing a Mini LED epitaxial structure of the first embodiment.
In summary, the invention provides a Mini LED epitaxial structure and a manufacturing method thereof, by arranging a first sputtering layer, a second sputtering layer and a third sputtering layer with different thicknesses according to different stresses among different layers, the influence of internal stress of a bottom layer in the epitaxial structure is improved, and the bottom layer defect density is reduced, so that the LED radiation coincidence efficiency is improved, and especially, the luminous efficiency is obviously improved when microampere-level current is used for driving in a Mini LED or a Micro-LED and can reach 5%; internal stress caused by different components, different growth temperatures and different growth pressures among the layers is effectively counteracted, so that defects caused by the internal stress are eliminated; moreover, because the lattice constant of the gallium nitride is larger than that of the substrate, the epitaxial structure is in the penalty of compressive strain in the growth process, along with the fact that a film deposited on the substrate is thicker and thicker, the compressive stress accumulated in the epitaxial structure is also larger and larger, a first sputtering layer is sputtered on the lower layer of the N-type gallium nitride, a second sputtering layer is sputtered on the upper layer of the N-type gallium nitride, a third sputtering layer is sputtered on the stress buffer layer, the first sputtering layer, the second sputtering layer and the third sputtering layer are made of aluminum nitride, and the lattice constant of the aluminum nitride is smaller than that of the gallium nitride, so that the tensile stress accumulated on the gallium nitride can be grown to balance the compressive stress grown by the gallium nitride, the purposes of reducing the internal stress of the epitaxial structure and bringing internal defects by the internal stress are achieved, and the quality of the finally obtained LED chip is improved; by the mode of forming the sputtering layer by inserting sputtering aluminum nitride and combining with the composite epitaxial layer structure design with the gradually changed thickness gradient, the influence of the internal stress of the bottom layer can be improved, the defect density of the bottom layer is further reduced, the quality of the multiple quantum well layer can be effectively improved, the surface smoothness and the quality of the finally obtained light emitting diode epitaxial structure can be greatly improved, the light emitting efficiency of the finally obtained light emitting diode is greatly improved, and greater economic benefit can be realized.
The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all equivalent changes made by using the contents of the present specification and the drawings, or applied directly or indirectly to the related technical fields, are included in the scope of the present invention.
Claims (10)
1. A method for manufacturing a Mini LED epitaxial structure is characterized by comprising the following steps:
s1, after growing a nitride buffer layer on the substrate layer, sputtering a first sputtering layer on the nitride buffer layer;
s2, growing an N-type gallium nitride layer on the first sputtering layer;
s3, sputtering a second sputtering layer on the N-type gallium nitride layer;
s4, growing a stress buffer layer on the second sputtering layer;
s5, sputtering a third sputtering layer on the stress buffer layer;
and S6, growing a quantum well layer on the third sputtering layer.
2. The method of claim 1, wherein the sputtering of the first sputtered layer, the S3 and the S5 on the nitride buffer layer in the S1 comprises:
sputtering the first sputtering layer, the second sputtering layer or the third sputtering layer by a sputtering device at the temperature of 500-700 ℃.
3. The method of claim 1, wherein the step of sputtering a first sputtered layer on the nitride buffer layer in step S1 comprises:
and sputtering a first sputtering layer with the thickness of 50-80nm on the nitride buffer layer by an aluminum nitride sputtering device.
4. The method of claim 1, wherein the step S3 comprises:
and sputtering a second sputtering layer with the thickness of 30-60nm on the N-type gallium nitride layer by using an aluminum nitride sputtering device.
5. The method of claim 1, wherein the step S5 comprises:
and sputtering a third sputtering layer with the thickness of 5-30nm on the stress buffer layer by using an aluminum nitride sputtering device.
6. The method of claim 1, wherein the step of growing a nitride buffer layer on the substrate layer in the step of S1 comprises:
annealing at 950-1150 deg.C to grow 1.5-2.5 μm thick nitride buffer layer.
7. The method of claim 6, wherein the step of growing a nitride buffer layer on the substrate layer in the step of S1 comprises:
after the longitudinal growth layer is grown at 950-1080 ℃, the temperature is raised to 1100-1150 ℃ to grow the transverse growth layer.
8. The method of claim 1, wherein the step S2 comprises:
growing an N-type gallium nitride layer with the thickness of 2-3 μm at the temperature of 1100-1200 ℃, wherein the doping concentration of Si is 5E18-3E19cm-3。
9. The method of claim 1, wherein the step S6 comprises:
s61, growing an indium gallium nitride potential well at the temperature of 700-750 ℃;
s62, growing a gallium nitride barrier at 800-;
s63, repeating the S61 and the S62 until reaching a preset number.
10. A Mini LED epitaxial structure is characterized by comprising a substrate layer, a nitride buffer layer, a first sputtering layer, an N-type gallium nitride layer, a second sputtering layer, a stress buffer layer, a third sputtering layer and a quantum well layer which are sequentially stacked.
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