CN114300342A - Photoetching method of source and drain electrodes and preparation method of thin film transistor - Google Patents

Photoetching method of source and drain electrodes and preparation method of thin film transistor Download PDF

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Publication number
CN114300342A
CN114300342A CN202111543754.8A CN202111543754A CN114300342A CN 114300342 A CN114300342 A CN 114300342A CN 202111543754 A CN202111543754 A CN 202111543754A CN 114300342 A CN114300342 A CN 114300342A
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active layer
photoresist
source
patterned active
photoetching
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闫兴振
宋凯安
李博
张轶强
杨帆
初学峰
王超
王艳杰
迟耀丹
杨小天
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Jilin Jianzhu University
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Jilin Jianzhu University
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Abstract

The invention belongs to the technical field of semiconductors, and particularly relates to a photoetching method of a source electrode and a drain electrode and a preparation method of a thin film transistor. The photoetching method of the source and drain electrodes provided by the invention comprises the following steps: partially homogenizing the photoresist on the surface of the patterned active layer, and drying to obtain the patterned active layer partially covered with the photoresist; and focusing the patterned active layer partially covered with the photoresist to prepare a photoetching mask plate of the source and drain electrodes by utilizing the part of the patterned active layer partially covered with the photoresist, carrying out ultraviolet exposure and growth, and forming the source and drain electrodes on the surface of the patterned active layer. The patterned active layer is partially coated with the photoresist, and the part of the photoresist which is not coated in a spinning mode can be used as an alignment reference, so that the patterned active layer covered with the photoresist is focused accurately to prepare the channel position of the photoetching mask plate of the source and drain electrodes.

Description

Photoetching method of source and drain electrodes and preparation method of thin film transistor
Technical Field
The invention belongs to the technical field of semiconductors, and particularly relates to a photoetching method of a source electrode and a drain electrode and a preparation method of a thin film transistor.
Background
The preparation method of the metal oxide thin film transistor comprises magnetron sputtering, atomic layer deposition, thermal evaporation and sol-gel methods, and has the advantages of high film forming quality and mature process. With the increasing requirements of people on the display field, the application of high light transmission materials such as full transparent display is also more and more extensive.
The existing photoetching method is to cover the photoresist on the substrate to be etched uniformly, and then etch or continue to grow the material after ultraviolet exposure and development. The photoetching process can form a patterned active layer and a source drain electrode, photoetching needs to be accurately aligned in order that the source drain electrode can be accurately covered on the patterned active layer, but in the repeated photoetching process, when a high light transmission material is used as a material to be photoetched, because the transparency of the material to be photoetched is high, the patterned active layer covered with photoresist is difficult to accurately focus under a photoetching microscope to prepare a photoetching mask plate of the source drain electrode, so that the covering of the source drain electrode is deviated, the injection of current carriers is influenced, and the photoelectric performance of a thin film transistor device is reduced.
Disclosure of Invention
In view of the above, the present invention provides a method for photolithography of source and drain electrodes, which can focus a patterned active layer covered with a photoresist to prepare a photolithography mask for the source and drain electrodes.
In order to achieve the purpose of the invention, the invention provides the following technical scheme:
the invention provides a photoetching method of a source electrode and a drain electrode, which comprises the following steps:
partially homogenizing the photoresist on the surface of the patterned active layer, and drying to obtain the patterned active layer partially covered with the photoresist;
and focusing the patterned active layer partially covered with the photoresist to prepare a photoetching mask plate of the source and drain electrodes by utilizing the part of the patterned active layer partially covered with the photoresist, carrying out ultraviolet exposure and growth, and forming the source and drain electrodes on the surface of the patterned active layer.
Preferably, the partial spin coating is: and coating photoresist on the surface of the patterned active layer, wherein the photoresist is deviated from the center of the surface of the patterned active layer.
Preferably, the light transmittance of the active layer at 550nm of visible light is 80-85%.
Preferably, the active layer has a chemical composition of one or more of zinc oxide, indium zinc oxide and indium gallium zinc oxide.
Preferably, the drying temperature is 85-95 ℃ and the drying time is 4-6 min.
Preferably, the radiation intensity of the ultraviolet light in the ultraviolet light exposure is 400-450 mW/cm2The exposure time is 3-6 s.
The invention provides a preparation method of a thin film transistor, which comprises the following steps:
growing a gate dielectric layer on a substrate; preparing a patterned active layer on the surface of the obtained gate dielectric layer;
photoetching the surface of the patterned active layer to prepare a source electrode and a drain electrode to obtain a primary thin film transistor;
annealing the primary thin film transistor to obtain the thin film transistor;
the photoetching method is adopted for preparing the source electrode and the drain electrode by photoetching.
Preferably, the substrate is conductive glass;
the chemical composition of the gate dielectric layer is hafnium oxide;
the chemical composition of the source and drain electrodes is aluminum.
Preferably, the annealing temperature is 250-350 ℃, and the time is 10-20 min; the annealing atmosphere is air.
The invention provides a photoetching method of a source electrode and a drain electrode, which comprises the following steps: partially homogenizing the photoresist on the surface of the patterned active layer, and drying to obtain the patterned active layer partially covered with the photoresist; and focusing the patterned active layer partially covered with the photoresist to prepare a photoetching mask plate of the source and drain electrodes by utilizing the part of the patterned active layer partially covered with the photoresist, carrying out ultraviolet exposure and growth, and forming the source and drain electrodes on the surface of the patterned active layer. The method comprises the steps of partially coating photoresist on the patterned active layer, and using the part which is not coated with the photoresist in the photoetching mask plate for preparing the source and drain electrodes by focusing the patterned active layer covered with the photoresist as a focusing alignment reference so as to accurately focus the part of the patterned active layer covered with the photoresist to prepare the channel position of the photoetching mask plate for preparing the source and drain electrodes.
The thin film transistor prepared by the photoetching method provided by the invention has stable electrical properties; compared with a device with alignment errors and a source electrode and a drain electrode which cannot be accurately covered on an active layer, the thin film transistor provided by the invention has high mobility, switching ratio and positive and negative bias stability.
The test result of the embodiment shows that the photoetching method provided by the invention can accurately focus the patterned active layer covered with the photoresist to prepare the photoetching mask of the source and drain electrodes; the current switching ratio of the thin film transistor is 1.4 multiplied by 102~3.1×103。。
Drawings
FIG. 1 is a diagram of a conductive glass substrate grown with a gate dielectric hafnium oxide;
FIG. 2 is a diagram of growing an active layer of zinc oxide on a gate dielectric;
fig. 3 is a picture of active layer patterning;
FIG. 4 is a photograph of a portion of a spin-on process prior to spin-on;
FIG. 5 is a photograph of a partially photoresist homogenized photoresist process after partially homogenizing the photoresist;
FIG. 6 is a photograph of a microscope alignment of a photo-resist machine after partial spin-on;
FIG. 7 is a picture of a partially photoresist-uniformizing method for precisely aligning and growing source and drain electrodes;
FIG. 8 is a photograph of a normal photoresist before it is planarized;
FIG. 9 is a photograph of a uniform surface coverage of photoresist after spin coating.
Detailed Description
The invention provides a photoetching method of a source electrode and a drain electrode, which is characterized by comprising the following steps of:
partially homogenizing the photoresist on the surface of the patterned active layer, and drying to obtain the patterned active layer partially covered with the photoresist;
and focusing the patterned active layer partially covered with the photoresist to prepare a photoetching mask plate of the source and drain electrodes by utilizing the part of the patterned active layer partially covered with the photoresist, carrying out ultraviolet exposure and growth, and forming the source and drain electrodes on the surface of the patterned active layer.
In the present invention, unless otherwise specified, each of the substances in the technical schemes is a commercially available product well known to those skilled in the art.
According to the invention, partial photoresist is homogenized on the surface of the patterned active layer, and the patterned active layer partially covered with photoresist is obtained after drying.
The patterned active layer is not particularly limited in the present invention, and may be a patterned active layer known to those skilled in the art.
In the present invention, the spin-on resist is preferably a coating resist. The photoresist used in the spin coating is not particularly limited in the present invention, and a photoresist known to those skilled in the art may be used. In the invention, the glue homogenizing amount of the glue homogenizingPreferably 20 to 27. mu.L/cm2More preferably 21 to 26. mu.L/cm2And more preferably 22 to 25 μ L/cm2
In the invention, the equipment for homogenizing glue is preferably a glue homogenizer. In the invention, the rotation speed of the spin coater is preferably 2500-3500 rpm, more preferably 2600-3400 rpm, and still more preferably 2800-3200 rpm; the time is preferably 25 to 35 seconds, more preferably 26 to 34 seconds, and further preferably 28 to 32 seconds.
In the present invention, the partial spin coating is preferably: and coating photoresist on the surface of the patterned active layer, wherein the photoresist is deviated from the center of the surface of the patterned active layer. In the invention, the spin coating is partial spin coating, that is, the spin coating area does not completely cover the surface of the patterned active layer. In the invention, the glue homogenizing area in the partial glue homogenizing accounts for preferably 50-70% of the surface area of the patterned active layer, and more preferably 55-67%.
In the invention, the light transmittance of the active layer at 550nm of visible light is preferably 80-85%, and more preferably 81-84%. In the present invention, the chemical composition of the active layer is preferably one or more of zinc oxide, indium zinc oxide, and indium gallium zinc oxide.
After partial photoresist homogenizing, the active layer after partial photoresist homogenizing is dried to obtain the patterned active layer partially covered with the photoresist.
In the invention, the drying temperature is preferably 85-95 ℃, and more preferably 87-93 ℃; the time is preferably 4 to 6min, more preferably 4.5 to 5.5 min.
After the patterned active layer partially covered with the photoresist is obtained, the invention utilizes the part of the patterned active layer partially covered with the photoresist, which is not subjected to photoresist homogenizing, to focus the patterned active layer partially covered with the photoresist to prepare a photoetching mask plate of the source and drain electrode, and then ultraviolet exposure and growth are carried out, so that the source and drain electrode is formed on the surface of the patterned active layer.
After the patterned active layer partially covered with the photoresist is obtained, the invention utilizes the part of the patterned active layer partially covered with the photoresist, which is not subjected to photoresist homogenizing, to focus the patterned active layer partially covered with the photoresist to prepare the photoetching mask plate of the source and drain electrodes.
In the invention, the equipment for preparing the photoetching mask plate of the source and drain electrodes by focusing the patterning active layer partially covered with the photoresist is preferably a photoetching microscope.
After the patterned active layer partially covered with the photoresist is focused to prepare a photoetching mask plate of the source and drain electrodes, the invention carries out ultraviolet exposure and growth on the obtained system, and forms the source and drain electrodes on the surface of the patterned active layer.
In the invention, the radiation intensity of the ultraviolet light in the ultraviolet light exposure is preferably 400-450 mW/cm2More preferably 410-440 mW/cm2(ii) a The exposure time is preferably 3 to 6 seconds, and more preferably 4 to 5 seconds.
In the present invention, the chemical composition of the source-drain electrode is preferably aluminum.
The growth is not particularly limited in the invention, and the source and drain electrodes can be grown on the surface of the active layer by adopting the method well known by the technical personnel in the field.
For the surface of the patterned active layer which is not coated with the photoresist, the photoetching method of the source and drain electrodes in the technical scheme is preferably repeated in the invention, so that the accurate focusing photoetching preparation of the source and drain electrodes on the whole patterned active layer is realized.
The invention also provides a preparation method of the thin film transistor, which comprises the following steps:
growing a gate dielectric layer on a substrate; preparing a patterned active layer on the surface of the obtained gate dielectric layer;
photoetching the surface of the patterned active layer to prepare a source electrode and a drain electrode to obtain a primary thin film transistor;
annealing the primary thin film transistor to obtain the thin film transistor;
the photoetching method is adopted for preparing the source electrode and the drain electrode by photoetching.
The invention grows the grid dielectric layer on the basement.
In the present invention, the substrate is preferably a conductive glass, in particular, an ITO conductive glass.
Before growing the gate dielectric layer, the invention preferably further comprises the steps of pretreating the substrate; the pretreatment preferably comprises acetone washing, alcohol washing and deionized water washing in sequence. In the present invention, the pretreatment is preferably performed under the condition of sonication. In the invention, the time for acetone washing, alcohol washing and deionized water washing is preferably 5-15 min independently.
In the present invention, the chemical composition of the gate dielectric layer is preferably hafnium oxide. In the invention, the thickness of the gate dielectric layer is preferably 90-110 nm, and more preferably 95-105 nm.
In the invention, the growth of the gate dielectric layer is preferably a magnetron sputtering method.
In the embodiment of the invention, the conditions for growing the gate dielectric layer by using the magnetron sputtering method comprise the following steps: the power is preferably 100-200W, more preferably 120-180W; the growth pressure is preferably 6-10 mTorr, and more preferably 7-9 mTorr; the atmosphere gas is preferably argon.
After the gate dielectric layer is obtained, the patterned active layer is prepared on the surface of the obtained gate dielectric layer.
In the invention, the light transmittance of the active layer at 550nm of visible light is preferably 80-85%, and more preferably 81-84%. The chemical composition of the active layer is preferably a metal oxide, more preferably one or more of zinc oxide, indium zinc oxide and indium gallium zinc oxide. In the present invention, the thickness of the active layer is preferably 30 to 50nm, and more preferably 35 to 45 nm. The pattern of the active layer is not particularly limited in the present invention, and may be a pattern known to those skilled in the art.
In the present invention, the method for preparing the active layer is preferably a magnetron sputtering method or a sol-gel method.
In the embodiment of the present invention, the conditions for preparing the active layer using the magnetron sputtering method include: the power is preferably 50-150W, and more preferably 70-130W; the growth pressure is preferably 6-10 mTorr, and more preferably 7-9 mTorr; the atmosphere gas is preferably argon and/or oxygen. In the invention, when the atmosphere further comprises argon and oxygen, the volume ratio of the argon to the oxygen is preferably (90-100): (0-10), oxygen is not 0.
After the active layer is obtained, the active layer is subjected to patterning treatment to obtain a patterned active layer.
In the present invention, the patterning process preferably includes: and (3) homogenizing and drying the surface of the active layer, then fixing the active layer on a mask plate with patterns to perform ultraviolet exposure, and performing acid etching after development to obtain the patterned active layer.
In the present invention, the spin-on resist is preferably a coating resist. In the invention, the glue homogenizing amount of the glue homogenizing is preferably 20-27 mu L/cm2More preferably 21 to 26. mu.L/cm2And more preferably 22 to 25 μ L/cm2. The photoresist used for the surface leveling of the active layer is not particularly limited, and the photoresist known to those skilled in the art can be used.
In the invention, the equipment for homogenizing glue is preferably a glue homogenizer. In the invention, the rotation speed of the spin coater is preferably 2500-3500 rpm, more preferably 2600-3400 rpm, and still more preferably 2800-3200 rpm; the time is preferably 25 to 35 seconds, more preferably 26 to 34 seconds, and further preferably 28 to 32 seconds.
In the invention, the drying temperature is preferably 85-95 ℃, and more preferably 87-93 ℃; the time is preferably 4 to 6min, more preferably 4.5 to 5.5 min.
In the invention, the radiation intensity of the ultraviolet light in the ultraviolet light exposure is preferably 400-450 mW/cm2More preferably 410-440 mW/cm2(ii) a The exposure time is preferably 3 to 6 seconds, and more preferably 4 to 5 seconds.
After ultraviolet light exposure, the system is developed and then is subjected to acid etching, and the patterned active layer is obtained.
In the invention, the system obtained by ultraviolet light exposure is preferably soaked in a sodium hydroxide aqueous solution to remove the photoresist irradiated by the ultraviolet light, thereby realizing development. In the present invention, the concentration of sodium hydroxide in the sodium hydroxide aqueous solution is preferably 0.1 to 0.9% by mass, and more preferably 0.2 to 0.8% by mass. In the invention, the system obtained by ultraviolet light exposure is preferably soaked in a sodium hydroxide aqueous solution for 7-8 s.
After soaking in the aqueous sodium hydroxide solution, the present invention preferably further comprises blow-drying the resulting system with nitrogen gas, followed by heat curing. In the invention, the heat curing temperature is preferably 80-100 ℃, and more preferably 85-95 ℃; the time is preferably 3 to 7min, and more preferably 4 to 6 min. According to the invention, the photoresist which is not exposed and irradiated by ultraviolet light is cured through thermal curing.
In the present invention, the acid etching is preferably performed by immersing the resulting system in an acid.
In the invention, the acid for acid etching is preferably hydrochloric acid; the mass percentage concentration of the hydrochloric acid is preferably 0.1-0.9%, and more preferably 0.2-0.8%. In the invention, the soaking time is preferably 3-4 s. The invention realizes the etching of the exposed active layer by acid etching and realizes the patterning of the active layer.
After acid etching, the invention preferably also comprises the steps of washing the acid etching system with acetone, water and drying with nitrogen. The invention removes the photoresist which is not exposed and irradiated by ultraviolet light through acetone washing.
After the patterned active layer is obtained, the invention carries out photoetching on the surface of the patterned active layer to prepare a source drain electrode, thus obtaining the primary thin film transistor.
In the invention, the thickness of the source and drain electrodes is preferably 40-60 nm, and more preferably 45-55 nm.
In the present invention, the chemical composition of the source-drain electrode is preferably aluminum.
In the invention, the photolithography method for preparing the source and drain electrodes by photolithography is adopted, and is not described herein again.
When alignment is carried out under a photoetching machine microscope, the patterned active layer of the area which is not covered by the photoresist is directly exposed under the photoetching machine microscope, the area which is not covered by the photoresist is utilized in the microscope, the channel position of the patterned active layer can be clearly found, and if the area which is not covered by the photoresist and the photoetching mask plate of the corresponding source and drain electrode are accurately focused, the area which is covered by the photoresist and the photoetching mask plate of the corresponding source and drain electrode are also accurately focused, so that the source and drain electrode which is covered by the photoresist area can also be accurately covered on the active layer.
In the photoetching preparation of the source and drain electrodes, after ultraviolet light exposure, the obtained system is preferably placed in a sodium hydroxide solution for soaking so as to remove photoresist irradiated by the ultraviolet light, the source and drain electrodes grow on the surface of the obtained system after nitrogen blow-drying, and the source and drain electrodes growing on the photoresist are removed by acetone washing so as to form the source and drain electrodes with channels.
The invention preferably utilizes electron beam evaporation to prepare the source and drain electrodes.
After the primary thin film transistor is obtained, the invention anneals the primary thin film transistor to obtain the thin film transistor.
In the invention, the annealing temperature is preferably 250-350 ℃, more preferably 260-340 ℃, and further preferably 270-320 ℃; the time is preferably 10-20 min, more preferably 12-18 min, and still more preferably 14-16 min; the annealing atmosphere is preferably air.
In order to further illustrate the present invention, the following will describe in detail a method for photolithography of source and drain electrodes and a method for manufacturing a thin film transistor provided by the present invention with reference to the following examples, which should not be construed as limiting the scope of the present invention. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Example 1
Partially homogenizing the surface of the patterned active layer, dripping photoresist on the edge of the substrate, coating photoresist on the partial surface after spin coating, and heating and drying at 90 ℃ for 5min to obtain the patterned active layer partially covered with the photoresist;
fixing a substrate on an electrode patterning mask, aligning under a photoetching machine microscope, directly exposing a patterned active layer in a region which is not covered by photoresist under the photoetching machine microscope, clearly finding the position of the active layer from the microscope, and accurately aligning aiming at the region which is not covered by the photoresist so that a source drain electrode in the region which is covered by the photoresist can also be accurately covered on the active layer;
soaking the substrate in 0.5 wt.% sodium hydroxide aqueous solution for 7s after 4s by using an ultraviolet exposure system, washing off the photoresist irradiated by ultraviolet light, washing the substrate by deionized water, and drying the substrate by using nitrogen; and (3) growing a 50nm aluminum layer by adopting an electron beam evaporation technology to serve as a source/drain electrode, stripping the aluminum grown on the photoresist by using acetone, and finally obtaining the source/drain electrode formed on the surface of the patterned active layer.
Through observation, the patterned active layer covered with the photoresist can accurately focus to prepare the photoetching mask of the source and drain electrodes.
Example 2
Respectively carrying out acetone washing, alcohol washing and deionized water washing on the ITO substrate under an ultrasonic condition for 10min to obtain a clean substrate;
HfO with the thickness of 100nm is grown on the cleaned ITO substrate by magnetron sputtering2The layer is used as a gate dielectric layer, and the magnetron sputtering conditions are as follows: the growth power is 150W, the growth pressure is 8mTorr, and the atmosphere gas is argon; FIG. 1 is a diagram of a conductive glass substrate grown with a gate dielectric hafnium oxide;
growing a ZnO layer with the thickness of 40nm on the surface of the obtained gate dielectric layer by magnetron sputtering as an active layer, wherein the magnetron sputtering conditions are as follows: the growth power is 100W, the growth pressure is 8mTorr, the atmosphere gas is argon and oxygen, and the volume ratio of argon to oxygen is 95: 5; FIG. 2 is a diagram of growing an active layer of zinc oxide on a gate dielectric;
spin coating with a spin coater at 3000rpm for 30s to cover the whole active layer surface with 23 μ L/cm2Heating and drying on a hot plate at 90 deg.C for 5min, fixing on a patterned mask, and irradiating with ultraviolet light at 420mw/cm2Exposure with ultraviolet light for 4 s; soaking in 0.5 wt.% sodium hydroxide solution for 7s, washing off the photoresist irradiated by ultraviolet light, washing the substrate with deionized water, and drying with nitrogen; heating on hot plate for 3min to cure photoresist not irradiated by UV, soaking in 0.5 wt.% hydrochloric acid for 3s, etching exposed active layer, patterning the active layer, and removing the photoresist not irradiated by UV with acetoneThe photoresist is sprayed, and is washed by deionized water and dried by nitrogen gas, so as to obtain a patterned active layer; fig. 3 is a picture of active layer patterning;
partially homogenizing the surface of the patterned active layer, dripping photoresist on the edge of the substrate, coating photoresist on the partial surface after spin coating, and heating and drying at 90 ℃ for 5min to obtain the patterned active layer partially covered with the photoresist; FIG. 4 is a photograph of a portion of a spin-on process prior to spin-on; FIG. 5 is a photograph of a partially photoresist homogenized photoresist process after partially homogenizing the photoresist;
fixing a substrate on an electrode patterning mask, aligning under a photoetching machine microscope, directly exposing a patterned active layer in a region which is not covered by photoresist under the photoetching machine microscope, clearly finding the position of the active layer from the microscope, and accurately aligning aiming at the region which is not covered by the photoresist so that a source drain electrode in the region which is covered by the photoresist can also be accurately covered on the active layer; FIG. 6 is a photograph of a microscope alignment of a photo-resist machine after partial spin-on; FIG. 7 is a picture of a partially photoresist-uniformizing method for precisely aligning and growing source and drain electrodes;
soaking the substrate in 0.5 wt.% sodium hydroxide aqueous solution for 7s after 4s by using an ultraviolet exposure system, washing off the photoresist irradiated by ultraviolet light, washing the substrate by deionized water, and drying the substrate by using nitrogen; growing a 50nm aluminum layer serving as a source and drain electrode by adopting an electron beam evaporation technology, stripping the aluminum growing on the photoresist by using acetone, and finally obtaining a source and drain electrode formed on the surface of the patterned active layer to obtain a primary thin film transistor;
and annealing the primary thin film transistor for 15min at the temperature of 300 ℃ under the air condition to obtain the thin film transistor.
The thin film transistor prepared in example 2 was electrically tested with a semiconductor parameter instrument, and data analysis was performed by the method of: selecting a thin film transistor device with a source-drain electrode spacing of 100 mu m conductive channel to test an output characteristic curve, namely, at different gate voltages VGLower, source drain current IDSWith source-drain voltage VDSThe variation curve of (2) is an output characteristic curve, and the grid voltage V is testedGThe scanning range is 0V-8V, and the source-drain voltage VDSThe scanning range of (1) is 0V-5V, and the voltage V is different from the grid voltage VGLower pair of source-drain current IDSHas good regulating effect; the transfer characteristic curve is at different source-drain voltages VDSLower, source drain current IDSWith the gate voltage VGTest the gate voltage VGThe scanning range is-10V-4V, and the source-drain voltage VDSThe scanning range of (2) is 0V-4V, and the current on-off ratio of the thin film transistor device can be calculated to be 3.1 multiplied by 10 through a transfer curve3
In the conventional method, the thin film transistor prepared by uniformly spin-coating the photoresist is incapable of testing the field effect performance of the thin film transistor because the active layer is made of a high-light-transmittance material and a microscope of a photoetching machine cannot observe the position of the patterned active layer through the photoresist, so that the prepared source/drain electrode cannot accurately cover the patterned active layer and a conducting channel is deviated.
Comparative example 1
The conventional method for preparing a source-drain electrode on the surface of a patterned active layer:
the photoresist is dripped on the center of the surface of the patterned active layer, the photoresist can uniformly cover the whole patterned active layer after spin coating, and fig. 8 is a picture before normal photoresist is homogenized, and the photoresist is dripped on the center of the substrate; FIG. 9 is a photograph of a uniformly coated surface of a photoresist after spin coating; and (3) fixing the obtained system on an electrode patterning mask after heating and drying for 5min, and aligning under a microscope of a photoetching machine so that the electrode aluminum can cover the patterned active layer.
The photoetching process is mature in technology and good in stability, but when the active layer is made of a high-light-transmittance material, a photoetching machine microscope cannot observe the position of the patterned active layer through photoresist, and a source electrode and a drain electrode cannot be accurately covered on the surface of the patterned active layer when being prepared, so that channel control and carrier injection difference can be predicted.
Example 3
Partially homogenizing the surface of the patterned active layer, dripping photoresist on the edge of the substrate, coating photoresist on the partial surface after spin coating, and heating and drying at 90 ℃ for 5min to obtain the patterned active layer partially covered with the photoresist;
fixing a substrate on an electrode patterning mask, aligning under a photoetching machine microscope, directly exposing a patterned active layer in a region which is not covered by photoresist under the photoetching machine microscope, clearly finding the position of the active layer from the microscope, and accurately aligning aiming at the region which is not covered by the photoresist so that a source drain electrode in the region which is covered by the photoresist can also be accurately covered on the active layer;
soaking the substrate in 0.5 wt.% sodium hydroxide aqueous solution for 7s after 4s by using an ultraviolet exposure system, washing off the photoresist irradiated by ultraviolet light, washing the substrate by deionized water, and drying the substrate by using nitrogen; and (3) growing a 50nm aluminum layer by adopting an electron beam evaporation technology to serve as a source/drain electrode, stripping the aluminum grown on the photoresist by using acetone, and finally obtaining the source/drain electrode formed on the surface of the patterned active layer.
Through observation, the patterned active layer covered with the photoresist can accurately focus to prepare the photoetching mask of the source and drain electrodes.
Example 4
Respectively carrying out acetone washing, alcohol washing and deionized water washing on the ITO substrate under an ultrasonic condition for 10min to obtain a clean substrate;
HfO with the thickness of 100nm is grown on the cleaned ITO substrate by magnetron sputtering2The layer is used as a gate dielectric layer, and the magnetron sputtering conditions are as follows: the growth power is 150W, the growth pressure is 8mTorr, and the atmosphere gas is argon;
growing a ZnO layer with the thickness of 60nm on the surface of the obtained gate dielectric layer by magnetron sputtering as an active layer, wherein the magnetron sputtering conditions are as follows: the growth power is 100W, the growth pressure is 8mTorr, the atmosphere gas is argon and oxygen, and the volume ratio of argon to oxygen is 95: 5;
spin coating with a spin coater at 3000rpm for 30s to cover the whole active layer surface with 23 μ L/cm2Heating and drying on a hot plate at 90 deg.C for 5min, fixing on a patterned mask, and irradiating with ultraviolet light at 420mw/cm2Exposure with ultraviolet light for 4 s; soaking in 0.5 wt.% sodium hydroxide solution for 7s, washing off the photoresist irradiated by ultraviolet light, washing the substrate with deionized water, and drying with nitrogen; heating on hot plate for 3minCuring the photoresist which is not irradiated by ultraviolet light, then soaking in 0.5 wt.% hydrochloric acid for 3s, etching the exposed active layer to pattern the active layer, removing the photoresist which is not irradiated by the ultraviolet light by using acetone, washing by using deionized water, and drying by using nitrogen to obtain the patterned active layer;
partially homogenizing the surface of the patterned active layer, dripping photoresist on the edge of the substrate, coating photoresist on the partial surface after spin coating, and heating and drying at 90 ℃ for 5min to obtain the patterned active layer partially covered with the photoresist;
fixing a substrate on an electrode patterning mask, aligning under a photoetching machine microscope, directly exposing a patterned active layer in a region which is not covered by photoresist under the photoetching machine microscope, clearly finding the position of the active layer from the microscope, and accurately aligning aiming at the region which is not covered by the photoresist so that a source drain electrode in the region which is covered by the photoresist can also be accurately covered on the active layer;
soaking the substrate in 0.5 wt.% sodium hydroxide aqueous solution for 7s after 4s by using an ultraviolet exposure system, washing off the photoresist irradiated by ultraviolet light, washing the substrate by deionized water, and drying the substrate by using nitrogen; growing a 50nm aluminum layer serving as a source and drain electrode by adopting an electron beam evaporation technology, stripping the aluminum growing on the photoresist by using acetone, and finally obtaining a source and drain electrode formed on the surface of the patterned active layer to obtain a primary thin film transistor;
and annealing the primary thin film transistor for 15min at the temperature of 300 ℃ under the air condition to obtain the thin film transistor.
The thin film transistor prepared in example 4 was electrically tested by a semiconductor parameter instrument according to the method of example 2, and data analysis was performed to calculate a current on/off ratio of 1.4 × 10 of the thin film transistor device2
The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.

Claims (9)

1. A photoetching method for source and drain electrodes is characterized by comprising the following steps:
partially homogenizing the photoresist on the surface of the patterned active layer, and drying to obtain the patterned active layer partially covered with the photoresist;
and focusing the patterned active layer partially covered with the photoresist to prepare a photoetching mask plate of the source and drain electrodes by utilizing the part of the patterned active layer partially covered with the photoresist, carrying out ultraviolet exposure and growth, and forming the source and drain electrodes on the surface of the patterned active layer.
2. The lithographic method of claim 1, wherein the partial track is: and coating photoresist on the surface of the patterned active layer, wherein the photoresist is deviated from the center of the surface of the patterned active layer.
3. The photolithography method according to claim 1, wherein the active layer has a light transmittance of 80 to 85% at 550nm of visible light.
4. The lithographic method of claim 3, wherein the active layer has a chemical composition of one or more of zinc oxide, indium zinc oxide, and indium gallium zinc oxide.
5. The photolithography method according to claim 1, wherein the drying temperature is 85 to 95 ℃ and the drying time is 4 to 6 min.
6. The photolithography method according to claim 1, wherein the ultraviolet light exposure has a radiation intensity of 400 to 450mW/cm2The exposure time is 3-6 s.
7. A preparation method of a thin film transistor is characterized by comprising the following steps:
growing a gate dielectric layer on a substrate; preparing a patterned active layer on the surface of the obtained gate dielectric layer;
photoetching the surface of the patterned active layer to prepare a source electrode and a drain electrode to obtain a primary thin film transistor;
annealing the primary thin film transistor to obtain the thin film transistor;
the method for preparing the source and drain electrodes by photoetching is as claimed in any one of claims 1 to 6.
8. The production method according to claim 7, wherein the substrate is a conductive glass;
the chemical composition of the gate dielectric layer is hafnium oxide;
the chemical composition of the source and drain electrodes is aluminum.
9. The preparation method according to claim 7, wherein the annealing temperature is 250-350 ℃ and the annealing time is 10-20 min; the annealing atmosphere is air.
CN202111543754.8A 2021-12-16 2021-12-16 Photoetching method of source and drain electrodes and preparation method of thin film transistor Pending CN114300342A (en)

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