CN114296278A - Array substrate, display panel and display device - Google Patents
Array substrate, display panel and display device Download PDFInfo
- Publication number
- CN114296278A CN114296278A CN202111460626.7A CN202111460626A CN114296278A CN 114296278 A CN114296278 A CN 114296278A CN 202111460626 A CN202111460626 A CN 202111460626A CN 114296278 A CN114296278 A CN 114296278A
- Authority
- CN
- China
- Prior art keywords
- electrode
- array substrate
- spacer
- display area
- test electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Abstract
The application relates to the technical field of display, the application discloses an array substrate, display panel and display device, array substrate has the display area and encircles the non-display area of locating the display area outlying, be equipped with test electrode in the non-display area, test electrode is used for to the display area in input test signal, array substrate includes the spacer, the spacer is located in the non-display area, and at least part is located the test electrode top, the spacer is equipped with the position passageway of keeping away that can supply detection probe to pass through, keep away the position passageway and run through the spacer and extend to test electrode. The array substrate that this application provided can make things convenient for detection probe to carry out signal anomaly detection to array substrate.
Description
Technical Field
The application relates to the technical field of display, in particular to an array substrate, a display panel and a display device.
Background
The goa (gate driver on array) is a technology for driving and setting the scan lines in the non-display area of the array substrate, and the poa (ps on array) technology is a technology for manufacturing the spacers ps (photo spacer) on the array substrate, which are widely applied due to the advantages of low cost, low power consumption, narrow frame, and the like. When a display panel manufactured by adopting a GOA technology has signal abnormality, a small color film substrate needs to be cut off to expose a test electrode on the uppermost layer of a GOA manufacturing area of an array substrate, and a detection probe is used for poking a corresponding signal point position on the test electrode, so that the reason of the signal abnormality is obtained.
In the related art, because the uppermost layer of the GOA manufacturing area is the test electrode, if the position of the display panel corresponding to the GOA manufacturing area is pressed by an external force, the test electrode in the GOA manufacturing area will contact and short-circuit with the test electrode on the color film substrate side, so that a PS needs to be disposed on the test electrode in the GOA manufacturing area, and the PS covers the surface of the test electrode in the entire GOA manufacturing area, so as to support the color film substrate and the array substrate corresponding to the GOA manufacturing area through the PS, thereby preventing the test electrode in the GOA manufacturing area from contacting and short-circuiting with the test electrode on the color film substrate side. Due to the arrangement of the PS, the detection probe cannot penetrate the PS to be in contact with the testing electrode in the GOA manufacturing area, and cannot contact a signal point position to be detected, so that inconvenience is brought to abnormal signal detection of the array substrate adopting the GOA technology.
Disclosure of Invention
The main objective of this application is to provide an array substrate, aim at keeping away the position passageway through offering on the spacer in array substrate's non-display area, through keeping away the position passageway and supplying the testing probe who is used for signal anomaly detection to pass through, make testing probe can be through keeping away the test electrode contact in the position passageway and the non-display area to under the prerequisite of keeping the spacer, carry out more convenient signal detection to array substrate.
In order to achieve the above object, firstly, the present application provides an array substrate, the array substrate has a display area and a non-display area surrounding the display area, a test electrode is disposed in the non-display area, the test electrode is used for inputting a test signal into the display area, and the array substrate includes:
the spacer is arranged in the non-display area and at least partially positioned above the test electrode, the spacer is provided with a position avoiding channel for the detection probe to pass through, and the position avoiding channel penetrates through the spacer and extends towards the test electrode.
In an embodiment of the present application, the spacer is disposed around the periphery of the test electrode and encloses the avoidance channel.
In an embodiment of the present application, the spacer includes a plurality of spacer blocks arranged at intervals;
the spacer blocks are arranged around the periphery of the test electrode, and the spacer blocks surround the side wall of the test electrode to form the avoiding channel.
In an embodiment of the present application, the spacer has a blocking portion disposed on the test electrode;
the separation part is provided with the avoiding channel, and the avoiding channel penetrates through one side of the separation part facing the test electrode and one side of the separation part back facing the test electrode.
In an embodiment of the present application, the non-display area of the array substrate includes:
a base layer;
a first electrode disposed on the base layer;
the insulating layer is arranged on one side, back to the base layer, of the first electrode; and
the second electrode is arranged in the insulating layer and is arranged at an interval with the first electrode; the insulating layer is provided with a first via hole extending towards the first electrode and a second via hole extending towards the second electrode;
the test electrode is arranged on one side, back to the first electrode, of the insulating layer and is electrically connected with the first electrode and the second electrode through the first via hole and the second via hole.
In an embodiment of the present application, the array substrate further includes a support structure;
the support structure is arranged on the substrate layer and surrounds the periphery of the test electrode;
the shock insulator is arranged on one side of the support structure, which is back to the substrate layer.
In an embodiment of the present application, the support structure includes a partial structure of the first electrode, the insulating layer, and the second electrode;
the first electrode, the insulating layer and the second electrode in the supporting structure are stacked, so that the distance between the spacer and the base layer is equal to the maximum distance between the side, facing the base layer, of the test electrode and the base layer.
In an embodiment of the present application, the spacer is a color resistor.
Secondly, this application still provides a display panel, display panel includes:
the array substrate described above; and
the color film substrate is arranged on one side of the array substrate and forms a sealed space capable of being filled with liquid crystal with the array substrate in a surrounding mode.
In addition, the present application also proposes a display device including:
the display panel described above; and
the backlight module is positioned on one side, back to the color film substrate of the display panel, of the array substrate of the display panel and used for providing a light source for the display panel.
This application technical scheme is through setting up the spacer in the peripheral non-display area of display area, utilize the spacer to realize array substrate and the support of the various membrane substrate of array substrate offside, and through running through seting up on the spacer and keeping away the position passageway, use in the test probe that detects the signal anomaly can be through keeping away the position passageway on the spacer and the test electrode contact in the non-display area, realize the detection of abnormal signal on the array substrate, thereby can realize keeping away the position to detecting under the prerequisite that need not remove the spacer, array substrate's signal detection has been made things convenient for.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.
Fig. 1 is a schematic structural diagram of an array substrate according to a first embodiment of the present application;
FIG. 2 is a schematic view of a first structure of a non-display area of an array substrate according to a first embodiment of the present disclosure;
FIG. 3 is a cross-sectional view of the non-display area of the array substrate of FIG. 2 along the line A-A';
FIG. 4 is another cross-sectional view of the non-display area of the array substrate of FIG. 2 along the line A-A';
FIG. 5 is a schematic view of a second structure of a non-display area of an array substrate according to a first embodiment of the present application;
FIG. 6 is a cross-sectional view of the non-display area of the array substrate of FIG. 5 along line B-B';
FIG. 7 is a schematic diagram illustrating a third structure of a non-display area of an array substrate according to the first embodiment of the present application;
FIG. 8 is a fourth schematic view illustrating a non-display area of an array substrate according to a first embodiment of the present disclosure;
fig. 9 is a fifth structural diagram of a non-display area of an array substrate according to the first embodiment of the present application;
FIG. 10 is a schematic structural diagram of a display panel according to a second embodiment of the present application;
fig. 11 is a schematic structural diagram of a display device according to a third embodiment of the present application.
The reference numbers illustrate:
| reference numerals | Name (R) | Reference numerals | Name (R) |
| 1 | |
13 | |
| 11 | |
14 | |
| 12 | Non-display |
14a | Avoiding |
| 121 | |
141 | Spacer block |
| 122 | A |
142 | |
| 123 | Insulating |
15 | |
| 123a | A first via hole | 2 | |
| 123b | Second via hole | 3 | |
| 124 | Second electrode | 4 | Detection probe |
The implementation, functional features and advantages of the objectives of the present application will be further explained with reference to the accompanying drawings.
Detailed Description
The technical solutions in the embodiments of the present application will be described clearly and completely with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
It should be noted that all the directional indications (such as up, down, left, right, front, and rear … …) in the embodiment of the present application are only used to explain the relative position relationship between the components, the movement situation, and the like in a specific posture (as shown in the drawing), and if the specific posture is changed, the directional indication is changed accordingly.
In this application, unless expressly stated or limited otherwise, the terms "connected," "secured," and the like are to be construed broadly, and for example, "secured" may be a fixed connection, a removable connection, or an integral part; can be mechanically or electrically connected; they may be directly connected or indirectly connected through intervening media, or they may be connected internally or in any other suitable relationship, unless expressly stated otherwise. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art as appropriate.
In addition, descriptions in this application as to "first", "second", etc. are for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicit to the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. The meaning of "and/or" appearing throughout is the same and is meant to encompass three juxtapositions, exemplified by "A and/or B" and including either scheme A, scheme B, or both schemes A and B. In addition, technical solutions between various embodiments may be combined with each other, but must be realized by a person skilled in the art, and when the technical solutions are contradictory or cannot be realized, such a combination should not be considered to exist, and is not within the protection scope of the present application.
The first embodiment:
referring to fig. 1 to 3, the present application provides an array substrate 1, where the array substrate 1 has a display area 11 and a non-display area 12 surrounding the display area 11, a test electrode 13 is disposed in the non-display area 12, the test electrode 13 is used for inputting a test signal into the display area 11, the array substrate 1 includes a spacer 14, the spacer 14 is disposed in the non-display area 12 and at least partially located above the test electrode 13, the spacer 14 is provided with a position avoiding channel 14a through which the detection probe 4 can pass, and the position avoiding channel 14a penetrates through the spacer 14 and extends toward the test electrode 13.
In the present embodiment, as shown in fig. 1, the display region 11 of the array substrate 1 is located in the middle of the array substrate 1, and the non-display region 12 of the array substrate 1 is disposed around the display region 11 of the array substrate 1. The display area 11 of the array substrate 1 may be provided with a plurality of data lines and scan lines arranged in a staggered manner, a pixel unit is defined between two adjacent data lines and two adjacent scan lines, and each pixel unit may perform signal driving through the scan lines and the data lines. The non-display area 12 of the array substrate 1 is used for arranging a test electrode 13 and a circuit module connected with the test electrode 13, and the test electrode 13 may be connected with a scan line in the array substrate 1 through a metal layer on the array substrate 1, or directly connected with the scan line. The detection probe 4 is externally connected with a test device, the test device inputs a test signal to the display area 11 of the array substrate 1 through the detection probe 4, for example, inputs the test signal to a circuit module connected with the test electrode 13, receives a waveform feedback signal output by a scan line in the display area 11 of the array substrate 1, and can judge whether the currently detected scan line is abnormal or not according to the waveform feedback signal, so as to obtain a corresponding signal detection result.
As shown in fig. 2, the non-display area 12 of the array substrate 1 is provided with a spacer 14 for supporting the color filter substrate 2 on the opposite side of the array substrate 1, and the spacer 14 is used for preventing the common electrode contact on the color filter substrate 2 side and the positive array substrate 1 side from being shorted when the non-display area 12 of the display panel is pressed. The spacer 14 may be disposed on the test electrode 13, or disposed on the outer periphery of the test electrode 13, or partially disposed on the test electrode 13 and the rest disposed on the outer periphery of the test electrode 13. The spacer 14 is made of a material including, but not limited to, photoresist and color resist.
As shown in fig. 3, the detection point of the detection probe 4 may be any surface portion of the test electrode 13 exposed through the avoiding channel 14a, the spacer 14 is disposed in the non-display area 12 at the periphery of the display area 11, and the avoiding channel 14a is formed in the spacer 14 in a penetrating manner, so that the detection probe 4 for detecting signal abnormality can contact the test electrode 13 in the non-display area 12 through the avoiding channel 14a on the spacer 14, thereby detecting an abnormal signal on the array substrate 1, and avoiding detection can be achieved on the premise that the spacer 14 does not need to be removed, thereby facilitating signal detection of the array substrate 1. The avoiding channel 14a may be a through hole structure, an opening structure, etc., which is not limited herein.
In one embodiment of the present application, as shown in fig. 2 and 3, the spacer 14 is disposed around the outer periphery of the test electrode 13 and encloses to form a clearance channel 14 a.
In this embodiment, the spacer 14 is disposed around the periphery of the test electrode 13, so that the inner peripheral wall of the spacer 14 surrounds and forms the avoiding channel 14a extending to the test electrode 13, and the color film substrate 2 and the array substrate 1 are supported by the annular structure of the spacer 14, which is beneficial to improving the stability of the liquid crystal cell thickness and the structural stability of the non-display area of the display panel. In addition, the spacer 14 is arranged around the periphery of the testing electrode 13, which is also beneficial to enlarging the channel area of the avoiding channel 14a, so that a sufficient access space is provided for the detecting probe 4, and the detecting probe 4 can conveniently detect the testing electrode 13 through the avoiding channel 14 a.
As shown in fig. 3 and 4, the material of the spacer 14 in fig. 3 and 4 is different, so the spacer 14 is respectively marked by different hatched lines, because the non-display region 12 on the side of the array substrate 1 is arranged corresponding to the non-display region 12 on the side of the color film substrate 2, and the non-display region on the side of the color film substrate 2 is provided with a black matrix layer for shading, the non-display region of the array substrate does not have a lateral light leakage problem, and the material of the spacer 14 may be a shading material or a light-transmitting material, for example, the spacer 14 may be a resin, a red color barrier, a blue color barrier, a green color barrier, and the like, which is beneficial to improving the flexibility of the design of the spacer 14 and reducing the material cost of the spacer 14.
Optionally, the spacer 14 includes two spacer segments disposed on opposite sides of the test electrode 13, and the two spacer segments may be disposed adjacent to two long sides of the test electrode 13, respectively, or adjacent to two short sides of the test electrode 13, respectively. Therefore, on the premise of ensuring that the spacer 14 reliably supports the non-display area 12 of the array substrate 1 and the non-display area of the color film substrate 2, the overall size of the spacer 14 is reduced, and the material cost and the manufacturing cost of the spacer 14 are saved. The non-display area of the color filter substrate 2 and the non-display area 12 of the array substrate 1 are correspondingly arranged, the long side of the test electrode 13 is a side edge of the test electrode 13 extending along the width direction of the array substrate 1, and the short side of the test electrode 13 is a side edge of the test electrode 13 extending along the length direction of the array substrate 1.
In an embodiment of the present application, as shown in fig. 2 and fig. 3, the non-display area 12 of the array substrate 1 includes a base layer 121, a first electrode 122, an insulating layer 123, and a second electrode 124, wherein the first electrode 122 is disposed on the base layer 121, and the insulating layer 123 is disposed on a side of the first electrode 122 facing away from the base layer 121; the second electrode 124 is disposed in the insulating layer 123 and spaced apart from the first electrode 122; the insulating layer 123 is provided with a first via hole 123a extending toward the first electrode 122 and a second via hole 123b extending toward the second electrode 124; the test electrode 13 is disposed on a side of the insulating layer 123 opposite to the first electrode 122, and is electrically connected to the first electrode 122 and the second electrode 124 through the first via hole 123a and the second via hole 123 b.
In this embodiment, the first electrode 122 and the second electrode 124 are used to connect the circuit module of the non-display area 12, the first electrode 122 and the second electrode 124 are electrically connected through the test electrode 13, the first electrode 122 or the second electrode 124 can be used as a conductive electrode connected to the display area 11, when the detecting probe 4 is connected to the testing electrode 13, the electrical signal inputted from the detecting probe 4 to the testing electrode 13 can be transmitted into the display area 11 through the first electrode 122 and the second electrode 124, the feedback signal in the display area 11 of the array substrate 1 can also be transmitted to the first electrode 122 or the second electrode 124 through the testing electrode 13, when the detecting probe 4 is contacted with the testing electrode 13, the detecting probe 4, the testing electrode 13, the first electrode 122 and the second electrode 124 are conducted to each other, thus, the circuit block connected to the first electrode 122 and the circuit block connected to the second electrode 124 can be detected by the detection probe 4. Specifically, the detection probe 4 may be externally connected to a test device, the test device inputs a test signal to the display area 11 of the array substrate 1 or the circuit module connected to the first electrode 122 or the second electrode 124 through the detection probe 4, the test electrode 13, the first electrode 122, and the second electrode 124, receives a waveform feedback signal output from the display area 11 of the array substrate 1 or the circuit module connected to the first electrode 122 or the second electrode 124, and can know whether the signal output of the circuit module connected to the first electrode 122 or the second electrode 124 is abnormal by determining whether the waveform feedback signal is abnormal, so as to implement signal detection of the circuit module connected to the first electrode 122 and the circuit module connected to the second circuit. The first electrode 122 and the second electrode 124 may be electrically connected to a driving circuit or a thin film transistor switch on the array substrate 1, so that whether the driving circuit or the thin film transistor switch on the array substrate 1 is abnormal or not can be detected through the above detection method.
In an embodiment of the present application, as shown in fig. 3, the array substrate 1 further includes a support structure 15; the support structure 15 is shown disposed on the base layer 121 and around the periphery of the test electrode 13; the spacers 14 are provided on the side of the support structure 15 facing away from the substrate layer 121.
In this embodiment, the supporting structure 15 is used for supporting the spacer 14, the supporting structure 15 is located between the substrate layer 121 and the spacer 14, and due to the arrangement of the supporting structure 15, the spacer 14 can obtain a higher supporting height through the supporting structure 15, and meanwhile, the spacer 14 can also adjust the heights of various parts through the supporting structure 15, so that the surfaces of the spacer 14 away from the substrate layer 121 are located at the same horizontal position, so as to reliably and stably support the color filter substrate 2 and the non-display area 12 of the array substrate 1. The material of the supporting structure 15 includes, but is not limited to, metal, resin, and color resist.
Alternatively, as shown in fig. 3 and 4, the support structure 15 includes a partial structure of the first electrode 122, the insulating layer 123, and the second electrode 124; the first electrode 122, the insulating layer 123 and the second electrode 124 in the support structure 15 are stacked such that the spacing between the spacer 14 and the base layer 121 is equal to the maximum spacing between the side of the test electrode 13 facing the base layer 121 and the base layer 121.
In this embodiment, the supporting structure 15 is made of a partial structure of the first electrode 122, a partial structure of the insulating layer 123, and a partial structure of the second electrode 124, and the arrangement and thickness of the first electrode 122, the insulating layer 123, and the second electrode 124 may be the same as those of the previous embodiment, that is, the first electrode 122 of the supporting structure 15 is disposed on the base layer 121, the insulating layer 123 is partially disposed on a side of the first electrode 122 facing away from the base layer 121, the second electrode 124 is disposed in the insulating layer 123 and spaced apart from the first electrode 122, and both sides of the second electrode 124 facing and facing away from the first electrode 122 have partial insulating layers 123. Because the test electrode 13 is a metal electrode layer, the thickness of which is very thin and can be almost ignored, the structural design of the support structure 15 in this embodiment can ensure that when the first electrode 122, the insulating layer 123 and the second electrode 124 are disposed on the base layer 121 in the display area 11 of the array substrate 1 in the same manner, the spacers 14 in the display area 11 of the array substrate 1 can maintain the same support height as the spacers 14 in the non-display area 12 of the array substrate 1, so that the display panel composed of the array substrate 1 and the color filter substrate 2 can be uniformly supported by the spacers 14 in the display area and the non-display area of the display panel, thereby preventing the lines under the spacers 14 from being pressed and the load from increasing when the non-display area of the display panel is pressed, because the lines in the non-display area of the display panel are many and sensitive, therefore, the load of the related circuit becomes large, which causes the abnormal output of the circuit in the non-display area of the array substrate 1, and causes the light leakage of the display panel, resulting in the poor display of the display panel.
It should be noted that, because the second electrode 124 does not completely shield the first motor 122 in the vertical light path direction of the array substrate 1, there is actually a case where the surface of the test electrode 13 facing the base layer 121 is partially high and partially low, when the first electrode 122, the insulating layer 123 and the second electrode 124 extend into the display region 11 of the array substrate 1, the spacers disposed in the display area 11 of the array substrate 1 will be referred to the highest position of the insulating layer 123 facing away from the base layer 121, in order to ensure the supporting height of the spacers in the display area 11 and the non-display area 12 of the array substrate 1 is consistent, the spacers 14 in the non-display area 12 in this embodiment are set with the height position of the highest portion of the test electrode 13 as a reference, that is, the spacing between the spacers 14 and the base layer 121 in the non-display area 12 is equal to the maximum spacing between the side of the test electrode 13 facing the base layer 121 and the base layer 121.
In an embodiment of the present application, as shown in fig. 5 and 6, the spacer 14 has a blocking portion 142 provided on the test electrode 13; the blocking portion 142 is provided with a clearance channel 14a, and the clearance channel 14a penetrates through one side of the blocking portion 142 facing the test electrode 13 and one side of the blocking portion 142 facing away from the test electrode 13.
In this embodiment, the spacer 14 may be disposed on the upper surface of the testing electrode 13 in a covering manner, and the avoiding channel 14a may be a through hole structure disposed on the spacer 14, and the aperture of the through hole structure is larger than the diameter of the detecting probe 4, so that the detecting probe 4 can smoothly pass through the through hole structure to contact the testing electrode 13. By covering the surface of the test electrode 13 with the spacer 14, on one hand, the contact area between the spacer 14 and the test electrode 13 can be increased, the connection tightness between the spacer 14 and the test electrode 13 is improved, and the spacer 14 is prevented from peeling off; on the other hand, the contact area between the spacer 14 and the color film substrate 2 opposite to the array substrate 1 can be increased, so that the stability of the spacer 14 for supporting the array substrate 1 and the color film substrate 2 is improved.
In an embodiment of the present application, as shown in fig. 7 and 8, the spacer 14 includes a plurality of spacer blocks 141 arranged at intervals; the plurality of spacer blocks 141 are disposed around the periphery of the test electrode 13, and the side walls of the plurality of spacer blocks 141 facing the test electrode 13 surround to form the avoiding channel 14 a.
In the present embodiment, the spacer 14 includes a plurality of spacer blocks 141, and the inner sides of the spacer blocks 141 form the clearance passage 14 a. The spacer blocks 14 may be block-shaped structures, the cross-sectional shapes of which may be square or polygonal, the number of the spacer blocks 141 may be three, four, or more than four, when the number of the spacer blocks 141 is three, one of the spacer blocks 141 may be disposed near the short side of the test electrode 13, and the other two spacer blocks 141 may be disposed near the long side of the test electrode 13, so as to stably support the color film substrate 2 and the array substrate 1; when the number of the spacer blocks 141 is four, the four spacer blocks 141 can be respectively arranged adjacent to four corners of the test electrode 13, so that the color film substrate 2 and the array substrate 1 are stably supported; when the number of the spacer blocks 141 is plural, the plurality of spacer blocks 141 may be disposed around the entire test electrode 13 to stably support the color filter substrate 2 and the array substrate 1. The material of each spacer block 141 includes, but is not limited to, resin or color resist, and the height of each spacer block 141 is the same. The arrangement of the spacer blocks 141 can save the overall material cost of the spacer 14, reduce the manufacturing cost and difficulty of the spacer 14, and simultaneously can give consideration to the stability of supporting the non-display area of the display panel.
Alternatively, as shown in fig. 10, the spacer blocks 141 are arranged in a long bar shape, so that the spacer blocks 141 are in a bar or segment structure, and each spacer block 141 may be arranged adjacent to one long side of the test electrode 13 or adjacent to one short side of the test electrode 13. Therefore, on the premise of ensuring that the non-display area 12 of the array substrate 1 and the non-display area of the color film substrate 2 are reliably supported by the spacer block 141, the overall size of the spacer 14 is reduced, and the material cost and the manufacturing cost of the spacer 14 are saved. The long side of the test electrode 13 is a side of the test electrode 13 extending along the width direction of the array substrate 1, and the short side of the test electrode 13 is a side of the test electrode 13 extending along the length direction of the array substrate 1. One or more strip spacer blocks 141 may be provided as needed at the periphery of the short and long sides of the test electrode 13 and the periphery of the junction of the short and long sides of the test electrode 13.
Second embodiment:
the present application further provides a display panel, as shown in fig. 10, the display panel includes the array substrate 1 and a color filter substrate 2, the color filter substrate 2 is disposed on one side of the array substrate 1, and encloses with the array substrate 1 to form a sealed space which can be filled with liquid crystal.
In this embodiment, the color film substrate 2 is disposed on the opposite side of the array substrate 1, and encloses with the array substrate 1 to form a liquid crystal cell, and a sealed space in the liquid crystal cell is used for filling liquid crystal. The test electrode 13 and the spacer 14 are located between the color film substrate 2 and the array substrate 1, the test electrode 13 is located in the non-display area 12 of the array substrate 1, the non-display area of the color film substrate 2 is arranged corresponding to the non-display area 12 of the array substrate 1, and a black matrix for shading is arranged in the non-display area of the color film substrate 2 to avoid lateral light leakage of the display panel. The specific structure of the array substrate 1 in this embodiment refers to the above embodiments, and since the display panel adopts all the technical solutions of all the embodiments, at least all the beneficial effects brought by the technical solutions of the embodiments are achieved, and are not described in detail herein.
The third embodiment:
as shown in fig. 11, the display device includes a backlight module 3 and a display panel in the previous embodiment, where the backlight module 3 is located on a side of the array substrate 1 of the display panel, which is opposite to the color filter substrate 2 of the display panel, and is used to provide a light source for the display panel.
In this embodiment, the backlight module 3 may be a direct type backlight module 3 or a side type backlight module 3, the backlight module 3 may include a light modulation film such as a diffusion sheet, a back plate, a light source, a light guide plate, and the like, and the light emitting side of the backlight module 3 is disposed toward the array substrate 1 of the display panel, so that the backlight module 3 can provide the light source to the display panel, and the display panel can control the light conduction and finally display an image. The specific structure of the display panel refers to the above embodiments, and since the display device adopts all technical solutions of all the above embodiments, at least all the beneficial effects brought by the technical solutions of the above embodiments are achieved, and no further description is given here.
The above are only alternative embodiments of the present application, and not intended to limit the scope of the present application, and all modifications and equivalents made by the contents of the specification and the drawings of the present application, or directly/indirectly applied to other related technical fields, are included in the scope of the present application.
Claims (10)
1. An array substrate, the array substrate has a display area and a non-display area arranged around the display area, a test electrode is arranged in the non-display area, the test electrode is used for inputting a test signal into the display area, and the array substrate is characterized by comprising:
the spacer is arranged in the non-display area and at least partially positioned above the test electrode, the spacer is provided with a position avoiding channel for the detection probe to pass through, and the position avoiding channel penetrates through the spacer and extends towards the test electrode.
2. The array substrate of claim 1, wherein the spacer is disposed around the periphery of the test electrode and encloses the avoiding channel.
3. The array substrate of claim 2, wherein the spacer comprises a plurality of spacer blocks arranged at intervals;
the spacer blocks are arranged around the periphery of the test electrode, and the spacer blocks surround the side wall of the test electrode to form the avoiding channel.
4. The array substrate of claim 1, wherein the spacer has a barrier portion disposed on the test electrode;
the separation part is provided with the avoiding channel, and the avoiding channel penetrates through one side of the separation part facing the test electrode and one side of the separation part back facing the test electrode.
5. The array substrate of any one of claims 1 to 4, wherein the non-display area of the array substrate comprises:
a base layer;
a first electrode disposed on the base layer;
the insulating layer is arranged on one side, back to the base layer, of the first electrode; and
the second electrode is arranged in the insulating layer and is arranged at an interval with the first electrode; the insulating layer is provided with a first via hole extending towards the first electrode and a second via hole extending towards the second electrode;
the test electrode is arranged on one side, back to the first electrode, of the insulating layer and is electrically connected with the first electrode and the second electrode through the first via hole and the second via hole.
6. The array substrate of claim 5, wherein the array substrate further comprises a support structure;
the support structure is arranged on the substrate layer and surrounds the periphery of the test electrode;
the shock insulator is arranged on one side of the support structure, which is back to the substrate layer.
7. The array substrate of claim 6, wherein the support structure comprises a partial structure of the first electrode, the insulating layer, and the second electrode;
the first electrode, the insulating layer and the second electrode in the supporting structure are stacked, so that the distance between the spacer and the base layer is equal to the maximum distance between the side, facing the base layer, of the test electrode and the base layer.
8. The array substrate of any one of claims 1 to 4, wherein the spacer is a color resist.
9. A display panel, comprising:
an array substrate according to any one of claims 1 to 8; and
the color film substrate is arranged on one side of the array substrate and forms a sealed space capable of being filled with liquid crystal with the array substrate in a surrounding mode.
10. A display device, characterized in that the display device comprises:
the display panel of claim 9; and
the backlight module is positioned on one side, back to the color film substrate of the display panel, of the array substrate of the display panel and used for providing a light source for the display panel.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111460626.7A CN114296278B (en) | 2021-11-30 | 2021-11-30 | Array substrate, display panel and display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111460626.7A CN114296278B (en) | 2021-11-30 | 2021-11-30 | Array substrate, display panel and display device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN114296278A true CN114296278A (en) | 2022-04-08 |
| CN114296278B CN114296278B (en) | 2023-04-25 |
Family
ID=80966183
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202111460626.7A Active CN114296278B (en) | 2021-11-30 | 2021-11-30 | Array substrate, display panel and display device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN114296278B (en) |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001358189A (en) * | 2000-06-15 | 2001-12-26 | Seiko Epson Corp | Method for manufacturing electrode substrate, electrode substrate and optoelectronic device |
| CN104375290A (en) * | 2014-10-21 | 2015-02-25 | 合肥京东方光电科技有限公司 | Shock insulator detection method and device |
| US20170153753A1 (en) * | 2015-11-30 | 2017-06-01 | Japan Display Inc. | Sensor-equipped display device and sensor device |
| CN111190312A (en) * | 2020-01-08 | 2020-05-22 | 深圳市华星光电半导体显示技术有限公司 | Array substrate and method for measuring electrical characteristics of array substrate |
| CN112230483A (en) * | 2020-09-23 | 2021-01-15 | 惠科股份有限公司 | Array substrate, display panel and large glass panel |
| CN112289777A (en) * | 2020-10-28 | 2021-01-29 | 武汉华星光电半导体显示技术有限公司 | Display panel and display device |
-
2021
- 2021-11-30 CN CN202111460626.7A patent/CN114296278B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001358189A (en) * | 2000-06-15 | 2001-12-26 | Seiko Epson Corp | Method for manufacturing electrode substrate, electrode substrate and optoelectronic device |
| CN104375290A (en) * | 2014-10-21 | 2015-02-25 | 合肥京东方光电科技有限公司 | Shock insulator detection method and device |
| US20170153753A1 (en) * | 2015-11-30 | 2017-06-01 | Japan Display Inc. | Sensor-equipped display device and sensor device |
| CN111190312A (en) * | 2020-01-08 | 2020-05-22 | 深圳市华星光电半导体显示技术有限公司 | Array substrate and method for measuring electrical characteristics of array substrate |
| CN112230483A (en) * | 2020-09-23 | 2021-01-15 | 惠科股份有限公司 | Array substrate, display panel and large glass panel |
| CN112289777A (en) * | 2020-10-28 | 2021-01-29 | 武汉华星光电半导体显示技术有限公司 | Display panel and display device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN114296278B (en) | 2023-04-25 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US10698549B2 (en) | Position input device | |
| US6906771B2 (en) | Liquid crystal display device | |
| KR102047727B1 (en) | Touch sensor in-cell type liquid crystal display device and method of fabricating the same | |
| KR100752875B1 (en) | Vertical alignment active matrix liquid crystal display device | |
| KR20120054683A (en) | Narrow bezel type array substrate and liquid crystal display device using the same | |
| US11139318B2 (en) | Array substrate, display panel and display device | |
| US10725344B1 (en) | Display panel and display device | |
| US20100245733A1 (en) | Liquid crystal display device | |
| KR20140100383A (en) | Array substrate and liquid crystal display panel | |
| CN112666761B (en) | Display device | |
| CN105372866B (en) | Liquid crystal display panel | |
| CN111443532A (en) | Liquid crystal display panel and display device | |
| CN111580317A (en) | Array substrate and display panel | |
| CN211403022U (en) | Liquid crystal display panel and display device | |
| US11269221B2 (en) | Display panel and display apparatus | |
| US5929959A (en) | Liquid-crystal display panel | |
| US20090109134A1 (en) | Display panel and method thereof | |
| US8411047B2 (en) | Touch-sensitive display panel | |
| CN114296278A (en) | Array substrate, display panel and display device | |
| CN109752892B (en) | Liquid crystal display panel and display device | |
| KR20090017412A (en) | Liquid crystal display panel | |
| US8035760B2 (en) | Liquid crystal display | |
| JP2000081635A (en) | Liquid crystal display device | |
| CN113253520B (en) | Display panel and display device | |
| US20210165516A1 (en) | Display panel and display device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |