CN114221554A - Direct current switch power supply and voltage sampling control circuit thereof - Google Patents

Direct current switch power supply and voltage sampling control circuit thereof Download PDF

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Publication number
CN114221554A
CN114221554A CN202210157244.5A CN202210157244A CN114221554A CN 114221554 A CN114221554 A CN 114221554A CN 202210157244 A CN202210157244 A CN 202210157244A CN 114221554 A CN114221554 A CN 114221554A
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voltage
signal
comparator
power supply
output end
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CN202210157244.5A
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CN114221554B (en
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吴克柔
王蒙
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Shenzhen Chuangxin Microelectronics Co.,Ltd.
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Shenzhen ICM Microelectronics Co Ltd
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33507—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters
    • H02M3/33515—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters with digital control
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/0084—Arrangements for measuring currents or voltages or for indicating presence or sign thereof measuring voltage only
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33507—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters
    • H02M3/33523—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters with galvanic isolation between input and output of both the power stage and the feedback loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/124—Sampling or signal conditioning arrangements specially adapted for A/D converters
    • H03M1/1245—Details of sampling arrangements or methods

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Dc-Dc Converters (AREA)

Abstract

The invention discloses a direct current switch power supply and a voltage sampling control circuit thereof, wherein the circuit comprises a first comparator, a second comparator and a third comparator, wherein the first input end of the first comparator is used for inputting a voltage port signal of the direct current switch power supply, the second input end of the first comparator is used for inputting a delay signal of the voltage port signal, and the output end of the first comparator is used for outputting a first comparison result signal; a first input end of the second comparator is used for inputting a first set voltage signal, a second input end of the second comparator is used for inputting a delay signal, and an output end of the second comparator is used for outputting a second comparison result signal; the input end of the delay module is connected with the output end of the first comparator, the output end of the delay module is connected with the first input end of the AND logic module, the second input end of the AND logic module is connected with the output end of the second comparator, the output end of the AND logic module is used for controlling and outputting an effective sampling end signal, and the sampling end signal is used for controlling and acquiring the knee voltage of the voltage port signal, so that the signal acquisition accuracy is improved.

Description

Direct current switch power supply and voltage sampling control circuit thereof
Technical Field
The invention relates to the technical field of switching power supply control, in particular to a direct-current switching power supply and a voltage sampling control circuit thereof.
Background
In the prior art, a topology circuit of a flyback switching power supply is shown in fig. 1, and the operating principle thereof is as follows: the switching power supply chip U1 converts the dc voltage into a constant voltage and current output through a transformer, where Vdc is the dc voltage obtained by rectifying and filtering the commercial power, and the Vdc charges the capacitor c1 through the starting resistor r 1. The voltage of the VDD port of the power supply chip U1 begins to rise, and when the voltage of the VDD port rises to a starting threshold value set in the power supply chip, the chip is started, an enabling signal is sent out, and the chip begins to work.
After the chip is started, the power tube M1 is turned on, Vdc charges the primary winding NP of the transformer, when the current on the primary winding NP flows through the current detection resistor r4, and the voltage on the current detection resistor r4 is detected by the chip through the CS port and exceeds the internally set peak value, the chip sends a turn-off signal to turn off the power tube M1.
After the power tube M1 is turned off, since the energy on the primary winding NP cannot change abruptly, the energy is transferred from the primary winding NP to the secondary winding NS, and the NS charges the capacitor c2 to output the voltage Vout. Meanwhile, the energy of the secondary winding NS is fed back through the auxiliary winding NA, at this time, the diode D1 is in forward conduction, the current output by the auxiliary winding NA supplies power to the VDD port, and the voltage is fed back to the VFB port (i.e., the voltage acquisition port) through the resistors r2 and r3, that is, the power chip detects the time when the current on the secondary winding NS is decreased from the peak value to 0 through the VFB port and the voltage change fed back by the output voltage Vout, and the chip adjusts the operating frequency of the power tube M1 accordingly and sends a control signal to turn on the power tube at the time of turning on the power tube M1. The whole system works in cycles like the working principle.
As shown in fig. 2, waveforms of the current signal I1 of the primary winding NP, the current signal I2 of the secondary winding NS, and the VFB port signal are such that when the power transistor M1 is turned on, energy storage starts in the primary winding NP, the current of the primary winding NP rises, and when the current of the primary winding NP rises to a predetermined value, the power transistor M1 is turned off. The energy of the primary winding NP is coupled to the secondary winding NS and the current of the secondary winding starts to drop, delivering energy to the output load, while the change in output voltage is fed back to the VFB port of the switching power supply through the coupling of the secondary winding NS and the feedback winding NA. As shown in fig. 2, when the current of the secondary winding NA is demagnetized to 0A, the VFB port voltage (i.e. Knee voltage) at this time reflects the most real output voltage, and the chip reflects the change of the output voltage by sampling the VFB port voltage at this point.
In order to accurately acquire the VFB port voltage, a general voltage acquisition method of the VFB signal (i.e., the VFB port voltage signal) is as follows:
the VFB signal is delayed by a certain amount to obtain a delayed signal VFB _ DELAY, waveforms of the VFB signal and the delayed signal VFB _ DELAY are shown in fig. 3, the VFB signal is compared with the delayed signal VFB _ DELAY, when the current demagnetizing time of the secondary winding NA is over, the secondary diode is turned off, the voltage of the VFB signal is rapidly decreased at this time, because the delayed signal VFB _ DELAY has a certain time constant, when it is detected that the voltage of the VFB signal is lower than the voltage of the delayed signal VFB _ DELAY by a certain value, a sampling end signal is sent out, the TDSD waveform of the obtained sampling end signal is shown in fig. 3, and the voltage of the VFB signal sampled correspondingly when the sampling end signal is sent out is the knee voltage which truly reflects the output voltage.
The voltage acquisition method has the following defects:
because the transformer of the switching power supply in fig. 1 has leakage inductance, the efficiency of energy transfer from the primary winding NP to the secondary winding NS is not 100%, and therefore this energy is dissipated in a resonant manner, which is an LC oscillation generated by the leakage inductance L and the parasitic capacitance of the node.
As shown in fig. 2 or fig. 3, the resonance causes oscillation at the VFB signal, and it is obvious that there will be places where the VFB signal voltage is lower than the voltage of the delayed VFB _ DELAY signal, which may cause an erroneous end-of-sampling signal to be sent out, and the acquisition of the VFB signal is stopped before the VFB signal has not ended the resonance, resulting in the voltage of the chip-sampled VFB signal being high, and finally, the voltage of the switching power supply output from the secondary winding being low.
For the above disadvantage, the general solution is to increase the sampling mask delay, and the waveform of the sampling mask delay signal T is as shown in fig. 3, and the end-of-sampling signal is not allowed to be sent during the delay time. However, since the actual power system scheme varies, the leakage inductance of the transformer is not well controlled due to the problem of production quality, and the difficulty in setting reasonable sampling shielding delay is very high. If the set sampling shielding delay is too long and exceeds the whole degaussing time, a completely wrong voltage can be sampled, so that the whole loop fails; if the delay of the set sampling shield is too short, sampling errors can occur, and the problem that the output voltage of the chip is low is caused.
Disclosure of Invention
Therefore, it is necessary to provide a dc switching power supply and a voltage sampling control circuit thereof to solve the problem that the knee voltage of the voltage port signal is not accurately collected in the conventional dc switching power supply.
Based on the above purpose, a voltage sampling control circuit of a dc switching power supply includes:
a first input end of the first comparator is used for inputting a voltage port signal of a direct-current switching power supply, a second input end of the first comparator is used for inputting a delay signal of the voltage port signal, and an output end of the first comparator is used for outputting a first comparison result signal;
a second comparator, a first input end of which is used for inputting a first setting voltage signal, wherein the voltage of the first setting voltage signal is the sum of the voltage port signal and a setting difference voltage; a second input end of the second comparator is used for inputting the delay signal, and an output end of the second comparator is used for outputting a second comparison result signal;
the input end of the delay module is connected with the output end of the first comparator, the output end of the delay module is connected with the first input end of the AND logic module, the second input end of the AND logic module is connected with the output end of the second comparator, the output end of the AND logic module is used for controlling and outputting an effective sampling end signal, and the sampling end signal is used for controlling and acquiring the knee voltage of the voltage port signal.
Optionally, the set difference voltage is determined according to a voltage difference between the voltage port signal and the delay signal.
Optionally, the delay module includes a first charging and discharging circuit and a schmitt trigger, where:
the first charging and discharging circuit comprises a first charging branch and a first discharging branch, the anode of the first charging branch is connected with a power supply, the cathode of the first charging branch is connected with a first capacitor, a first switching tube is serially arranged in the first charging branch, and the control end of the first switching tube is connected with the output end of the first comparator;
the positive electrode of the first discharging branch is connected with the high-potential end of the first capacitor, the negative electrode of the first discharging branch is connected with the low-potential end of the first capacitor, a second switching tube is serially arranged in the first discharging branch, and the control end of the second switching tube is connected with the output end of the first comparator;
the input end of the Schmitt trigger is connected with the high-potential end of the first capacitor, and the output end of the Schmitt trigger is connected with the first input end of the AND logic module.
Optionally, the first switch tube is a P-type switch tube, and the second switch tube is an N-type switch tube.
Optionally, the voltage sampling control circuit further includes:
and the S input end of the RS trigger is connected with the output end of the AND gate logic module, and the output end of the RS trigger is used for outputting the effective sampling end signal.
Optionally, the voltage sampling control circuit further includes: the input end of the phase inverter is connected with the output end of the RS trigger, the output end of the phase inverter is connected with the control end of the second charge-discharge circuit, and the output end of the second charge-discharge circuit is connected with the R input end of the RS trigger.
Optionally, the second charging and discharging circuit includes:
the positive electrode of the second charging branch is connected with a power supply, the negative electrode of the second charging branch is connected with a second capacitor, a third switching tube is serially connected in the second charging branch, and the control end of the third switching tube is connected with the output end of the phase inverter;
and the anode of the second discharge branch is connected with the high-potential end of the second capacitor, the cathode of the second discharge branch is connected with the low-potential end of the second capacitor, a fourth switching tube is serially arranged in the second discharge branch, and the control end of the fourth switching tube is connected with the output end of the phase inverter.
Optionally, a first input end of the first comparator is connected to a second input end of the first comparator through a first resistor, and a low potential end of the first resistor is connected to a first ground capacitor; the first input end of the second comparator is connected with the second input end of the second comparator through the first resistor.
Optionally, a second resistor and a fifth switching tube are connected in series to a low potential end of the first resistor, an anode of the fifth switching tube is connected to the second resistor, a cathode of the fifth switching tube is connected to a second grounded capacitor, and a control end of the fifth switching tube is used for inputting the valid sampling end signal.
In view of the above object, a dc switching power supply includes:
the direct current switch power supply comprises the voltage sampling control circuit, the voltage acquisition port is connected with the first input end of the first comparator, and the voltage acquisition port is connected with the first input end of the second comparator.
The technical scheme has the following beneficial effects:
according to the direct-current switching power supply and the voltage sampling control circuit thereof, the two comparators are arranged to carry out voltage comparison on the voltage port signal and the delay signal, when the voltage of the voltage port signal is detected to be lower than the voltage of the delay signal and a certain delay is carried out, the voltage port signal is considered to have passed the period of the resonance period, and from this moment, the emission of a sampling end signal is allowed, the knee voltage of the voltage port signal can be accurately acquired, the signal acquisition accuracy is improved, and the error acquisition cannot be generated. The voltage sampling control circuit is suitable for various direct-current switching power supplies, the signal acquisition accuracy of the knee voltage is not limited by the precision of a transformer in the switching power supply, and the voltage sampling control circuit has universal applicability and good market popularization prospect.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments of the present invention will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without inventive labor.
Fig. 1 is a circuit diagram of a topology of a flyback switching power supply provided in the prior art;
FIG. 2 is a waveform diagram of the current signal I1 for the primary winding NP, the current signal I2 for the secondary winding NS, and the VFB port signal of a prior art switching power supply;
fig. 3 is a waveform diagram of a VFB signal and a DELAY signal VFB _ DELAY of a switching power supply in the related art;
fig. 4 is a circuit diagram of a voltage sampling control circuit of a dc switching power supply according to a first embodiment of the present invention;
fig. 5 is a waveform diagram of the voltage port signal VFB, the DELAY signal VFB _ DELAY, the output signal T _ blank, and the end-of-sampling signal TDSD in the voltage sampling control circuit according to the first embodiment of the present invention;
fig. 6 is a circuit diagram of a voltage sampling control circuit of the dc switching power supply according to the second embodiment of the present invention;
the symbols are as follows:
1. a first comparator; 2. a second comparator; 3. a delay module; 4. an AND gate logic module; 5. an RS trigger; 6. an inverter; 7. and a second charge and discharge circuit.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In a first embodiment, as shown in fig. 4, a voltage sampling control circuit of a dc switching power supply is provided, which includes:
a first comparator 1, a first input terminal (i.e. an inverting input terminal VN) of the first comparator 1 is used for inputting a voltage port signal VFB of the dc switching power supply, a second input terminal (i.e. a non-inverting input terminal VP) of the first comparator 1 is used for inputting a DELAY signal VFB _ DELAY of the voltage port signal, and an output terminal of the first comparator 1 is used for outputting a first comparison result signal;
a second comparator 2, a first input terminal (i.e. the inverting input terminal VN) of the second comparator 2 is used for inputting a first setting voltage signal V1, a voltage of the first setting voltage signal V1 is a sum of a voltage of the voltage port signal VFB and a setting difference voltage Vos; a second input terminal (i.e., the non-inverting input terminal VP) of the second comparator 2 is used for inputting the DELAY signal VFB _ DELAY, and an output terminal of the second comparator 2 is used for outputting a second comparison result signal;
the input end of the delay module 3 is connected to the output end of the first comparator 1, the output end of the delay module 3 is connected to the first input end of the and logic module 4, the second input end of the and logic module 4 is connected to the output end of the second comparator 2, the output end of the and logic module 4 is used for controlling and outputting an effective sampling end signal, and the sampling end signal is used for controlling and acquiring the voltage of the voltage port signal VFB.
The working principle of the voltage sampling control circuit is as follows:
the first comparator 1 and the second comparator 2 receive the voltage port signal VFB and the DELAY signal VFB _ DELAY in fig. 3 in real time, when the first comparator 1 detects that the DELAY signal VFB _ DELAY is greater than the voltage port signal VFB, the first comparison result signal output by the first comparator 1 is turned to a high level signal 1, and if the voltage port signal VFB is in the resonance period in fig. 3 at this time, when the DELAY signal VFB _ DELAY is less than the voltage port signal VFB, the first comparison result signal output by the first comparator 1 is turned to a low level signal 0 again; only when the DELAY signal VFB _ DELAY is continuously greater than the voltage port signal VFB and the duration exceeds a certain time set in the DELAY block 3, the signal T _ blank received by the first input terminal of the and logic block 4 is inverted to the high level signal 1, and the waveform of the output signal T _ blank of the DELAY block 3 is as shown in fig. 5.
When the second comparator 2 detects that the DELAY signal VFB _ DELAY is greater than the first setting voltage signal V1 (i.e., VFB + Vos), the second comparison result signal output by the second comparator 2 is inverted to a high level signal 1, and the signal received by the second input terminal of the and logic block 4 is inverted to a high level signal 1. When the two input ends of the and logic block 4 both input the high level signal 1, the output end of the and logic block 4 outputs the high level signal, and sends out the effective sampling end signal TDSD, and the waveform of the sampling end signal TDSD is as shown in fig. 5.
As can be seen from the waveform diagram in fig. 5, the voltage of the voltage port signal VFB is monitored in real time to ensure that the resonant time is over when the sampling end signal TDSD is sent out, and the knee voltage of the voltage port signal VFB can be accurately collected and obtained according to the sending time of the sampling end signal TDSD.
According to the invention, the voltage of the voltage port signal VFB and the voltage of the DELAY signal VFB _ DELAY are compared through the two comparators, when the voltage of the voltage port signal VFB is detected to be lower than the voltage of the DELAY signal VFB _ DELAY and a certain DELAY is passed, the voltage port signal VFB is considered to pass the period of the resonance period, and from this moment, the emission of a sampling end signal is allowed, the knee voltage of the voltage port signal VFB can be accurately acquired, and the error acquisition is avoided. The voltage sampling control circuit is suitable for various direct-current switch power supplies, the signal acquisition accuracy of knee voltage is not limited by the precision of a transformer in the switch power supply, and the voltage sampling control circuit has universal applicability and good market popularization prospect.
In this embodiment, as part of the first setting voltage signal V1, the setting difference voltage Vos is determined according to the voltage difference between the voltage port signal VFB and the DELAY signal VFB _ DELAY. Specifically, as shown in fig. 5, the difference between the knee voltage of the voltage port signal VFB and the voltage of the DELAY signal VFB _ DELAY at the corresponding time t is a first difference Δ U1, the difference between the voltage of the voltage port signal VFB at the time (t-1) and the voltage of the DELAY signal VFB _ DELAY is a second difference Δ U2, and the second difference Δ U2 is taken as the set difference voltage Vos.
In a second embodiment, as shown in fig. 6, a voltage sampling control circuit of a dc switching power supply is provided, which includes:
a first comparator 1, a first input terminal (i.e. the inverting input terminal VN) of the first comparator 1 is used for inputting a voltage port signal VFB of the dc switching power supply, a second input terminal (i.e. the non-inverting input terminal VP) of the first comparator 1 is used for inputting a DELAY signal VFB _ DELAY of the voltage port signal, and an output terminal of the first comparator 1 is used for outputting a first comparison result signal.
A second comparator 2, a first input terminal (i.e. the inverting input terminal VN) of the second comparator 2 is used for inputting a first setting voltage signal V1, a voltage of the first setting voltage signal V1 is a sum of a voltage of the voltage port signal VFB and a setting difference voltage Vos; a second input (i.e., the non-inverting input VP) of the second comparator 2 is used for inputting the DELAY signal VFB _ DELAY, and an output of the second comparator 2 is used for outputting a second comparison result signal.
The input end of the delay module 3 is connected to the output end of the first comparator 1, the output end of the delay module 3 is connected to the first input end of the and logic module 4, the second input end of the and logic module 4 is connected to the output end of the second comparator 2, the output end of the and logic module 4 is used for controlling and outputting an effective sampling end signal, and the sampling end signal is used for controlling and acquiring the voltage of the voltage port signal VFB.
And an S input end of the RS flip-flop 5 is connected to an output end of the and logic module 4, and an output end of the RS flip-flop 5 is used for outputting an effective sampling end signal TDSD.
The phase inverter 6 and the second charge-discharge circuit 7, the input of phase inverter 6 is connected the output of RS flip-flop 5, the output of phase inverter 6 is connected the control end of second charge-discharge circuit 7, the output of second charge-discharge circuit 7 is connected the R input of RS flip-flop 5.
In one example, as shown in fig. 6, the delay module 3 includes a first charge and discharge circuit and a schmitt trigger, wherein:
the first charging and discharging circuit comprises a first charging branch and a first discharging branch, the positive electrode of the first charging branch is connected with a power supply, the negative electrode of the first charging branch is connected with a first capacitor C3, a first switching tube PM1 and a resistor R3 are connected in series in the first charging branch, and the control end of the first switching tube PM1 is connected with the output end of the first comparator 1; in fig. 6, the first switch PM1 is a P-type switch.
The positive electrode of the first discharging branch is connected with the high-potential end of the first capacitor C3, the negative electrode of the first discharging branch is connected with the low-potential end of the first capacitor C3, a second switching tube NM1 and a resistor R4 are arranged in the first discharging branch in series, and the control end of the second switching tube NM1 is connected with the output end of the first comparator 1; in fig. 6, the second switching tube NM1 is an N-type switching tube.
The input end of the schmitt trigger is connected with the high potential end of the first capacitor C1, and the output end of the schmitt trigger is connected with the first input end of the and logic module 4.
In one example, the second charge and discharge circuit 7, as shown in fig. 6, includes:
the positive electrode of the second charging branch is connected with a power supply, the negative electrode of the second charging branch is connected with a second capacitor C4, a third switching tube PM2 is arranged in the second charging branch in series, and the control end of the third switching tube PM2 is connected with the output end of the phase inverter 6;
and the anode of the second discharge branch is connected with the high potential end of the second capacitor C4, the cathode of the second discharge branch is connected with the low potential end of the second capacitor C4, a fourth switch tube NM2 is serially arranged in the second discharge branch, and the control end of the fourth switch tube NM2 is connected with the output end of the inverter 6.
In fig. 6, the connection relationship of the input terminals of the first comparator 1 and the second comparator 2 is as follows:
the first input end VN of the first comparator 1 is connected with the second input end VP of the first comparator 1 through a first resistor R1, and the low potential end of the first resistor R1 is connected with a first grounding capacitor C1; the first input VN of the second comparator 2 is connected to the second input VP of the second comparator 2 via the first resistor R1.
A second resistor R2 and a fifth switching tube are connected in series at a low potential end of the first resistor R1, an anode of the fifth switching tube is connected with the second resistor R2, a cathode of the fifth switching tube is connected with a second grounded capacitor C2, and a control end of the fifth switching tube is used for inputting the effective sampling end signal TDSD.
The control principle of the voltage sampling control circuit is as follows:
as shown in fig. 5, when the amplitude of the DELAY signal VFB _ DELAY signal exceeds the voltage port signal VFB, a first comparison result signal output by the first comparator 1 is inverted to a high level signal 1, so as to control the first switching tube PM1 of the first charging branch in the DELAY module 3 to be turned off, and the second switching tube NM1 of the first discharging branch to be turned on, so that the first discharging branch is turned on, and the charge of the first capacitor C3 is discharged through the resistor R4. Since the voltage port signal VFB is in the resonant period at this time, before the voltage of the first capacitor C3 is lower than the flip-flop voltage of the schmitt trigger, the DELAY signal VFB _ DELAY is lower than the voltage port signal VFB again, the first comparison result signal output by the first comparator 1 is flipped to the low level signal 0, the second switch NM1 of the first discharging branch in the DELAY module 3 is controlled to be closed, the first switch PM1 of the first charging branch is opened, and the power supply charges the first capacitor C3 through the resistor R3. The output of the schmitt trigger limiter toggles to a high signal 1 only when the DELAY signal VFB _ DELAY continues to be greater than the voltage port signal VFB for more than the set DELAY time.
When the current on the secondary inductor is nearly terminated (as shown in the waveform of I2 in fig. 2), and the amplitude of the voltage port signal VFB is lower than the amplitude of the DELAY signal VFB _ DELAY and exceeds the set difference voltage Vos, the second comparison result signal output by the second comparator 2 is inverted to a high level signal 1, both input ends of the and logic block 4 are high level signals 1, the and logic block 4 outputs a high level signal 1, which is equivalent to inputting a high level signal to the S input end of the RS flip-flop 5, the trigger logic of the RS flip-flop 5 is as shown in table 1 below, when the S input end inputs a high level signal and the R input end inputs a low level signal, the output end of the RS flip-flop 5 outputs a high level signal 1, i.e. outputs an effective sampling end signal TDSD, so that the fifth switch is controlled to open, and further collect the sample and hold voltage VFBSH, which follows the DELAY signal VFB _ DELAY, in addition, since the circuit structure parameters from the voltage port signal VFB to the sample-hold voltage VFBSH are known, the knee voltage of the voltage port signal VFB can be accurately obtained by collecting the sample-hold voltage VFBSH.
When the RS flip-flop 5 outputs a high level signal, the high level signal outputs a low level signal through the inverter 6, so as to control the third switching transistor PM2 of the second charging branch to be turned on, the fourth switching transistor NM2 of the second discharging branch to be turned off, and the power supply charges the second capacitor C4 through the resistor R3. When the voltage on the second capacitor C4 exceeds the flip-flop voltage, the R input terminal of the RS flip-flop 5 is a high signal 1, and the sampling end signal TDSD is reset, thereby ending the sampling.
TABLE 1
Figure 90801DEST_PATH_IMAGE001
In a third embodiment, a dc switching power supply is provided, which has a voltage acquisition port (corresponding to the VFB port in fig. 1) connected to the first input terminal VN of the first comparator 1 in fig. 4 or fig. 6, and a voltage sampling control circuit in the first or second embodiment, wherein the voltage acquisition port is connected to the first input terminal VN of the second comparator 2.
In this embodiment, please refer to the relevant descriptions in the first and second embodiments for the specific structure of the voltage sampling control circuit, and the detailed description of the specific structure of the voltage sampling control circuit is omitted in this embodiment.
The above-mentioned embodiments are only used for illustrating the technical solutions of the present invention, and not for limiting the same; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present invention, and are intended to be included within the scope of the present invention.

Claims (10)

1. A voltage sampling control circuit of a direct current switch power supply is characterized by comprising:
a first input end of the first comparator is used for inputting a voltage port signal of a direct-current switching power supply, a second input end of the first comparator is used for inputting a delay signal of the voltage port signal, and an output end of the first comparator is used for outputting a first comparison result signal;
a second comparator, a first input end of which is used for inputting a first setting voltage signal, wherein the voltage of the first setting voltage signal is the sum of the voltage port signal and a setting difference voltage; a second input end of the second comparator is used for inputting the delay signal, and an output end of the second comparator is used for outputting a second comparison result signal;
the input end of the delay module is connected with the output end of the first comparator, the output end of the delay module is connected with the first input end of the AND logic module, the second input end of the AND logic module is connected with the output end of the second comparator, the output end of the AND logic module is used for controlling and outputting an effective sampling end signal, and the sampling end signal is used for controlling and acquiring the knee voltage of the voltage port signal.
2. The voltage sampling control circuit of claim 1, wherein the set delta voltage is determined based on a voltage difference between the voltage port signal and the delay signal.
3. The voltage sampling control circuit of the dc switching power supply of claim 1, wherein the delay module comprises a first charge-discharge circuit and a schmitt trigger, wherein:
the first charging and discharging circuit comprises a first charging branch and a first discharging branch, the anode of the first charging branch is connected with a power supply, the cathode of the first charging branch is connected with a first capacitor, a first switching tube is serially arranged in the first charging branch, and the control end of the first switching tube is connected with the output end of the first comparator;
the positive electrode of the first discharging branch is connected with the high-potential end of the first capacitor, the negative electrode of the first discharging branch is connected with the low-potential end of the first capacitor, a second switching tube is serially arranged in the first discharging branch, and the control end of the second switching tube is connected with the output end of the first comparator;
the input end of the Schmitt trigger is connected with the high-potential end of the first capacitor, and the output end of the Schmitt trigger is connected with the first input end of the AND logic module.
4. The voltage sampling control circuit of claim 3, wherein the first switch tube is a P-type switch tube, and the second switch tube is an N-type switch tube.
5. The voltage sampling control circuit of the dc switching power supply of claim 1, wherein the voltage sampling control circuit further comprises:
and the S input end of the RS trigger is connected with the output end of the AND gate logic module, and the output end of the RS trigger is used for outputting the effective sampling end signal.
6. The voltage sampling control circuit of the dc switching power supply of claim 5, wherein the voltage sampling control circuit further comprises: the input end of the phase inverter is connected with the output end of the RS trigger, the output end of the phase inverter is connected with the control end of the second charge-discharge circuit, and the output end of the second charge-discharge circuit is connected with the R input end of the RS trigger.
7. The voltage sampling control circuit of the dc switching power supply according to claim 6, wherein the second charge and discharge circuit comprises:
the positive electrode of the second charging branch is connected with a power supply, the negative electrode of the second charging branch is connected with a second capacitor, a third switching tube is serially connected in the second charging branch, and the control end of the third switching tube is connected with the output end of the phase inverter;
and the anode of the second discharge branch is connected with the high-potential end of the second capacitor, the cathode of the second discharge branch is connected with the low-potential end of the second capacitor, a fourth switching tube is serially arranged in the second discharge branch, and the control end of the fourth switching tube is connected with the output end of the phase inverter.
8. The voltage sampling control circuit of a dc switching power supply according to claim 1, wherein a first input terminal of the first comparator is connected to a second input terminal of the first comparator through a first resistor, and a low potential terminal of the first resistor is connected to a first ground capacitor; the first input end of the second comparator is connected with the second input end of the second comparator through the first resistor.
9. The voltage sampling control circuit of a dc switching power supply according to claim 8, wherein a second resistor and a fifth switching tube are connected in series to a low potential end of the first resistor, an anode of the fifth switching tube is connected to the second resistor, a cathode of the fifth switching tube is connected to a second grounded capacitor, and a control end of the fifth switching tube is used for inputting the valid sampling end signal.
10. A dc switching power supply having a voltage acquisition port, wherein the dc switching power supply comprises the voltage sampling control circuit of any one of claims 1 to 9, wherein the voltage acquisition port is connected to the first input terminal of the first comparator, and wherein the voltage acquisition port is connected to the first input terminal of the second comparator.
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