CN114220379B

CN114220379B - Control circuit, display panel and pixel circuit driving method

Info

Publication number: CN114220379B
Application number: CN202210049713.1A
Authority: CN
Inventors: 奚鹏博
Original assignee: AU Optronics Corp
Current assignee: AU Optronics Corp
Priority date: 2021-09-07
Filing date: 2022-01-17
Publication date: 2023-06-02
Anticipated expiration: 2042-01-17
Also published as: TW202311824A; CN114220379A; TWI795902B

Abstract

A pixel circuit driving method includes the following steps: in a first frame period, conducting a control node of the pixel circuit to a first voltage source through a first conversion circuit, wherein the voltage of the first voltage source is reduced along with time; driving the light emitting element by the pixel circuit according to the power supply and the first data signal until a driving switch in the pixel circuit is turned off according to the voltage of the first voltage source; in a second frame period, changing the control node to be conducted to a second voltage source through a second conversion circuit, wherein the voltage of the second voltage source is reduced along with time; and driving the light emitting element by the pixel circuit according to the power supply and the second data signal until the driving switch in the pixel circuit is turned off according to the voltage of the second voltage source. The present disclosure also relates to a control circuit and a display panel.

Description

Control circuit, display panel and pixel circuit driving method

Technical Field

The present disclosure relates to a display panel, a control circuit and a pixel circuit driving method, and more particularly, to a technique capable of controlling a driving time of a light emitting device according to a power supply and a data signal.

Background

With rapid progress of electronic technology, display devices have been widely used in people's lives, such as smart phones or computers. Taking a liquid crystal screen as an example, each pixel on the screen is connected to a data line and a scanning line, so as to perform actions of resetting, compensating voltage, emitting light and the like one by one according to signals sent by a controller, and further display a corresponding picture. The controller must precisely control the level of each signal to ensure the display quality of the display device. Meanwhile, the driving method of the display device between a plurality of frames will also affect the design of the internal circuit and the quality of the displayed image.

Disclosure of Invention

The present disclosure relates to a pixel circuit driving method, comprising the following steps: in a first frame period, conducting a control node of the pixel circuit to a first voltage source through a first conversion circuit, wherein the voltage of the first voltage source is reduced along with time; driving the light emitting element by the pixel circuit according to the power supply and the first data signal until a driving switch in the pixel circuit is turned off according to the voltage of the first voltage source; in a second frame period, changing the control node to be conducted to a second voltage source through a second conversion circuit, wherein the voltage of the second voltage source is reduced along with time; and driving the light emitting element by the pixel circuit according to the power supply and the second data signal until the driving switch in the pixel circuit is turned off according to the voltage of the second voltage source.

The disclosure also relates to a control circuit including a first conversion circuit and a second conversion circuit. The first conversion circuit comprises a first conversion switch and is electrically connected with a control node of a control switch in the pixel circuit. The control node is electrically connected to a first voltage source through a first transfer switch, and the voltage of the first voltage source is reduced with time. The second conversion circuit comprises a second conversion switch and is electrically connected to the control node of the control switch. The control node is electrically connected to the second voltage source through the second change-over switch, and the voltage of the second voltage source is reduced along with time. In the first frame period, the first transfer switch is turned on, the second transfer switch is turned off, the control node is turned on to the first voltage source, and the pixel circuit drives the light emitting element according to the power supply and the first data signal. In the second frame period, the first transfer switch is turned off, the second transfer switch is turned on to turn on the control node to the second voltage source, and the pixel circuit drives the light emitting element according to the power supply and the second data signal.

The disclosure also relates to a display panel including at least one pixel circuit and at least one control circuit. The pixel circuit is used for driving the light-emitting element and comprises a control switch. The control circuit comprises a first conversion circuit and a second conversion circuit. The first conversion circuit comprises a first conversion capacitor and a first conversion switch. The first end of the first conversion capacitor is electrically connected to the first voltage source, the second end of the first conversion capacitor is electrically connected to the control node of the control switch through the first conversion switch, and the voltage of the first voltage source is reduced along with time. The second conversion circuit comprises a second conversion capacitor and a second conversion switch. The first end of the second conversion capacitor is electrically connected to the second voltage source, the second end of the second conversion capacitor is electrically connected to the control node through the second conversion switch, and the voltage of the second voltage source is reduced along with time.

Accordingly, the pixel circuit controls the driving switch according to the two voltage sources in different frame periods respectively, so as to control the time for driving the light emitting element. Therefore, when applied to the display panel, the two voltage sources can be shared by a plurality of pixel circuits in the display panel, and the corresponding voltage sources do not need to be independently configured for each pixel circuit.

Drawings

Fig. 1A is a schematic view of a display panel.

Fig. 1B is a schematic diagram of a pixel circuit.

Fig. 2 is a schematic view of a display panel according to some embodiments of the present disclosure.

Fig. 3 is a diagram of various signal waveforms according to some embodiments of the present disclosure.

FIG. 4 is a schematic diagram of a pixel circuit and a control circuit according to some embodiments of the present disclosure.

FIG. 5 is a flow chart of a method of driving according to some embodiments of the present disclosure.

FIG. 6 is a waveform diagram of a pull-up control signal, a pull-down control signal, a first control signal, and a second control signal according to some embodiments of the present disclosure.

Fig. 7A and 7B are waveform diagrams of analog testing performed according to some embodiments of the control circuit of the present disclosure.

Fig. 8A-8C are schematic views of display panels according to some embodiments of the present disclosure. Wherein reference numerals are as follows:

PA: display panel

100: pixel circuit

200: control circuit

210: first conversion circuit

220: second conversion circuit

230: voltage setting circuit

810-830: display panel

811: pixel circuit

812: control circuit

821: pixel circuit

822: control circuit

831: pixel circuit

832: pixel circuit

833: control circuit

834: control circuit

T1: driving switch

T2: driving switch

T3: current switch

Tc: control switch

t1-t10: time point

Na: control terminal

Nb: control node

Nc: setting node

Ca-Cc: capacitance device

W1: first change-over switch

W2: second change-over switch

C1: first conversion capacitor

C2: second conversion capacitor

Vdd: supply voltage

Vp: clamping voltage

Vdata: data signal

Vdh: DC voltage source

Vdl: reference voltage source

f1: first frame period

f2: second frame period

S1-S4: control signal

Sa: first voltage source

Sb: second voltage source

Sg: scanning signal

Sg1: scanning signal

Sg2: scanning signal

Sx: mixing control signals

L: light-emitting element

Vn: voltage (V)

P100: display panel

P110: pixel circuit

P120: control circuit

P130: light-emitting element

G1-G2: scanning signal

SL: scanning line

DL: data line

Vt: control signal

Ta: driving switch

Tb: control switch

Nx: control node

Detailed Description

Various embodiments of the invention are disclosed in the following figures, in which numerous practical details are set forth in the following description for purposes of clarity. However, it should be understood that these practical details are not to be taken as limiting the invention. That is, in some embodiments of the invention, these practical details are unnecessary. Moreover, for the sake of simplicity of the drawing, some well-known and conventional structures and elements are shown in the drawings in a simplified schematic manner.

Herein, when an element is referred to as being "connected" or "coupled," it can be referred to as being "electrically connected" or "electrically coupled. "connected" or "coupled" may also be used to indicate that two or more elements are in co-operation or interaction with each other. In addition, although the terms "first", "second", …, etc. are used herein to describe various elements, this term is merely intended to distinguish between elements or operations described in the same technical term. Unless the context clearly indicates otherwise, the terms are not specifically intended or implied to be order or cis-ient nor intended to limit the invention.

Fig. 1A and 1B are schematic diagrams illustrating an embodiment of a display panel P100. As shown in fig. 1A, the display panel P100 includes a plurality of pixel circuits P110 and a plurality of control circuits P120. The pixel circuit P110 is turned on one by one according to the scan signals (G1, G2) of the scan line SL and the voltage on the data line DL to drive the light emitting element P130.

The control circuit P120 is configured to provide a control signal Vt to each pixel circuit P110 to control the time for each pixel circuit P110 to drive the light emitting device P130. In other words, the higher the luminance that the light emitting element P130 needs to exhibit, the longer the driving time of the pixel circuit P110 will be. In one embodiment, the control signal Vt is formed from a Pulse Width Modulated (PWM) signal and may be of decreasing waveform over time. Since the generation of the control signal Vt can be understood by those skilled in the art, the description thereof is omitted herein.

As shown in fig. 1B, in an embodiment, the pixel circuit P110 has a control switch Ta, and a control node Nx of the control switch Ta is electrically connected to a control signal source through a capacitor to receive the control signal Vt. The voltage of the control signal Vt may vary periodically with time (e.g., gradually decrease from a high level during a frame period). When the voltage on the control node Nx is smaller than the threshold value (e.g. the on voltage of the control switch Ta), the control switch Ta is turned on, so that the driving switch Tb in the pixel circuit P110 is turned off by the clamping voltage Vh, and the pixel circuit P110 stops driving the light emitting element.

In other words, the control circuit P120 is configured to receive the control signal Vt, and control the time for driving the light emitting device P130 by the pixel circuit P110 according to the control signal Vt. The control scheme may be referred to as progressive analog scan (Progressive Imitative Sweep).

The circuits shown in fig. 1A and 1B may still be improved. For example, when the resolution of the display panel P100 is high (i.e., the number of the pixel circuits P110 is very high), since the display panel P100 needs to set a corresponding signal source for each pixel circuit P110 to generate the control signal Vt independently, too many signal sources will cause difficulty in driving, and occupy too much space and have too high cost.

Fig. 2 is a schematic diagram of a display panel PA according to some embodiments of the present disclosure. The display panel PA includes a plurality of pixel circuits 100 and a plurality of control circuits 200 (only one pixel circuit 100 and control circuit 200 are drawn in fig. 2). The pixel circuit 100 is activated according to the data signal Vdata transmitted from the data line and the scan signal Sg transmitted from the scan line, and performs the operations of resetting, writing, compensation, driving, and the like.

In one embodiment, the pixel circuit 100 includes a current switch T3, a first driving switch T1, a second driving switch T2, and a control switch Tc. The current switch T3 is used for controlling the magnitude of the driving current supplied to the pixel circuit 100 by the power supply Vdd, and its control terminal is connected to the capacitor Cc. The first driving switch T1 and the second driving switch T2 are used for controlling the length of time for which the driving current is provided to the light emitting element L (i.e. the light emitting time of the light emitting element L). The control terminal of the first driving switch T1 is electrically connected to the data line for receiving the corresponding data signal Vdata, so that the data signal Vdata can be written into the capacitor Ca.

The control switch Tc is electrically connected between the control terminal Na of the first driving switch T1 and the clamping voltage Vp, and is turned on or off according to the control node Nb. When the control switch Tc is turned on, the clamp voltage Vp is input to the control terminal Na of the first driving switch T1 through the control switch Tc. The clamp voltage Vp is used to turn off the first driving switch T1, so that the pixel circuit 100 stops driving the light emitting element L.

In one embodiment, the pixel circuit 100 further includes a writing circuit (not shown) for writing the data signal Vdata provided by the data line to the capacitor Ca. The present disclosure is not limited to the detailed component composition of the write circuit. Since the principle of data writing in the pixel circuit can be understood by those skilled in the art, it is not described here one by one. The following paragraphs will focus on the manner in which the control circuit 200 controls the control switch Tc.

In one embodiment, the control circuit 200 includes a first conversion circuit 210 and a second conversion circuit 220. The first switch circuit 210 includes a first switch W1 and is electrically connected to a control node Nb of the control switch Tc (in this embodiment, the control circuit 200 is connected to the control node Nb through a capacitor Cb). In other words, the control node Nb is electrically connected to the first voltage source Sa through the first switch W1. The first changeover switch W1 is controlled by a first control signal S1. The voltage supplied by the first voltage source Sa is a waveform that varies periodically with time, i.e., a progressive analog scan (Progressive Imitative Sweep). For example: in the odd frame period (e.g. 1, 3, 5 frames are displayed) of the display panel PA, the voltage of the first voltage source Sa gradually decreases from the high voltage to the low voltage, and in the even frame period (e.g. 2, 4, 6 frames are displayed), the voltage of the first voltage source Sa returns to the high voltage.

Similarly, the second switching circuit 220 includes a second switch W2 electrically connected to the control node Nb of the control switch Tc. The control node Tc is electrically connected to the second voltage source Sb through the second switch W2. The second switch W2 is controlled by the second control signal S2. The voltage provided by the second voltage source Sb is periodically varying over time, for example: in even frame periods (e.g., 2, 4, and 6 frames are displayed) of the display panel PA, the voltage of the second voltage source Sb gradually decreases from the high voltage to the low voltage, and in odd frame periods (e.g., 1, 3, and 5 frames are displayed), the voltage of the second voltage source Sb returns to the high voltage.

The control circuit 200 sequentially receives different voltage sources in different frame periods, so that the display panel PA can normally drive all the pixel circuits 100 even if only two signal sources (i.e., the first voltage source Sa and the second voltage source Sb) are configured. For example, in an odd frame period (e.g., a first frame period), the first switch W1 is turned on and the second switch W2 is turned off to turn on the control node Nb to the first voltage source Sa. At this time, the pixel circuit 100 drives the light emitting element L according to the supply power Vdd and the first data signal written in advance by the data line. On the other hand, in even frame periods (e.g., second frame periods), the first switch W1 is turned off and the second switch W2 is turned on to turn on the control node Nb to the second voltage source Sb. At this time, the pixel circuit 100 drives the light emitting element L according to the power supply Vdd and the second data signal.

Specifically, when the control node Nb is turned on to the first voltage source Sa (or the second voltage source Sb), the voltage of the first voltage source Sa (or the second voltage source Sb) gradually decreases from the high voltage to the low voltage in one frame period, and the voltage of the control node Nb also changes. When the voltage of the control node Nb is greater than the threshold value (i.e., the on voltage of the control switch Tc), the control switch Tc is maintained in the off state, and the pixel circuit 100 drives the light emitting element L according to the first data signal (or the second data signal). In contrast, when the voltage of the control node Nb is less than the threshold value, the control switch Tc is turned on, so that the clamp voltage Vp is written to the control terminal Na of the first driving switch T1, and the first driving switch T1 is turned off and the pixel circuit 100 stops driving the light emitting element L.

As shown in fig. 2, in some embodiments, the first conversion circuit 210 further includes a first conversion capacitor C1. The first end of the first switch capacitor C1 is electrically connected to the first voltage source Sa, and the second end of the first switch capacitor C1 is electrically connected to the control node Nb through the first switch W1. Since the first voltage source Sa and the control node Nb are respectively disposed at two ends of the first conversion capacitor C1, when the voltage of the first voltage source Sa changes, the voltage of the control node Nb will also change accordingly according to the capacitive coupling effect.

Similarly, the second conversion circuit 220 further includes a second conversion capacitor C2. The first end of the second conversion capacitor C2 is electrically connected to the second voltage source Sb, and the second end of the second conversion capacitor C2 is electrically connected to the control node Nb through the second conversion switch W2. When the voltage of the second voltage source Sb is changed, the voltage of the control node Nb is changed according to the capacitive coupling effect.

In addition, in the same frame period, each pixel circuit 100 on the display panel PA controls the time of driving the light emitting element L by the same voltage source. For example, in the first frame period, each pixel circuit 100 controls the voltage of the control node Nb according to the first voltage source Sa, so as to determine whether to turn on or turn off the first driving switch T1. In the second frame period, each pixel circuit 100 controls the voltage of the control node Nb according to the second voltage source Sb instead.

Fig. 3 is a waveform diagram of signals on a display panel according to some embodiments of the present disclosure. The scan signals Sg1 and Sg2 are used to trigger the pixel circuit 100 in different frame periods. The first control signal S1 and the second control signal S2 are used for triggering the corresponding conversion circuit. The voltage Vn is used to represent the voltage on the control node Nb in the different pixel circuits 100. In one embodiment, the voltage waveforms of the first voltage source Sa and the second voltage source Sb are the same, but are separated from each other by a delay time. As shown, the first voltage source Sa is delayed relative to the second voltage source Sb. In the first frame period f1, the first voltage source Sa gradually decreases from a high potential (e.g., 10 volts), and the voltage varies inversely with time. Therefore, each pixel circuit 100 obtains a voltage difference of the first voltage source Sa according to the current gray level value for control.

In this way, when the display panel PA scans the pixel circuit 100 of the last row, the pixel circuit 100 may control the on or off of the first driving switch W1 according to the interval of the first voltage source of "6-3 volts". As shown, when the first voltage source Sa drops to 5 v, the second frame period f2 is entered, but the remaining voltage difference (5 v) is not enough for driving in the new frame period, so that the display panel PA controls the pixel circuits 100 of the first row by the second voltage source Sb during the second frame period f 2. In addition, when the second frame period f2 is near the end, the first voltage source Sa is restored to the original high voltage (e.g. 10 v) for driving in the third frame period.

Fig. 4 is a detailed circuit diagram of the control circuit 200 in the display panel PA of the present disclosure. Details of the implementation of the present invention are described in detail herein with reference to fig. 4 and 5. In fig. 4, similar elements related to the embodiment of fig. 2 are denoted by the same reference numerals for easy understanding, and the specific principles of similar elements are described in the previous paragraphs, which are not necessarily described in conjunction with the cooperative relationship of fig. 4.

As shown in fig. 4, in an embodiment, the control circuit 200 further includes a voltage setting circuit 230. The voltage setting circuit 230 is configured to convert a section of the absolute voltage difference provided by the first voltage source Sa and the second voltage source Sb into a relative voltage difference. In other words, in the first frame period f1, two different pixel circuits 100 will acquire different voltage differences (e.g. 9 v to 5 v, 7 v to 3 v), and the control circuit 200 is configured to convert the two voltage differences into the same voltage difference (e.g. 4 v to 0 v) so as to control the on-time of the first driving switch T1.

The voltage setting circuit 230 is electrically connected between the first switch W1, the second switch W2 and the control node Nb. The voltage setting circuit 230 is configured to set the voltage of the control node Nb to the first high voltage level before the pixel circuit 100 drives the light emitting element L, so as to ensure that the control switch Tc can be turned off and the first driving switch T1 can be turned on. After driving the light emitting element L, the voltage setting circuit 230 is further configured to set the voltage of the control node Nb to the first low level to ensure that the control switch Tc is turned on, so that the first driving switch T1 is turned off by the clamping voltage Vp.

Specifically, the voltage setting circuit 230 includes a pull-up voltage switch W3 and a pull-down voltage switch W4. The pull-up voltage switch W3 is turned on according to the pull-up control signal S3 to set the voltage of the setting node Nc to the first high potential. Since the set node Nc is connected to the control node Nb through a capacitor, the voltage of the control node Nb changes with the voltage change of the set power saving Nc. That is, the voltage of the control node Nb is also set to the first high voltage. Similarly, the pull-down voltage switch W4 is turned on according to the pull-down control signal S4 to set the voltages of the set node Nc and the control node Nb to the first low level. In one embodiment, the first high voltage is generated according to the DC voltage source Vdh, and the second high voltage is the reference voltage source Vdl (e.g., ground).

Fig. 5 is a flowchart of a control method of the pixel circuit of the present disclosure. Fig. 6 is a waveform diagram of the pull-up control signal S3, the pull-down control signal S4, the first control signal S1 and the second control signal S2. The operation flow of the present disclosure will be described with reference to fig. 4 to 6.

In step S501, at a time point t1 of the first frame period f1, the pull-up control switch W3 is turned on, and the pull-down control switch W4, the first transfer switch W1, and the second transfer switch W2 are turned off. At this time, the voltage of the control node Nb is controlled to the first high potential.

In step S502, between time points t2 to t3 of the first frame period f1, the pull-up control switch W3 and the first transfer switch W1 are turned on, and the pull-down control switch W4 and the second transfer switch W2 are turned off. At this time, the first end of the first switching capacitor receives the first voltage source Sa, and the voltage of the second end is controlled to be at the first high potential through the first switching switch W1.

In step S503, between time points t3 to t4 of the first frame period f1, the first switch W1 is turned on, and the pull-up control switch W3, the pull-down control switch W4 and the second switch W2 are turned off, so that the control node Nb is turned on to the first voltage source Sa through the first switching circuit 210. At this time, the voltage of the control node Nb is no longer fixed at the first high potential, and the voltage variation across the first conversion capacitor C1 should be kept consistent by the capacitive coupling effect. Therefore, when the first voltage source Sa decreases with time, the voltage on the control node Nb also decreases accordingly. For example: the voltage at the control node Nb is also reduced from 4 volts to 0 volts at the first high voltage level when the first voltage source is reduced from 10 volts to 6 volts. In other words, even though the voltage difference interval of the first voltage source Sa used by each pixel circuit 100 is different (e.g. 10-6 v, 8-4 v), the voltage of each control node Nb can be controlled to gradually decrease from the same first high voltage by the coupling effect of the first switching capacitor C1, and the decreasing speed is the same as the change of the first voltage source Sa.

In step S504, when the voltage of the control node Nb is higher than the threshold value, the control switch Tc is turned off, and therefore the pixel circuit 100 can drive the light emitting element L according to the supply power Vdd and the first data signal written in advance by the data line until the first driving switch T1 is turned off.

In step S505, when the voltage of the control node Nb decreases with the decrease of the first voltage source Sa and is lower than the threshold value, the control switch Tc is turned on, such that the clamp voltage Vp is written into the pixel circuit 100 and the first driving switch T1 is turned off. The pixel circuit 100 will stop driving the light emitting element L. In some embodiments, at the time point T5 of the first frame period f1, the pull-down control switch W4 is turned on, and the pull-up control switch W3, the first switch W1 and the second switch W2 are turned off, so that the voltage of the control node Nb is set to the first low level, which ensures that the control switch Tc can be turned on and the first driving switch T1 can be turned off.

The steps S501 to S505 are the operation steps of the display panel PA in the first frame period f 1. The steps S506-S510 are for explaining the operation steps of the display panel PA in the second frame period f 2. The steps of the first frame period f1 and the second frame period f2 are substantially the same, and the control node will instead be turned on to the second voltage source. The voltage of the second voltage source Vb is reduced with time but has a delay time difference from the first voltage source Va.

In step S506, at a time point t6 of the second frame period f2, the pull-up control switch W3 is turned on again, and the pull-down control switch W4, the first transfer switch W1 and the second transfer switch W2 are turned off. At this time, the voltage of the control node Nb is controlled to the first high potential.

In step S507, the pull-up control switch W3 and the second transfer switch W2 are turned on and the pull-down control switch W4 and the first transfer switch W1 are turned off between the time points t7 to t8 of the second frame period f 2. At this time, the first end of the second converting capacitor C2 of the second converting circuit 220 receives the second voltage source Sb, and the voltage of the second end is controlled to the first high potential by the second converting switch W2.

In step S508, the second transfer switch W2 is turned on between the time points t 8-t 9 of the second frame period f2, and the pull-up control switch W3, the pull-down control switch W4 and the first transfer switch W1 are turned off to turn on the control node Nb to the second voltage source Sb through the second transfer circuit 220. At this time, the voltage of the control node Nb is no longer fixed at the first high potential, and the voltage variation across the second switching capacitor C2 should be kept consistent according to the capacitive coupling effect. Thus, as the second voltage source Sb decreases over time, the voltage at the control node Nb likewise decreases accordingly.

In step S509, when the voltage of the control node Nb is higher than the threshold value, the control switch Tc is turned off, and therefore the pixel circuit 100 can drive the light emitting element L according to the supply power Vdd and the second data signal written in advance by the data line until the first driving switch T1 is turned off.

In step S510, when the voltage of the control node Nb decreases with the decrease of the second voltage source Sb and is lower than the threshold value, the control switch Tc is turned on, such that the clamp voltage Vp is written into the pixel circuit 100 and the first driving switch T1 is turned off. In some embodiments, the pull-down control switch W4 is turned on and the pull-up control switch W3, the first switch W1 and the second switch W2 are turned off between the time point T10 of the second frame period f2, so that the voltage of the control node Nb is set to the first low level, ensuring that the control switch Tc can be turned on and the first driving switch T1 can be turned off.

Fig. 7A and 7B are waveform diagrams of analog testing performed by a portion of an embodiment of the control circuit 200 according to the present disclosure. The hybrid control signal Sx in fig. 7A is generated by combining the first voltage source Sa and the second voltage source Sb. The high potential of the mixed control signal Sx represents that the first control signal S1 or the second control signal turns on the corresponding change-over switch, and the low potential of the mixed control signal Sx represents that the first control signal S1 or the second control signal turns off the corresponding change-over switch. Fig. 7B is a voltage waveform diagram of the pull-up control signal S3 and the control node Nb. As shown in the simulation result, the voltage of the control node Nb is actually controlled between the dc voltage source Vdh and the reference voltage source Vdl, which accords with the progressive analog scan (Progressive Imitative Sweep), so the control circuit 200 of the present disclosure can be applied to the display panel PA and operates normally.

Fig. 8A-8C are schematic views of display panels according to some embodiments of the present disclosure. As shown in FIG. 8A, in one embodiment, the display circuit 810 includes a plurality of pixel circuits 810. The pixel circuits 810 are disposed in the same row on the display panel 810 and are electrically connected to the same control circuit 820.

Referring to fig. 8B, in some embodiments, the display panel 820 includes a plurality of pixel circuits 821 and a plurality of control circuits 822. Each control circuit 822 corresponds to one pixel circuit 821. In other words, each control circuit 822 is electrically connected to a control node Nb (as shown in fig. 2 and 4) of the corresponding pixel circuit 821 for controlling the on or off of the control switch Tc. In other embodiments, each control circuit 822 is electrically connected to all the pixel circuits 821 in the same area on the display panel PA. In other words, the element 821 in fig. 8B may refer to a plurality of pixel circuits 821 in the same region, and each control circuit 822 is electrically connected to all the pixel circuits in different regions.

Referring to fig. 8C, in some embodiments, the display panel 830 includes a plurality of pixel circuits, a plurality of first pixel circuits 831 and a plurality of second pixel circuits 832 as shown. The display panel 830 further includes a plurality of control circuits, a first control circuit 833 and a second control circuit 834 as shown. The first pixel circuit 831 and the second pixel circuit 832 are disposed in the same horizontal row of the display panel 830. The first control circuit 833 is electrically connected to the first pixel circuits 831 (e.g., 4) and the second control circuit 834 is electrically connected to the second pixel circuits 832.

The elements, method steps or technical features of the foregoing embodiments may be combined with each other, and are not limited to the literal description sequence or the drawing presentation sequence in the present disclosure.

While the present disclosure has been described with reference to the embodiments, it should be understood that the invention is not limited thereto, but may be variously modified and modified by those skilled in the art without departing from the spirit and scope of the present disclosure, and the scope of the present disclosure is therefore intended to be limited only by the appended claims.

Claims

1. A pixel circuit driving method, comprising:

in a first frame period, a control node of a pixel circuit is conducted to a first voltage source through a first conversion circuit, wherein the voltage of the first voltage source is reduced along with time;

driving a light emitting element by the pixel circuit according to a power supply and a first data signal until a driving switch in the pixel circuit is turned off according to the voltage of the first voltage source;

in a second frame period, the control node is changed to be conducted to a second voltage source through a second conversion circuit, wherein the voltage of the second voltage source is reduced along with time; and

the light-emitting element is driven by the pixel circuit according to the power supply and a second data signal until the driving switch in the pixel circuit is turned off according to the voltage of the second voltage source.

2. The method of driving a pixel circuit of claim 1, wherein said method of turning on said control node of said pixel circuit to said first voltage source further comprises:

a first transfer switch in the first transfer circuit is turned on, wherein the first transfer switch is connected to the first voltage source through a first transfer capacitor.

3. The pixel circuit driving method according to claim 2, further comprising:

before the control node of the pixel circuit is conducted to the first voltage source, the voltage of the control node is set to a first high potential.

4. A pixel circuit driving method according to claim 3, further comprising:

the voltage of the control node is set to a first low level to turn off the driving switch in the pixel circuit.

5. The method of claim 1, wherein the first voltage source and the second voltage source have the same voltage waveforms but have a delay time.

6. A control circuit, comprising:

the first conversion circuit comprises a first conversion switch and is electrically connected with a control node of a control switch in a pixel circuit, wherein the control node is electrically connected with a first voltage source through the first conversion switch, and the voltage of the first voltage source is reduced along with time; and

the second conversion circuit comprises a second conversion switch and is electrically connected with the control node of the control switch, wherein the control node is electrically connected with a second voltage source through the second conversion switch, and the voltage of the second voltage source is reduced along with time;

wherein during a first frame period, the first transfer switch is turned on and the second transfer switch is turned off to turn on the control node to the first voltage source, and the pixel circuit drives a light emitting element according to a supply power and a first data signal;

the first change-over switch is turned off and the second change-over switch is turned on during a second frame period to turn on the control node to the second voltage source, and the pixel circuit drives the light emitting element according to the power supply and a second data signal.

7. The control circuit of claim 6, wherein the pixel circuit drives the light emitting device according to the first data signal or the second data signal when the voltage of the control node is greater than a threshold value; when the voltage of the control node is smaller than the threshold value, the pixel circuit stops driving the light emitting element.

8. The control circuit of claim 6, wherein the first conversion circuit further comprises:

the first end of the first conversion capacitor is electrically connected to the first voltage source, and the second end of the first conversion capacitor is electrically connected to the control node through the first conversion switch.

9. The control circuit of claim 8, wherein the second conversion circuit further comprises:

the first end of the second conversion capacitor is electrically connected to the second voltage source, and the second end of the second conversion capacitor is electrically connected to the control node through the second conversion switch.

10. The control circuit of claim 9, further comprising:

the voltage setting circuit is electrically connected between the first change-over switch, the second change-over switch and the control node, wherein the voltage setting circuit is used for setting the voltage of the control node to a first high potential before the pixel circuit drives the light-emitting element so as to conduct a driving switch in the pixel circuit.

11. The control circuit of claim 10, wherein the voltage setting circuit is further configured to set the voltage of the control node to a first low voltage level to turn off a driving switch in the pixel circuit.

12. The control circuit of claim 11, wherein the voltage setting circuit comprises a pull-up voltage switch and a pull-down voltage switch, the pull-up voltage switch being configured to set the voltage of the control node to the first high potential when turned on, the pull-down voltage switch being configured to set the voltage of the control node to the first low potential when turned on.

13. A display panel, comprising:

at least one pixel circuit for driving a light emitting element and including a control switch; and

at least one control circuit comprising:

the first conversion circuit comprises a first conversion capacitor and a first conversion switch, wherein a first end of the first conversion capacitor is electrically connected to a first voltage source, a second end of the first conversion capacitor is electrically connected to a control node of the control switch through the first conversion switch, and the voltage of the first voltage source is reduced along with time; and

the second converting circuit comprises a second converting capacitor and a second converting switch, wherein the first end of the second converting capacitor is electrically connected to a second voltage source, the second end of the second converting capacitor is electrically connected to the control node through the second converting switch, and the voltage of the second voltage source is reduced along with time.

14. The display panel of claim 13, wherein during a first frame period, the first switch is turned on and the second switch is turned off to turn on the control node to the first voltage source, and the pixel circuit drives the light emitting element according to a power supply and a first data signal; in a second frame period, the first transfer switch is turned off and the second transfer switch is turned on to turn on the control node to the second voltage source, and the pixel circuit drives the light emitting element according to the power supply and a second data signal.

15. The display panel of claim 14, wherein the pixel circuit drives the light emitting device according to the first data signal or the second data signal when the voltage of the control node is greater than a threshold value; when the voltage of the control node is smaller than the threshold value, the pixel circuit stops driving the light emitting element.

16. The display panel of claim 13, wherein the control circuit further comprises:

the voltage setting circuit is electrically connected among the first change-over switch, the second change-over switch and the control node and comprises a pull-up voltage switch and a pull-down voltage switch, wherein when the pull-up voltage switch is conducted, the voltage setting circuit is used for setting the voltage of the control node to a first high potential.

17. The display panel of claim 16, wherein the voltage setting circuit is further configured to set the voltage of the control node to a first low level when the pull-down voltage switch is turned on.

18. The display panel of claim 13, wherein the display panel comprises a plurality of the pixel circuits, the pixel circuits are disposed in a same row on the display panel, and the pixel circuits are electrically connected to the control circuit.

19. The display panel of claim 13, wherein the display panel comprises a plurality of the pixel circuits, wherein the pixel circuits are located in a same area on the display panel and are electrically connected to the control circuit.

20. The display panel of claim 13, wherein the pixel circuit comprises a plurality of first pixel circuits and a plurality of second pixel circuits, and the control circuit comprises a first control circuit and a second control circuit; the first pixel circuit and the second pixel circuit are positioned in the same horizontal row on the display panel, the first control circuit is electrically connected with the first pixel circuit, and the second control circuit is electrically connected with the second pixel circuit.