CN114200991B - Distributed current drive circuit - Google Patents
Distributed current drive circuit Download PDFInfo
- Publication number
- CN114200991B CN114200991B CN202111420253.0A CN202111420253A CN114200991B CN 114200991 B CN114200991 B CN 114200991B CN 202111420253 A CN202111420253 A CN 202111420253A CN 114200991 B CN114200991 B CN 114200991B
- Authority
- CN
- China
- Prior art keywords
- output
- input
- transmission network
- emitter
- bipolar transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
Abstract
The invention discloses a distributed current drive circuit, which comprises an input transmission network, an emitter following branch, a bias transconductance multiplexing branch and an output transmission network, wherein the input transmission network is connected with the emitter following branch; the emitter following branch comprises N emitter following units, the bias transconductance multiplexing branch comprises N bias transconductance multiplexing units, and N is a positive integer; the emitter following unit and the bias transconductance multiplexing unit respectively convert the received input signals into in-phase current signals and reverse-phase current signals, and the emitter following unit and the bias transconductance multiplexing unit receive differential signals, so that in-phase current signals are formed at the output ends of the emitter following unit and the bias transconductance multiplexing unit; the output transmission network superposes and outputs the current signals, so that the driving efficiency of the circuit is improved; meanwhile, the driving efficiency of the circuit is further improved due to the fact that an output matching load is eliminated; on the other hand, the output impedance of the emitter follower unit is low, the output impedance of the bias transconductance multiplexing unit is high, the total output impedance of the circuit is low, and the circuit has good output matching characteristics.
Description
Technical Field
The invention belongs to the field of analog and radio frequency amplifiers, and particularly relates to a distributed current driving circuit.
Background
The current-driven type device refers to a device that needs to be driven using a current, which requires a driver circuit to have a capability of outputting a high current. The current driving circuit has a wide application, for example, the current driving circuit is applied to a transmitting terminal of an optical communication system, and is used for driving a directly modulated laser to realize conversion from a current signal to an optical signal.
The current driving circuits in the prior art mainly include the following:
as is well known, a current drive circuit is a conventional distributed amplifier which uses a connection of base input collector output as shown in (a) of fig. 1, and in order to maintain a traveling wave matching characteristic, it is necessary to add a matching load at one end of an input network and an output network for absorbing an input signal, a part of an output signal, and a reflected signal from a preceding stage or a subsequent stage. This scheme can provide gain, but because of the existence of matched load, half of the modulation current is consumed on the chip, and the problem of low driving efficiency exists.
The other Current driving circuit is in a Current Mode Logic (CML) Mode; the US invention patent US8903254B2 adopts a CML output structure, as shown in fig. 1 (B), which avoids the problem of output matching degradation, but the drive efficiency of the CML driver is low because the matching load on the chip absorbs the modulation current.
Another current driving circuit is an Open Drain (OD) output mode; chinese invention patent CN103178441B adopts an OD output structure, as shown in fig. 1 (c), which achieves twice the modulation current intensity compared to the CML output by eliminating the matched load on the chip. However, the output impedance of the OD output is typically high, resulting in severe degradation of the driver output matching.
Based on the above drawbacks and deficiencies, there is a need in the art to further improve and design the current driving circuit in the prior art to solve the problems of low driving efficiency and poor output matching of the current driving circuit in the prior art.
Disclosure of Invention
Aiming at the defects or the improvement requirements in the prior art, the invention provides a distributed current driving circuit, which is used for overcoming the trade-off relation between the driving capability and the output matching in the current driving circuit and solving the problems of low driving efficiency and poor output matching of the current driving circuit in the prior art; a current drive circuit having high drive efficiency and good output matching characteristics is provided.
To achieve the above object, the present invention provides a distributed current driving circuit, which includes: the device comprises an input transmission network, an emitter following branch, a bias transconductance multiplexing branch and an output transmission network;
the emitter following branch comprises N emitter following units, the bias transconductance multiplexing branch comprises N bias transconductance multiplexing units, N is a positive integer,
the input transmission network is used for receiving externally input differential signals Vinn and Vinp;
the N emitter following units are used for receiving signals Vinn output by the input transmission network and respectively converting the signals Vinn into same-phase current signals of Vinn; the N bias transconductance multiplexing units are used for receiving the signal Vinp output by the input transmission network and respectively converting the signal Vinp into an inverted current signal of Vinp; the ith bias transconductance multiplexing unit is also used for providing bias current for the ith emitter following unit, and the value of i is 1 to N;
the output transmission network is used for receiving the current signals output by the output ends of the emitter following units and the output ends of the bias transconductance multiplexing units, and outputting the superposed current signals so as to improve the driving efficiency of the current driving circuit.
Compared with the prior art, on one hand, the emitter following unit and the bias transconductance multiplexing unit respectively convert the received input signals into the in-phase current signals and the reverse-phase current signals, and the input signals received by the emitter following unit and the bias transconductance multiplexing unit are differential signals, so that the in-phase current signals are formed at the output ends of the emitter following unit and the bias transconductance multiplexing unit, and the output transmission network superposes and outputs the current signals, so that the driving efficiency of the current driving circuit is improved; on the other hand, the driving efficiency of the circuit is further improved due to no output matching load; on the other hand, the emitter following unit has the characteristic of low output impedance, the bias transconductance multiplexing unit has the characteristic of large output impedance, and the total output impedance of the circuit after the emitter following unit and the bias transconductance multiplexing unit are connected is low, so that the circuit has good output matching characteristic.
Preferably, the distributed current drive circuit further comprises an input matching load; the input matching load is coupled with the input transmission network; the input matching load is mainly used for absorbing input signals from the input port, improving the input matching effect and preventing the signals from being reflected to the front stage from the input port.
Further preferably, the input matching load is a resistor.
As a further preference, the input matching load is a series network of a resistor and a capacitor.
Further preferably, the impedance of the input matching load is equal to the characteristic impedance of the input transmission network; the input matching characteristic of the circuit is best, and the current signal can flow into the input transmission network to the maximum extent.
Preferably, the emitter follower unit is a first bipolar transistor; the base electrode of the first bipolar transistor is connected with an output end of the input transmission network, the emitter electrode of the first bipolar transistor is connected with an input end of the output transmission network, and the collector electrode of the first bipolar transistor is connected with the power supply.
Preferably, the output impedance of the first bipolar transistor connected to the initial port of the input end of the output transmission network is equal to the characteristic impedance of the output transmission network; the output matching characteristic of the circuit is best, and the current signal can flow into the output transmission network to the maximum extent.
As a further preferred, the bias transconductance multiplexing unit is a second bipolar transistor; the base electrode of the second bipolar transistor is connected with the other output end of the input transmission network, the collector electrode of the second bipolar transistor is connected with the emitter electrode of the first bipolar transistor, and the emitter electrode of the second bipolar transistor is grounded.
As a further preferred, the bias transconductance multiplexing unit further includes a third bipolar transistor; the base of the third bipolar transistor is connected with the power supply, the emitter of the third bipolar transistor is connected with the collector of the second bipolar transistor, and the collector of the third bipolar transistor is connected with the emitter of the first bipolar transistor.
As further preferable, the emitter follower unit is a first field effect transistor; the grid electrode of the first field effect transistor is connected with one output end of the input transmission network, the source electrode of the first field effect transistor is connected with the input end of the output transmission network, and the drain electrode of the first field effect transistor is connected with the power supply.
As a further preferred, the bias transconductance multiplexing unit is a second field effect transistor; the grid electrode of the second field effect transistor is connected with the other output end of the input transmission network, the drain electrode of the second field effect transistor is connected with the source electrode of the first field effect transistor, and the source electrode of the second field effect transistor is grounded.
Preferably, the input transport network and the output transport network are both transmission lines.
Preferably, the input transmission network and the output transmission network are series networks of a plurality of inductors. Generally, compared with the prior art, the above technical solution conceived by the present invention mainly has the following technical advantages:
1. the received differential input signals are converted and output current signals in the same phase through the emitter following unit and the bias transconductance multiplexing unit, and the current signals in the same phase are superposed through the output transmission network, so that the driving efficiency of the current driving circuit is improved; the driving efficiency of the circuit is further improved by canceling the output matching load; by utilizing the characteristics of low output impedance of the emitter following unit and high output impedance of the bias transconductance multiplexing unit, the total output impedance of the circuit is low after the emitter following unit and the bias transconductance multiplexing unit are connected, so that the circuit has good output matching characteristic.
2. As an improvement of the above scheme, an input matching load is arranged in the circuit, so that an input signal from an input port is absorbed, the input matching effect is improved, and the signal is prevented from being reflected to a front stage from the input port; the input matching of the circuit is further optimized by setting the impedance of the input matching load and the characteristic impedance of the input transmission network to be equal.
3. As a further improvement of the above scheme, the output matching of the circuit is further optimized by equalizing the output impedance of the emitter follower unit connected to the start port of the input terminal of the output transmission network with the characteristic impedance of the output transmission network.
Drawings
FIG. 1 is a diagram of several conventional current driving circuits;
FIG. 2 is a diagram of a distributed current driving circuit according to the present invention;
FIG. 3 is a block diagram of a first embodiment of the present invention;
FIG. 4 is a structural diagram of a second embodiment of the present invention;
fig. 5 is a structural diagram of a third embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
In order to solve the problems of low driving efficiency, low bandwidth and poor output matching of a current driving circuit in the prior art, the invention provides a distributed current driving circuit which can be applied to the scene of driving a direct-modulation laser and other current driving devices.
The circuit architecture is based on the distributed amplifier, and meanwhile, the problems that the distributed amplifier needs to output matched load and is low in efficiency are solved.
The gain unit of the invention adopts the emitter follower circuit, adopts the connection mode that the base electrode is input into the output of the input stage, absorbs the advantage of low output impedance of the emitter follower circuit, and ensures that the circuit has good output matching characteristic.
The invention has the advantages of good output matching characteristic of the CML circuit and high-efficiency output of the OD circuit, and overcomes the defects of low driving efficiency of the CML circuit and poor output matching of the OD mode.
As shown in fig. 2, the distributed current driving circuit of the present invention includes an input transmission network, an emitter follower branch, a bias transconductance multiplexing branch, and an output transmission network; wherein, the first and the second end of the pipe are connected with each other,
the emitter following branch comprises N emitter following units, the bias transconductance multiplexing branch comprises N bias transconductance multiplexing units, N is a positive integer,
the input transmission network is used for receiving externally input differential signals Vinn and Vinp;
the N emitter following units are used for receiving signals Vinn output by the input transmission network and respectively converting the signals Vinn into same-phase current signals of Vinn; the N bias transconductance multiplexing units are used for receiving the signal Vinp output by the input transmission network and respectively converting the signal Vinp into an inverted current signal of Vinp; the ith bias transconductance multiplexing unit is also used for providing bias current for the ith emitter following unit, and the value of i is 1 to N;
the output transmission network is used for receiving the current signals output by the output ends of the emitter following units and the output ends of the bias transconductance multiplexing units, and outputting the superposed current signals so as to improve the driving efficiency of the current driving circuit.
Through the connection of the above components, on one hand, because the emitter following unit and the bias transconductance multiplexing unit respectively convert the received input signals into in-phase and reverse-phase current signals, and the input signals received by the emitter following unit and the bias transconductance multiplexing unit are differential signals, in-phase current signals are formed at the output ends of the emitter following unit and the bias transconductance multiplexing unit, and the output transmission network superposes the current signals, so that the driving efficiency of the current driving circuit is improved; meanwhile, no output matching load exists, so that the driving efficiency of the circuit is further improved; on the other hand, the emitter following unit has low output impedance, the bias transconductance multiplexing unit has large output impedance, and the total output impedance of the circuit formed by the emitter following unit and the bias transconductance multiplexing unit is low, so that the circuit has good output matching characteristic.
Three embodiments of the present invention are described below.
Example one
FIG. 3 is a block diagram of a first embodiment of the present invention; as shown in fig. 3:
in the first embodiment, the input transmission network is an input transmission line with characteristic impedance Z1 and electrical length E1, and includes two input ports, which respectively receive externally input differential signals Vinn and Vinp; in some embodiments, the input transmission network may also be a series network of multiple inductors.
In the first embodiment, the emitter following branch comprises three emitter following units consisting of first bipolar transistors Q1-Q3; in some embodiments, the number of emitter follower cells can be one, two, or more than three; in the first embodiment, the bases of the first bipolar transistors Q1-Q3 are the input ends of the emitter follower units, are respectively connected with the input transmission lines, and receive Vinn signals output by the input transmission lines; emitters of the first bipolar transistors Q1-Q3 are output ends of the emitter following units, are respectively connected with the output transmission lines, and output in-phase current of a signal Vinn to the output transmission lines; the collectors of the first bipolar transistors Q1-Q3 are all connected with a direct current power supply VCC; the first bipolar transistors Q1-Q3 are used to effect conversion of the Vinn voltage signal to an in-phase current signal.
In some embodiments, when the input transfer network is a series network of a plurality of inductors, the input terminal of each emitter follower unit is connected between adjacent inductors.
In the first embodiment, the bias transconductance multiplexing branch comprises three bias transconductance multiplexing units formed by second bipolar transistors Q4-Q6; in some embodiments, the number of offset transconductance multiplexing units may be one, two, or more than three; in the first embodiment, bases of the second bipolar transistors Q4-Q6 are input ends of the offset transconductance multiplexing unit, and are respectively connected to the input transmission lines and receive Vinp signals output by the input transmission lines, where the Vinp signals and the Vinn signals are differential signals; the collectors of the second bipolar transistors Q4-Q6 are the output ends of the offset transconductance multiplexing unit, and are respectively connected with the output transmission lines, and output the inverted current of the signal Vinp to the output transmission lines, wherein the current is in phase with the current output by the emitters of the first bipolar transistors Q1-Q3; the emitters of the second bipolar transistors Q4-Q6 are grounded; the second bipolar transistors Q4-Q6 are used for providing current bias for Q1-Q3 and simultaneously providing transconductance for Vinp, and conversion of voltage Vinp to an inverted current signal is achieved.
In some embodiments, when the input transmission network is a series network of a plurality of inductors, the input terminal of each bias transconductance multiplexing unit is connected between adjacent inductors.
In the first embodiment, the output transmission network is an output transmission line with characteristic impedance Z0 and electrical length E0; the input end of the output transmission line receives current signals from the emitter of the first bipolar transistor Q1-Q3 and the collector of the second bipolar transistor Q4-Q6, and superposition of the current signals is achieved, and circuit output current amplification is achieved.
In some embodiments, the output transmission network may also be a series network of a plurality of inductors, and the output terminal of each emitter follower unit or the output terminal of each offset transconductance multiplexing unit is respectively connected between adjacent inductors.
In the first embodiment, the first bipolar transistor Q1 and the second bipolar transistor Q4 are connected to the initial port of the input end of the output transmission network, and the output impedance Zout1 of the first bipolar transistor Q1 is selected to be equal to the characteristic impedance of the output transmission line, i.e., Zout 1Z 0; the output impedance Zout2 of the second bipolar transistor Q4 approaches infinity, so the total output impedance of the first bipolar transistor Q1 and the second bipolar transistor Q4 is Z0, which functions as an on-chip matching resistor, and can absorb the reflected signal from the output port to improve the output matching characteristic, and the current driving efficiency of the current driving circuit is twice that of the CML circuit because the output node has no on-chip matching resistor.
In the first embodiment, an input matching load is further provided, and is used for absorbing an input signal from the input port, improving the input matching effect, and preventing the signal from being reflected to the previous stage from the input port; the input matching load is coupled with the input transmission network; the output end of the input matching load is connected with the alternating current ground; in the first embodiment, the input matching load is the termination resistor R1, the resistance of the resistor R1 is equal to the characteristic impedance Z1 of the input transmission line, and the input matching characteristic of the circuit is best, so that the current signal can flow into the input transmission network to the maximum extent; in some embodiments, the input matching load may also be a series network of a resistor and a capacitor.
The working principle of the first embodiment is as follows: for the input signal Vinn, the modulation current Imod1 in phase with Vinn can be formed because the base and the emitter are in phase with each other through the conversion of the first bipolar transistor Q1; for the input signal Vinp, the switching is performed by the second bipolar transistor Q4, and because the base and the collector are in opposite phases, a modulation current Imod4 in opposite phase to the Vinp can be formed; since Vinp and Vinn are differential signals, Imod1 is in phase with Imod4, and an in-phase superposed current signal of Imod1+ Imod4 can be formed at the connection port of Q1 and Q4; similarly, Q2 and Q5, Q3 and Q6 also form an in-phase superimposed signal, and the final output current can be expressed as:
because the bias transistor of the common emitter follower only provides direct current bias current and has no signal input, the output current of the common emitter follower is as follows:
therefore, the current modulation efficiency of the distributed current driving circuit applying the structure of the embodiment of the invention is obviously higher than that of the common emitter follower structure.
Example two
FIG. 4 is a structural diagram of a second embodiment of the present invention; as shown in fig. 4, the input transmission network, the output transmission network, the emitter follower branch and the input matching load of the second embodiment are the same as those of the first embodiment;
compared with the first embodiment, the second embodiment adds a third bipolar transistor Q7-Q9 in the bias transconductance multiplexing branch; the base stages of the third bipolar transistors Q7-Q9 are all connected with a direct-current voltage VB, the emitters of the third bipolar transistors Q7-Q9 are respectively connected with the collectors of the second bipolar transistors Q4-Q6, and the collectors of the third bipolar transistors Q7-Q9 are respectively connected with the emitters of the first bipolar transistors Q1-Q3;
the main roles of the added third bipolar transistors Q7-Q9 are: 1) when the common mode level of the output node needs to be improved, the common mode level forms a voltage division between the third bipolar transistors Q7-Q9 and the second bipolar transistors Q4-Q6, so that the situation that the common mode level directly acts on the second bipolar transistors Q4-Q6 to cause transistor breakdown is avoided, and a protection effect on the second bipolar transistors Q4-Q6 is achieved; 2) the third bipolar transistors Q7-Q9 and the second bipolar transistors Q4-Q6 respectively form a Cascode amplifying structure, and the Cascode amplifying structure is commonly known, the Cascode output impedance is higher and more approaches to infinity, so that the Cascode amplifying structure can play a role in further improving the circuit output impedance; the circuit manner of the second embodiment can be adopted when the driven device needs to input a higher common mode voltage.
EXAMPLE III
FIG. 5 is a block diagram of a third embodiment of the present invention; as shown in fig. 5, the input transport network, the output transport network and the input matching load of the third embodiment are the same as those of the first and second embodiments; different from the first embodiment, the emitter following branch and the bias transconductance multiplexing branch of the third embodiment use field effect transistors as active devices;
in the third embodiment, the emitter follower branch comprises three emitter follower units formed by the first field effect transistors NM1-NM 3; the grid electrodes of the first field effect transistors NM1-NM3 are input ends of emitter follower units, are respectively connected with the input transmission line, and receive Vinn signals output by the input transmission line; the source electrodes of the first field effect transistors NM1-NM3 are output ends of the emitter following units, are respectively connected with the output transmission lines, and output in-phase current of a signal Vinn to the output transmission lines; the drains of the first field effect transistors NM1-NM3 are all connected with a direct current power supply VCC; the first field effect transistors NM1-NM3 are used to implement conversion of the Vinn voltage signal to an in-phase current signal.
In the third embodiment, the bias transconductance multiplexing branch comprises three bias transconductance multiplexing units formed by second field effect transistors NM4-NM 6; the grid electrodes of the second field effect transistors NM4-NM6 are input ends of the bias transconductance multiplexing unit, are respectively connected with the input transmission line, and receive Vinp signals output by the input transmission line, wherein the Vinp signals and the Vinn signals are differential signals; the drains of the second field effect transistors NM4-NM6 are output terminals of the offset transconductance multiplexing unit, and are respectively connected to the input terminals of the output transmission lines, and output the inverted current of the signal Vinp to the output transmission lines, which is understood to be in phase with the current output by the sources of the first field effect transistors NM1-NM 3; the sources of the second field effect transistors NM4-NM6 are grounded; the second field effect transistors NM4-NM6 are used for providing current bias for NM1-NM3 and also providing transconductance for Vinp, so that conversion of the voltage Vinp into an inverted current signal is realized.
In example three: for an input signal Vinn, a modulation current Imod1 in phase with Vinn is formed through conversion of a first field effect transistor NM 1; for an input signal Vinp, a modulation current Imod4 which is opposite to the Vinp is formed through conversion of a second field effect transistor NM 4; since Vinp and Vinn are differential signals, Imod1 is in phase with Imod4, and an in-phase superimposed current signal of Imod1+ Imod4 can be formed at the connection port of the first and second field effect transistors NM1 and NM 4; similarly, NM2 and NM5, NM3 and NM6 also form in-phase superimposed signals, and the final output current can be expressed as:
as described in the first embodiment, the current modulation efficiency of the distributed current driving circuit using the third structure of the embodiment of the present invention is significantly greater than that of the conventional emitter follower structure.
In conclusion, the distributed current drive circuit provided by the invention has the characteristics of high drive efficiency, wide band and good output matching characteristic, and is particularly suitable for application occasions of drive current drive devices.
It will be understood by those skilled in the art that the foregoing is only a preferred embodiment of the present invention, and is not intended to limit the invention, and that any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the scope of the present invention.
Claims (10)
1. A distributed current drive circuit is characterized by comprising an input transmission network, an emitter following branch, a bias transconductance multiplexing branch and an output transmission network;
the emitter following branch comprises N emitter following units, the bias transconductance multiplexing branch comprises N bias transconductance multiplexing units, and N is a positive integer;
the input transmission network is used for receiving externally input differential signals Vinn and Vinp;
the N emitter following units are used for receiving the signals Vinn output by the input transmission network and respectively converting the signals into in-phase current signals; the N bias transconductance multiplexing units are used for receiving the signals Vinp output by the input transmission network and respectively converting the signals Vinp into reverse current signals; the ith bias transconductance multiplexing unit is also used for providing bias current for the ith emitter following unit, and the value of i is 1 to N;
the output transmission network is used for receiving current signals output by the output ends of the emitter following units and the output ends of the bias transconductance multiplexing units, and outputting the current signals after the current signals are superposed so as to improve the driving efficiency of the current driving circuit.
2. The distributed current drive circuit of claim 1, further comprising an input matched load; the input matching load is coupled to the input transport network.
3. The distributed current drive circuit of claim 2 wherein the impedance of said input matching load is equal to the characteristic impedance of said input transmission network.
4. The distributed current drive circuit of claim 1 wherein said emitter follower unit is a first bipolar transistor; the base electrode of the first bipolar transistor is connected with an output end of the input transmission network, the emitter electrode of the first bipolar transistor is connected with an input end of the output transmission network, and the collector electrode of the first bipolar transistor is connected with the power supply.
5. The distributed current drive circuit of claim 4 wherein the output impedance of said first bipolar transistor connected to the beginning port of the input of said output transmission network is equal to the characteristic impedance of said output transmission network.
6. The distributed current drive circuit of claim 4, wherein the biasing transconductance multiplexing unit is a second bipolar transistor; the base electrode of the second bipolar transistor is connected with the other output end of the input transmission network, the collector electrode of the second bipolar transistor is connected with the emitter electrode of the first bipolar transistor, and the emitter electrode of the second bipolar transistor is grounded.
7. The distributed current drive circuit of claim 6, wherein the biasing transconductance multiplexing cell further comprises a third bipolar transistor; the base electrode of the third bipolar transistor is connected with a power supply, the emitter electrode of the third bipolar transistor is connected with the collector electrode of the second bipolar transistor, and the collector electrode of the third bipolar transistor is connected with the emitter electrode of the first bipolar transistor.
8. The distributed current drive circuit of claim 1 wherein said emitter follower unit is a first field effect transistor; the grid electrode of the first field effect transistor is connected with one output end of the input transmission network, the source electrode of the first field effect transistor is connected with the input end of the output transmission network, and the drain electrode of the first field effect transistor is connected with the power supply.
9. The distributed current drive circuit of claim 8, wherein the biasing transconductance multiplexing unit is a second field effect transistor; the grid electrode of the second field effect transistor is connected with the other output end of the input transmission network, the drain electrode of the second field effect transistor is connected with the source electrode of the first field effect transistor, and the source electrode of the second field effect transistor is grounded.
10. The distributed current drive circuit of claim 1 wherein said input transport network and said output transport network are both transmission lines.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111420253.0A CN114200991B (en) | 2021-11-24 | 2021-11-24 | Distributed current drive circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111420253.0A CN114200991B (en) | 2021-11-24 | 2021-11-24 | Distributed current drive circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN114200991A CN114200991A (en) | 2022-03-18 |
| CN114200991B true CN114200991B (en) | 2022-08-05 |
Family
ID=80649201
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202111420253.0A Active CN114200991B (en) | 2021-11-24 | 2021-11-24 | Distributed current drive circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN114200991B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116755502B (en) * | 2023-08-17 | 2023-10-20 | 深圳奥简科技有限公司 | Source follower driving circuit, electronic circuit and electronic equipment |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0019095A1 (en) * | 1979-05-18 | 1980-11-26 | International Business Machines Corporation | Regulated voltage current supply circuits |
| US5227734A (en) * | 1991-08-26 | 1993-07-13 | Raytheon Company | Broadband bipolar transistor distributed amplifier |
| CN101521486A (en) * | 2008-02-27 | 2009-09-02 | 中国科学院微电子研究所 | Bias circuit of power amplifier |
| CN103647515A (en) * | 2012-05-16 | 2014-03-19 | 英特尔移动通信有限责任公司 | Amplifier and mobile communication device |
| CN109450392A (en) * | 2018-12-27 | 2019-03-08 | 苏州英诺迅科技股份有限公司 | A kind of distribution emitter following amplifier |
| CN110460311A (en) * | 2019-08-07 | 2019-11-15 | 青海民族大学 | A kind of high efficiency high power millimeter wave synthesis power amplifier |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7808222B2 (en) * | 2007-10-12 | 2010-10-05 | Monolithic Power Systems, Inc. | Method and apparatus for high performance switch mode voltage regulators |
-
2021
- 2021-11-24 CN CN202111420253.0A patent/CN114200991B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0019095A1 (en) * | 1979-05-18 | 1980-11-26 | International Business Machines Corporation | Regulated voltage current supply circuits |
| US5227734A (en) * | 1991-08-26 | 1993-07-13 | Raytheon Company | Broadband bipolar transistor distributed amplifier |
| CN101521486A (en) * | 2008-02-27 | 2009-09-02 | 中国科学院微电子研究所 | Bias circuit of power amplifier |
| CN103647515A (en) * | 2012-05-16 | 2014-03-19 | 英特尔移动通信有限责任公司 | Amplifier and mobile communication device |
| CN109450392A (en) * | 2018-12-27 | 2019-03-08 | 苏州英诺迅科技股份有限公司 | A kind of distribution emitter following amplifier |
| CN110460311A (en) * | 2019-08-07 | 2019-11-15 | 青海民族大学 | A kind of high efficiency high power millimeter wave synthesis power amplifier |
Non-Patent Citations (2)
| Title |
|---|
| 2-20GHz分布式低噪声放大器设计;高洁等;《微波学报》;20190715;全文 * |
| A 0.5-8.5 GHz fully-differential COMS RF distributed amplifier;Hee-Tae Ahn;《2000 Southwest Symposium on Mixed-Signal Design》;20020806;全文 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN114200991A (en) | 2022-03-18 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101764581B (en) | Integrated power amplifier for use in wireless communication devices | |
| CN108809259B (en) | Power amplifier circuit and method of forming the same | |
| CN102820857A (en) | Transimpedance amplifier with broad band and high gain, design method and amplifier chip | |
| CN111384902A (en) | Broadband receiver circuit with adjustable impedance matching frequency | |
| CN109638642B (en) | High-speed large-current laser driving circuit and current modulation method thereof | |
| CN112187194A (en) | Push-pull power amplifier, radio frequency front-end circuit and wireless device | |
| WO2023040474A1 (en) | Radio frequency power amplifier | |
| WO2023045542A1 (en) | Radio-frequency power amplifier and radio-frequency front-end architecture applied to 5g communication system | |
| CN114200991B (en) | Distributed current drive circuit | |
| CN112543002A (en) | Broadband differential Doherty power amplifier and design method and application thereof | |
| WO2023082565A1 (en) | Mmic microwave power amplifier and radio frequency front-end module | |
| CN102916667A (en) | Broadband programmable gain amplifier with step length of 2dB | |
| CN116599469B (en) | Load modulation power amplifier structure capable of improving average efficiency of rollback area | |
| CN114465584A (en) | Double-mode ultra-wideband high-efficiency power amplification circuit | |
| CN108736847A (en) | High efficiency based on the control of accurate resonance circuit stacks power amplifier against D classes | |
| US10389308B2 (en) | Envelope tracking frontend device and switch thereof | |
| CN108667434B (en) | Low-voltage low-output impedance trans-impedance amplifier | |
| CN116366012A (en) | High-efficiency broadband cascaded active load modulation radio frequency power amplifier | |
| CN101212202B (en) | Frequency mixer with a filtering module for filtering off low-frequency component and reducing noise index | |
| CN115765637A (en) | Single-stage differential cascode amplifier module applied to W wave band | |
| CN104796089A (en) | Doherty differential power amplifier employing voltage combination method | |
| CN210327509U (en) | Novel reverse doherty amplifier | |
| KR102165176B1 (en) | Doherty power amplifier and the method of modulating load impedance of the amplifier | |
| CN109245730B (en) | Switching power amplifier and digital transmitter | |
| US6535062B1 (en) | Low noise, low distortion, complementary IF amplifier |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |