CN114173478A - Circuit board manufacturing method and circuit board - Google Patents
Circuit board manufacturing method and circuit board Download PDFInfo
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- CN114173478A CN114173478A CN202111318285.XA CN202111318285A CN114173478A CN 114173478 A CN114173478 A CN 114173478A CN 202111318285 A CN202111318285 A CN 202111318285A CN 114173478 A CN114173478 A CN 114173478A
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 64
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 156
- 229910052802 copper Inorganic materials 0.000 claims abstract description 148
- 239000010949 copper Substances 0.000 claims abstract description 148
- 238000009713 electroplating Methods 0.000 claims abstract description 44
- 238000005553 drilling Methods 0.000 claims abstract description 14
- 239000000463 material Substances 0.000 claims abstract description 9
- 238000012805 post-processing Methods 0.000 claims abstract description 6
- 238000000034 method Methods 0.000 claims description 30
- 238000005530 etching Methods 0.000 claims description 28
- 239000002131 composite material Substances 0.000 claims description 9
- 239000011889 copper foil Substances 0.000 claims description 8
- 238000000151 deposition Methods 0.000 claims description 7
- 230000002093 peripheral effect Effects 0.000 claims description 7
- 238000007747 plating Methods 0.000 claims description 7
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 claims description 6
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 claims description 6
- 238000011161 development Methods 0.000 claims description 6
- 239000000126 substance Substances 0.000 claims description 6
- 238000005137 deposition process Methods 0.000 claims description 5
- 238000010030 laminating Methods 0.000 claims description 4
- 230000008569 process Effects 0.000 description 13
- 239000000243 solution Substances 0.000 description 9
- 238000012546 transfer Methods 0.000 description 8
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 4
- 238000004140 cleaning Methods 0.000 description 4
- 230000008021 deposition Effects 0.000 description 4
- 229910000679 solder Inorganic materials 0.000 description 4
- 239000000758 substrate Substances 0.000 description 4
- 238000013461 design Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 229910021389 graphene Inorganic materials 0.000 description 3
- JPVYNHNXODAKFH-UHFFFAOYSA-N Cu2+ Chemical compound [Cu+2] JPVYNHNXODAKFH-UHFFFAOYSA-N 0.000 description 2
- 229910001431 copper ion Inorganic materials 0.000 description 2
- 238000007689 inspection Methods 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 238000003825 pressing Methods 0.000 description 2
- 238000002203 pretreatment Methods 0.000 description 2
- 230000009467 reduction Effects 0.000 description 2
- 238000006722 reduction reaction Methods 0.000 description 2
- 238000004381 surface treatment Methods 0.000 description 2
- 230000008719 thickening Effects 0.000 description 2
- HMHVCUVYZFYAJI-UHFFFAOYSA-N Sultiame Chemical compound C1=CC(S(=O)(=O)N)=CC=C1N1S(=O)(=O)CCCC1 HMHVCUVYZFYAJI-UHFFFAOYSA-N 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 239000012670 alkaline solution Substances 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 239000003814 drug Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005562 fading Methods 0.000 description 1
- 238000005429 filling process Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000000227 grinding Methods 0.000 description 1
- 238000000608 laser ablation Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000003801 milling Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 238000003672 processing method Methods 0.000 description 1
- 238000006479 redox reaction Methods 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 239000007921 spray Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 238000005406 washing Methods 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
- H05K3/0047—Drilling of holes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
- H05K3/061—Etching masks
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/423—Plated through-holes or plated via connections characterised by electroplating method
Abstract
The invention is suitable for the technical field of circuit board manufacturing, and provides a circuit board manufacturing method, which comprises the following steps: providing a core board, wherein the core board comprises a first copper layer, a second copper layer and a base material arranged between the first copper layer and the second copper layer; drilling: drilling a blind hole in the core plate, wherein the blind hole penetrates through the first copper layer and the base material; manufacturing a pattern circuit: manufacturing a pattern circuit on the first copper layer and the second copper layer; blind hole electroconduction: conducting the hole wall of the blind hole with the pattern circuits on the two sides of the core plate; electroplating and hole filling: carrying out local electroplating on the core plate to fill the blind holes with electroplated copper; and performing post-processing on the core board. The circuit board manufacturing method provided by the invention can manufacture fine lines on the circuit board, and is low in cost; the invention also provides a circuit board.
Description
Technical Field
The invention relates to the technical field of circuit board manufacturing, in particular to a circuit board manufacturing method and a circuit board.
Background
The miniaturization and intelligent development of electronic products promote the basic element of the electronic products, namely Printed Circuit Boards (PCBs), to also tend to develop in the direction of precision and diversification. In recent years, an arbitrary layer interconnection technology has been developed on the basis of a High Density Interconnection (HDI) board. The interconnection of arbitrary layer is also called arbitrary layer rank interconnection, from inlayer core board to skin, each layer carries out the interlaminar interconnection by the blind hole, does not use mechanical through-hole, adopts arbitrary layer design can make every cun space all obtain make full use of, and wiring density improves greatly, makes product design more accurate and more nimble.
At present, the conventional method for manufacturing any layer of interconnection plate includes: providing a conventional thin copper substrate, drilling holes by laser, electroplating and filling holes, reducing copper by a whole plate, pasting a dry film, exposing, developing and etching, and sequentially manufacturing a pattern circuit. However, the copper layer is thickened during the whole board hole filling process, and in order to manufacture fine circuits, the copper has to be reduced from the whole board, which causes poor uniformity of the thickness of the copper on the board surface, and causes poor circuit problems such as open circuit or fine lines during the circuit etching at the later stage.
Disclosure of Invention
The invention provides a circuit board manufacturing method and a circuit board, and aims to solve the problems of poor circuit and high manufacturing cost caused by poor uniformity of the copper thickness on a board surface.
An embodiment of the first aspect of the present invention provides a circuit board manufacturing method, including the following steps:
providing a core board, wherein the core board comprises a first copper layer, a second copper layer and a base material arranged between the first copper layer and the second copper layer;
drilling: drilling a blind hole in the core plate, wherein the blind hole penetrates through the first copper layer and the base material;
manufacturing a pattern circuit: manufacturing a graphic circuit on the first copper layer and the second copper layer;
blind hole electroconduction: conducting the hole wall of the blind hole with the graphic lines on the two sides of the core board;
electroplating and hole filling: carrying out local electroplating on the core board so as to fill electroplating copper in the blind holes;
and carrying out post-processing on the core board.
In some embodiments, the fabricating the pattern lines includes:
attaching a first dry film on the core board, and carrying out exposure and development to enable the first dry film to cover a preset area of a graphic circuit, a peripheral area of the hole opening of the blind hole and a peripheral area of the bottom of the blind hole;
etching the developed core board to form the pattern circuit on the first copper layer and the second copper layer, and respectively forming hole discs at the hole opening and the hole bottom of the blind hole;
and removing the first dry film.
In some embodiments, the plated via fill comprises:
covering a second dry film on the core plate, and exposing and developing to enable the second dry film to cover the blind holes and the plate surface outside the hole plate;
electroplating and filling holes in the core plate, so that the blind holes are filled with electroplated copper;
and removing the second dry film.
In some embodiments, the first dry film has a thickness less than or equal to 25um and the second dry film has a thickness greater than or equal to 25 um.
In some embodiments, the second dry film is applied to the core using a vacuum laminator.
In some embodiments, the blind via is electrically conductive, comprising:
depositing a third copper layer on the first copper layer, the second copper layer and the inner wall of the blind hole through a chemical copper deposition process, so that the blind hole becomes a metallized hole;
wherein, the thickness of the third copper layer is 0.8 um-1.0 um.
In some embodiments, after the filling the hole by electroplating, the circuit board manufacturing method further comprises:
and rapidly etching the core plate to remove the third copper layer.
In some embodiments, the core plate is rapidly etched using a microetching solution comprising sulfuric acid and hydrogen peroxide.
In some embodiments, the post-processing comprises:
laminating a first semi-cured sheet and a first copper foil on two sides of the core plate respectively to form a first composite plate;
and drilling, manufacturing a pattern circuit, conducting a blind hole and filling the hole by electroplating are sequentially carried out on the first composite board.
An embodiment of the second aspect of the present invention provides a circuit board, which is manufactured by using the circuit board manufacturing method according to any one of the embodiments of the first aspect.
According to the circuit board manufacturing method, the core board is drilled, then the pattern circuit is manufactured, and the pattern circuit is manufactured by directly utilizing the first copper layer and the second copper layer, so that the thickness of the base copper is not changed, the uniformity of the base copper is good, the etching factor can be well controlled when the pattern circuit is manufactured, the fine circuit is convenient to manufacture, and the problem of poor circuits such as open circuit or thin lines caused by uneven plate surface copper thickness is avoided. In addition, the step of electroplating and filling holes of the circuit board manufacturing method is to carry out local electroplating on the core board, compared with the mode of electroplating the whole board in the prior art, the circuit board manufacturing method provided by the invention does not need copper plating and copper reduction of the whole board to manufacture fine circuits, saves metal resources, does not need ultra-thin copper foil, and saves production cost. Therefore, the circuit board manufacturing method solves the problems of poor circuit caused by poor uniformity of the copper thickness on the board surface and higher manufacturing cost.
The circuit board manufactured by the circuit board manufacturing method can obtain fine lines, and has good yield and low cost.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the embodiments or the prior art descriptions will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive exercise.
Fig. 1 is a flow chart of a circuit board manufacturing method provided by an embodiment of the invention;
FIG. 2 is a schematic diagram of a circuit board manufacturing process provided by an embodiment of the invention;
FIG. 3 is a schematic diagram of a step of forming a pattern trace according to an embodiment of the present invention;
fig. 4 is a schematic diagram of a step of filling holes by electroplating according to an embodiment of the present invention.
The designations in the figures mean:
10. a core board; 11. a first copper layer; 12. a second copper layer; 13. a substrate; 14. blind holes; 20. electroplating copper; 210. a first dry film; 220. and a second dry film.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in further detail below with reference to the accompanying drawings, which are examples. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
It will be understood that when an element is referred to as being "secured to" or "disposed on" another element, it can be directly or indirectly secured to the other element. When an element is referred to as being "connected to" another element, it can be directly or indirectly connected to the other element. The terms "first", "second" and "first" are used merely for descriptive purposes and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features. The meaning of "plurality" is two or more unless specifically limited otherwise.
It should be noted that, in the embodiments of the present invention, the same reference numerals are used to denote the same components or parts, and for the same components or parts in the embodiments of the present invention, only one of the components or parts may be labeled with the reference numeral, and it should be understood that the reference numerals are also applicable to other similar components or parts.
To illustrate the technical solution of the present invention, the following description is made with reference to the specific drawings and examples.
Referring to fig. 1 and fig. 2, an embodiment of the invention provides a method for manufacturing a circuit board, including the following steps.
Step S101: a core board is provided.
As shown in fig. 2 (a), the core board 10 includes a first copper layer 11, a second copper layer 12, and a base material 13 disposed between the first copper layer 11 and the second copper layer 12, that is, the core board 10 is a double-sided copper-clad board.
In an embodiment, the thicknesses of the first copper layer 11 and the second copper layer 12 are equal to the thickness of the predetermined pattern circuit, and the pattern circuit can be directly manufactured by using the first copper layer 11 and the second copper layer 12, so that the uniformity of the base copper is good, and the fine circuit can be conveniently manufactured. It is understood that, considering that the core board 10 may be partially damaged by the copper layer due to the pretreatment process during the production process, the thicknesses of the first copper layer 11 and the second copper layer 12 may be slightly larger than the thickness of the predetermined pattern circuit, for example, the thicknesses of the first copper layer 11 and the second copper layer 12 are 1um to 3um larger than the thickness of the predetermined pattern circuit.
Step S102: and (6) drilling.
As shown in fig. 2 (b), blind holes 14 are drilled in the core board 10, and the blind holes 14 penetrate through the first copper layer 11 and the base material 13.
Optionally, a laser ablation processing method is adopted, a plurality of blind holes 14 are drilled in the core board 10, and the bottoms of the blind holes 14 abut against the second copper layer 12, so that the subsequent blind holes 14 can conduct the first copper layer 11 and the second copper layer 12.
Step S103: and manufacturing a pattern circuit.
As shown in fig. 2(c), a pattern line is formed using the first copper layer 11 and the second copper layer 12. This step is the first pattern transfer process, which is to form the pattern circuit on the first copper layer 11 and the second copper layer 12 according to the design pattern data.
Step S104: and (6) conducting the blind hole.
The blind hole is electrically conducted, and the hole wall of the blind hole 14 is communicated with the pattern circuits on the two sides of the core board 10.
In an embodiment, step S104 specifically includes: through the chemical copper deposition process, a third copper layer is deposited on the inner walls of the first copper layer 11, the second copper layer 12 and the blind hole 14, so that the blind hole 14 is metalized, and the blind hole 14 and the board surface copper layer are electrically connected, thereby facilitating the subsequent copper plating operation.
Note that electroless copper is deposited on the board surface by reducing copper ions to copper mainly by the principle of oxidation-reduction reaction using a solution containing copper ions, and is performed as a whole, so that the third copper layer is deposited also on the first copper layer 11, the second copper layer 12, and the substrate 13 exposed after etching, but the copper layer thickness by electroless copper is thin and hardly affects the circuit shape.
Optionally, the thickness of the third copper layer is 0.8um to 1.0um, and the third copper layer is a thin and dense copper layer.
In other embodiments, besides the copper deposition method, the conductive performance between the wall of the blind hole 14 and the pattern lines on the two sides of the core board 10 can be realized by a black hole process or a graphene process.
Step S105: and (6) electroplating to fill the holes.
Referring to fig. 2 (d), the step of filling the holes by electroplating is to perform local electroplating on the core board 10 to fill the blind holes 14 with the electroplated copper 20, so that the blind holes 14 can form stable electrical connection with the pattern circuits on two sides of the core board 10 through the electroplated copper 20, thereby playing a role in conducting the circuits on different layers.
In the step of filling the holes by electroplating, a second pattern transfer process is adopted, only the blind holes 14 and the peripheral sides thereof are electroplated, and the rest areas of the core board 10 are covered by the dry film, so that the pattern circuits on the core board 10 cannot be electroplated with a copper layer.
Step S106: the core board 10 is subjected to a post-process.
In one embodiment, the post-processing includes: laminating a first semi-cured sheet and a first copper foil on two sides of the core plate 10 respectively to form a first composite plate; referring to the above steps S102 to S105, drilling, fabricating a pattern circuit, performing blind hole conduction, and filling holes by electroplating are performed on the first composite board in sequence, so that a 4-layer HDI board can be fabricated.
If it is necessary to fabricate a 6-layer HDI board, after the above steps, a second prepreg and a second copper foil may be laminated on both sides of the first composite board to form a second composite board, and then, with reference to the above steps S102 to S105, drilling, fabricating a pattern circuit, making a blind via conductive, and filling a via by electroplating may be performed on the second composite board.
It can be understood that, if the HDI board with more than 6 layers needs to be manufactured, the above steps can be repeated again until the HDI board with the preset number of layers is formed, and the number of layers of the HDI board can be set according to the needs.
In addition, after the completion of the plating via-filling step, a post-treatment process may be performed, and the post-treatment process may be a conventional process for a printed wiring board, for example, the post-treatment process includes solder resist, characters, surface treatment, testing, appearance inspection, or includes at least one of the above processes.
In the circuit board manufacturing method, the core board 10 is drilled, and then the graphic circuit is manufactured, because the graphic circuit is manufactured by directly utilizing the first copper layer 11 and the second copper layer 12, the thickness of the base copper is not changed, the uniformity of the base copper is better, the etching factor can be better controlled when the graphic circuit is manufactured, the fine circuit is convenient to manufacture, and the problems of open circuit, fine line and the like caused by uneven copper thickness on the board surface are avoided. In addition, the step of electroplating the hole filling of the circuit board manufacturing method is to carry out local electroplating on the core board 10, compared with the mode of electroplating the whole board in the prior art, the circuit board manufacturing method provided by the invention does not need copper plating and copper reduction of the whole board to manufacture a fine circuit, thereby saving metal resources, also not needing to use ultra-thin copper foil and saving production cost. Therefore, the circuit board manufacturing method solves the problems of poor circuit caused by poor uniformity of the copper thickness on the board surface and higher manufacturing cost.
Referring to fig. 3, in an embodiment, the step S103 of fabricating the graphic line includes the following steps.
First, as shown in fig. 3 (a), a first dry film 210 is attached to the core board 10, and exposure and development are performed so that the first dry film 210 covers a predetermined region of the pattern lines, a peripheral side region of the aperture of the blind via 14, and a peripheral side region of the bottom of the blind via 14.
Next, as shown in fig. 3 (b), the developed core board 10 is etched to form pattern lines on the first copper layer 11 and the second copper layer 12, and to form hole pads at the hole openings and the hole bottoms of the blind holes 14, respectively.
Then, the first dry film 210 is removed, and as shown in fig. 2(c), the manufacturing of the pattern circuit is completed through the above steps.
By adopting the technical scheme, the hole discs can be manufactured on the hole opening side and the hole bottom layer of the blind hole 14 when the pattern circuit is manufactured, and the reliability of electrical connection is enhanced.
Referring to fig. 4, in an embodiment, the step S105 of filling the hole by electroplating specifically includes the following steps.
First, as shown in fig. 4 (a), after the blind holes are electrically conducted, the core board 10 is covered with the second dry film 220, and the second dry film 220 is exposed and developed to cover the blind holes 14 and the board surface other than the hole tray.
Optionally, a vacuum laminator is used to attach the second dry film 220 to the core 10. Thus, the second dry film can be better attached to the graphic circuit.
In an embodiment, the thickness of the second dry film 220 is greater than or equal to 25um, and optionally, the thickness of the second dry film 220 is greater than or equal to 30 um. Through setting up thicker dry film, the film that presss from both sides when can avoiding electroplating to form thick copper circuit, there is the problem that the film is not clean of fading, influences the etching quality.
The thickness of the first dry film 210 can be less than or equal to 25um, and by using the thin dry film, the resolution is better, which is beneficial to manufacturing a fine circuit.
Next, as shown in fig. 4 (b), the core board 10 is filled with the plated copper 20 by electroplating, and the blind holes 14 are filled with the plated copper. In the electroplating, since the hole pad is not covered with the second dry film 220, electroplated copper is also formed on the hole pad.
Then, the second dry film 220 is removed, and as shown in fig. 2 (d), the step of filling holes by plating forms the plated copper 20 in the blind holes 14 and on the hole plate.
In one embodiment, in step S104, the blind via is electrically conducted by a chemical copper deposition process, wherein a third copper layer formed by the chemical copper deposition process is not only located on the inner wall of the blind via, but also located on the pattern circuit on the board surface and on the exposed substrate 13. In step S105, the pattern circuit is covered by the second dry film, and is not thickened; correspondingly, after the step S105 of filling the holes by electroplating, the method for manufacturing a circuit board further includes: the core board 10 is rapidly etched to remove the third copper layer.
By rapid etching, the thin copper in the pattern line gap can be removed. The rapid etching is also called differential etching or flash etching, and the base copper is etched and removed in a shorter time by controlling the etching time. In the embodiment, the thickness of the base copper to be etched is only the third copper layer which is chemically deposited, the etching time is short, the lateral etching amount of the circuit is accurately controlled, and the precision is higher. After etching, a preset pattern circuit and a blind hole filled by electroplating are formed on the board surface.
Optionally, the core plate 10 is rapidly etched using a microetching solution comprising sulfuric acid and hydrogen peroxide. By selecting a proper microetching solution and controlling the etching time, the third copper layer can be etched in the rapid etching step, but the pattern circuit cannot be greatly influenced.
In other embodiments, in step S104, the blind hole is electrically conducted through a black hole process or a graphene process, and accordingly, after the step S105 of filling the hole by electroplating, the method for manufacturing the circuit board further includes: the surface of the core 10 is cleaned. Thus, carbon powder or graphene on the plate surface can be removed. Optionally, the way of cleaning the board surface may be a physical cleaning method such as plasma cleaning, and the like, and may also be cleaning with an alkaline solution.
The invention provides a circuit board manufactured by the method for manufacturing the circuit board.
The circuit board can be any interconnecting HDI board, but is not limited to the HDI board, and can also be a common multilayer circuit board. The circuit board manufactured by the manufacturing method has the advantages of fine lines, low cost and high yield.
The following will describe the method for manufacturing the circuit board according to the present invention by taking a 6-layer interconnection board as an example. Each line layer in 6 layers of arbitrary layers of interconnection boards is respectively L1-L6. Referring to fig. 2 to 4, the method for manufacturing a circuit board specifically includes the following steps.
S1, cutting: according to the production makeup size requirement, the copper-clad plate is cut into the core plate with the specified size. The copper-clad plate is a double-sided copper-clad plate, and 1/3OZ double-sided copper-clad plate is selected in the embodiment.
S2, browning: the copper surface is treated by the browning liquid medicine, so that the copper surface is slightly rough, and the laser energy can be absorbed by the copper surface.
S3, laser drilling: blind holes 14 designed into the board are machined with a laser.
S4, first pattern transfer: the core plate 10 after drilling is sequentially subjected to operations of first dry film 210 pasting, exposure and development, the position where the circuit needs to be manufactured is covered by the first dry film 210, the position where the circuit does not need to be manufactured is exposed through windowing, and the positions where the hole side and the hole bottom side of the blind hole 14 correspond to the hole plate are covered by the first dry film 210. The developed core board 10 is subjected to an etching operation to form a pattern circuit required for a board surface. And removing the residual dry film on the surface of the board after etching.
S5, blind hole conduction: in the embodiment, a chemical copper deposition mode is used to form a compact thin copper layer on the wall of the blind hole 14, so that the copper layer on the surface of the blind hole is electrically connected with the copper layer in the blind hole, thereby facilitating the subsequent copper plating operation. The conventional copper deposition thickness is 0.3 um-0.5 um, and the copper deposition thickness is controlled to be 0.8 um-1.0 um in the scheme, so that the reliability of electrical connection in the blind hole 14 during the second pattern transfer is ensured.
S6, second pattern transfer: and (3) sequentially carrying out second dry film 220 pasting, exposure and development operations on the core plate 10 after copper deposition, windowing and exposing the blind holes 14 and the hole side corresponding hole discs, and covering other positions with the second dry film 220. And carrying out a second electroplating operation on the developed core plate 10, filling the blind holes 14 on the core plate 10 with electroplated copper 20, and thickening the hole plate part which is not covered by the second dry film 220. The electroplating filling hole of the scheme is preferably processed by Vertical Continuous electroplating (VCP) Equipment. And after the electroplating hole filling and the pattern thickening are finished, removing the second dry film 220 covered on the board surface.
It should be noted that, during the second pattern transfer, the pre-treatment of the pattern requires closing the treatment section with a large influence on the copper surface, such as the grinding plate, so as to prevent the chemically deposited copper layer from being removed and affecting the post-process electroplating, and the pre-treatment can be performed in a manner with a small influence on the copper surface, such as acid washing. The second dry film 220 used for the second pattern transfer is thicker than the first dry film 210 used for the first pattern transfer, so that the second dry film 220 is attached to the pattern circuit.
S7, rapid etching: during the second electroplating, only the blind hole 14 and the copper layer corresponding to the side of the hole are thickened by electroplating, other circuit parts and the part of the base material 13 deposited with thin copper are covered by the second dry film 220, and the thickness of the copper layer is not changed. Therefore, only the thin copper deposited on the plate surface needs to be etched and removed in the step.
Specifically, a rapid etching method is used to remove the copper layer chemically deposited on the board surface, and after the etching is completed, the board surface forms the preset L3 and L4 layer of pattern circuit and the blind via 14 which is filled by electroplating. Wherein, because the thickness of the chemically deposited copper layer is only 0.8 um-1.0 um, the etching process can be controlled to be shorter, and the influence on the line side corrosion is small.
S8, AOI: the circuit board quality was checked using AOI (automated optical inspection machine).
S9, first pressing: the first semi-cured sheet and the first thin copper foil are laminated on both sides of the core board 10 after the rapid etching, respectively, to form 4-layered boards.
And S10, repeating the steps S2-S8 to form preset L2 and L5 layer pattern circuits and plated and filled blind holes.
S11, second pressing: and respectively laminating a second prepreg and a second thin copper foil on two sides of the core board 10 after the rapid etching to form a 6-layer board.
S12: repeating the steps of S2-S8 to form preset L1 and L6 layer pattern circuits and electroplated and filled blind holes.
S13: resistance welding: solder resist ink is printed on the board surface, and a copper layer which does not need to be exposed except a bonding pad is protected.
S14: character: and forming symbols, characters or other marks of the components on the board surface by using ink with a color different from that of the solder resist ink, such as white ink, and using a screen printing or jet printing mode.
S15: surface treatment: an oxidation resistant layer, such as OSP or gold or tin spray, is formed on the pads not covered by the solder mask to protect the exposed copper surface from oxidation prior to final soldering.
S16: routing: milling and routing the production board into a specified size according to the number of the makeup required for shipment, and then packaging and shipment.
The above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present invention, and are intended to be included within the scope of the present invention.
Claims (10)
1. A circuit board manufacturing method is characterized by comprising the following steps:
providing a core board, wherein the core board comprises a first copper layer, a second copper layer and a base material arranged between the first copper layer and the second copper layer;
drilling: drilling a blind hole in the core plate, wherein the blind hole penetrates through the first copper layer and the base material;
manufacturing a pattern circuit: manufacturing a graphic circuit on the first copper layer and the second copper layer;
blind hole electroconduction: conducting the hole wall of the blind hole with the graphic lines on the two sides of the core board;
electroplating and hole filling: carrying out local electroplating on the core board so as to fill electroplating copper in the blind holes;
and carrying out post-processing on the core board.
2. The method for fabricating a circuit board according to claim 1, wherein the fabricating the pattern lines comprises:
attaching a first dry film on the core board, and carrying out exposure and development to enable the first dry film to cover a preset area of a graphic circuit, a peripheral area of the hole opening of the blind hole and a peripheral area of the bottom of the blind hole;
etching the developed core board to form the pattern circuit on the first copper layer and the second copper layer, and respectively forming hole discs at the hole opening and the hole bottom of the blind hole;
and removing the first dry film.
3. The method of claim 2, wherein the plating fill hole comprises:
covering a second dry film on the core plate, and exposing and developing to enable the second dry film to cover the blind holes and the plate surface outside the hole plate;
electroplating and filling holes in the core plate, so that the blind holes are filled with electroplated copper;
and removing the second dry film.
4. The method for manufacturing a circuit board according to claim 3, wherein the thickness of the first dry film is less than or equal to 25um, and the thickness of the second dry film is greater than or equal to 25 um.
5. The method of claim 3, wherein the second dry film is applied to the core board using a vacuum laminator.
6. The method of manufacturing a circuit board according to claim 1, wherein the blind hole is electrically conductive, comprising:
depositing a third copper layer on the first copper layer, the second copper layer and the inner wall of the blind hole through a chemical copper deposition process, so that the blind hole becomes a metallized hole;
wherein, the thickness of the third copper layer is 0.8 um-1.0 um.
7. The method for manufacturing a circuit board according to claim 6, wherein after the hole filling by electroplating, the method for manufacturing a circuit board further comprises:
and rapidly etching the core plate to remove the third copper layer.
8. The method for manufacturing a circuit board according to claim 7, wherein the core board is rapidly etched by using a microetching solution containing sulfuric acid and hydrogen peroxide.
9. The method of manufacturing a circuit board according to any one of claims 1 to 8, wherein the post-processing comprises:
laminating a first semi-cured sheet and a first copper foil on two sides of the core plate respectively to form a first composite plate;
and drilling, manufacturing a pattern circuit, conducting a blind hole and filling the hole by electroplating are sequentially carried out on the first composite board.
10. A circuit board manufactured by the circuit board manufacturing method according to any one of claims 1 to 9.
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CN115551232A (en) * | 2022-11-30 | 2022-12-30 | 惠州市金百泽电路科技有限公司 | Circuit board processing method for improving electroplating hole filling cavity and circuit board |
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CN107949189A (en) * | 2017-11-29 | 2018-04-20 | 瑞声声学科技(苏州)有限公司 | The production method of four sandwich circuit boards |
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CN1794900A (en) * | 2004-12-24 | 2006-06-28 | 日本Cmk株式会社 | Printed circuit board and method of manufacturing the same |
CN1798485A (en) * | 2004-12-27 | 2006-07-05 | 日本Cmk株式会社 | Multilayer printed wiring board and method of manufacturing the same |
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