CN114172140A - Electrostatic protection circuit, circuit board assembly and liquid crystal display device - Google Patents
Electrostatic protection circuit, circuit board assembly and liquid crystal display device Download PDFInfo
- Publication number
- CN114172140A CN114172140A CN202111556515.6A CN202111556515A CN114172140A CN 114172140 A CN114172140 A CN 114172140A CN 202111556515 A CN202111556515 A CN 202111556515A CN 114172140 A CN114172140 A CN 114172140A
- Authority
- CN
- China
- Prior art keywords
- switch circuit
- circuit
- control signal
- turned
- electrically connected
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 27
- 239000003990 capacitor Substances 0.000 claims description 56
- 239000004065 semiconductor Substances 0.000 claims description 8
- 230000003068 static effect Effects 0.000 description 77
- 230000005611 electricity Effects 0.000 description 71
- 238000010586 diagram Methods 0.000 description 22
- 238000007599 discharging Methods 0.000 description 11
- 230000005540 biological transmission Effects 0.000 description 8
- 238000000034 method Methods 0.000 description 5
- 230000001934 delay Effects 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 3
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000004075 alteration Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
- H02H9/02—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess current
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Elimination Of Static Electricity (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
The application provides an electrostatic protection circuit, a circuit board assembly and a liquid crystal display device. The electrostatic protection circuit includes: one end of the delay circuit is electrically connected with the power supply port, and the other end of the delay circuit is grounded to generate a first control signal and a second control signal; the first switch circuit comprises a first end, a second end and a first control end, wherein the first end is electrically connected with the output port and the input port through a first resistor, the second end is grounded, and the first control end receives a first control signal and controls the on or off of the first switch circuit; the second switch circuit comprises a third end, a fourth end and a second control end, the third end is electrically connected with the input port, the fourth end is grounded, and the second control end receives a second control signal and controls the second switch circuit to be switched on or switched off; when the first switch circuit is turned off and the second switch circuit is turned on, the input port is grounded via the second switch circuit. The electrostatic protection circuit has a better electrostatic protection function.
Description
Technical Field
The application relates to the field of display panels, in particular to an electrostatic protection circuit, a circuit board assembly and a liquid crystal display device.
Background
With the progress of technology, electronic devices having liquid crystal display devices have become daily necessities for people's life. In the production process of the liquid crystal display device, the product quality is seriously damaged by static electricity generated by the environment and production personnel, and the quality of the liquid crystal display panel is poor.
Disclosure of Invention
In a first aspect, an embodiment of the present application provides an electrostatic protection circuit, where the electrostatic protection circuit includes a delay circuit, a first switch circuit and a second switch circuit, one end of the delay circuit is electrically connected to a power port, and the other end of the delay circuit is grounded and is used for generating a first control signal and a second control signal, the first switch circuit includes a first end, a second end and a first control end, the first end is electrically connected to an output port and is electrically connected to an input port through a first resistor, the second end is grounded, the first control end receives the first control signal, and the first switch circuit is turned on or off under the control of the first control signal, the second switch circuit includes a third end, a fourth end and a second control end, the third end is electrically connected to the input port, the fourth end is grounded, and the second control end receives the second control signal, and the second switch circuit is switched on or off under the control of the second control signal, and when the first switch circuit is switched off and the second switch circuit is switched on, the input port is grounded through the second switch circuit.
Wherein, when the first switch circuit is turned on and the second switch circuit is turned off, the input port is grounded via the first switch circuit.
The power supply port is used for loading a preset power supply signal, the delay circuit comprises a capacitor and a second resistor, one end of the capacitor is grounded, one end of the second resistor is electrically connected with the other end of the capacitor, the other end of the second resistor is electrically connected to the power supply port, the first control end is electrically connected to a node where the capacitor and the second resistor are connected so as to receive the first control signal, and the second control end is electrically connected to a node where the delay circuit is connected with the power supply port so as to receive the second control signal.
The first switch circuit is an N-type semiconductor transistor, the first control end is a grid electrode, the first end is a drain electrode, the second end is a source electrode, the preset power signal is used for charging the capacitor, when the charging time of the capacitor is shorter than a first preset time, the voltage value of the first control signal is smaller than the conduction voltage value of the first switch circuit, and the first switch circuit is turned off.
When the charging time of the capacitor is longer than or equal to a first preset time, the voltage value of the first control signal is larger than or equal to the conduction voltage value of the first switch circuit, and the first switch circuit is conducted.
The second switch circuit is a P-type semiconductor transistor, the second control end is a grid electrode, the third end is a drain electrode, the fourth end is a source electrode, the preset power signal is used for charging the capacitor, when the charging time of the capacitor is shorter than the second preset time, the voltage value of the second control signal is smaller than the turn-off voltage value of the second switch circuit, and the second switch circuit is switched on.
When the time length for charging the capacitor is greater than or equal to the second time length, the voltage value of the second control signal is greater than or equal to the turn-off voltage value of the second switch circuit, and the second switch circuit is turned off.
The second switch circuit further comprises a third resistor, one end of the third resistor is electrically connected with the fourth end, and the other end of the third resistor is grounded.
In a second aspect, an embodiment of the present application further provides a circuit board assembly, where the circuit board assembly includes a back-end motherboard and the above-mentioned electrostatic protection circuit, and the back-end motherboard is electrically connected to the output port.
In a third aspect, an embodiment of the present application further provides a liquid crystal display device, where the liquid crystal display device includes a front-end motherboard, a connector, and the above-mentioned circuit board assembly, and the front-end motherboard is electrically connected to the rear-end motherboard assembly through the connector.
The application provides an electrostatic protection circuit, which comprises a time delay circuit, a first switch circuit and a second switch circuit, the delay circuit is used for generating a first control signal to control the on or off of the first switch circuit and generating a second control signal to control the on or off of the second switch circuit, when the first switch circuit is turned off and the second switch circuit is turned on, the input port is grounded via the second switch circuit, when static electricity enters from the input port, the static electricity is conducted to the ground through the second switch circuit, static electricity discharge is prevented from flowing to the output port and static electricity discharge is prevented from flowing out to a circuit or a device electrically connected with the output port through the output port, thereby avoiding damage to the output port by electrostatic discharge and avoiding damage to a circuit or a device electrically connected to the output port by electrostatic discharge. Therefore, the electrostatic protection circuit has a good electrostatic protection function.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic diagram of an application environment of an esd protection circuit according to an embodiment of the present disclosure.
Fig. 2 is a schematic circuit structure diagram of an esd protection circuit according to an embodiment of the present disclosure.
Fig. 3 is a schematic diagram of a path of static electricity entering from the input port and flowing into the ground when the first switch circuit is turned off and the second switch circuit is turned on.
Fig. 4 is a schematic diagram of a path of static electricity entering from the output port and flowing into the ground when the first switch circuit is turned off and the second switch circuit is turned on.
Fig. 5 is a schematic diagram of a path of static electricity entering from the input port and flowing into the ground when the first switch circuit is turned on and the second switch circuit is turned off.
Fig. 6 is a schematic diagram of a path of static electricity entering from the output port and flowing into the ground when the first switch circuit is turned on and the second switch circuit is turned off.
Fig. 7 is a schematic diagram illustrating a path of static electricity entering from the input port and flowing to ground when a predetermined power signal is not applied.
Fig. 8 is a schematic diagram illustrating a path of static electricity entering from an output port and flowing to ground when a predetermined power signal is not applied.
Fig. 9 is a circuit block diagram of a circuit board assembly according to an embodiment of the present application.
Fig. 10 is a schematic structural diagram of a liquid crystal display device according to an embodiment of the present application.
Fig. 11 is a circuit block diagram of the liquid crystal display device in fig. 10.
Reference numerals: a liquid crystal display device 1; a circuit board assembly 10, a front end main board 20; a connector 30; a liquid crystal display panel 40; an electrostatic discharge protection circuit 100; a rear end main board 200; a delay circuit 110; a power port 120; a first switching circuit 130; an output port 140; an input port 150; a second switching circuit 160; a first end 131; a second end 132; a first control terminal 133; a first resistor R1; a third end 161; a fourth end 162; a second control terminal 163; a capacitor C; a second resistor R2; a third resistor R3; a power management chip 210; a timing controller 220.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without inventive step, are within the scope of the present disclosure.
The terms "first," "second," and the like in the description and claims of the present application and in the above-described drawings are used for distinguishing between different objects and not for describing a particular order. Furthermore, the terms "include" and "have," as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus.
Reference herein to "an embodiment" or "an implementation" means that a particular feature, structure, or characteristic described in connection with the embodiment or implementation can be included in at least one embodiment of the application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is explicitly and implicitly understood by one skilled in the art that the embodiments described herein can be combined with other embodiments.
The present application provides an electrostatic discharge protection circuit 100. Referring to fig. 1, fig. 1 is a schematic view illustrating an application environment of an electrostatic protection circuit according to an embodiment of the present disclosure. The esd protection circuit 100 is used to connect the front motherboard 20 and the rear motherboard 200. For example, the front-end motherboard 20 may be, but is not limited to, a Signal Operation Controller (SOC), and the back-end motherboard 200 may be, but is not limited to, a screen motherboard. The esd protection circuit 100 is a circuit for preventing esd. In general, the esd protection circuit 100 is used to prevent esd from damaging the back-end motherboard 200. For example, the esd protection circuit 100 grounds the connection between itself and the front motherboard 20, so that the static electricity generated by the outside world on the front motherboard 20 and the connection between the esd protection circuit 100 and the front motherboard 20 is grounded, thereby preventing the electrostatic discharge from damaging the rear motherboard 200. It is to be understood that the schematic diagram of the application environment of the esd protection circuit 100 is only for facilitating understanding of the application of the esd protection circuit 100, and should not be construed as limiting the esd protection circuit 100 provided in this application.
Referring to fig. 2, fig. 2 is a schematic circuit structure diagram of an electrostatic protection circuit according to an embodiment of the present disclosure. The esd protection circuit 100 includes a delay circuit 110, a first switch circuit 130 and a second switch circuit 160. One end of the delay circuit 110 is electrically connected to the power port 120, and the other end is grounded for generating a first control signal and a second control signal. The first switch circuit 130 includes a first terminal 131, a second terminal 132 and a first control terminal 133, the first terminal 131 is electrically connected to the output port 140 and the input port 150 through a first resistor R1, the second terminal 132 is grounded, the first control terminal 133 receives a first control signal, and the first switch circuit 130 is turned on or off under the control of the first control signal. The second switch circuit 160 includes a third terminal 161, a fourth terminal 162 and a second control terminal 163, the third terminal 161 is electrically connected to the input port 150, the fourth terminal 162 is grounded, the second control terminal 163 receives a second control signal, and the second switch circuit 160 is turned on or off under the control of the second control signal. When the first switch circuit 130 is turned off and the second switch circuit 160 is turned on, the input port 150 is grounded via the second switch circuit 160.
In this embodiment, the delay circuit 110 receives a power signal through the power port 120, and the delay circuit 110 converts the power signal into the first control signal and the second control signal. The first control signal controls the first terminal 131 and the second terminal 132 to be turned on or off through the first control terminal 133. The second control signal controls the third terminal 161 and the fourth terminal 162 to be turned on or off through the second control terminal 163.
In this embodiment, the delay circuit 110 is configured to generate a first control signal for controlling the first switch circuit 130 to be turned on or off, and a second control signal for controlling the second switch circuit 160 to be turned on or off. The turning on or off of the first switch circuit 130 refers to the turning on or off of the first terminal 131 and the second terminal 132. Specifically, when the first switch circuit 130 is turned on, the transmission path between the first terminal 131 and the second terminal 132 is turned on; when the first switch circuit 130 is turned off, a transmission path between the first terminal 131 and the second terminal 132 is disconnected. When the first switch circuit 130 is turned on, the transmission path between the first terminal 131 and the second terminal 132 is turned on, and the input port 150 and the output port 140 are grounded through the first switch circuit 130. When the first switch circuit 130 is turned off, the input port 150 and the output port 140 are disconnected from the ground at the first switch circuit 130 due to the disconnection of the transmission path between the first terminal 131 and the second terminal 132. The on or off of the second switch circuit 160 refers to the on or off of the third terminal 161 and the fourth terminal 162. Specifically, when the second switch circuit 160 is turned on, the transmission path between the third terminal 161 and the fourth terminal 162 is turned on; when the second switch circuit 160 is turned off, the transmission path between the third terminal 161 and the fourth terminal 162 is turned off. When the second switch circuit 160 is turned on, the input port 150 and the output port 140 are grounded through the second switch circuit 160 because a transmission path between the third terminal 161 and the fourth terminal 162 is turned on. When the second switch circuit 160 is turned off, the transmission path between the third terminal 161 and the fourth terminal 162 is turned off, and the input port 150 and the output port 140 are disconnected from the ground at the second switch circuit 160.
In this embodiment, one end of the first resistor R1 is electrically connected to the input port 150, and the other end is electrically connected to the output port 140, and the first resistor R1 is used to prevent the voltage value between the input port 150 and the output port 140 from being too large.
Referring to fig. 3 and 4, fig. 3 is a schematic diagram illustrating a path of static electricity entering from the input port and flowing into the ground when the first switch circuit is turned off and the second switch circuit is turned on; fig. 4 is a schematic diagram of a path of static electricity entering from the output port and flowing into the ground when the first switch circuit is turned off and the second switch circuit is turned on. In this embodiment, the first switch circuit 130 is turned off and the second switch circuit 160 is turned on, the input port 150 is grounded via the second switch circuit 160, when static electricity enters from the input port 150, the static electricity can be conducted to the ground via the second switch circuit 160, so as to prevent the static electricity from being discharged to the output port 140, and prevent the static electricity from being discharged to a circuit or a device electrically connected to the output port 140 through the output port 140, so as to prevent the static electricity from damaging the output port 140 and prevent the static electricity from being discharged to the circuit or the device electrically connected to the output port 140. In addition, the output port 140 is grounded via the first resistor R1, the input port 150 and the second switch circuit 160, when static electricity enters from the output port 140, the static electricity can be conducted to the ground via the second resistor R2, the input port 150 and the second circuit 160, so as to prevent static discharge from flowing out from the output port 140 to a circuit or a device electrically connected to the output port 140, thereby preventing damage to the output port 140 caused by static discharge and damage to the circuit or the device electrically connected to the output port 140 caused by static discharge.
In summary, the esd protection circuit 100 provided in the present application includes a delay circuit 110, a first switch circuit 130 and a second switch circuit 160, the delay circuit 110 is used for generating a first control signal to control the first switch circuit 130 to be turned on or off, and generating a second control signal to control the second switch circuit 160 to be turned on or off, when the first switch circuit 130 is turned off and the second switch circuit 160 is turned on, the input port 150 is grounded via the second switch circuit 160, when static electricity enters from the input port 150, the static electricity is conducted to the ground through the second switch circuit 160, preventing the static electricity from discharging to the output port 140 and preventing the static electricity from discharging to a circuit or a device electrically connected to the output port 140 through the output port 140, thereby preventing damage to the output port 140 due to electrostatic discharge and preventing damage to a circuit or a device electrically connected to the output port 140 due to electrostatic discharge. Therefore, the electrostatic protection circuit 100 of the present application has a better electrostatic protection function.
Please refer to fig. 2 again. When the first switch circuit 130 is turned on and the second switch circuit 160 is turned off, the input port 150 is grounded via the first switch circuit 130.
Referring to fig. 5 and 6, fig. 5 is a schematic diagram illustrating a path of static electricity entering from the input port and flowing into the ground when the first switch circuit is turned on and the second switch circuit is turned off; fig. 6 is a schematic diagram of a path of static electricity entering from the output port and flowing into the ground when the first switch circuit is turned on and the second switch circuit is turned off. In this embodiment, the first control signal controls the first switch circuit 130 to be turned on, and the second control signal controls the second switch circuit 160 to be turned off. The input port 150 is grounded via the first switch circuit 130, when static electricity enters from the input port 150, the static electricity can be conducted to the ground via the first switch circuit 130, so as to prevent the static electricity from discharging to the output port 140, and prevent the static electricity from discharging to a circuit or a device electrically connected to the output port 140 through the output port 140, so as to prevent the static electricity from damaging the output port 140 and prevent the static electricity from discharging to the circuit or the device electrically connected to the output port 140. In addition, the output port 140 is grounded via the first switch circuit 130, when static electricity enters from the output port 140, the static electricity can be conducted to the ground via the first switch circuit 130, so that static electricity discharge is prevented from flowing out from the output port 140 to a circuit or a device electrically connected to the output port 140, damage to the output port 140 by static electricity discharge is avoided, and damage to the circuit or the device electrically connected to the output port 140 by static electricity discharge can be avoided. In addition, when static electricity enters between the input port 150 and the output port 140, the static electricity may be conducted to the ground through the first switch circuit 130, so as to prevent the static electricity from being discharged to the output port 140, and prevent the static electricity from being discharged to a circuit or a device electrically connected to the output port 140 through the output port 140, so as to prevent damage to the output port 140 caused by the static electricity and damage to the circuit or the device electrically connected to the output port 140 caused by the static electricity.
Please refer to fig. 2 again. The power port 120 is used for loading a preset power signal, and the delay circuit 110 includes a capacitor C and a second resistor R2. One end of the capacitor C is grounded. One end of the second resistor R2 is electrically connected to the other end of the capacitor C, and the other end of the second resistor R2 is electrically connected to the power port 120. The first control terminal 133 is electrically connected to a node where the capacitor C and the second resistor R2 are connected to receive the first control signal. The second control terminal 163 is electrically connected to the node of the delay circuit 110 connected to the power port 120 to receive the second control signal S2.
In this embodiment, the delay circuit 110 includes a capacitor C and a second resistor R2, the capacitor C is configured to receive the preset power signal, the preset power signal charges the capacitor C to generate the first control signal and the second control signal, the first control signal is electrically connected to the first control terminal 133, and the second control signal is electrically connected to the second control terminal 163. The second resistor R2 is used for dividing voltage to prevent the capacitor C from being damaged by the over-strong preset power signal, and the divided voltage of the second resistor R2 also protects the first switch circuit 130 and the second switch circuit 160.
In this embodiment, the predetermined power signal may be, but is not limited to, 12V, 5V, or 3.3V. The capacitance value range of the capacitor C is as follows: 100nF and C are 900 nF. The resistance value range of the second resistor R2 is that R2 is not less than 100k omega but not more than 900k omega.
In this embodiment, since the charging and discharging process of the capacitor C requires time, the delay circuit 110 delays the rising time of the signal strength of the first control signal and the second control signal. The on/off of the first switch circuit 130 is related to the voltage value of the first control signal and the voltage value of the first switch circuit 130 that is turned on or off, and the on/off of the second switch circuit 160 is related to the voltage value of the second control signal and the voltage value of the second switch circuit 160 that is turned on or off. Therefore, the delay circuit 110 delays the turning on and off of the first switch circuit 130 and the second switch circuit 160.
Please refer to fig. 2 again. The first switch circuit 130 is an N-type Semiconductor transistor (NMOS), the first control end 133 is a gate, the first end 131 is a drain, and the second end 132 is a source. The preset power signal is used for charging the capacitor C, and when the charging duration of the capacitor C is less than a first preset duration, the voltage value of the first control signal is less than the turn-on voltage value of the first switch circuit 130, and the first switch circuit 130 is turned off.
The first preset time period is a time period when the voltage value of the first control signal rises from 0V to a voltage value equal to the turn-on voltage value of the first switch circuit 130.
In this embodiment, the first switch circuit 130 is an N-type semiconductor transistor, and the NMOS is characterized by being turned off when the voltage value of the first control signal is smaller than the turn-on voltage value of the first switch circuit 130, and being turned on when the voltage value of the first control signal is larger than the turn-on voltage value of the first switch circuit 130. When the voltage value at the first control terminal 133 (gate) is smaller than the turn-on voltage value of the first switch circuit 130, the first terminal 131 (drain) and the second terminal 132 (source) are turned off. Therefore, when the duration of the preset power signal charging the capacitor C is less than the first preset duration, the voltage value of the first control signal is less than the turn-on voltage value of the first switch circuit 130, that is, the voltage value of the first control signal cannot control the first control terminal 133 to turn on the first terminal 131 and the second terminal 132, so that the first switch circuit 130 is turned off.
When the duration of charging the capacitor C by the preset power signal is greater than or equal to a first preset duration, the voltage value of the first control signal is greater than or equal to the turn-on voltage value of the first switch circuit 130, and the first switch circuit 130 is turned on.
When the voltage value at the first control terminal 133 is greater than or equal to the turn-on voltage value of the first switch circuit 130, the first terminal 131 is turned on with the second terminal 132. Therefore, when the duration of the preset power signal charging the capacitor C is greater than or equal to the first preset duration, the voltage value of the first control signal is greater than or equal to the turn-on voltage value of the first switch circuit 130, that is, the voltage value of the first control signal can control the first control terminal 133 to turn on the first terminal 131 and the second terminal 132, so that the first switch circuit 130 is turned on.
In summary, when the capacitor C is charged by a predetermined power signal loaded by the power port 120, and when the duration of charging the capacitor C is less than a first predetermined duration, the voltage value of the capacitor C is less than the on-state voltage value of the first switch circuit 130, so that the first switch circuit 130 is in an off state; when the duration of charging the capacitor C by the preset power signal is greater than or equal to the first preset duration, and the voltage value of the capacitor C is greater than or equal to the turn-on voltage value of the first switch circuit 130, the first switch circuit 130 is turned on. As can be seen, the capacitor C in the delay circuit 110 is charged, so as to control the first switch circuit 130 to be turned on or off.
Please refer to fig. 2 again. The second switch circuit 160 is a P-type Semiconductor transistor (PMOS), the second control terminal 163 is a gate, the third terminal 161 is a drain, and the fourth terminal 162 is a source. The preset power signal is used for charging the capacitor C, and when the charging duration of the capacitor C is shorter than a second preset duration, the voltage value of the second control signal is smaller than the turn-off voltage value of the second switch circuit 160, and the second switch circuit 160 is turned on.
In this embodiment, the second switch circuit 160 is a P-type semiconductor transistor, and the PMOS is characterized by being turned on when the voltage value of the second control signal is smaller than the turn-off voltage value of the second switch circuit 160, turned off when the voltage value of the second control signal is larger than the turn-off voltage value of the second switch circuit 160, and turned on when the voltage value at the second control terminal 163 (gate) is smaller than the turn-off voltage value of the second switch circuit 160, and turned on between the third terminal 161 (drain) and the fourth terminal 162 (source). Therefore, when the duration of the preset power signal charging the capacitor C is less than the second preset duration, the voltage value of the second control signal is less than the turn-off voltage value of the second switch circuit 160, that is, the voltage value of the second control signal cannot control the second control terminal 163 to turn on the third terminal 161 and the fourth terminal 162, so that the second switch circuit 160 is turned off.
When the duration of charging the capacitor C by the preset power signal is greater than or equal to the second duration, the voltage value of the second control signal is greater than or equal to the turn-off voltage value of the second switch circuit 160, and the second switch circuit 160 is turned off.
When the voltage value at the second control terminal 163 is greater than or equal to the turn-off voltage value of the second switch, the third terminal 161 and the fourth terminal 162 are turned off. Therefore, when the duration of the preset power signal charging the capacitor C is greater than or equal to the second preset duration, the voltage value of the second control signal is greater than or equal to the turn-off voltage value of the second switch circuit 160, that is, the voltage value of the second control signal can control the second control terminal 163 to turn off the third terminal 161 and the fourth terminal 162, so that the second switch circuit 160 is turned off.
In summary, when the capacitor C is charged by a predetermined power signal loaded by the power port 120, and when the duration of charging the capacitor C is shorter than a second predetermined duration, the voltage value of the capacitor C is smaller than the turn-off voltage value of the second switch circuit 160, so that the second switch circuit 160 is turned on; when the time period for charging the capacitor C by the preset power signal is greater than or equal to a second preset time period, the voltage value of the capacitor C is greater than or equal to the turn-off voltage value of the second switch circuit 160, and therefore, the second switch circuit 160 is turned off. As can be seen, the capacitor C in the delay circuit 110 is charged, so as to control the second switch circuit 160 to be turned on or off.
Please refer to fig. 2 again. The second switch circuit 160 further includes a third resistor R3, one end of the third resistor R3 is electrically connected to the fourth terminal 162, and the other end is grounded.
In this embodiment, the third resistor R3 is used for voltage division, so that the voltage value in the second switch circuit 160 can be prevented from being too large.
Next, referring to fig. 2, the electrostatic discharge protection circuit 100 will be described with reference to the first control signal controlling the first switch circuit 130 and the second control signal S2 controlling the second switch circuit 160.
Referring to fig. 7 and 8, fig. 7 is a schematic diagram illustrating a path of static electricity entering from an input port and flowing into the ground when a predetermined power signal is not applied; fig. 8 is a schematic diagram illustrating a path of static electricity entering from an output port and flowing to ground when a predetermined power signal is not applied. In the first state, the power port 120 is not loaded with the predetermined power signal. The voltage values of the first switch circuit 130 and the second switch circuit 160 are both 0V, so the first switch circuit 130 is turned off and the second switch circuit 160 is turned on. At this time, the input port 150 is grounded via the second switch circuit 160, and the output port 140 is grounded via the input port 150 and the second switch circuit 160. Therefore, in the first state, the esd protection circuit 100 can ground the static electricity generated at the input port 150 and the output port 140 from the outside, and prevent the static electricity from discharging to the output port 140 and flowing out from the output port 140.
In a second state (see fig. 3 and 4), the power port 120 loads the preset power signal, a time period for the preset power signal to charge the capacitor C is shorter than a first preset time period, and a time period for the preset to charge the capacitor C is shorter than a second preset time period. The voltage value of the first control signal is smaller than the turn-on voltage value of the first switch circuit 130, and the voltage value of the second control signal is smaller than the turn-off voltage value of the second switch circuit 160, so that the first switch circuit 130 is turned off and the second switch circuit 160 is turned on. At this time, the input port 150 is grounded via the second switch circuit 160, and the output port 140 is grounded via the input port 150 and the second switch circuit 160. Therefore, in the second state, the esd protection circuit 100 can ground the static electricity generated at the input port 150 and the output port 140 from the outside, and prevent the static electricity from discharging to the output port 140 and flowing out from the output port 140.
It should be noted that, in an embodiment, the first preset time period is less than or equal to the second preset time period, that is, after the first switch circuit 130 is turned on, the second switch circuit 160 is turned off. In another embodiment, the first predetermined time period is longer than the second predetermined time period, that is, the first switch circuit 130 is turned on after the second switch circuit 160 is turned off. In this application, the first preset time period is less than or equal to the second preset time period for an exemplary description.
In a third state (see fig. 5 and 6), the power port 120 loads the preset power signal, and the time period for charging the capacitor C by the preset power signal is greater than or equal to a second preset time period. The voltage value of the first control signal is greater than or equal to the turn-on voltage value of the first switch circuit 130, and the voltage value of the second control signal is greater than or equal to the turn-off voltage value of the second switch circuit 160, so that the first switch circuit 130 is turned off and the second switch circuit 160 is turned on. At this time, the input port 150 and the output port 140 are disconnected from the ground at the first switch circuit 130, and the input signal applied to the input port 150 can be output through the output port 140.
To sum up, the esd protection circuit 100 delays the turn-off of the first switch circuit 130 and the turn-on of the second switch circuit 160, before the input port 150 and the output port 140 are in signal communication, the input port 150 is grounded via the second switch circuit 160, when static electricity enters from the input port 150, the static electricity can be conducted to the ground via the second switch circuit 160, so as to prevent the static electricity from discharging to the output port 140, and prevent the static electricity from flowing out to a circuit or a device electrically connected to the output port 140 through the output port 140, so as to prevent the damage of the output port 140 caused by the static electricity and the damage of the circuit or the device electrically connected to the output port 140 caused by the static electricity from discharging. In addition, the output port 140 is grounded via the first resistor R1, the input port 150 and the second switch circuit 160, when static electricity enters from the output port 140, the static electricity can be conducted to the ground via the second resistor R2, the input port 150 and the second circuit 160, so as to prevent static discharge from flowing out from the output port 140 to a circuit or a device electrically connected to the output port 140, thereby preventing damage to the output port 140 caused by static discharge and damage to the circuit or the device electrically connected to the output port 140 caused by static discharge.
Referring to fig. 2 and 9 together, fig. 9 is a circuit block diagram of a circuit board assembly according to an embodiment of the present application. The present application further provides a circuit board assembly 10. The circuit board assembly 10 includes a rear motherboard 200 and the esd protection circuit 100, wherein the rear motherboard 200 is electrically connected to the output port 140.
In this embodiment, in the esd protection circuit 100, in the first state and the second state, the first switch circuit 130 is turned off, the second switch circuit 160 is turned on, and the input port 150 is grounded via the second switch circuit 160, so that static electricity generated at the input port 150 from the outside can be grounded, thereby preventing static electricity from being discharged to the output port 140 and flowing out from the output port 140 to the back-end motherboard 200, and protecting the back-end motherboard 200. The output port 140 is grounded via the input port 150 and the second switch circuit 160, so that static electricity generated on the rear motherboard 200 from the outside can be grounded, and the rear motherboard 200 can be protected. Before the esd protection circuit 100 enters the third state, the external generated static electricity is grounded, that is, before the input signal is loaded to the input port 150 of the esd protection circuit 100 and communicated with the rear-end motherboard 200 to operate, the external generated static electricity is grounded, so that the rear-end motherboard 200 is protected from safe operation.
Referring to fig. 2, 9, 10 and 11 together, fig. 10 is a schematic structural diagram of a liquid crystal display device according to an embodiment of the present application; fig. 11 is a circuit block diagram of the liquid crystal display device in fig. 10. The present application also provides a liquid crystal display device 1. The liquid crystal display device 1 includes a front motherboard 20, a connector 30, and the circuit board assembly 10 as described above, wherein the front motherboard 20 is electrically connected to the circuit board assembly 10 through the connector 30.
In this embodiment, the front board 20 is connected to the power port 120 and the input port 150 through a connector 30, and the front board 20 provides a predetermined power signal to be loaded to the power port 120 and an input signal to be loaded to the input port 150, and outputs the predetermined power signal to the rear board 200 through the esd protection circuit 100.
According to the difference of the liquid crystal display device 1, the voltage value of the preset power signal is also different, in an embodiment, the liquid crystal display device 1 is a television, and the voltage value of the preset power signal is 12V. In another embodiment, the lcd device 1 is a computer display, and the voltage value of the predetermined power signal is 5V. In another embodiment, the lcd device 1 is a notebook computer, and the voltage value of the predetermined power signal is 3.3V. In other embodiments, the liquid crystal display device 1 may also be a liquid crystal display device with other operating voltages.
In this embodiment, the liquid crystal display device 1 further includes a liquid crystal display 40, and the liquid crystal display 40 is electrically connected to the rear motherboard 200. The back-end motherboard 200 includes a power management chip 210 and a timing controller 220. The power management chip 210 receives a predetermined power signal and converts the predetermined power signal into a first voltage, which is used to power other devices (e.g., the timing controller 220). The timing controller 220 is electrically connected to the power management chip 210, and converts the first voltage into a second voltage required by the lcd panel 40, and in addition, the timing controller 220 receives the input signal through the output port 140 and converts the input signal into a timing signal and a data signal.
In this embodiment, during the assembly and testing of the liquid crystal display device 1, an assembly or tester may touch the input port 150, thereby bringing static electricity into the input port 150. When the front motherboard 20 is electrically connected to the rear motherboard 200, if external static electricity is discharged to the rear motherboard 200, the rear motherboard 200 may be damaged, which seriously affects the product quality of the liquid crystal display device 1, and if the static electricity protection circuit 100 is not used to electrically connect the front motherboard 20 and the rear motherboard 200, such static electricity discharge damage is difficult to avoid. When the front-end motherboard 20 is connected to the circuit board assembly 10 through the connector 30, the esd protection circuit 100 delays the on state of the first switch circuit 130 and the off state of the second switch circuit 160, keeps the first switch circuit 130 off and the second switch circuit 160 on, and grounds the static electricity generated by the assembly or tester contacting the input port 150 through the second switch circuit 160, thereby preventing the static electricity from discharging to the output port 140 and flowing from the output port 140 to the rear-end motherboard 200. The esd protection circuit 100 controls the first switch circuit 130 to be turned on and the second switch circuit 160 to be turned off after external static electricity is grounded, so that the front-end motherboard 20 and the rear-end motherboard 200 can be electrically connected safely and transmit voltage signals and data signals. Therefore, the esd protection circuit 100 can eliminate esd damage during the assembly and testing of the lcd device 1, thereby ensuring the production quality of the lcd device 1.
Although embodiments of the present application have been shown and described, it is understood that the above embodiments are illustrative and not restrictive, and that those skilled in the art may make changes, modifications, substitutions and alterations to the above embodiments without departing from the scope of the present application, and that such changes and modifications are also to be considered as within the scope of the present application.
Claims (10)
1. An electrostatic discharge protection circuit, comprising:
one end of the delay circuit is electrically connected with the power supply port, and the other end of the delay circuit is grounded and is used for generating a first control signal and a second control signal;
the first switch circuit comprises a first end, a second end and a first control end, wherein the first end is electrically connected with the output port and the input port through a first resistor, the second end is grounded, the first control end receives a first control signal, and the first switch circuit is switched on or switched off under the control of the first control signal;
the second switch circuit comprises a third end, a fourth end and a second control end, the third end is electrically connected with the input port, the fourth end is grounded, the second control end receives a second control signal, and the second switch circuit is switched on or switched off under the control of the second control signal;
when the first switch circuit is turned off and the second switch circuit is turned on, the input port is grounded via the second switch circuit.
2. The ESD circuit of claim 1, wherein the input port is coupled to ground via the first switch circuit when the first switch circuit is on and the second switch circuit is off.
3. The esd protection circuit of claim 1, wherein the power port is configured to receive a predetermined power signal, and the delay circuit comprises:
the capacitor, one end of the said capacitor is grounded; and
one end of the second resistor is electrically connected with the other end of the capacitor, and the other end of the second resistor is electrically connected to the power supply port;
the first control end is electrically connected to a node where the capacitor and the second resistor are connected to receive the first control signal;
the second control end is electrically connected to a node where the delay circuit is connected with the power port to receive the second control signal.
4. The ESD circuit of claim 3, wherein the first switch circuit is an N-type semiconductor transistor, the first control terminal is a gate, the first terminal is a drain, and the second terminal is a source;
the preset power supply signal is used for charging the capacitor, when the charging time of the capacitor is shorter than a first preset time, the voltage value of the first control signal is smaller than the conducting voltage value of the first switch circuit, and the first switch circuit is turned off.
5. The ESD circuit of claim 4, wherein when the charging time of the capacitor is greater than or equal to a first predetermined time, the voltage of the first control signal is greater than or equal to the turn-on voltage of the first switch circuit, and the first switch circuit is turned on.
6. The ESD circuit of claim 3, wherein the second switch circuit is a P-type semiconductor transistor, the second control terminal is a gate, the third terminal is a drain, and the fourth terminal is a source;
the preset power supply signal is used for charging the capacitor, when the charging time of the capacitor is shorter than a second preset time, the voltage value of the second control signal is smaller than the turn-off voltage value of the second switch circuit, and the second switch circuit is switched on.
7. The ESD protection circuit of claim 6, wherein when the capacitor is charged for a period of time greater than or equal to the second period of time, the second control signal has a voltage value greater than or equal to an OFF voltage value of the second switch circuit, and the second switch circuit is turned OFF.
8. The esd protection circuit of claim 1, wherein the second switch circuit further comprises a third resistor, one end of the third resistor being electrically connected to the fourth terminal and the other end of the third resistor being grounded.
9. A circuit board assembly, comprising a back-end motherboard electrically connected to the output port, and the esd protection circuit of any one of claims 1-8.
10. A liquid crystal display device comprising a front-end main board, a connector, and the circuit board assembly according to claim 9, wherein the front-end main board is electrically connected to the circuit board assembly through the connector.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111556515.6A CN114172140B (en) | 2021-12-17 | 2021-12-17 | Electrostatic protection circuit, circuit board assembly and liquid crystal display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111556515.6A CN114172140B (en) | 2021-12-17 | 2021-12-17 | Electrostatic protection circuit, circuit board assembly and liquid crystal display device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN114172140A true CN114172140A (en) | 2022-03-11 |
| CN114172140B CN114172140B (en) | 2024-06-18 |
Family
ID=80487356
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202111556515.6A Active CN114172140B (en) | 2021-12-17 | 2021-12-17 | Electrostatic protection circuit, circuit board assembly and liquid crystal display device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN114172140B (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW200719007A (en) * | 2005-11-11 | 2007-05-16 | Innolux Display Corp | A liquid crystal display panel |
| CN101101733A (en) * | 2006-07-07 | 2008-01-09 | 乐金电子（昆山）电脑有限公司 | Portable terminal LCD drive electric power unit |
| US20210135451A1 (en) * | 2019-11-01 | 2021-05-06 | Richwave Technology Corp. | Integrated Circuit with Electrostatic Discharge Protection |
-
2021
- 2021-12-17 CN CN202111556515.6A patent/CN114172140B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW200719007A (en) * | 2005-11-11 | 2007-05-16 | Innolux Display Corp | A liquid crystal display panel |
| CN101101733A (en) * | 2006-07-07 | 2008-01-09 | 乐金电子（昆山）电脑有限公司 | Portable terminal LCD drive electric power unit |
| US20210135451A1 (en) * | 2019-11-01 | 2021-05-06 | Richwave Technology Corp. | Integrated Circuit with Electrostatic Discharge Protection |
Also Published As
| Publication number | Publication date |
|---|---|
| CN114172140B (en) | 2024-06-18 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN112088476B (en) | USB TYPE-C/PD controller with integrated VBUS to CC short circuit protection | |
| US7451328B2 (en) | Display device with USB connectivity | |
| EP2698969B1 (en) | Electronic device having usb interface and usb communication start method thereof | |
| CN111525630B (en) | Charging control device and charging control method | |
| CN107316598B (en) | Hot-plug short circuit control device and method | |
| US7634674B2 (en) | Power regulator circuit of a motherboard | |
| CN112886664B (en) | Electronic equipment | |
| CN118054655A (en) | Power supply circuit, control method thereof and electronic equipment | |
| CN112133238B (en) | Drive circuit and electronic device | |
| CN111149298A (en) | Protection circuit for decoupling low-voltage circuitry from high-voltage circuitry | |
| US20130055002A1 (en) | Interface connection control | |
| CN113809812A (en) | Double-battery circuit, control method thereof and electronic equipment | |
| CN114172140B (en) | Electrostatic protection circuit, circuit board assembly and liquid crystal display device | |
| CN117134440B (en) | Battery protection circuit, battery protection board and electronic equipment | |
| CN109036302B (en) | Liquid crystal display device with a light guide plate | |
| US20220109318A1 (en) | Charging circuit, charging chip, mobile terminal, and charging system | |
| EP3739709B1 (en) | Over current and electrostatic discharge protection system having high operational endurance | |
| CN212784771U (en) | Power protection circuit and electronic equipment | |
| CN112018839B (en) | Load detection circuit | |
| US20130003428A1 (en) | Power supply system and electrical device with same | |
| CN111384847B (en) | Power-on protection circuit of direct-current power supply, method for driving load circuit and electronic equipment | |
| CN112017579B (en) | Display device and driving system thereof | |
| CN117392951B (en) | Power supply detection circuit, silicon-based display panel and display device | |
| US7608941B2 (en) | Adaptor circuit for power supply | |
| CN105630722A (en) | Electronic device and signal processing method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |