CN114171656B - Receiving substrate and manufacturing method thereof - Google Patents
Receiving substrate and manufacturing method thereof Download PDFInfo
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- CN114171656B CN114171656B CN202010955293.4A CN202010955293A CN114171656B CN 114171656 B CN114171656 B CN 114171656B CN 202010955293 A CN202010955293 A CN 202010955293A CN 114171656 B CN114171656 B CN 114171656B
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- 239000000758 substrate Substances 0.000 title claims abstract description 111
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 10
- 229910000679 solder Inorganic materials 0.000 claims abstract description 304
- 238000001704 evaporation Methods 0.000 claims description 31
- 239000011241 protective layer Substances 0.000 claims description 25
- 230000008020 evaporation Effects 0.000 claims description 17
- 238000000034 method Methods 0.000 abstract description 12
- 229910052594 sapphire Inorganic materials 0.000 description 30
- 239000010980 sapphire Substances 0.000 description 30
- 238000010586 diagram Methods 0.000 description 7
- 238000001125 extrusion Methods 0.000 description 6
- 230000000295 complement effect Effects 0.000 description 4
- 238000001259 photo etching Methods 0.000 description 4
- 239000003086 colorant Substances 0.000 description 2
- 239000011810 insulating material Substances 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
- H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
- H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
- H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
- H01L2933/0066—Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Led Device Packages (AREA)
Abstract
The application provides a receiving substrate, a manufacturing method thereof and a micro light emitting diode array, wherein the receiving substrate comprises a substrate; the solder group is positioned on the substrate base plate and is arranged in the same way as the micro light emitting diode; wherein at least a portion of the volume of the solder set is less than the volume of the remaining portion of the solder set; or at least a portion of the solder set has a shape different from the shape of the remaining portion of the solder set. Therefore, the problem of short circuit caused by the fact that positive and negative solder groups in the solder groups at specified positions are pressed and contacted in the transfer process is avoided, and the product yield is improved.
Description
Technical Field
The invention relates to the technical field of display, in particular to a receiving substrate and a manufacturing method thereof.
Background
Since Micro light emitting diodes (Micro LEDs) have advantages of self light emission, simple structure, small volume, energy saving, etc., the Micro light emitting diode display technology will become a revolutionary technology for the next generation. Specifically, in order to realize full-color Micro LED display, micro LEDs need to be transferred, micro LED chips of R, G, B three colors are picked up correspondingly in batches by a transfer head, and Micro LEDs of R, G, B three colors picked up in batches are transferred to corresponding areas of a substrate respectively for welding. In the transfer process, micro LED chips on the sapphire are heated to warp, so that the phenomenon that the electrode solder at the corners of the array is extruded to generate positive and negative short circuits is easily caused, and yield loss is caused.
Disclosure of Invention
The invention mainly provides a receiving substrate and a manufacturing method thereof, which are used for avoiding the problem of short circuit in the transfer process of micro light emitting diodes and improving the product yield.
In order to solve the technical problems, the first technical scheme provided by the invention is as follows: there is provided a receiving substrate including at least one receiving area, the receiving area being an area for receiving a single transferred chip, and further including a plurality of solder sets, a volume of the solder sets at an edge position of the receiving area being smaller than a volume of the solder sets at remaining positions of the receiving area.
The receiving area is rectangular, and the volume of the solder group at four corner positions of the receiving area is smaller than the volume of the solder group at the rest positions of the receiving area.
And if the single-transfer chip is in a row or a column, the volume of the solder groups positioned at the two ends of the receiving area is smaller than the volume of the rest positions.
Wherein the cross-sectional area of the solder set at the edge of the substrate base plate is smaller than the cross-sectional area of the rest of the solder set.
Wherein the height of the solder set at the edge position of the receiving area is smaller than the height of the solder set at the rest position of the receiving area.
Wherein the cross-sectional area of the solder set at the edge position of the receiving substrate is smaller than the cross-sectional area of the solder set at the rest position of the receiving area.
The solder set comprises a first solder column and a second solder column; the spacing distance between the first solder column and the second solder column in the same solder set at the edge position of the receiving area is larger than the spacing distance between the first solder column and the second solder column in the same solder set at the rest position of the receiving area.
The solder set comprises a first solder column and a second solder column; at least one of the opposite faces of the first and second solder columns in the same solder set at the edge position of the receiving area is concave.
Wherein one of opposite faces of a first solder column and a second solder column in the same solder set at an edge position of the receiving area is convex.
In order to solve the technical problems, a second technical scheme provided by the invention is as follows: provided is a method for manufacturing a receiving substrate, comprising: providing a substrate base plate, wherein the substrate base plate comprises at least one receiving area; forming a plurality of solder sets on the receiving area; wherein the volume of the solder set at the edge position of the receiving area is smaller than the volume of the solder set at the rest position of the receiving area.
Wherein the forming a plurality of solder sets on the receiving area comprises: arranging a protective layer on one surface of the receiving area, wherein the protective layer exposes the position where the solder group needs to be arranged; wherein the area exposed at the edge position of the receiving area is smaller than the area exposed at the rest positions; evaporating the receiving area by utilizing an evaporation source to form the solder group; or said disposing a plurality of solder sets on the receiving area comprises: arranging a protective layer on one surface of the receiving area, wherein the protective layer exposes the position where the solder group needs to be arranged; wherein the area exposed at the edge position of the receiving area is equal to the area exposed at the rest positions; performing first evaporation on the receiving area by utilizing an evaporation source to form a part of the solder group; and after evaporating for a period of time, shielding the edge position of the receiving area by using a shielding plate, and continuing evaporating the rest positions by using the evaporation source to form the solder group.
The invention has the beneficial effects that the volume of the solder group at the edge position of the receiving area is smaller than that of the solder group at the rest position of the receiving area, which is different from the prior art. Therefore, the problem of short circuit caused by extrusion contact of positive and negative solder columns in the solder set at the designated position in the transfer process is avoided, and the product yield is improved.
Drawings
FIGS. 1 a-1 b are schematic structural views of a prior art receiving substrate;
FIG. 2 is a schematic view of a first embodiment of a receiving substrate of the present invention;
FIG. 3 is a schematic view of a second embodiment of a receiving substrate of the present invention;
FIG. 4 is a schematic view of a third embodiment of a receiving substrate of the present invention;
FIG. 5 is a schematic diagram of a micro light emitting diode array according to an embodiment of the present invention;
FIG. 6 is a flow chart of a method for fabricating a receiving substrate according to an embodiment of the invention;
FIG. 7 is a schematic diagram showing one specific flow of step S62 in FIG. 6;
fig. 8 is a schematic diagram illustrating another specific flow of step S62 in fig. 6.
Detailed Description
The invention is described in further detail below with reference to the drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting thereof. It should be further noted that, for convenience of description, only some, but not all of the structures related to the present invention are shown in the drawings.
The terminology used in the embodiments of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. It should be noted that, the terms "upper", "lower", "left", "right", and the like in the embodiments of the present invention are described in terms of the angles shown in the drawings, and should not be construed as limiting the embodiments of the present invention. In addition, in the context, it will also be understood that when an element is referred to as being formed "on" or "under" another element, it can be directly formed "on" or "under" the other element or be indirectly formed "on" or "under" the other element through intervening elements. The terms "first," "second," and the like, are used for descriptive purposes only and not for any order, quantity, or importance, but rather are used to distinguish between different components. The specific meaning of the above terms in the present invention can be understood by those of ordinary skill in the art according to the specific circumstances.
Various embodiments of the invention are explained and illustrated below with reference to the drawings.
Fig. 1a is a schematic diagram of a receiving substrate in the prior art. The receiving substrate includes a substrate 12, a plurality of solder sets 11 are disposed on the substrate 12, the solder sets 11 include a first solder column 111 and a second solder column 112, and the first solder column 111 and the second solder column 112 are respectively a positive solder column and a negative solder column. As shown in fig. 1, the first solder column 111 and the second solder column 112 of the solder set 11 have the same volume. Specifically, the heights, cross-sectional areas, and volumes of the first solder columns 111 and the second solder columns 112 in all the solder sets 11 are the same. In this way, since the sapphire substrate is heated to generate warpage in the corner region, the solder set 11 at the warpage position is compressed when the chip on the sapphire substrate is transferred onto the receiving substrate, as shown in fig. 1 b. When the sapphire substrate 13 is heated, warpage occurs at the edge position, and when the sapphire substrate 13 is transferred onto the receiving substrate 12, the edge warpage position presses the solder set 11 at the corresponding position against the redundant other areas, so that the gap between the first solder column 111 and the second solder column 112 at the edge position of the receiving substrate is reduced, and the first solder column 111 and the second solder column 112 are contacted to cause short circuit. The present invention provides a solution to this problem, and is described in detail with reference to the accompanying drawings.
In a specific embodiment, the volume of the solder group at the pressed position is set to be smaller than that of the solder groups at the rest positions, so that the solder group is not excessively pressed or even excessively pressed, positive and negative solder columns are not contacted to short-circuit.
Referring to fig. 2, a schematic structure of a first embodiment of a receiving substrate of the present invention is shown. The receiving substrate includes: the substrate 22, the substrate 22 includes at least one receiving area, each receiving area is used for receiving a single transferred chip, and the chip can be a micro light emitting diode array. In particular, since it is often necessary to transfer all chips onto the receiving substrate through multiple transfers when transferring chips onto the receiving substrate, the substrate 22 may include one receiving area, or may include two or three receiving areas, which is not particularly limited, and for the purpose of making the technical description of the present invention more clear, the following description will take the substrate 22 including one receiving area as an example.
Specifically, the substrate 22 of each receiving area has a solder set 21 on one surface thereof, wherein the volume of the solder set 21 at the edge position of the receiving area is smaller than the volume of the solder set 21 at the rest position of the receiving area. It will be appreciated that the material of the solder set 21 is a conductive material for soldering and electrical connection with the electrodes of the chip, which are arranged on the substrate 22 in correspondence with the electrodes of the chip to be transferred. It should be noted that, the chip in the present invention may be a micro light emitting diode or other micro chips, and the embodiments of the present invention are described by taking the micro light emitting diode as an example.
In the present embodiment, the height of the solder group 21 located at the edge position of the receiving area is set smaller than the height of the solder group 21 located at the remaining position of the receiving area.
In one embodiment, if the sapphire substrate and the receiving area are rectangular, the warpage position of the sapphire substrate is at four corner positions of the sapphire substrate, so that the height of the solder set 21 at the four corner positions corresponding to the substrate 22 is smaller than the height of the solder set 21 at the rest positions. If the warpage positions of the sapphire substrate are at the four edge positions of the sapphire substrate, the heights of the solder groups 21 at the four edge region positions corresponding to the substrate 22 are set to be smaller than the heights of the solder groups 21 at the rest positions. In another embodiment, if the sapphire substrate and the receiving area are both circular, the height of the solder set 21 around the receiving area may be set smaller than the height of the solder set 21 inside the periphery. Therefore, in all embodiments of the present invention, the shape of the receiving area is not particularly limited.
In this embodiment, by receiving the height of the solder set 21 at the position corresponding to the warpage of the sapphire substrate on the substrate lower than the height of the solder set 21 at the rest positions, the volume and the extrusion degree of the solder set 21 at the position corresponding to the warpage of the sapphire substrate are reduced, so that excessive extrusion of the solder set 21 due to warpage of the sapphire substrate can be avoided, and further short circuit caused by contact of positive and negative solder columns in the solder set 21 can be avoided.
Specifically, the height of the solder group 21 at the edge of the receiving substrate is set according to the degree of warpage of the sapphire substrate. The solder set 21 includes a first solder column 211 and a second solder column 212. In this embodiment, the first solder columns 211 and the second solder columns 212 may be provided at the same height, or may be different, which is not particularly limited.
In another embodiment, the object of the present invention can be achieved by providing different cross-sectional areas, and referring to fig. 3, a schematic structural diagram of a second embodiment of the receiving substrate of the present invention is shown. In the present embodiment, the cross-sectional area of the solder set 21 at the edge position of each receiving area on the substrate base 22 is smaller than the cross-sectional area of the solder set 21 at the rest positions.
In one embodiment, if the sapphire substrate and the receiving area are rectangular, the warpage position of the sapphire substrate is at four corner positions of the sapphire substrate, so that the cross section of the solder set 21 at the four corner positions corresponding to the substrate 22 is smaller than the cross section of the solder set 21 at the rest positions. If the warpage position of the sapphire substrate is at the four edge positions of the sapphire substrate, the cross section of the solder set 21 at the four edge region positions corresponding to the substrate 22 is set smaller than the cross section of the solder set 21 at the rest positions.
In another embodiment, if the sapphire substrate and the receiving area are both circular, the cross-sectional area of the solder set 21 at the periphery of the receiving area may be set smaller than the cross-sectional area of the solder set 21 inside the periphery.
In one embodiment, the solder set 21 includes a first solder column 211 and a second solder column 212. In the present embodiment, the distance between the first solder column 211 and the second solder column 212 in the solder set 21 at the edge position (four corners or four sides) of the receiving area may be set to be larger than the distance between the first solder column 211 and the second solder column 212 in the solder set 21 at the remaining position.
In another embodiment, the height of the solder set 21 at the edge of the receiving area may also be set smaller than the height of the solder set 21 at the remaining position, and the spacing distance between the first solder column 211 and the second solder column 212 in the solder set 21 at the edge of the substrate 22 is set larger than the spacing distance between the first solder column 211 and the second solder column 212 in the solder set 21 at the remaining position, the spacing distance between the first solder column 211 and the second solder column 212 being the distance between the two sides of the first solder column 211 adjacent to the second solder column 212, that is, the closest two sides.
Further, the distances between the centers of all the first solder columns 211 and the centers of the second solder columns 212 are the same, i.e. the centers of all the first solder columns 211 and the centers of the second solder columns 212 can correspond to the centers of the two electrodes of the corresponding micro light emitting diode, so that errors between the alignment of the electrodes and the solder set 21 in the transfer process of the micro light emitting diode are avoided, and the connection strength of the micro light emitting diode on the receiving substrate is improved.
In the present embodiment, the cross section of the solder set 21 at the edge of the substrate 22 is set smaller than the cross section of the solder set 21 at the rest, and the spacing distance between the first solder column 211 and the second solder column 212 in the solder set 21 at the edge of the substrate 22 is set larger than the spacing distance between the first solder column 211 and the second solder column 212 in the solder set 21 at the rest, so that the spacing between the first solder column 211 and the second solder column 21 after being pressed of the solder set 21 at the warpage position corresponding to the sapphire substrate is prevented from being too small, thereby avoiding the short circuit due to the contact of the positive and negative solder columns in the solder set 21.
In another embodiment, the shape of the partial solder set 21 may be different from the shape of the rest of the partial solder set 21, so as to avoid the problem of short circuit between the positive and negative electrodes, and referring to fig. 4, a schematic structural diagram of a third embodiment of the receiving substrate of the present invention is shown.
In the present embodiment, the shape of the solder group 21 at the edge position of the receiving area is set to be different from the shape of the solder group 21 at the remaining position. Specifically, the solder set 21 includes a first solder column 211 and a second solder column 212. Wherein at least one of the opposite faces of the first solder column 211 and the second solder column 212 in the same solder set 21 at the edge position of the receiving area is concave. I.e. the side of the first solder column 211 and the opposite side of the second solder column 212 in the same solder set 21 at the edge position of the receiving area is concave. The other side may be planar or the other side may be concave.
Preferably, in one embodiment, two or one of the opposite sides of the first solder column 211 and the second solder column 212 in the same solder set 21 at the edge position of the receiving area is concave, and one of the opposite sides of the first solder column 211 and the second solder column 212 in the same solder set 21 at the edge position of the receiving area is convex. Specifically, as shown in fig. 4, the face of the first solder column 211 near the second solder column 212 in the solder set 21 at the edge of the receiving area is convex; while the face of the second solder column 212 in the solder set 21 at the edge of the receiving area, which is close to the first solder column 211, is concave. In the present embodiment, the height of the solder group 21 at the edge of the receiving area may be set to be the same as or different from the height of the solder group 21 at the rest position. As shown in fig. 4, even if the warpage position of the sapphire substrate causes the extrusion of the solder set 21 at the edge, the problem of short circuit due to contact of the positive and negative electrodes can be avoided due to the shape limitation thereof.
In a preferred embodiment, the height of the solder set 21 at the edge position is set lower than the height of the solder set 21 at the rest position, and the cross-sectional area of the solder set 21 at the edge position is set lower than the cross-sectional area of the solder set 21 at the position, and the complementary surfaces of the opposite surfaces of the first solder column 211 and the second solder column 212 in the same solder set 21 are made, thereby achieving the problem of avoiding the short circuit by the contact of the positive electrode and the negative electrode.
As shown in fig. 4, the convex surface of the first solder column 211 adjacent to the second solder column 212 is a circular convex surface, and the concave surface of the second solder column 212 adjacent to the first solder column 211 is a circular concave surface. In another embodiment, the convex surface of the first solder column 211 adjacent to the second solder column 212 may be a triangular convex surface, and the concave surface of the second solder column 212 adjacent to the first solder column 211 may be a triangular concave surface.
The receiving substrate in this embodiment avoids the problem of short circuit caused by contact between the positive and negative electrodes due to extrusion of the sapphire substrate by setting the opposite surfaces of the first solder column 211 and the second solder column 212 in the solder set 21 at the edge position as complementary surfaces.
Fig. 5 is a schematic structural diagram of a micro led array according to the present invention. Comprising the following steps: a receiving substrate and a micro light emitting diode 23 on the receiving substrate. The receiving substrate includes the receiving substrate of any of the embodiments shown in fig. 2 to 4. The micro light emitting diode array shown in this embodiment is a single micro light emitting diode for transfer. Specifically, the receiving substrate includes a substrate 22, the substrate 22 includes a receiving area, the substrate 22 and the solder set 21 disposed on the substrate 22 and arranged in the same manner as the micro light emitting diodes. The height of the solder set 21 at the edge of the receiving area is lower than the height of the solder set 21 at the rest of the positions; and/or the cross-sectional area of the solder set 21 at the edge of the receiving area is smaller than the cross-sectional area of the solder set 21 at the rest of the locations. Therefore, when the micro light emitting diode 23 on the sapphire substrate is transferred to the receiving substrate, the problem of short circuit caused by contact between the anode and the cathode due to excessive extrusion of the solder set 21 at the edge can be avoided.
When the micro light emitting diodes 23 on the sapphire substrate are transferred onto the receiving substrate, the electrode of each micro light emitting diode 23 on the sapphire substrate is made to correspond to each solder set 21 on the receiving substrate. Specifically, the electrode of each micro light emitting diode 23 is correspondingly located on each solder set 21 of the receiving substrate, and is electrically connected with the solder set 21.
In one embodiment, if the micro leds transferred are in a row or a column each time, the volume of the solder sets 21 at both ends of the receiving area is set smaller than the volume at the rest positions. Specifically, the height of the solder sets 21 disposed at both ends of the receiving area is smaller than the height at the remaining positions; and/or the solder sets 21 at both ends of the receiving area are provided with a smaller cross-sectional area than at the rest of the positions; and/or the first solder columns 211 and the second solder columns 212 of the solder set 21 are disposed at opposite ends of the receiving area with the opposite faces being complementary (i.e., one concave and one convex).
The micro light emitting diode array provided in this embodiment can avoid the contact between the positive and negative electrodes of the solder set 21 under the micro light emitting diode 23, thereby avoiding the occurrence of a short circuit problem and improving the yield of the micro light emitting diode.
Fig. 6 is a flow chart of a first embodiment of a method for manufacturing a receiving substrate according to the present invention. Comprising the following steps:
step S61: a substrate is provided.
Specifically, the substrate may be an insulating material, or may be a semi-insulating material. The substrate base plate comprises at least one receiving area, and each receiving area is used for receiving a single transferred chip.
Step S62: a plurality of solder sets are formed on the receiving area.
Wherein the volume of the solder set at the edge position of the receiving area is smaller than the volume of the solder set at the rest position.
If the receiving area and the sapphire substrate are rectangular, the volume of the solder group at the four corner positions of the receiving area is smaller than that of the solder groups at the other positions; or if the receiving area and the sapphire substrate are both circular, the volume of the solder group at the peripheral position of the receiving area is smaller than that of the solder groups at the rest positions. In another embodiment, the volume size of the solder set may be determined based on the warp location of the sapphire.
Step 62 of forming a plurality of solder sets on the receiving area may include the steps of:
step S621: arranging a protective layer on one surface of the receiving area, wherein the protective layer exposes the position where the solder group needs to be arranged; wherein the area exposed at the edge position of the receiving area is smaller than the area exposed at the rest position.
Specifically, a protective layer is covered on one surface of the substrate, and the protective layer can be photoresist; and carrying out patterned photo etching on the protective layer so that the position where the solder group needs to be arranged is exposed by the protective layer.
Specifically, since the volume of the solder set at the edge of the receiving area is smaller than the volume of the solder set at the rest position, when the patterned photo etching is performed on the protective layer, the area of the exposed position of the protective layer at the edge of the receiving area can be made smaller than the area of the exposed position at the rest position, so that the cross-sectional area of the formed solder set at the edge is made smaller than the cross-sectional area at the rest position.
In another embodiment, since the shape of the solder set at the edge of the receiving area is different from the shape of the solder set at the rest, specifically, the opposite faces of the first solder column and the second solder column of the solder set at the edge of the receiving area are complementary faces. When the protective layer is subjected to patterned photoetching, the shapes of the positions of the first solder columns and the second solder columns of the corresponding solder groups exposed by the protective layer at the edge of the receiving area are complemented, so that the formed opposite surfaces of the first solder columns and the second solder columns of the solder groups at the edge are complemented.
Step S622: the receiving area is evaporated by an evaporation source to form a solder group.
And evaporating the position exposed by the receiving area by utilizing an evaporation source, and stopping evaporating after evaporating for a certain time to form a solder group.
In another embodiment, the height of the solder sets at the edges of the receiving area is different from the height of the solder sets at the rest positions. Thus, when the protective layer is subjected to patterned photo etching, the areas of the corresponding solder groups exposed by the protective layer can be the same, and the step 62 of forming a plurality of solder groups on the receiving area can be further the following steps:
step S623: a protective layer is arranged on one surface of the receiving area, and the position where the solder group needs to be arranged is exposed by the protective layer; wherein the area exposed at the edge position of the receiving area is equal to the area exposed at the rest position.
Step S624: and performing first evaporation on the receiving area by utilizing the evaporation source to form a part of solder group.
Step S625: after evaporating for a period of time, the edge position of the receiving area is shielded by a shielding plate, and the rest positions are evaporated by an evaporation source to form a solder group
And after the evaporation source is used for evaporating for a period of time, shielding the solder group formed at the edge position of the substrate, exposing the solder group at the other positions, continuously evaporating the exposed other positions, and enabling the height of the solder group at the edge of the substrate to be smaller than the height of the solder group at the other positions after the evaporation is completed. After the solder set is formed, the protective layer is removed.
Further, the method of forming a plurality of solder sets on the receiving area in step 62 of the present invention may include both the above two methods, specifically, a protective layer is disposed on a surface of the receiving area, and the protective layer exposes a position where the solder set needs to be disposed, where an area exposed at an edge position of the receiving area is equal to an area exposed at other positions; then, evaporating the receiving area for the first time by utilizing an evaporation source to form a part of solder group; after evaporating for a period of time, the edge position of the receiving area is shielded by a shielding plate, and the rest positions are continuously evaporated by an evaporation source to form a solder group.
The receiving substrate and the manufacturing method thereof can avoid the contact of the positive and negative solder sets in the process of transferring the micro light emitting diode, thereby preventing the problem of short circuit and improving the yield of products.
The foregoing is only the embodiments of the present invention, and therefore, the patent scope of the invention is not limited thereto, and all equivalent structures or equivalent processes using the descriptions of the present invention and the accompanying drawings, or direct or indirect application in other related technical fields, are included in the scope of the invention.
Claims (8)
1. A receiving substrate, comprising at least one receiving area, wherein the receiving area is an area for receiving a single transferred chip, and a plurality of solder groups, and the volume of the solder groups at the edge positions of the receiving area is smaller than the volume of the solder groups at the rest positions of the receiving area; wherein the cross-sectional area of the solder set at the edge position of the receiving substrate is smaller than the cross-sectional area of the solder set at the rest position of the receiving area; the solder set comprises a first solder column and a second solder column; the distances between the centers of all the first solder columns and the centers of the second solder columns are the same; the spacing distance between the first solder column and the second solder column in the same solder set at the edge position of the receiving area is larger than the spacing distance between the first solder column and the second solder column in the same solder set at the rest position of the receiving area.
2. The receiving substrate of claim 1, wherein the receiving area is rectangular, and a volume of the solder set at four corner positions of the receiving area is smaller than a volume of the solder set at the remaining positions of the receiving area.
3. The receiving substrate according to claim 2, wherein if the single transferred chip is a row or a column, the volume of the solder sets at both ends of the receiving area is smaller than the volume at the remaining positions.
4. The receiving substrate of claim 1, wherein a height of the solder set at an edge position of the receiving area is less than a height of the solder set at a remaining position of the receiving area.
5. The receiving substrate of claim 1, wherein the solder set comprises a first solder column and a second solder column;
at least one of the opposite faces of the first and second solder columns in the same solder set at the edge position of the receiving area is concave.
6. The receiving substrate of claim 5, wherein one of opposite faces of a first solder column and a second solder column in the same solder set at an edge position of the receiving area is convex.
7. A method of manufacturing a receiving substrate, comprising:
providing a substrate base plate, wherein the substrate base plate comprises at least one receiving area;
forming a plurality of solder sets on the receiving area;
wherein the volume of the solder set at the edge position of the receiving area is smaller than the volume of the solder set at the rest position of the receiving area; wherein the cross-sectional area of the solder set at the edge position of the receiving substrate is smaller than the cross-sectional area of the solder set at the rest position of the receiving area; the solder set comprises a first solder column and a second solder column; the distances between the centers of all the first solder columns and the centers of the second solder columns are the same, and the interval distance between the first solder columns and the second solder columns in the same solder group at the edge position of the receiving area is larger than the interval distance between the first solder columns and the second solder columns in the same solder group at the rest positions of the receiving area.
8. The method of manufacturing according to claim 7, comprising:
the forming a plurality of solder sets on the receiving area includes:
arranging a protective layer on one surface of the receiving area, wherein the protective layer exposes the position where the solder group needs to be arranged; wherein the area exposed at the edge position of the receiving area is smaller than the area exposed at the rest positions;
evaporating the receiving area by utilizing an evaporation source to form the solder group; or alternatively
The disposing a plurality of solder sets on the receiving area includes:
arranging a protective layer on one surface of the receiving area, wherein the protective layer exposes the position where the solder group needs to be arranged; wherein the area exposed at the edge position of the receiving area is equal to the area exposed at the rest positions;
performing first evaporation on the receiving area by utilizing an evaporation source to form a part of the solder group;
and after evaporating for a period of time, shielding the edge position of the receiving area by using a shielding plate, and continuing evaporating the rest positions by using the evaporation source to form the solder group.
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