CN114158286A - 高效率微装置 - Google Patents

高效率微装置 Download PDF

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CN114158286A
CN114158286A CN202080053948.7A CN202080053948A CN114158286A CN 114158286 A CN114158286 A CN 114158286A CN 202080053948 A CN202080053948 A CN 202080053948A CN 114158286 A CN114158286 A CN 114158286A
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戈尔拉玛瑞扎·恰吉
埃桑诺拉·法蒂
侯赛因·扎马尼·西博尼
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Vuereal Inc
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Abstract

一种垂直固态装置包括：连接垫；及侧壁，其包括金属绝缘体半导体(MIS)结构；其中所述MIS结构的栅极短接到所述垂直固态装置的至少一个触点且所述MIS结构的阈值电压(VT)经调整以提高所述装置的效率。

Description

高效率微装置
技术领域
本发明涉及垂直固态装置及其制造方法。更特定来说，本发明涉及高效率微装置。
背景技术
侧壁缺陷是微装置的性能降级的主要原因之一。一种用以增强性能的方法是通过对装置周围的栅极进行偏置而使用所述栅极来撤销激活缺陷。挑战是小装置中额外电极的使用。
发明内容
根据一个实施例，提供一种垂直固态装置，其包括p触点、p掺杂层、不同作用层(例如量子阱、势垒等)、n掺杂层、连接垫及包括金属绝缘体半导体(MIS)结构的侧壁，其中所述MIS结构的栅极短接到垂直固态装置的至少一个触点。
在另一实施例中，MIS结构的所述栅极通过n凸块或n欧姆短接到n触点。
在一个实施例中，MIS结构的所述栅极可包括覆盖所述MIS结构的所述侧壁的全部或部分栅极。
在本发明的一个方面中，所公开结构可与垂直固态装置的覆晶结构兼容。
根据一个方面，所述垂直固态装置是微装置。
在本发明的另一方面中，与正常微装置相比，所述栅极到n触点的短接可导致较高外部量子效率(EQE)，其中将所述栅极短接到n触点包括提供所述栅极与n触点之间的零偏置差。
在本发明的另一方面中，与所述微装置的所述侧壁上的所述栅极相关联的阈值电压可提高EQE，所述阈值电压可工程化为大于零或接近于零(VT>＝O)。
在本发明的一个方面中，所述阈值电压也在提供EQE范围的范围内，所述EQE范围在最大EQE的预定义范围内。
在本发明的一个方面中，所公开覆晶结构对静电放电ESD较不敏感。
在本发明的另一方面中涉及一种用以提高垂直固态装置中的效率的方法，所述方法包括：提供包括连接垫及侧壁的固态装置，所述侧壁包括金属绝缘体半导体(MIS)结构；将偏置电压施加到连接到所述MIS结构的栅极电极并将所述MIS结构短接到所述垂直固态装置的n触点；及使所述栅极电极的所述偏置电压保持小于所述MIS结构的阈值电压以提高所述垂直固态装置的所述效率。
附图说明
在阅读以下具体实施方式后且在参考图式后本发明的前述及其它优点将变得显而易见。
图1展示根据本发明的实施例的不同栅极偏置下的微装置的典型外部量子效率(EQE)。
图2展示根据本发明的实施例的具有经短接栅极MIS结构的覆晶垂直固态。
虽然本发明易受各种修改及替代形式影响，但已在图式中以实例方式展示且将在本文中详细地描述特定实施例或实施方案。然而，应理解，本发明并不打算限于所公开的特定形式。而是，本发明将涵盖归属于如由随附权利要求书界定的本发明的精神及范围畴内的所有修改、等效内容及替代方案。
具体实施方式
将微光电子装置集成到系统衬底中可提供高性能及高功能性系统。为改进成本并产生较高像素密度装置，应减小光电子装置的大小。举例来说，光电子装置的实例是传感器及发光装置，例如发光二极管(LED)。然而，在减小这些装置的大小时，装置性能可能开始变差。经减小性能的一些原因包含但不限于由于缺陷导致的较高泄漏电流、接口处的电荷拥挤、不平衡电荷及非想要重组，例如奥格(Auger)及非辐射重组。
各种转移及接合方法可用于将装置层转移并接合到系统衬底。在一个实例中，热及压力可用于将装置层接合到系统衬底。在垂直固态装置中，垂直方向上的电流流动主要界定装置的功能性。发光二极管(LED)可被分类为垂直固态装置。垂直装置是通过在不同层的堆叠中形成三维结构来制作的光电子装置，其中电流从装置的一侧去往另一侧(通常从堆叠的顶部去往底部堆叠层或反之亦然)。此结构具有顶部侧、底部侧、堆叠在顶部层与底部层之间的中间层以及环绕顶部层、底部层及中间层的侧壁。在一种情形中，顶部层可以是p掺杂层且底部层是n掺杂层。微装置可位于缓冲层上。此处，所提出的制作方法用于限制这些装置的横向电流流动。此处，发光二极管或微LED用于阐释本发明，但类似技术可用于其它类型的垂直微装置(例如传感器)。
将LED图案化成微大小装置以产生用于显示应用的LED阵列伴随包含材料利用、经限制PPI及缺陷产生的数个问题。在一个实例中，在垂直固态装置中，垂直方向上的电流流动主要界定装置的功能性。仍然存在对经改进垂直固态装置的需要。
发光二极管(LED)可被分类为垂直固态微装置。其它类型的微装置可以是传感器、发光二极管(LED)或生长、沉积或形成于衬底上的任何其它固体装置。衬底可以是装置层的同质衬底或接收器衬底，装置层或固态装置被转移到所述接收器衬底。
如上文所提及，侧壁缺陷是微装置的性能降级的主要原因之一。一种用以增强性能的方法是通过对栅极进行偏置而使用装置周围的栅极电极来撤销激活缺陷。挑战是小装置中额外电极的使用。
图1展示不同栅极偏置之下的微装置的典型外部量子效率(EQE)。此处，阈值电压(VT)是导致给定装置电流的最高EQE的栅极电压。
根据一个实施例，一种用以减少电极的数目的方法是将栅极短接到其它微装置触点(p或n)中的一者。然而，阈值电压应经设计使得因短接到其它微装置触点所导致的栅极上的偏置尽可能接近于最大EQE。
在短接到n触点的情形中，VT应接近于n触点的偏置电压。然而，所述VT还应在提供EQE范围的范围内，所述EQE范围在最大EQE的预定义范围内。
在短接到p触点的情形中，VT应接近于p与n之间的偏置差。然而，所述VT还应在提供EQE范围的范围内，所述EQE范围在最大EQE的预定义范围内。
阈值电压(VT)工程化可作为程序、层工程化或电荷植入的部分。
可在图1中看到具有不同栅极电压及阈值电压的EQE图表，其中EQE在阈值电压处最大。可工程化为大于零或接近于零(VT>＝0)的阈值电压可提高EQE。
在本发明的一个方面中，所公开覆晶结构对ESD较不敏感。
图2展示根据本发明的实施例的具有经短接栅极MIS结构的覆晶垂直固态。此处，提供垂直固态装置的覆晶结构。在装置侧壁中的一者上形成至少一个MIS结构。通过栅极电极对MIS结构进行偏置。垂直固态装置具有作为欧姆p触点及欧姆n触点的两个功能触点。
根据一个实施例，MIS结构的栅极是通过n凸块或n欧姆或任何其它形式的电极短接到台面结构的一个n触点或p触点。MIS结构的栅极可包括覆盖微装置的侧壁的全部栅极。
根据本发明的一个方面，与正常微装置相比，MIS结构的栅极电极到覆晶结构的n触点的短接可导致较高外部量子效率(EQE)。将栅极短接到n触点包括将零电压提供到栅极电极。在另一方面中，提供包括连接垫及侧壁的垂直电流模式固态装置，所述侧壁包括金属绝缘体半导体(MIS)结构，其中通过对所述MIS结构进行偏置透过所述侧壁来限制垂直装置的泄漏电流效应。
根据另一实施例，在图2内，MIS结构的栅极电极是单独电极且优选地对于此实施例，栅极电极偏置电压小于MIS结构的阈值电压。在此情形中，MIS结构覆盖n层的至少一部分。这抵消了由于n触点区域中的侧壁效应导致的泄漏电流。已观察到，这导致了微装置或EQE的较高效率。这主要由于泄漏电流正基本上在n触点区域域中发生的观察。如此，当泄漏电流基本上或全部在n触点区域中时，将电极偏置到小于电极与n层之间的MIS结构的阈值的电压导致微装置或EQE的较高效率。
另一相关情形，侧壁由电介质覆盖且在较高温度下退火。在另一情形中，侧壁在由电介质覆盖之前是在高温度室中进行处理的。所述电介质可以是氮化硅、氧化硅或ALD层。在另一情形中，可使用例如BCB等聚合物。
出于图解说明及描述的目的，已提出本发明的一或多个实施例的前述说明。其并非打算为穷尽性的或将本发明限于所公开的精确形式。鉴于以上教示，许多修改及变化是可能的。打算本发明的范围并非由此具体实施方式而是由随附权利要求书限制。

Claims (16)

1.一种用以提高垂直固态装置的效率的方法，所述方法包括：
提供包括连接垫及侧壁的固态装置，所述侧壁包括金属绝缘体半导体(MIS)结构；
将偏置电压施加到连接到所述MIS结构的栅极电极且将所述MIS结构短接到所述垂直固态装置的n触点；及
使所述栅极电极的所述偏置电压保持小于所述MIS结构的阈值电压以提高所述垂直固态装置的所述效率。
2.根据权利要求1所述的方法，其中由于侧壁效应导致的泄漏电流基本上在所述垂直固态装置的n触点区域中。
3.根据权利要求1所述的装置，其中通过以下各项中的一者而调整所述阈值电压：层工程化、处理步骤或电荷植入。
4.根据权利要求1所述的方法，其中由于侧壁效应导致的泄漏电流全部在所述垂直固态装置的n触点区域中。
5.根据权利要求1所述的装置，其中所述栅极电极完全覆盖所述装置的所述侧壁。
6.一种垂直固态装置：连接垫；及侧壁，其包括金属绝缘体半导体(MIS)结构；其中所述MIS结构的栅极短接到所述垂直固态装置的至少一个触点且所述MIS结构的阈值电压(VT)经调整以提高所述装置的效率。
7.根据权利要求6所述的装置，其中调整短接到n触点的所述栅极的所述阈值电压包括：将所述VT设定为接近于所述n触点的偏置电压且在提供EQE范围的范围内，所述EQE范围在最大EQE的预定义范围内。
8.根据权利要求6所述的装置，其中调整短接到p触点的所述栅极的所述阈值电压包括：将所述VT设定为接近于所述p与所述n之间的偏置差且在提供所述EQE范围的所述范围内，所述EQE范围在所述最大EQE的所述预定义范围内。
9.根据权利要求6所述的装置，其中通过以下各项中的一者而调整所述阈值电压：层工程化、处理步骤或电荷植入。
10.根据权利要求6所述的装置，其中所述MIS结构的所述栅极通过n凸块及n欧姆触点中的任一者短接到n触点或p触点中的一者。
11.根据权利要求6所述的装置，其中所述栅极完全覆盖所述装置的所述侧壁。
12.根据权利要求6所述的装置，其中通过提供零栅极电压来短接所述MIS结构的所述栅极。
13.一种方法，其包括
提供包括连接垫及侧壁的垂直固态装置，所述侧壁包括金属绝缘体半导体(MIS)结构；
将所述MIS结构的栅极短接到所述垂直固态装置的至少一个触点；及
调整所述MIS结构的阈值电压(VT)以提高所述装置的效率。
14.根据权利要求13所述的方法，其中调整短接到n触点的所述栅极的所述阈值电压包括：将所述VT设定为接近于所述n触点的偏置电压且在提供EQE范围的范围内，所述EQE范围在最大EQE的预定义范围内。
15.根据权利要求13所述的方法，其中调整短接到p触点的所述栅极的所述阈值电压包括：将所述VT设定为接近于所述p与所述n之间的偏置差且在提供所述EQE范围的所述范围内，所述EQE范围在所述最大EQE的所述预定义范围内。
16.根据权利要求13所述的方法，其中调整所述阈值电压是通过层工程化、处理步骤或电荷植入而完成。
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