CN114121879A - 半导体元件结构及其制备方法 - Google Patents

半导体元件结构及其制备方法 Download PDF

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Publication number
CN114121879A
CN114121879A CN202110830001.9A CN202110830001A CN114121879A CN 114121879 A CN114121879 A CN 114121879A CN 202110830001 A CN202110830001 A CN 202110830001A CN 114121879 A CN114121879 A CN 114121879A
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conductive
metal layer
conductive polymer
dielectric layer
conductive via
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薛宇涵
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Nanya Technology Corp
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Nanya Technology Corp
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Abstract

本公开提供一种具有导电聚合物衬垫的半导体元件结构及该半导体元件结构的制备方法。该半导体元件结构具有一第一金属层以与一第二金属层，该第一金属层设置在一半导体基底，该第二金属层设置在该第一金属层上。该半导体元件结构还具有一导电结构，设置在该第一金属层与该第二金属层之间。该导电结构包括一第一导电通孔与一第一导电聚合物衬垫，该第一导电聚合物衬垫包围该第一导电通孔。

Description

半导体元件结构及其制备方法
技术领域
本申请案主张2020年8月27日申请的美国正式申请案第17/004,889号的优先权及益处，该美国正式申请案的内容以全文引用的方式并入本文中。
本公开是关于一种半导体元件结构及其制备方法。特别是有关于一种具有导电聚合物衬垫的半导体元件结构及其制备方法。
背景技术
对于许多现代应用，半导体元件是不可或缺的。随着电子科技的进步，半导体元件的尺寸变得越来越小，于此同时提供较佳的功能以及包括较大的集成电路数量。由于半导体元件的规格小型化，实现不同功能的半导体元件的不同型态与尺寸规模，是整合(integrated)并封装(packaged)在一单一模块中。再者，许多制造步骤执行于各式不同型态的半导体装置的整合(integration)。
在一半导体元件中，一内连接结构是用于电性连接在一集成电路的不同层或是相同层中的多个导电元件。然而，随着半导体元件的按比例缩小，相邻导电元件之间的间隔是逐渐缩小，其是可缩减内连接结构的制程裕度(process window)。因此，在半导体元件中制造内连接结构则越来越困难。
上文的「先前技术」说明仅是提供背景技术，并未承认上文的「先前技术」说明揭示本公开的标的，不构成本公开的先前技术，且上文的「先前技术」的任何说明均不应作为本案的任一部分。
发明内容
本公开的一实施例提供一种半导体元件结构。该半导体元件结构具有一第一金属层以与一第二金属层，该第一金属层设置在一半导体基底，该第二金属层设置在该第一金属层上。该半导体元件结构还具有一导电结构，设置在该第一金属层与该第二金属层之间。该导电结构包括一第一导电通孔与一第一导电聚合物衬垫，该第一导电聚合物衬垫包围该第一导电通孔。
在一些实施例中，该第一导电聚合物衬垫包括石墨烯或共轭聚合物。在一些实施例中，该第一导电通孔及该第一导电聚合物衬垫与该第一金属层的一顶表面直接接触。在一些实施例中，该半导体元件结构更包括一第一介电层，设置在该第一金属层与该第二金属层之间，其中该第一导电聚合物衬垫被该第一介电层包围，且该第一介电层与该第一金属层的一顶表面直接接触。在一些实施例中，该导电结构还包括一第二导电通孔与包围该第二导电通孔的一第二导电聚合物衬垫，其中该第二导电通孔接合在该第一导电通孔上，该第二导电聚合物衬垫接合在该第一导电通孔聚合物衬垫上，且其中该第二导电聚合物衬垫包括石墨烯或共轭聚合物。
在一些实施例中，该第二导电通孔与该第二导电聚合物衬垫直接接触该第二金属层的一底表面，其中该第二元件结构更包括一第二介电层，设置在该第一金属层与该第二金属层之间，其中该第二导电聚合物衬垫被该第二介电层包围，且该第二介电层与该第二金属层的该底表面直接接触。在一些实施例中，该半导体元件结构更包括一能量可去除结构，设置在该第一金属层与该第二金属层之间且与该导电结构分离，其中一气隙结构被该能量可去除结构包围。
本公开的另一实施例提供一种半导体元件结构。该半导体元件结构包括设置在一半导体基底上的一第一金属层与设置在该第一金属层上的一导电结构。该导电结构包括一第一导电通孔，一第二导电通孔，设置在该第一导电通孔上，一第一导电聚合物衬垫，设置在该第一导电通孔的侧壁上以及一第二导电聚合物衬垫，设置在该第二导电通孔的侧壁上。该第一导电聚合物衬垫与该第二导电聚合物衬垫包括石墨烯或共轭聚合物。该半导体元件结构还包括设置在该导电结构上的一第二金属层。
在一些实施例中，该第一导电聚合物衬垫与该第二导电聚合物衬垫包括聚(3,4-乙撑二氧噻吩)(PEDOT)或聚苯胺(PANI)。在一些实施例中，该第一导电通孔的侧壁与该第二导电通孔的侧壁实质上对齐。在一些实施例中，该半导体元件结构还包括第一介电层以及设置在该第一金属层与该第二金属层之间的一第二介电层，其中该第一导电聚合物衬垫被该第一介电层包围，而该第二导电聚合物衬垫被该第二介电层包围。
在一些实施例中，被第二介电层包围半导体元件结构更包括一能量可去除结构贯穿该第一介电层与该第二介电层是接触该第一金属层与该第二金属层，其中该能量可去除结构与该导电结构分离。在一些实施例中，该气隙结构通过该能量可去除结构与该第一金属层及该第二金属层分离。
本公开的又一实施例提供一种半导体元件结构的制备方法，包括：形成一第一半导体晶粒与形成一第二半导体晶粒。该第一半导体晶粒包括一第一金属层；该第一金属层上的一第一导电通孔；以及包围该第一导电通孔的一第一导电聚合物衬垫。该第二半导体晶粒包括一第二金属层；该第二金属层上的一第二导电通孔；以及包围该第二导电通孔的一第二导电聚合物衬垫。该制备方法还包括：通过将该第二半导体晶粒接合到该第一半导体晶粒形成电连接该第一金属层与该第二金属层的一导电结构。该导电结构由该第一导电通孔，该第一导电聚合物衬垫，该第二导电通孔与该第二导电聚合物衬垫形成。该第一导电通孔与该第二导电通孔接合，且该第一导电聚合物衬垫与该第二导电聚合物衬垫接合。
在一些实施例中，该第一半导体晶粒的形成包括在该第一半导体基底上形成该第一金属层，以及形成覆盖该第一金属层的一第一介电层。该第一半导体晶粒的形成还包括蚀刻该第一介电层以形成曝露该第一金属层的一部分的一第一开口，以及在该第一开口中形成一第一导电通孔与一第一导电聚合物衬垫以接触该第一金属层。在一些实施例中，该第一导电聚合物衬垫的形成包括在该第一开口的一底表面与侧壁上方沉积一第一导电聚合物材料，以及在该第一开口的该底表面上去除该第一导电聚合物材料的一部分，其中该第一导电聚合物材料的剩余部分形成一第一导电聚合物衬垫。在一些实施例中，该第一导电聚合物材料包括石墨烯、聚(3,4-乙撑二氧噻吩)(PEDOT)或聚苯胺(PANI)。
在一些实施例中，该第一半导体晶粒的形成还包括蚀刻该第一介电层形成一第二开口，该第二开口是在该第一导电通孔形成之后曝露的该第一金属层的另外部分，且使用一能量可去除材料填充该第一开口。在一些实施例中，该第二半导体晶粒还包括一第二能量可去除材料，且在该第二半导体晶粒接合到该第一半导体晶粒之后，该第二能量可去除材料与该第一能量可去除材料接合。在一些实施例中，该制备方法还包括在形成该导电结构之后进行一热处理制程是将该第一能量可去除材料与该第二能量可去除材料转变为一能量可去除结构，其中一气隙结构被该能量可去除结构包围，且该导电结构被该气隙结构包围。
本公开实施例提供的半导体元件结构具有包围导电通孔的导电聚合物衬垫，且导电通孔做为互连结构。例如，导电通孔设置在第一金属层上，且导电通孔做为将第一金属层电连接到形成在导电通孔上的第二金属层。导电聚合物衬垫被配置以降低半导体元件结构的电阻，减轻集成电路在线路上的电阻电容延迟(RC-Delay)效应。因此，可提高半导体元件结构的操作速度，这显著提高了整体元件的效能。
上文已相当广泛地概述本公开的技术特征及优点，而使下文的本公开详细描述得以获得较佳了解。构成本公开的权利要求标的的其它技术特征及优点将描述于下文。本公开所属技术领域中具有通常知识者应了解，可相当容易地利用下文揭示的概念与特定实施例可作为修改或设计其它结构或制程而实现与本公开相同的目的。本公开所属技术领域中具有通常知识者亦应了解，这类等效建构无法脱离后附的权利要求所界定的本公开的精神和范围。
附图说明
参阅实施方式与权利要求合并考量图式时，可得以更全面了解本申请案的揭示内容，图式中相同的元件符号是指相同的元件。
图1例示本公开一些实施例的半导体元件结构的剖视示意图。
图2例示本公开一些实施例的半导体元件结构的剖视示意图。
图3例示本公开一些实施例的半导体元件结构的制备方法的流程示意图。
图4例示本公开一些实施例在形成一第一半导体晶粒期间在一第一半导体基底上形成一介电层的中间阶段的剖视示意图。
图5例示本公开一些实施例在形成该第一半导体晶粒期间蚀刻该介电层的中间阶段的剖视示意图。
图6例示本公开一些实施例在形成该第一半导体晶粒期间形成一阻挡材料的中间阶段的剖视示意图。
图7例示本公开一些实施例在形成该第一半导体晶粒期间形成一第一金属材料的中间阶段的剖视示意图。
图8例示本公开一些实施例在形成该第一半导体晶粒期间值平坦化该第一金属材料以形成一第一金属层的中间阶段的剖视示意图。
图9例示本公开一些实施例在形成一第一半导体晶粒期间形成一介电层以覆盖该第一金属层的中间阶段的剖视示意图。
图10例示本公开一些实施例在形成该第一半导体晶粒期间蚀刻该介电层以曝露该第一金属层的一部分的中间阶段的剖视示意图。
图11例示本公开一些实施例在形成该第一半导体晶粒期间形成一第一导电聚合物材料的中间阶段的剖视示意图。
图12例示本公开一些实施例在形成该第一半导体晶粒期间值部分蚀刻该第一导电聚合物材料以形成一第一导电聚合物衬垫的中间阶段的剖视示意图。
图13例示本公开一些实施例在形成该第一半导体晶粒期间形成一第一导电材料的中间阶段的剖视示意图。
图14例示本公开一些实施例在形成该第一半导体晶粒期间值平坦化该第一导电材料以形成一第一导电通孔的中间阶段的剖视示意图。
图15例示本公开一些实施例的第二半导体晶粒的剖视示意图。
图16例示本公开一些实施例在形成一第一半导体晶粒期间蚀刻该介电层以形成曝露该第一金属层的一开口的中间阶段的剖视示意图。
图17例示本公开一些实施例在形成该第一半导体晶粒期间通过一第一能量可去除材料填充该开口的中间阶段的剖视示意图。
图18例示本公开一些实施例在形成一第二半导体晶粒期间蚀刻该介电层以形成曝露该第二金属层的一开口的中间阶段的剖视示意图。
图19例示本公开一些实施例在形成该第二半导体晶粒期间通过一第二能量可去除材料填充该开口的中间阶段的剖视示意图。
图20例示本公开一些实施例在形成该第一半导体晶粒期间接合该第二半导体晶粒到该第一半导体晶粒的中间阶段的剖视示意图。
其中，附图标记说明如下：
10：制备方法
100a：第一半导体晶粒
100b：第一半导体晶粒
101：基底
103：介电层
105：图案化遮罩
110：开口
113：阻挡材料
115：第一金属材料
117：阻挡层
119：第一金属层
119T：顶表面
121：介电层
130：开口
130B：底表面
130S：侧壁
133：第一导电聚合物材料
135：第一导电聚合物衬垫
137：第一导电材料
139：第一导电通孔
139S：侧壁
141：图案化遮罩
150：开口结构
153：第一能量可去除材料
200a：第二半导体晶粒
200b：第二半导体晶粒
201：基底
203：介电层
217：阻挡层
219：第二金属层
219B：底表面
221：介电层
235：第二导电聚合物衬垫
239：第二导电通孔
239S：侧壁
241：图案化遮罩
250：开口结构
253：第二能量可去除材料
300a：半导体元件结构
300b：半导体元件结构
339：导电结构
353：能量可去除结构
G：气隙结构
S11：步骤
S13：步骤
S15：步骤
S17：步骤
具体实施方式
本公开的以下说明伴随并入且组成说明书的一部分的图式，说明本公开的实施例，然而本公开并不受限于该实施例。此外，以下的实施例可适当整合以下实施例以完成另一实施例。
「一实施例」、「实施例」、「例示实施例」、「其他实施例」、「另一实施例」等是指本公开所描述的实施例可包括特定特征、结构或是特性，然而并非每一实施例必须包括该特定特征、结构或是特性。再者，重复使用「在实施例中」一语并非必须指相同实施例，然而可为相同实施例。
为了使得本公开可被完全理解，以下说明提供详细的步骤与结构。显然，本公开的实施不会限制该技艺中的技术人士已知的特定细节。此外，已知的结构与步骤不再详述，以免不必要地限制本公开。本公开的较佳实施例详述如下。然而，除了详细说明之外，本公开亦可广泛实施于其他实施例中。本公开的范围不限于详细说明的内容，而是由权利要求定义。
应当理解，以下公开内容提供用于实作本发明的不同特征的诸多不同的实施例或实例。以下阐述组件及排列形式的具体实施例或实例以简化本公开内容。当然，该些仅为实例且不旨在进行限制。举例而言，元件的尺寸并非仅限于所公开范围或值，而是可相依于制程条件及/或装置的所期望性质。此外，以下说明中将第一特征形成于第二特征「之上」或第二特征「上」可包括其中第一特征及第二特征被形成为直接接触的实施例，且亦可包括其中第一特征与第二特征之间可形成有附加特征、进而使得所述第一特征与所述第二特征可能不直接接触的实施例。为简洁及清晰起见，可按不同比例任意绘制各种特征。在附图中，为简化起见，可省略一些层/特征。
此外，为易于说明，本文中可能使用例如「之下(beneath)」、「下面(below)」、「下部的(lower)」、「上方(above)」、「上部的(upper)」等空间相对关系用语来阐述图中所示的一个元件或特征与另一(其他)元件或特征的关系。所述空间相对关系用语旨在除图中所绘示的取向外亦囊括元件在使用或操作中的不同取向。所述装置可具有其他取向(旋转90度或处于其他取向)且本文中所用的空间相对关系描述语可同样相应地进行解释。
图1例示本公开一些实施例的半导体元件结构300a的剖视示意图。依据一些实施例，如图1所示，半导体元件结构300a包括一第一半导体晶粒100a与接合在第一半导体晶粒100a上的一第二导体晶粒200a。
在第一半导体晶粒100a中，一介电层103设置在第一半导体基底101上，且一第一金属层119设置在介电层103中。在一些实施例中，第一金属层119通过一阻挡层117与介电层103分离。此外，一介电层121设置在介电层103、阻挡层117与第一金属层119上。在一些实施例中，一第一导电通孔139设置在介电层103中，且第一导电通孔139通过第一导电聚合物衬垫135与介电层121分离。
在一些实施例中，第一导电通孔139被第一导电聚合物衬垫135包围，且第一导电聚合物衬垫135被介电层121包围。具体地，第一导电聚合物衬垫135设置在第一导电通孔139的一侧壁139S上。在一些实施例中，第一导电通孔139及第一导电聚合物衬垫135与第一金属层119的一顶表面119T直接接触。
在第二半导体晶粒200a中，一第二导电通孔239接合到第一半导体晶粒100a的第一导电通孔139，且第二导电聚合物衬垫235接合到第一半导体晶粒100a的第一导电聚合物衬垫135。在一些实施例中，第二导电通孔239被第二导电聚合物衬垫235包围，且第二导电聚合物衬垫235被一介电层221包围，介电层221接合到第一半导体晶粒100a的介电层121。具体地，第二导电聚合物衬垫235设置在第二导电通孔239的一侧壁239S上。
第二半导体晶粒200a还包括设置在介电层221、第二导电通孔239与第二导电聚合物衬垫235上的一第二金属层219。在一些实施例中，第二导电通孔239与第二导电聚合物衬垫235与第二金属层219的一底表面219B直接接触。此外，第二金属层219设置在一介电层203中，且第二半导体基底201设置在介电层203上。在一些实施例中，第二金属层219通过一阻挡层217与介电层203分离。
应当理解，第一半导体晶粒100a的第一导电通孔139与第一导电聚合物衬垫135，以及第二半导体晶粒200a的第二导电通孔239与第二导电聚合物衬垫235形成一导电结构339。在一些实施例中，导电结构339电连接第一半导体晶粒100a的第一金属层119与第二半导体晶粒200a的第二金属层219。之后将详细描述导电结构339。
图2例示本公开一些实施例的半导体元件结构300b的剖视示意图，其是半导体元件结构300a的一替代实施例。由于一致性及清楚的原因，出现在图1及图2中的相似元件将具有相同的标记。
类似于半导体元件结构300a，半导体元件结构300b包括一第一半导体晶粒100b与接合在第一半导体晶粒100b上的一第二半导体晶粒200b。不同之处在于半导体元件结构300b包括一能量可去除结构353与能量可去除结构353中包围的一气隙结构G。
尽管在图2的剖视图中示出能量可去除结构353的六个部分，然而能量可去除结构353的六个部分可在不同的剖视图中彼此连接。与能量可去除结构353类似，气隙结构G的六个部分也可在不同的剖视图中彼此连接。此外，能量可去除结构353与气隙结构353的部分数量可依据半导体元件结构300b的设计需求进行调整。
在一些实施例中，能量可去除结构353与气隙结构G设置在第一金属层119与第二金属层219之间。此外，能量可去除结构353的下部设置在第一半导体晶粒100b的介电层121中，而能量可去除结构353的上部设置在第二半导体晶粒200b的介电层221中。在一些实施例中，能量可去除结构353与第一金属层119的该顶表面119T及第二金属层219的该底表面219B直接接触。换句话说，气隙结构G通过能量可去除结构353与第一金属层119及第二金属层219分开。
如上所述，在一些实施例中，气隙结构G的六个部分彼此连接。因此，导电结构339被气隙结构G包围。另外，依据一些实施例，导电结构339与能量可去除结构353分离。之后将详细描述能量可去除结构353。
图3例示本公开一些实施例的半导体元件结构300a的制备方法10的流程示意图。制备方法10包括步骤S11、S13、S15与S17。步骤S11到S17结合以下附图详细说明。
图4到图15为依据本公开一些实施例形成半导体元件结构300a的中间阶段的剖视图。具体来说，图4至图15为依据一些实施例制备第一半导体晶粒100a的顺序制程流程的剖视图。对应的步骤是绘示在如图3所示的方法10中的步骤S11。
如图4所示，提供一第一半导体基底101。第一半导体基底101是可一集成电路(IC)芯片的一部分，其包括各种被动与主动微电子元件，例如电阻器、电容器、电感器、二极管、p型场效应晶体管(pFET)、n型场效应晶体管(nFET)、金属氧化物半导体场效应晶体管(MOSFET)、互补金属氧化物半导体(CMOS)晶体管、双极结型晶体管(BJT)、横向扩散MOS(LDMOS)晶体管、高压晶体管、高频晶体管、鳍式场效应晶体管(FinFET)、其他适合的IC元件或其的组合的元件。
取决于IC制造阶段，第一半导体基底101可包括被配置为形成IC特征(例如，掺杂区、隔离特征、栅极特征、源极/漏极特征、互连特征、其他特征或其特征的组合)的各种材料层(例如，介电层、半导体层及/或导电层)。为清楚起见，简化第一半导体基底101。应当理解，在第一半导体基底101中可增加额外的特征，且在其他实施例中可替换、修改或消除下面描述的一些特征。
仍参考图4，依据一些实施例，介电层103形成在第一半导体基底101上。在一些实施例中，介电层103由氧化硅、氮化硅、氮氧化硅或其他适用的介电材料制成。此外，介电层103可通过一化学气相沉积(CVD)制程、一物理气相沉积(PVD)制程、一原子层沉积(ALD)制程、一旋涂制程或其他适用的制程形成。
接下来，依据一些实施例，如图5所示，在介电层103上形成一图案化的遮罩105。在一些实施例中，以图案化遮罩105为遮罩蚀刻介电层103，是在介电层103中形成一开口110。开口110可通过一湿蚀刻制程、一干蚀刻制程或其组合制程形成。虽然在本实施例中，在形成开口110之后，图案化遮罩105保留在介电层103上，但可在形成开口110后去除图案化遮罩105。
接着，依据一些实施例，如图6所示，形成一阻挡材料113是共形地覆盖开口110的侧壁与底表面，以及图案化遮罩105的顶表面与侧壁(如果在形成开口110之后去除图案化遮罩105，则可形成阻挡材料113以覆盖介电层103的顶表面)。在一些实施例中，阻挡材料113由钛(Ti)、氮化钛(TiN)、钽(Ta)、氮化钽(TaN)、钴钨(CoW)、其他适用材料或其组合材料制成。此外，阻挡材料113可通过一CVD制程、一PVD制程、一ALD制程、一金属有机化学气相沉积(MOCVD)制程、一溅射制程、一电镀制程或其他适用的制程形成。
在形成阻挡材料113之后，依据图7一些实施例所示，在阻挡材料113上共形地形成一第一金属材料115，且开口110的剩余部分由第一金属材料115填充。在一些实施例中，第一金属材料115由钨(W)、铝(Al)、铜(Cu)、钛(Ti)、钽(Ta)、其组组合或其他适用的金属材料制成。此外，第一金属材料115可通过一CVD制程、一PVD制程、一ALD制程、一MOCVD制程、一溅射制程、一电镀制程或其他适用的制程形成。
随后，依据一些实施例，如图8所示，对第一金属材料115与阻挡材料113进行一平坦化制程，是在开口110(见图5)中形成第一金属层119与阻挡层117。该平坦化制程可包括一化学机械平坦化(CMP)制程，其去除图案化遮罩105以及在介电层103上的阻挡材料113与第一金属材料115的多余部分。
在一些实施例，阻挡层117覆盖第一金属层119的侧壁与底表面。在一些实施例中，第一金属层119的顶表面、阻挡层117的顶表面与介电层103的顶表面彼此实质上共面。在本公开中，用语“实质上”是指优选至少90％、更优选95％、甚至更优选98％，最优选99％。
接着，依据一些实施例，如图9所示，在介电层103上形成一介电层121。在一些实施例中，阻挡层117与第一金属层119被介电层121覆盖。形成介电层121的部分材料及制程与形成介电层103的材料及制程类似或相同，在此不再重复。
接着，依据一些实施例，如图2所示，在介电层121上形成一图案化遮罩123。在一些实施例中，以图案化遮罩123为遮罩蚀刻介电层121，以形成贯穿介电层121的一开口130。换句话说，开口130曝露出第一金属层119的部分顶表面119T。开口130可通过一湿蚀刻制程、一干蚀刻制程或其组合制程形成。在形成开口130之后，可去除图案化遮罩123。
依据一些实施例，如图11所示，在形成开口130之后，形成一第一导电聚合物材料133以覆盖开口130的侧壁130S与底表面130B以及介电层121的顶表面。在一些实施例中，第一金属层119的该顶表面119T被开口130曝露的该部分被第一导电聚合物材料133覆盖。
在一些实施例中，第一导电聚合物材料133包括石墨烯或共轭聚合物，例如聚(3,4-乙烯二氧噻吩)(PEDOT)或聚苯胺(PANI)。在一些实施例中，第一导电聚合物材料133通过一CVD制程、一PVD制程、一ALD制程、一旋涂制程或其他适合的制程形成。
接着，对第一导电聚合物材料133进行一非等向性蚀刻制程，以垂直方向去除各处等量的第一导电聚合物材料133，而在开口130的侧壁130S上留下第一导电聚合物衬垫135，如图所示在图。图12依据一些实施例。在一些实施例中，该蚀刻制程是一干蚀刻制程。依据一些实施例，在该蚀刻制程之后，介电层121的该顶表面被曝露，且第一金属层119的顶表面119T被部分地曝露。
依据一些实施例，如图13所示，在形成第一导电聚合物衬垫135之后，在介电层121上形成一第一导电材料137，且开口130的剩余部分由第一导电材料137填充。成第一导电材料137的部分材料及制程与形成第一金属材料115的材料及制程类似或相同，在此不再详述。在一些实施例中，第一导电聚合物衬垫135被一第一导电材料137覆盖。
依据一些实施例，如图14所示，然后，对第一导电材料137进行一平坦化制程是在开口130(见图12)中形成一第一导电通孔139。该平坦化制程可包括一CMP制程，其去除介电层121上方的第一导电材料137的多余部分。在该平坦化制程之后，第一导电通孔139的顶表面、第一导电聚合物衬垫135的顶表面与介电层121的顶表面彼此共面，从而获得第一半导体晶粒100a。在一些实施例中，第一导电通孔139与第一导电聚合物衬垫135设置在第一金属层119上且与第一金属层119直接接触，并且第一导电通孔139被第一导电聚合物衬垫135包围。
图15为依据本公开一些实施例形成半导体元件结构300a的中间阶段的剖视图。具体地，图15为依据一些实施例的第二半导体晶粒200a的剖视图。对应的步骤是绘示在如图3所示的方法10中的步骤S13。
形成第二半导体晶粒201、介电层203、阻挡层217、第二金属层219、介电层221、第二导电聚合物衬垫235及第二导电通孔239的一些材料与制程类似于，或者分别与形成第一半导体晶粒101、介电层103、阻挡层117、第一金属层119、介电层121、第一导电聚合物衬垫135及第一导电通孔139的部分相同，在此不再详述。在形成第二导电通孔239之后，获得一第二半导体晶粒200a。在一些实施例中，第二导电通孔239及第二导电聚合物衬垫235设置在第二金属层219上且与第二金属层219直接接触，并且第二导电通孔239被第二导电聚合物衬垫235包围。
接下来，依据一些实施例，如图1所示，将第二半导体晶粒200a倒置并接合在第一半导体晶粒100a上，并且使介电层221面向介电层121。对应的步骤是绘示在如图3所示的方法10中的步骤S15。在接合制程之后，获得一半导体元件结构300a。
在一些实施例中，第二导电通孔239接合在第一导电通孔139上，且第二导电聚合物衬垫235接合在第一导电聚合物衬垫135上。在一些实施例中，第一导电通孔139、第二导电通孔239、第一导电聚合物衬垫135与第二导电聚合物衬垫235形成导电结构339，与第一半导体晶粒100a的第一金属层119与第二半导体晶粒电连接。在一些实施例中，第一半导体基底101中的电气元件(未示出)通过第一金属层119、导电结构339与第二金属层219电连接到第二半导体基底201中的电气元件(未示出)。
图16至17为依据本公开一些实施例形成半导体元件结构300b的中间阶段的剖视图。具体来说，图16至17为依据本公开一些实施例的制备该第一半导体晶粒100b的顺序制程流程的剖视图。
依据一些实施例，如图16所示，在形成第一导电通孔139之后(即在图14的步骤之后)，在介电层121上形成一图案化遮罩141。在一些实施例中，以图案化遮罩141为遮罩蚀刻介电层121，是在介电层121中形成一开口结构150。虽然在图16的剖视图中示出开口结构150的六个部分，开口结构150的六个部分可在不同的剖视图中彼此连接。开口结构150可通过一湿蚀刻制程、一干蚀刻制程或其组合制程形成。在形成开口结构150之后，可去除图案化遮罩141。
接着，如图17所示，依据一些实施例，在开口结构150中形成一第一能量可去除材料153。在一些实施例中，第一能量可去除材料153形成在第一金属层119与介电层103上。在一些实施例中，第一能量可去除材料153包括一可热分解材料。在一些其他实施例中，第一能量可去除材料153包括一光子可分解材料、一电子束可分解材料或其他可应用的能量可分解材料。
具体地，在一些实施例中，第一能量可去除材料153包括一基础材料与一旦曝露于能量源(例如，热)就实质上被去除的一可分解的致孔剂材料。在一些实施例中，该基础材料包括：一氢倍半硅氧烷(HSQ)、甲基倍半硅氧烷(MSQ)、多孔聚芳基醚(PAE)、多孔SiLK或多孔氧化硅(SiO2)，且该可分解的致孔剂材料包括一致孔剂有机化合物，是可在随后的制程中为最初由该第一能量可去除材料所占据的空间提供孔隙。
第一能量可去除材料153可通过一沉积制程与一平坦化制程形成。该沉积制程可包括一CVD制程、一PVD制程、一ALD制程、一旋涂制程或其他适合的制程。该平坦化制程是可一CMP制程。在开口结构150被第一能量可去除材料153填充后，即得到修改后的第一半导体晶粒100b。
图18至图20为依据本公开一些实施例形成半导体元件结构300b的中间阶段的剖视图。具体来说，图18至图20为依据本公开一些实施例的制备该第一半导体晶粒100b的顺序制程流程的剖视图。
参考图18，依据一些实施例，在形成第二导电通孔239之后(即，在图15的步骤之后)，在介电层221上形成一图案化遮罩241。在一些实施例中，以图案化遮罩241为遮罩蚀刻介电层221，是在介电层221中形成开口结构250。虽然在图18的剖视图中开口结构250的六个部分，开口结构250的六个部分可在不同的剖视图中彼此连接。开口结构250可通过一湿蚀刻制程、一干蚀刻制程或其组合制程形成。在形成开口结构250之后，可去除图案化遮罩241。
接着，依据一些实施例，如图19所示，在开口结构250中形成一第二能量可去除材料253。在一些实施例中，第二能量可去除材料253形成在第二金属层219与介电层203上。形成第二能量可去除材料253的部分材料及制程与形成第一能量可去除材料153的材料及制程类似或相同，在此不再详述。在开口结构250被第二能量可去除材料253填充后，得到一第二半导体晶粒200b。
然后，如图20所示，依据一些实施例，将修改后的第二半导体晶粒200b倒置并接合在修改后的第一半导体晶粒100b上，使介电层221面向介电层121。在一些实施例中，第二能量可去除材料253接合在第一能量可去除材料153上。类似于半导体元件结构300a，第一导电通孔139、第二导电通孔239、第一导电聚合物衬垫135与第二导电聚合物衬垫235形成一导电结构339电连接修改后的第一半导体晶粒100b的第一金属层119与第二半导体晶粒200b的第二金属层219。
随后，依据一些实施例，如图20所示，对图20的结构进行一热处理制程，将接合的第一能量可去除材料153与第二能量可去除材料253转变为一能量可去除结构353与一气隙结构G。对应的步骤是绘示在如图3所示的方法10中的步骤S17。在一些实施例中，气隙结构G被能量可去除结构353包围。
更具体地，在一些实施例中，该热处理制程是去除第一能量可去除材料153与第二能量可去除材料253的该可分解的致孔剂材料以产生孔隙，且第一能量可去除材料153与第二能量可去除材料253的该基础材料堆积在第一能量可去除材料153与第二能量可去除材料253所占空间的边缘。依据一些实施例，在去除可分解的致孔剂材料后，孔隙被空气填充，从而在第一能量可去除材料153与第二能量可去除材料253(即能量可去除结构353)的剩余部分内部获得气隙结构G。
在一些实施例中，能量可去除结构353与气隙结构G形成在第一半导体晶粒100b的第一金属层119与第二半导体晶粒200b的第二金属层219之间。在一些实施例中，气隙结构G通过一能量可去除结构353与第一金属层119及第二金属层219分开。在一些实施例中，能量可去除结构353与第一金属层119及第二金属层219直接接触。在该热处理制程之后，得到一半导体元件结构300b。
本公开提供了半导体元件结构300a与300b的实施例。为了降低电阻，半导体元件结构300a与300b包括分别具有包围导电通孔139、239的导电聚合物衬垫135、235。由于导电聚合物衬垫135、235包括低电阻导电材料，例如石墨烯或共轭聚合物(例如PEDOT、PANI等)，因此可减少电阻电容(RC)延迟。因此，可提高半导体元件结构300a、300b的操作速度，且显著地提高整体元件效能。
本公开的一实施例提供一种半导体元件结构。该半导体元件结构具有一第一金属层以与一第二金属层，该第一金属层设置在一半导体基底，该第二金属层设置在该第一金属层上。该半导体元件结构还具有一导电结构，设置在该第一金属层与该第二金属层之间。该导电结构包括一第一导电通孔与一第一导电聚合物衬垫，该第一导电聚合物衬垫包围该第一导电通孔。
本公开的另一实施例提供一种半导体元件结构。该半导体元件结构包括设置在一半导体基底上的一第一金属层与设置在该第一金属层上的一导电结构。该导电结构包括一第一导电通孔；设置在该第一导电通孔上的一第二导电通孔；设置在该第一导电通孔的侧壁上的一第一导电聚合物衬垫；以及设置在该第二导电通孔的侧壁上的一第二导电聚合物衬垫。该第一导电聚合物衬垫与该第二导电聚合物衬垫包括石墨烯或共轭聚合物。该半导体元件结构还包括设置在该导电结构上的一第二金属层。
本公开的又一实施例提供一种半导体元件结构的制备方法。该制备方法包括形成一第一半导体晶粒与形成一第二半导体晶粒。该第一半导体晶粒包括一第一金属层、该第一金属层上的一第一导电通孔与包围该第一导电通孔的一第一导电聚合物衬垫。该第二半导体晶粒包括一第二金属层、该第二金属层上的一第二导电通孔与包围该第二导电通孔的一第二导电聚合物衬垫。该制备方法还包括通过将该第二半导体晶粒接合到该第一半导体晶粒形成电连接该第一金属层与该第二金属层的一导电结构。该导电结构由该第一导电通孔、该第一导电聚合物衬垫、该第二导电通孔与该第二导电聚合物衬垫形成。该第一导电通孔与该第二导电通孔接合，且该第一导电聚合物衬垫与该第二导电聚合物衬垫接合。
本公开的实施例具有一些有利特征。通过形成包围导电通孔的导电聚合物衬垫，可降低导电通孔的电阻，减轻集成电路在线路上的电阻电容延迟(RC-Delay)效应。因此，半导体元件结构的运行速度是以提升，从而显著地提升整体半导体元件效能。
虽然已详述本公开及其优点，然而应理解可进行各种变化、取代与替代而不脱离权利要求所定义的本公开的精神与范围。例如，可用不同的方法实施上述的许多制程，并且以其他制程或其组合替代上述的许多制程。
再者，本申请案的范围并不受限于说明书中所述的制程、机械、制造、物质组成物、手段、方法与步骤的特定实施例。该技艺的技术人士可自本公开的揭示内容理解可根据本公开而使用与本文所述的对应实施例具有相同功能或是达到实质上相同结果的现存或是未来发展的制程、机械、制造、物质组成物、手段、方法、或步骤。据此，此等制程、机械、制造、物质组成物、手段、方法、或步骤是包括于本申请案的权利要求内。

Claims (20)

1.一种半导体元件结构，包括：
一第一金属层，设置在一半导体基底上；
一第二金属层，设置在该第一金属层上；以及
一导电结构，设置在该第一金属层与该第二金属层之间，其中该导电结构包括一第一导电通孔与一第一导电聚合物衬垫，该第一导电聚合物衬垫包围该第一导电通孔。
2.如权利要求1所述的半导体元件结构，其中该第一导电聚合物衬垫包括石墨烯或共轭聚合物。
3.如权利要求1所述的半导体元件结构，其中该第一导电通孔与该第一导电聚合物衬垫及该第一金属层的一顶表面直接接触。
4.如权利要求3所述的半导体元件结构，还包括：
一第一介电层，设置在该第一金属层与该第二金属层之间，其中该第一导电聚合物衬垫被该第一介电层包围，且该第一介电层与该第一金属层的该顶表面直接接触。
5.如权利要求1所述的半导体元件结构，其中该导电结构还包括一第二导电通孔及包围该第二导电通孔的一第二导电聚合物衬垫，其中该第二导电通孔接合在该第一导电通孔上，该第二导电聚合物衬垫接合在该第一导电聚合物衬垫上，且其中该第二导电聚合物衬垫包括石墨烯或共轭聚合物。
6.如权利要求5所述的半导体元件结构，其中该第二导电通孔与第二导电聚合物衬垫直接接触该第二金属层的一底表面，且其中该半导体元件结构还包括：
一第二介电层，设置在该第一金属层与该第二金属层之间，其中该第二导电聚合物衬垫被该第二介电层包围，且该第二介电层直接接触该第二金属层的该底表面。
7.如权利要求1所述的半导体元件结构，还包括：
一能量可去除结构，设置在该第一金属层与该第二金属层之间且与该导电结构分离，其中一气隙结构被该能量可去除结构包围。
8.一种半导体元件结构，包括：
一第一金属层，设置在一半导体基底上；
一导电结构，设置在该第一金属层上，其中该导电结构包括：
一第一导电通孔；
一第二导电通孔，设置在该第一导电通孔上；
一第一导电聚合物衬垫，设置在该第一导电通孔侧壁上；以及
一第二导电聚合物衬垫，设置在该第二导电通孔的侧壁上；
其中该第一导电聚合物衬垫与该第二导电聚合物衬垫包括石墨烯或共轭聚合物；以及
一第二金属层，设置在导电结构上。
9.如权利要求8所述的半导体元件结构，其中该第一导电聚合物衬垫与该第二导电聚合物衬垫包括聚(3,4-乙撑二氧噻吩)或聚苯胺。
10.如权利要求8所述的半导体元件结构，其中该第一导电通孔的侧壁与该第二导电通孔的侧壁实质上对齐。
11.如权利要求8所述的半导体元件结构，还包括：
一第一介电层与一第二介电层，设置在该第一金属层与该第二金属层之间，其中该第一介电层包围该第一导电聚合物衬垫，该第二介电层包围该第二导电聚合物衬垫。
12.如权利要求11所述的半导体元件结构，还包括：
一能量可去除结构贯穿该第一介电层与该第二介电层是接触该第一金属层与该第二金属层，其中该能量可去除结构与该导电结构分离。
13.如权利要求12所述的半导体元件结构，其中一气隙结构通过该能量可去除结构与该第一金属层与及第二金属层分离。
14.一种半导体元件结构的制备方法，包括：
形成一第一半导体晶粒，其中该第一半导体晶粒包括一第一金属层、该第一金属层上的一第一导电通孔以及包围该第一导电通孔的一第一导电聚合物衬垫；
形成一第二半导体晶粒，其中该第二半导体晶粒包括一第二金属层、该第二金属层上的一第二导电通孔以及包围该第二导电通孔的一第二导电聚合物衬垫；以及
通过将该第二半导体晶粒接合到该第一半导体晶粒形成电连接该第一金属层与该第二金属层的一导电结构，其中该导电结构由该第一导电通孔、该第一导电聚合物衬垫、该第二导电通孔形成，且该第二导电聚合物衬垫、该第一导电通孔与该第二导电通孔接合，并且该第一导电聚合物衬垫与第二导电聚合物衬垫接合。
15.如权利要求14所述的制备方法，其中该第一半导体晶粒的形成包括：
在一第一半导体基底上形成该第一金属层；
形成覆盖该第一金属层的一第一介电层；
蚀刻该第一介电层形成一第一开口是曝露该第一金属层的一部分；以及
在该第一开口中形成一第一导电通孔与一第一导电聚合物衬垫以接触第一金属层的该部分。
16.如权利要求15所述的制备方法，其中该第一导电聚合物衬垫的形成包括：
在该第一开口的一底表面与侧壁上沉积一第一导电聚合物材料；以及
去除该第一开口的该底表面上的该第一导电聚合物材料的一部分，其中该第一导电聚合物材料的剩余部分形成该第一导电聚合物衬垫。
17.如权利要求16所述的制备方法，其中该第一导电高分子材料包括石墨烯、聚(3,4-乙撑二氧噻吩)或聚苯胺。
18.如权利要求15所述的制备方法，其中该第一半导体晶粒的形成还包括：
在形成该第一导电通孔后，蚀刻该第一介电层是形成曝露该第一金属层的另部分的一第二开口；以及
使用一第一能量可去除材料填充该第二开口。
19.如权利要求18所述的制备方法，其中该第二半导体晶粒还包括一第二能量可去除材料，在该第二半导体晶粒接合该第一半导体之后，该第二能量可去除材料与该第一能量可去除材料接合。
20.如权利要求19所述的制备方法，还包括：
形成该导电结构后，执行一热处理制程是将该第一能量可去除材料与该第二能量可去除材料转变为一能量可去除结构，其中一气隙结构被该能量可去除结构包围，而该导电结构被该能量可去除结构包围。
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