CN114080104B - Circuit board assembly and electronic equipment - Google Patents

Circuit board assembly and electronic equipment Download PDF

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Publication number
CN114080104B
CN114080104B CN202010837668.7A CN202010837668A CN114080104B CN 114080104 B CN114080104 B CN 114080104B CN 202010837668 A CN202010837668 A CN 202010837668A CN 114080104 B CN114080104 B CN 114080104B
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CN
China
Prior art keywords
circuit board
elevated plate
electronic component
elevated
board assembly
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Application number
CN202010837668.7A
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Chinese (zh)
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CN114080104A (en
Inventor
郭健强
朱辰
宗献波
史洪宾
杨帆
罗文君
李志海
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Honor Device Co Ltd
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Honor Device Co Ltd
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Priority to CN202010837668.7A priority Critical patent/CN114080104B/en
Publication of CN114080104A publication Critical patent/CN114080104A/en
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Publication of CN114080104B publication Critical patent/CN114080104B/en
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/182Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0215Grounding of printed circuits by connection to external grounding means

Abstract

A circuit board assembly and electronic equipment relate to the technical field of electronics. The circuit board assembly comprises a circuit board, an elevating board, a first electronic component and a chip. The elevated plate is arranged on the circuit board. The first electronic component is fixed on the circuit board. The first electronic component and the elevated plate are positioned on the same side of the circuit board. The chip includes a plurality of solder balls. The solder balls are fixed on one side of the elevated plate far away from the circuit board. The chip is electrically connected to the circuit board through the raised plate. The orthographic projection of the chip on the first surface is a first projection. The orthographic projection of the first electronic component on the first surface is a second projection. The second projection is located within the first projection. Thus, the first electronic component can effectively utilize the space between the chip and the circuit board, thereby remarkably improving the space utilization rate of the circuit board assembly. At this time, the circuit board assembly can arrange many electronic components.

Description

Circuit board assembly and electronic equipment
Technical Field
The present application relates to the field of electronic technologies, and in particular, to a circuit board assembly and an electronic device.
Background
With the development of mobile phone technology, users want to integrate more electronic components into the circuit board of the mobile phone, so as to realize more diversified functions of the mobile phone. However, the area of the circuit board of the conventional mobile phone is limited, so that it is difficult to set many electronic components, and it is difficult for the mobile phone to implement more diversified functions. Accordingly, there is an increasing pressure to design a circuit board assembly with a large number of electronic components arranged thereon.
Disclosure of Invention
The technical scheme of the application provides a circuit board subassembly and electronic equipment of more electronic components of having arranged.
In a first aspect, a circuit board assembly is provided. The circuit board assembly comprises a circuit board, an elevating board, a first electronic component and a chip. The elevated plate is arranged on the circuit board. The first electronic component is fixed on the circuit board. The first electronic component and the elevated plate are positioned on the same side of the circuit board. The chip includes a plurality of solder balls. The solder balls are fixed on one side of the elevated plate far away from the circuit board. The chip is electrically connected with the circuit board through the elevated plate. The orthographic projection of the chip on the first surface is a first projection. The orthographic projection of the first electronic component on the first surface is a second projection. The second projection is located within the first projection. The first surface is a surface of the circuit board facing the elevated board. At this time, in the thickness direction of the circuit board assembly, the chip covers the first electronic component, that is, the first electronic component is located between the chip and the circuit board.
In the present application, the chip is described by taking a general-purpose memory as an example. It is understood that the universal memory includes a body and a plurality of solder balls. The solder balls are arranged on one surface of the main body. The main body is generally arranged in multiple layers, and at the moment, a plurality of clock lines passing through the main body can share one address line. The number of address lines of the body is small. The number of solder balls electrically connected to the address lines can be reduced accordingly. At this time, the plurality of solder balls will not be able to fill the surface of the body. By collectively arranging the solder balls in a partial region of the main body, a region where the solder balls are not arranged is made free on the surface of the main body. In this implementation, the solder balls are centrally arranged in the middle of the body.
It can be understood that, by arranging the raised plate between the middle part of the universal memory and the circuit board, a space capable of arranging devices is opened up in the area between the universal memory and the circuit board, namely, the area vacated in the universal memory and the area surrounded by the circuit board and the raised plate. In this way, if the first electronic components arranged at other positions on the circuit board are arranged in the space, on one hand, the space between the universal memory and the circuit board is effectively utilized, the space utilization rate of the circuit board assembly is improved, and on the other hand, the area for arranging the first electronic components can be vacated at other positions on the circuit board. Therefore, the vacated area can be used for arranging more electronic components with new functions, so that the electronic equipment can realize diversified functions. In this case, when the first electronic components having new functions are arranged in the space, the space between the general-purpose memory and the circuit board is effectively used, and the electronic apparatus can realize diversified functions.
In addition, when the first electronic component is positioned between the circuit board and the universal memory, the arrangement of the first electronic component and the universal memory on the circuit board is more compact. The area on the circuit board is not easily wasted.
In addition, the elevated plate can play a role in supporting the universal memory and also can play a role in electrically connecting the universal memory to the circuit board. Therefore, the elevated plate according to the present embodiment has a function of "one object has multiple purposes".
In this embodiment, the first electronic component may comprise a portion of an electronic component of a power distribution network.
For example, the first electronic component may include a power chip. The power supply chip is electrically connected to the universal memory. The power supply chip may be used to power the general purpose memory. It can be understood that when the power supply chip is located between the universal memory and the circuit board, the connection distance between the power supply chip and the universal memory is small, and at this time, energy is less lost in the transmission process.
For another example, the first electronic component may also include a filter capacitor. The filter capacitor is connected between the power supply chip and the universal memory. It can be understood that when the power chip supplies energy to the general-purpose memory, the filter capacitor can perform electric performance processing such as filtering on the signal of the power supply. In addition, because the filter capacitor is positioned between the general memory and the circuit board, the connection distance between the filter capacitor and the general memory is short. At this time, the filtering effect of the filter capacitor is better.
For another example, the first electronic component may also include a voltage regulating resistor. The voltage regulating resistor is connected between the power supply chip and the universal memory. When the power supply chip supplies energy to the universal memory, the voltage regulating resistor can regulate the voltage flowing into the universal memory. Because the voltage regulating resistor is positioned between the universal memory and the circuit board, the connection distance between the voltage regulating resistor and the universal memory is shorter. The voltage regulating effect of the voltage regulating resistor is better, and the voltage flowing into the universal memory is better and more accurate.
In other alternative modes, the first electronic component may also include electronic components such as a voltage regulator and an inductor.
In other optional manners, when the first electronic component includes a part of the electronic components of the power distribution network, the first electronic component may also perform electrical performance processing, such as filtering, on power supplies and signals of other chips of the circuit board assembly.
In other optional manners, the first electronic component may also include other chips with new functions, such as a compass chip, a Near Field Communication (NFC) chip, a fast charging chip, or a WiFi chip.
In a possible implementation manner according to the first aspect, an orthogonal projection of the peripheral side surface of the elevated plate on the first surface is a third projection. The third projection is located within the first projection. The number of the first electronic components is multiple. The plurality of first electronic components are arranged around the peripheral side face of the elevated plate. At this time, the first electronic component is located on the periphery of the elevated plate. The plurality of first electronic components can be enclosed into a ring shape, an L shape, an Contraband shape, a Pi shape or the like.
It is understood that, when a plurality of the first electronic components are disposed around the peripheral side surface of the elevated plate, a space in which devices can be arranged between the general-purpose memory and the circuit board is large. At this time, the number of the first electronic components arranged in the space is large. Therefore, the space utilization rate of the circuit board assembly is high, and the electronic equipment has functions which are easy to diversify.
In one possible implementation form according to the first aspect, the elevated plate comprises first and second oppositely facing sides and third and fourth oppositely facing sides. The third side and the fourth side are connected between the first side and the second side. A length between the third side and the fourth side is greater than a length between the first side and the second side. The orthographic projection of the first side face and the second side face on the first surface is a fourth projection. A portion of the fourth projection is located within the first projection. The number of the first electronic components is multiple. The plurality of first electronic components are arranged close to the first side face. Or the plurality of first electronic components are arranged close to the second side face. Or, part of the first electronic component is arranged close to the first side face and part of the first electronic component is arranged close to the second side face.
It is understood that when the length between the third side and the fourth side is greater than the length between the first side and the second side, the end of the elevated board near the third side and the end of the elevated board near the fourth side may be connected to a circuit board. At the moment, the connection area between the elevated plate and the circuit board is larger, and the connection firmness between the elevated plate and the circuit board is better. When the electronic equipment falls or is shot and collided with other objects, the connection point between the elevated plate and the circuit board and the connection point between the elevated plate and the universal memory are not easy to crack.
In addition, the circuit board is generally fixed inside the electronic device by screws, and at this time, the screws may apply stress to the circuit board during locking the screws on the circuit board or detaching the screws from the circuit board. The stress is easily transmitted to the elevated board and the general purpose memory through the circuit board. When the elevated plate and the circuit board have better connection firmness, the elevated plate can effectively resist the partial stress, so that the cracking of a connection point between the elevated plate and the circuit board or the cracking of a connection point between the general memory and the elevated plate is avoided.
According to the first aspect, or any one of the above implementations of the first aspect, the height of the elevated plate is in the range of 0.1 mm to 5mm, i.e., the distance between the top surface of the elevated plate and the bottom surface of the elevated plate is in the range of 0.1 mm to 5 mm. For example, the height of the elevated plate may be equal to 0.1 millimeters, 0.2 millimeters, 0.3 millimeters, 0.5 millimeters, 1.3 millimeters, 2.3 millimeters, 3 millimeters, 4 millimeters, or 5 millimeters. In this case, the first electronic component may be an electronic component having a height of 0.1 mm to 5 mm.
It will be appreciated that at this size, on the one hand, the thickness of the circuit board assembly does not increase significantly due to the height of the elevated plate, and at this time, when the circuit board assembly is applied to an electronic device, the thickness of the electronic device does not increase to a great extent. On the other hand, the distance between the circuit board and the general-purpose memory is large. In this case, some devices with a relatively high height can be arranged between the circuit board and the universal memory.
According to a first aspect or any one of the above implementation manners of the first aspect, the elevated plate includes a substrate and a plurality of first conductive members. The first conductive pieces are fixed on the substrate. Each first conductive piece comprises a first end and a second end, and the first end is exposed relative to the top surface of the elevated plate. The first end is connected to the solder ball. The second end is exposed relative to the bottom surface of the elevated plate. The second end is connected to the circuit board. The top surface of the elevated plate is the surface of the elevated plate facing the chip. The bottom surface of the elevated plate is the surface of the elevated plate facing the circuit board.
It is understood that the first end of each first conductive member is connected to the solder ball, and the second end of each first conductive member is connected to the circuit board, so that the general-purpose memory can be electrically connected to the circuit board through the elevated board.
According to the first aspect, or any implementation manner of the first aspect above, the circuit board may further include a plurality of ground pieces. The plurality of grounding pieces are arranged opposite to the first projection. At this time, the general memory covers the ground in the thickness direction of the circuit board assembly. The plurality of grounding pieces are all grounded. Thus, when the electronic components on the circuit board generate static electricity and the static electricity is close to the universal storage through the circuit board, the static electricity can be transmitted to the ground through the grounding piece. Thus, the general-purpose memory is less likely to be damaged by static electricity.
According to a first aspect, or any one of the above implementations of the first aspect, the elevated plate further comprises a plurality of second electrically conductive members. The plurality of second conductive pieces are fixed on the substrate. The second conductive members are located between the first conductive members and the peripheral side surface of the elevated plate. The end part of each second conductive piece close to the circuit board is connected to the circuit board, and the end part of each second conductive piece close to the circuit board is grounded through the circuit board. And a first bonding pad is connected to the end part of each second conductive piece close to the universal memory. The first pad protrudes toward a surface of the general purpose memory with respect to the elevated plate.
It is understood that when the first electronic component generates static electricity and the static electricity approaches the solder ball through the space between the raised board and the universal memory, the static electricity can be captured by the first pad, transmitted to the circuit board through the first pad and the second conductive member, and transmitted to the ground through the circuit board. Thus, the general-purpose memory is less likely to be damaged by static electricity generated by the first electronic component.
In addition, as the plurality of second conductive members approximately form a ring shape, when static electricity generated by the first electronic component approaches the solder ball from different directions, most of the static electricity can be captured by the first bonding pad and transmitted to the ground through the second conductive members, thereby effectively preventing the universal memory from being damaged.
In addition, the second conductive piece is connected to the circuit board, so that the connection firmness between the elevated board and the circuit board is better. When the electronic equipment falls or is shot and collided with other objects, the connection point between the elevated plate and the circuit board and the connection point between the elevated plate and the universal memory are not easy to crack.
In addition, the circuit board is generally fixed inside the electronic device by screws, and at this time, the screws may apply stress to the circuit board during locking the screws on the circuit board or detaching the screws from the circuit board. The stress is easily transmitted to the elevated board and the general memory through the circuit board. When the elevated plate and the circuit board have better connection firmness, the elevated plate can effectively resist the partial stress, so that the cracking of a connection point between the elevated plate and the circuit board or the cracking of a connection point between the general memory and the elevated plate is avoided.
In one implementation, each of the second conductive members is connected to a ground member near an end of the universal memory and is grounded through the ground member.
According to the first aspect, or any one of the above implementation manners of the first aspect, the second conductive member is exposed relative to a peripheral side surface of the elevated plate.
It can be understood that when the first electronic component or other electronic components on the circuit board generate static electricity and the static electricity is close to the universal memory, the static electricity can be easily captured by the second conductive component, and is transmitted to the circuit board through the second conductive component and the second bonding pad, and then is transmitted to the ground through the circuit board. Thus, the general-purpose memory is not easily damaged by static electricity. In addition, the second conductive member is exposed relative to the peripheral side surface of the substrate, so that the exposed area of the second conductive member relative to the substrate is large. In this way, the second conductive member can shield static electricity from more directions, that is, the second conductive member has better capability of shielding static electricity.
In addition, the second conductive member can be formed by a conventional process of drilling electroplating. At this time, the second conductive member is in an arc structure. It can be understood that compared with the sidewall electroplating process, the drilling electroplating process can eliminate the steps of electroless copper deposition, electroplating and the like on the hole wall, thereby reducing the processing complexity of the elevated plate and reducing the processing cost.
According to a first aspect or any one of the above implementation manners of the first aspect, the circuit board assembly includes a second electronic component. The second electronic component is arranged on the peripheral side face of the elevated plate. The second electronic component is electrically connected to the elevated plate.
It is understood that the area of the peripheral side surface is effectively used by providing the second electronic component on the peripheral side surface of the elevated plate. At this time, the space between the universal memory and the circuit board is not easy to cause the number of the arranged first electronic components to be less due to the fact that the area for fixing the first electronic components on the circuit board is less. In other words, more electronic components can be arranged in the space between the universal memory and the circuit board, and the utilization rate of the space of the circuit board assembly is higher.
In addition, when the second electronic component is fixed on the peripheral side surface of the elevated plate, the area for arranging the second electronic component can be made free at other positions on the circuit board. Therefore, the vacated area can be used for arranging more electronic components with new functions, so that the electronic equipment can realize diversified functions. Alternatively, when the second electronic component is an electronic component having a new function, the electronic apparatus can also realize diversified functions.
According to the first aspect, or any implementation manner of the first aspect above, the circuit board assembly further includes a shield cover. The shielding cover is fixed on the circuit board and covers the universal memory. At this time, the shielding case also covers the elevated plate and the first electronic component. Therefore, when the electronic components around the universal memory generate static electricity and the static electricity is close to the universal memory, the shielding cover can effectively shield the static electricity and prevent the universal memory from being damaged by the static electricity.
According to the first aspect, or any implementation manner of the first aspect above, the circuit board assembly further includes a glue layer. And part of the adhesive layer is arranged between the universal memory and the elevated plate.
It can be understood that, when a part of the adhesive layer is disposed between the universal storage and the raised plate, on one hand, the adhesive layer can improve the connection firmness between the universal storage and the raised plate. When the electronic equipment falls or is shot and collided with other objects, the universal memorizer is not easy to separate or crack from the elevated plate. On the other hand, when the electronic components (including the first electronic component) on the circuit board generate static electricity, and the static electricity is close to the universal memory through the circuit board, the static electricity can be shielded by the glue layer. At this time, the general-purpose memory is not easily damaged by static electricity.
According to a first aspect or any one of the above implementations of the first aspect, the elevated plate is provided with a glue groove. The opening of the glue groove is positioned on the top surface of the elevated plate. And part of the glue layer is arranged in the glue groove.
It will be appreciated that the surface area of the elevated plate can be increased when the elevated plate is provided with glue grooves. At this moment, when partial glue layer sets up in gluing the inslot, the area of being connected between glue layer and the overhead board is great, and the firm in connection degree between general memory and the overhead board is better.
In addition, compared with the method for arranging the glue groove on the circuit board, the method for arranging the glue groove on the elevated plate effectively utilizes the advantage of small area of the elevated plate, obviously reduces the time for arranging the glue groove, simplifies the process for arranging the glue groove, further obviously reduces the cost, and avoids the circuit board from being damaged.
According to a first aspect, or any one of the above implementations of the first aspect, the opening of the glue groove extends from the top surface of the elevated plate to a portion of the peripheral side surface of the elevated plate.
It will be appreciated that during dispensing, the glue between the universal store and the elevated plate can flow out through the openings in the peripheral side. At this point, less glue is trapped between the universal store and the elevated plate. When glue between the universal memory and the elevating plate is solidified to form the glue layer, the thickness of the glue layer in the thickness direction is not too thick. The adhesive layer between the universal memory and the elevated plate is not easy to expand due to heating so as to force the solder balls of the universal memory to be separated from the elevated plate.
According to the first aspect, or any one of the above implementation manners of the first aspect, the elevated plate is provided with a diversion hole. The bottom wall of the glue groove penetrates through the diversion hole to the bottom surface of the elevated plate. And part of the adhesive layer is positioned in the diversion hole. Part of the adhesive layer is arranged between the circuit board and the elevating plate.
It is understood that during the dispensing process, the glue between the universal storage and the elevated plate can flow to the space between the circuit board and the elevated plate through the glue groove and the flow guide holes. At this time, the glue remaining between the universal store and the elevated plate is reduced to a greater extent. When glue between the universal memory and the elevating plate is solidified to form a glue layer, the thickness of the glue layer in the thickness direction is thinner. Thus, the adhesive layer between the universal storage device and the elevated plate is not easy to expand due to heat so as to force the universal storage device to be separated from the elevated plate.
In addition, when glue between the universal storage and the elevating plate flows to a position between the circuit board and the elevating plate through the glue groove and the flow guide hole and is solidified to form a glue layer, the glue layer further adheres the circuit board and the elevating plate firmly. At this moment, the connection firmness between the elevating plate and the circuit board is better. When the electronic equipment falls or collides with other objects, the elevated plate is not easy to separate from the circuit board or crack.
In addition, compared with the solutions of dispensing between the general purpose memory and the elevated board and dispensing between the circuit board and the elevated board, in the present embodiment, when the glue groove and the flow guiding hole are formed in the elevated board, by dispensing between the general purpose memory and the elevated board, the glue can be simultaneously formed between the general purpose memory and the elevated board and between the circuit board and the elevated board. In other words, the glue is dispensed at one position, and the glue layer can be formed at two positions simultaneously. The dispensing frequency of the embodiment is less, the process steps can be saved, and the cost investment is reduced.
According to the first aspect, or any implementation manner of the first aspect, the diversion hole may also be a stepped hole with a wide top and a narrow bottom, that is, the size of the opening of the diversion hole in the bottom wall of the glue groove is larger than the size of the opening of the diversion hole in the bottom surface.
It can be understood that, for a general memory with densely arranged solder balls, during the dispensing process, the glue between the solder balls can flow out through the flow guide holes quickly. At this time, the amount of glue remaining between the solder balls is small. When the glue among the solder balls is solidified to form the glue layer, the thickness of the glue layer is thinner. Thus, the glue layer between the solder balls is not easy to expand due to heat so as to force the universal memorizer to be separated from the elevated plate.
According to the first aspect or any one of the above implementation manners of the first aspect, the diversion hole may also be a stepped hole with a narrow top and a wide bottom, that is, the size of the opening of the diversion hole in the glue groove is smaller than the size of the opening of the diversion hole in the bottom surface.
It can be understood that for a general memory with sparsely arranged solder balls, the glue between the solder balls can flow out through the flow guide holes at a slower speed in the glue dispensing process. At this point, the amount of glue trapped between the solder balls is moderate. When the glue between the solder balls is cured to form the glue layer, the thickness of the glue layer is moderate. Therefore, the glue layer between the solder balls is not easy to reduce the connection firmness between the universal memory and the elevating plate due to the thinner thickness.
According to a first aspect, or any one of the above implementations of the first aspect, the elevated plate is provided with a groove. The opening of the groove is positioned on the bottom surface of the elevated plate. The circuit board assembly includes a third electronic component. The third electronic component is located in the groove. The third electronic component is fixed on the circuit board and electrically connected to the circuit board.
It can be understood that, in the embodiment, the raised plate is provided with the groove, and the opening of the groove is located on the bottom surface of the raised plate, so that a space capable of arranging electronic components, that is, a space surrounded by the groove and the circuit board, is further opened in the region between the universal memory and the circuit board. At this time, if the third electronic components arranged at other positions on the circuit board are arranged in the grooves, the space between the universal memory and the circuit board is effectively utilized, and the space utilization rate of the circuit board assembly is improved. In addition, other positions on the circuit board can make up the area for arranging the third electronic component. Therefore, the vacated area can be used for arranging more electronic components with new functions, so that the electronic equipment can realize diversified functions. In this case, if the third electronic component having a new function is arranged in the space, the space between the general-purpose memory and the circuit board is effectively used, and the electronic apparatus can realize various functions.
In addition, the arrangement of the third electronic component and the universal memory on the circuit board is more compact. The area on the circuit board is not easily wasted.
According to a first aspect, or any one of the above implementations of the first aspect, the opening of the recess extends from the bottom surface of the elevated plate to a portion of the peripheral side surface of the elevated plate.
It will be appreciated that by extending the opening of the recess to the peripheral side, the volume of the space enclosed by the recess and the circuit board is increased. At this time, the number of the third electronic components arranged in the groove is larger, or the size of the third electronic components is larger. In this way, more area can be freed up elsewhere on the circuit board. The vacated area can be used for arranging more electronic components with new functions, so that the electronic equipment can realize diversified functions.
According to the first aspect or any one of the implementation manners of the first aspect above, the circuit board assembly further includes a fourth electronic component. The fourth electronic component is arranged on the side wall of the groove. The fourth electronic component is electrically connected to the elevated plate.
It can be understood that by providing the fourth electronic component on the side wall of the recess, the area of the side wall of the recess is effectively utilized. At this time, the space between the universal memory and the circuit board is not easy to cause the small number of the arranged third electronic components due to the small area for fixing the third electronic components on the circuit board. In other words, more electronic components can be arranged in the space between the universal memory and the circuit board, and the utilization rate of the space of the circuit board assembly is higher.
In addition, when the fourth electronic component is arranged on the side wall of the groove, the area for arranging the fourth electronic component can be vacated at other positions on the circuit board. Therefore, the vacated area can be used for arranging more electronic components with new functions, so that the electronic equipment can realize diversified functions.
According to a first aspect or any one of the above implementation manners of the first aspect, the circuit board assembly includes a fifth electronic component. And the fifth electronic component is arranged on the bottom wall of the groove. The fifth electronic component is electrically connected to the elevated plate.
It can be understood that the area of the bottom wall of the groove is effectively used by providing the fifth electronic component on the bottom wall of the groove. At this time, the space between the universal memory and the circuit board is not easy to cause the small number of the arranged third electronic components due to the small area for fixing the third electronic components on the circuit board. In other words, more electronic components can be arranged in the space between the universal memory and the circuit board, and the utilization rate of the space of the circuit board assembly is higher.
In addition, when the fifth electronic component is arranged on the bottom wall of the groove, the area for arranging the fifth electronic component can be vacated at other positions on the circuit board. Therefore, the vacated area can be used for arranging more electronic components with new functions, so that the electronic equipment can realize diversified functions.
According to a first aspect, or any one of the above implementations of the first aspect, the elevated plate is provided with a first through hole. The first through hole penetrates from the bottom wall of the groove to the top surface of the elevated plate. The circuit board assembly comprises a sixth electronic component. And part of the sixth electronic component is positioned in the groove. And part of the sixth electronic component is positioned in the first through hole.
It will be appreciated that by providing the elevated plate with a first through hole extending from the bottom wall of the recess to the top surface of the elevated plate, a new free space (including the space within the first through hole and the space between the universal memory and the first through hole) is further created in the area between the universal memory and the circuit board. At this time, the sixth electronic devices disposed at other positions on the circuit board are arranged in the vacant space, so that the space between the universal memory and the circuit board is utilized to a greater extent, and the space utilization rate is improved. In addition, other positions on the circuit board can make up the area for arranging the sixth electronic component. Therefore, the vacated area can be used for arranging more electronic components with new functions, so that the electronic equipment can realize diversified functions.
According to a first aspect or any one of the above implementation manners of the first aspect, the first through holes are arranged to be staggered with respect to the solder balls. The sixth electronic component comprises a first filter capacitor. The first filter capacitor is fixed on the circuit board. The first filter capacitor is electrically connected to the circuit board.
It can be understood that, by arranging the sixth electronic components disposed at other positions on the circuit board in the empty space, the space between the general memory and the circuit board is utilized to a greater extent, and the space utilization rate is improved. In addition, other positions on the circuit board can make up the area for arranging the sixth electronic component. Therefore, the vacated area can be used for arranging more electronic components with new functions, so that the electronic equipment can realize diversified functions.
According to a first aspect or any one of the preceding implementation manners of the first aspect, the solder balls comprise first solder balls. The first solder ball is arranged opposite to the first through hole. And the sixth electronic component comprises a second filter capacitor. One end of the second filter capacitor is connected to the first solder ball, and the other end of the second filter capacitor is fixed on the circuit board. The first solder ball is electrically connected to the circuit board through the second filter capacitor.
It can be understood that, one end of the second filter capacitor is electrically connected to the circuit board, and the other end of the second filter capacitor is electrically connected to the first solder ball of the universal memory, so that the distance between the second filter capacitor and the first solder ball is greatly shortened, and the filtering effect of the second filter capacitor is better.
According to the first aspect, or any implementation manner of the first aspect, the solder balls include first solder balls and second solder balls that are arranged at intervals. The first solder balls and the second solder balls are arranged opposite to the first through holes.
And the sixth electronic component comprises a third filter capacitor. One end of the third filter capacitor is connected to the first solder ball, and the other end of the third filter capacitor is connected to the second solder ball. The first solder ball is electrically connected to the second solder ball through the third filter capacitor.
It can be understood that, by electrically connecting one end of the third filter capacitor to the first solder ball and the other end to the second solder ball, the distance between the third filter capacitor and the first solder ball and the distance between the third filter capacitor and the second solder ball are greatly shortened, and the filtering effect of the third filter capacitor is better.
According to a first aspect, or any implementation manner of the first aspect above, the elevated plate is provided with a second through hole. The second through hole penetrates from the top surface of the elevated plate to the bottom surface of the elevated plate. The circuit board assembly comprises a seventh electronic component. The seventh electronic component is located in the second through hole.
It is understood that, by providing the second through hole on the elevated plate, and the second through hole penetrates from the top surface of the elevated plate to the bottom surface of the elevated plate, a new vacant space (including the space in the second through hole and the space between the universal memory and the second through hole) is further opened up in the area between the universal memory and the circuit board. At the moment, the first filter capacitors arranged at other positions on the circuit board are arranged in the vacant space, so that the space between the universal memory and the circuit board is utilized to a greater extent, and the space utilization rate is improved. In addition, other positions on the circuit board can make up the area for arranging the first filter capacitor. Therefore, the vacated area can be used for arranging more electronic components with new functions, so that the electronic equipment can realize diversified functions.
According to a first aspect or any one of the above implementation manners of the first aspect, the solder balls of the general memory include first solder balls. And part of the second through holes are arranged opposite to the first solder balls. In addition, the seventh electronic component is a second filter capacitor. The second filter capacitor can be used for performing electric performance processing such as filtering on the power supply and signals of the general memory. Part of the second filter capacitor is positioned in the second through hole. One end of the second filter capacitor is connected to the circuit board, and the other end of the second filter capacitor is connected to the first solder ball of the universal memory. The first solder ball is electrically connected to the circuit board through the second filter capacitor.
It can be understood that, one end of the second filter capacitor is electrically connected to the circuit board, and the other end of the second filter capacitor is electrically connected to the solder ball of the universal memory, so that the distance between the second filter capacitor and the solder ball is greatly shortened, and the filtering effect of the second filter capacitor is better.
According to a first aspect or any one of the above implementation manners of the first aspect, the solder balls of the universal memory include a first solder ball and a second solder ball. And part of the second through holes are arranged opposite to the first solder balls and the second solder balls. In addition, the seventh electronic component is a third filter capacitor. The third filter capacitor can be used for performing electric performance processing such as filtering on the power supply and signals of the general memory. Part of the third filter capacitor is positioned in the second through hole. One end of the third filter capacitor is connected to the first solder ball, and the other end is connected to the second solder ball. The first solder ball is electrically connected to the second solder ball through the third filter capacitor.
It can be understood that, by electrically connecting one end of the third filter capacitor to the first solder ball and the other end to the second solder ball, the distance between the third filter capacitor and the first solder ball and the distance between the third filter capacitor and the second solder ball are greatly shortened, and the filtering effect of the third filter capacitor is better.
In one possible implementation manner of the first aspect, the elevated plate is annular, and the first electronic component is located in an area surrounded by the elevated plate.
It will be appreciated that by providing the elevated plate in a ring shape, a new free space (i.e., the space surrounded by the chip, the region surrounded by the elevated plate, and the circuit board) is created in the region between the chip and the circuit board. At the moment, the first electronic components arranged at other positions on the circuit board are arranged in the vacant space, so that the space between the chip and the circuit board is utilized to a greater extent, and the space utilization rate is improved. In addition, the area for arranging the first electronic component can be vacated at other positions on the circuit board. Therefore, the vacated area can be used for arranging more electronic components with new functions, so that the electronic equipment can realize diversified functions.
In a possible implementation manner of the first aspect, the chip is a universal memory, and the first electronic component includes a power chip, a filter capacitor, or a voltage regulating resistor. The elevated plate includes a peripheral side surface. The orthographic projection of the peripheral side surface of the elevated plate on the first surface is a third projection. The third projection is located within the first projection. The number of the first electronic components is multiple. The plurality of first electronic components are arranged around the peripheral side face of the elevated plate.
The elevated plate comprises a substrate and a plurality of first conductive pieces. The first conductive members are fixed on the substrate. Each first conductive member comprises a first end and a second end. The first end is exposed relative to a top surface of the elevated plate. The first end is connected to the solder ball. The second end is exposed relative to the bottom surface of the elevated plate. The second end is connected to the circuit board.
The circuit board includes a ground member. The grounding piece is grounded. The grounding piece is arranged opposite to the first projection. At this time, the general memory covers the ground in the thickness direction of the circuit board assembly.
The elevated plate further comprises a plurality of second conductive members. The plurality of second conductive pieces are fixed on the substrate. The second conductive members are located between the first conductive members and the peripheral side surface of the elevated plate. The plurality of second conductive members are arranged around the first conductive member. And the end part of each second conductive piece close to the circuit board is connected to the grounding piece and is grounded through the grounding piece. And a first bonding pad is connected to the end part of each second conductive piece close to the universal memory. The first pad protrudes toward a surface of the general purpose memory with respect to the elevated plate.
The circuit board assembly further comprises a glue layer. And part of the adhesive layer is arranged between the universal memory and the elevated plate. Part of the adhesive layer is arranged between the elevated plate and the circuit board.
The circuit board assembly further includes a shield can. The shielding case is fixed on the circuit board, and the shielding case covers the universal memory.
It is understood that, when a plurality of the first electronic components are disposed around the peripheral side surface of the elevated plate, a space in which devices can be arranged between the general-purpose memory and the circuit board is large. At this time, the number of the first electronic components arranged in the space is large. Therefore, the space utilization rate of the circuit board assembly is high, and the electronic equipment has functions which are easy to diversify.
In addition, when the electronic components on the circuit board generate static electricity and the static electricity is close to the universal storage through the circuit board, the static electricity can be transmitted to the ground through the grounding piece. Thus, the general-purpose memory is less likely to be damaged by static electricity.
In addition, when the first electronic component generates static electricity and the static electricity is close to the solder ball through the space between the elevated plate and the universal memory, the static electricity can be captured by the first bonding pad, transmitted to the grounding piece through the first bonding pad and the second conductive piece and transmitted to the ground through the grounding piece. Thus, the general-purpose memory is less likely to be damaged by static electricity generated by the first electronic component.
In addition, the circuit board is generally fixed inside the electronic device by screws, and at this time, the screws may apply stress to the circuit board during locking the screws on the circuit board or detaching the screws from the circuit board. The stress is easily transmitted to the elevated board and the general purpose memory through the circuit board. When the elevated plate and the circuit board have better connection firmness, the elevated plate can effectively resist the partial stress, so that the cracking of a connection point between the elevated plate and the circuit board or the cracking of a connection point between the general memory and the elevated plate is avoided.
In addition, when some glue layers set up between universal memory and the board of elevating, on the one hand, the glue layer can improve the firm in connection degree between universal memory and the board of elevating. When the electronic equipment falls or is shot and collided with other objects, the universal memorizer is not easy to separate or crack from the elevated plate. On the other hand, when the electronic components (including the first electronic component) on the circuit board generate static electricity and the static electricity is close to the universal memory through the circuit board, the static electricity can be shielded by the glue layer. At this time, the general-purpose memory is not easily damaged by static electricity.
In addition, when the electronic components around the universal memory generate static electricity and the static electricity is close to the universal memory, the shielding cover can effectively shield the static electricity and prevent the universal memory from being damaged by the static electricity.
In a possible implementation form according to the first aspect, the chip is a general-purpose memory. The first electronic component comprises a power chip, a filter capacitor or a voltage regulating resistor.
The elevated plate includes first and second oppositely facing sides and third and fourth oppositely facing sides. The third side and the fourth side are connected between the first side and the second side. A length between the third side and the fourth side is greater than a length between the first side and the second side. The orthographic projection of the first side face and the second side face on the first surface is a fourth projection. The fourth projection is located within the first projection. The number of the first electronic components is multiple. The plurality of first electronic components are arranged close to the first side face. Or, a plurality of the first electronic components are arranged close to the second side surface. Or, part of the first electronic component is arranged close to the first side face and part of the first electronic component is arranged close to the second side face.
The elevated plate comprises a substrate and a plurality of first conductive pieces. The first conductive pieces are fixed on the substrate. Each first conductive member comprises a first end and a second end. The first end is exposed relative to a top surface of the elevated plate. The first end is connected to the solder ball. The second end is exposed relative to the bottom surface of the elevated plate. The second end is connected to the circuit board.
The circuit board includes a ground member. The grounding piece is arranged opposite to the first projection. The grounding piece is grounded.
The elevated plate further comprises a plurality of second conductive members. The plurality of second conductive pieces are fixed on the substrate. A portion of the second electrically-conductive member is located between the first electrically-conductive member and the third side surface. A portion of the second conductive member is located between the first conductive member and the fourth side. And the end part of each second conductive piece close to the circuit board is connected to the grounding piece and is grounded through the grounding piece. And the end part of each second conductive piece close to the chip is connected with a first bonding pad. The first bonding pad extends out relative to the top surface of the elevated plate.
The circuit board assembly further comprises a glue layer. And part of the adhesive layer is arranged between the chip and the elevating plate. Part of the adhesive layer is arranged between the elevated plate and the circuit board.
The circuit board assembly further includes a shield can. The shielding case is fixed to the circuit board. And the shield covers the chip.
It is understood that, since the length between the third side surface and the fourth side surface is greater than the length between the first side surface and the second side surface, that is, the size of the elevating plate in the direction from the third side surface to the fourth side surface is greater, when the second conductive members are arranged in the direction from the third side surface to the fourth side surface, the number of the second conductive members may be more arranged. Therefore, the connection firmness between the elevated plate and the circuit board is better. When the electronic equipment falls or is shot and collided with other objects, the connection point between the elevated plate and the circuit board and the connection point between the elevated plate and the universal memory are not easy to crack.
In addition, the circuit board is generally fixed inside the electronic device by screws, and at this time, the screws apply stress to the circuit board during the process of locking the screws on the circuit board or detaching the screws from the circuit board. The stress is easily transmitted to the elevated board and the general memory through the circuit board. When the elevated plate and the circuit board have better connection firmness, the elevated plate can effectively resist the partial stress, so that the cracking of a connection point between the elevated plate and the circuit board or the cracking of a connection point between the general memory and the elevated plate is avoided.
In addition, when the electronic components on the circuit board generate static electricity and the static electricity is close to the universal storage through the circuit board, the static electricity can be transmitted to the ground through the grounding piece. Thus, the general-purpose memory is less likely to be damaged by static electricity.
In addition, when the first electronic component generates static electricity and the static electricity is close to the solder ball through the space between the elevated plate and the universal memory, the static electricity can be captured by the first bonding pad, transmitted to the grounding piece through the first bonding pad and the second conductive piece and transmitted to the ground through the grounding piece. Thus, the general-purpose memory is less likely to be damaged by static electricity generated by the first electronic component.
In addition, the circuit board is generally fixed inside the electronic device by screws, and at this time, the screws may apply stress to the circuit board during locking the screws on the circuit board or detaching the screws from the circuit board. The stress is easily transmitted to the elevated board and the general memory through the circuit board. When the elevated plate and the circuit board have better connection firmness, the elevated plate can effectively resist the partial stress, so that the cracking of a connection point between the elevated plate and the circuit board or the cracking of a connection point between the general memory and the elevated plate is avoided.
In addition, when some glue layers set up between universal memory and the board of elevating, on the one hand, the glue layer can improve the firm in connection degree between universal memory and the board of elevating. When the electronic equipment falls or is shot and collided with other objects, the universal memorizer is not easy to separate or crack from the elevated plate. On the other hand, when the electronic components (including the first electronic component) on the circuit board generate static electricity and the static electricity is close to the universal memory through the circuit board, the static electricity can be shielded by the glue layer. At this time, the general-purpose memory is not easily damaged by static electricity.
In addition, when the electronic components around the universal memory generate static electricity and the static electricity is close to the universal memory, the shielding cover can effectively shield the static electricity and prevent the universal memory from being damaged by the static electricity.
In a second aspect, an electronic device is provided. The electronic equipment comprises a shell and the circuit board assembly. The circuit board assembly is fixedly connected to the inside of the shell.
It is understood that the electronic device can implement various functions when the circuit board assembly is applied to the electronic device.
Drawings
Fig. 1 is a schematic structural diagram of an electronic device provided in an embodiment of the present application;
FIG. 2 is a partially exploded schematic view of the electronic device shown in FIG. 1;
FIG. 3 is a schematic partial cross-sectional view of the electronic device shown in FIG. 1 at line A-A;
fig. 4 is a top view of a circuit board assembly of a conventional electronic device;
FIG. 5 is a schematic diagram of a circuit board assembly of the electronic device of FIG. 1;
FIG. 6 is a partially exploded schematic view of the circuit board assembly shown in FIG. 5;
FIG. 7 is a bottom view of one embodiment of a chip of the circuit board assembly shown in FIG. 5;
FIG. 8 is a top view of one embodiment of an elevated plate of the circuit board assembly shown in FIG. 5;
FIG. 9 is a cross-sectional view of one embodiment of the circuit board assembly shown in FIG. 5 taken along line B-B;
FIG. 10 is a top view of one embodiment of the circuit board assembly shown in FIG. 5;
FIG. 11 is a cross-sectional view of another embodiment of the circuit board assembly shown in FIG. 5 taken along line B-B;
FIG. 12 is a schematic cross-sectional view of yet another embodiment of the circuit board assembly shown in FIG. 5 taken along line B-B;
FIG. 13 is a top view of another embodiment of an elevated plate of the circuit board assembly shown in FIG. 5;
FIG. 14 is a schematic cross-sectional view of yet another embodiment of the circuit board assembly shown in FIG. 5 taken along line B-B;
FIG. 15 is a schematic cross-sectional view of yet another embodiment of the circuit board assembly shown in FIG. 5 taken along line B-B;
FIG. 16 is a top view of yet another embodiment of an elevated plate of the circuit board assembly shown in FIG. 5;
FIG. 17 is a schematic cross-sectional view of yet another embodiment of the circuit board assembly shown in FIG. 5 taken along line B-B;
FIG. 18 is a top view of still another embodiment of an elevated plate of the circuit board assembly shown in FIG. 5;
FIG. 19a is a top view of yet another embodiment of an elevated plate of the circuit board assembly shown in FIG. 5;
FIG. 19b is a schematic partial cross-sectional view of the elevated plate shown in FIG. 19a taken along line C-C;
FIG. 20 is a cross-sectional view of still another embodiment of the circuit board assembly shown in FIG. 5 taken along line B-B;
FIG. 21 is a cross-sectional view of still another embodiment of the circuit board assembly shown in FIG. 5 taken along line B-B;
FIG. 22 is a schematic cross-sectional view of yet another embodiment of the circuit board assembly shown in FIG. 5 taken along line B-B;
FIG. 23 is a top view of yet another embodiment of an elevated plate of the circuit board assembly shown in FIG. 5;
FIG. 24 is a schematic cross-sectional view of yet another embodiment of the circuit board assembly shown in FIG. 5 taken along line B-B;
FIG. 25 is a schematic cross-sectional view of yet another embodiment of the circuit board assembly shown in FIG. 5 taken along line B-B;
FIG. 26 is a schematic cross-sectional view of yet another embodiment of the circuit board assembly shown in FIG. 5 taken along line B-B;
FIG. 27 is a top view of yet another embodiment of an elevated plate of the circuit board assembly shown in FIG. 5;
FIG. 28 is a cross-sectional view of still another embodiment of the circuit board assembly shown in FIG. 5 taken along line B-B;
FIG. 29 is a top view of yet another embodiment of an elevated plate of the circuit board assembly shown in FIG. 5;
FIG. 30 is a schematic cross-sectional view of yet another embodiment of the circuit board assembly shown in FIG. 5 taken along line B-B;
FIG. 31 is a top view of yet another embodiment of an elevated plate of the circuit board assembly shown in FIG. 5;
FIG. 32 is a cross-sectional view of still another embodiment of the circuit board assembly shown in FIG. 5 taken along line B-B;
FIG. 33a is a top view of yet another embodiment of an elevated plate of the circuit board assembly shown in FIG. 5;
FIG. 33B is a schematic cross-sectional view of yet another embodiment of the circuit board assembly shown in FIG. 5 taken along line B-B;
FIG. 34 is a top view of yet another embodiment of an elevated plate of the circuit board assembly shown in FIG. 5;
FIG. 35 is a cross-sectional view of still another embodiment of the circuit board assembly shown in FIG. 5 taken along line B-B;
FIG. 36 is a top view of yet another embodiment of an elevated plate of the circuit board assembly shown in FIG. 5;
FIG. 37 is a cross-sectional view of still another embodiment of the circuit board assembly shown in FIG. 5 taken along line B-B;
FIG. 38 is a top view of yet another embodiment of an elevated plate of the circuit board assembly shown in FIG. 5;
FIG. 39 is a cross-sectional view of still another embodiment of the circuit board assembly shown in FIG. 5 taken along line B-B;
FIG. 40 is a top view of yet another embodiment of an elevated plate of the circuit board assembly shown in FIG. 5;
FIG. 41 is a top view of another embodiment of the circuit board assembly shown in FIG. 5;
FIG. 42 is a bottom view of another embodiment of a chip of the circuit board assembly of FIG. 5;
FIG. 43 is a top view of still another embodiment of the circuit board assembly shown in FIG. 5;
FIG. 44 is a bottom view of yet another embodiment of a chip of the circuit board assembly of FIG. 5;
FIG. 45 is a top view of yet another embodiment of the circuit board assembly shown in FIG. 5;
FIG. 46 is a bottom view of yet another embodiment of a chip of the circuit board assembly of FIG. 5;
FIG. 47 is a top view of still another embodiment of the circuit board assembly shown in FIG. 5;
FIG. 48 is a bottom view of yet another embodiment of a chip of the circuit board assembly of FIG. 5;
FIG. 49 is a top view of yet another embodiment of an elevated plate of the circuit board assembly of FIG. 5;
FIG. 50 is a schematic cross-sectional view of yet another embodiment of the circuit board assembly shown in FIG. 5 taken along line B-B;
FIG. 51 is a bottom view of yet another embodiment of a chip of the circuit board assembly of FIG. 5;
FIG. 52 is a top view of yet another embodiment of an elevated plate of the circuit board assembly of FIG. 5;
fig. 53 is a top view of yet another embodiment of the circuit board assembly shown in fig. 5.
Detailed Description
Referring to fig. 1, fig. 1 is a schematic structural diagram of an electronic device 100 according to an embodiment of the present disclosure. The electronic device 100 may be a mobile phone, a watch, a tablet personal computer (tablet personal computer), a laptop computer (laptop computer), a Personal Digital Assistant (PDA), a personal computer, a notebook computer, a vehicle-mounted device, a wearable device, Augmented Reality (AR) glasses, an AR helmet, Virtual Reality (VR) glasses, a VR helmet, or other form of device provided with a circuit board. The electronic device 100 of the embodiment shown in fig. 1 is illustrated as a mobile phone. For convenience of description, the width direction of the electronic device 100 is defined as an X-axis. The length direction of the electronic device 100 is the Y-axis. The thickness direction of the electronic device 100 is the Z-axis.
Referring to fig. 2 in conjunction with fig. 1, fig. 2 is a partially exploded view of the electronic device 100 shown in fig. 1. The electronic device 100 includes a screen 10, a housing 20, and a circuit board assembly 30. It should be noted that fig. 1, fig. 2 and the following drawings only schematically show some components, and the actual shape, the actual size and the actual configuration of the components are not limited by fig. 1, fig. 2 and the following drawings.
Among other things, the screen 10 may be used to display images, text, and the like. The screen 10 may be a flat screen, a curved screen, or a 360 ° wrap-around screen. The electronic device 100 of the embodiment shown in fig. 1 and 2 is illustrated by taking a flat screen as an example. In addition, the screen 10 may include a protective cover 11 and a display 12. The protective cover 11 is stacked on the display 12. The protective cover plate 11 can be arranged close to the display screen 12 and can be mainly used for protecting and preventing dust for the display screen 12. The material of the protective cover 11 may be, but is not limited to, glass. The display 12 may be an organic light-emitting diode (OLED) display, an active-matrix organic light-emitting diode (active-matrix organic light-emitting diode) display, or an active-matrix organic light-emitting diode (AMOLED) display.
In addition, the housing 20 may be used to support the screen 10. The housing 20 may include a rear cover 21, a bezel 22, and a middle plate 23. The rear cover 21 is disposed opposite to the screen 10. The rear cover 21 and the screen 10 are respectively mounted on two sides of the frame 22, and in this case, the rear cover 21, the frame 22 and the screen 10 together enclose the inside of the electronic device 100. Middle plate 23 is attached to the inner surface of rim 22. The middle plate 23 is located between the screen 10 and the rear cover 21. The middle plate 24 may be used to support the associated device. Such as a screen 10 and a battery. In other alternatives, the housing 20 may not include the middle plate 24.
In an alternative, the middle plate 23 may be formed integrally with the rim 22. In other alternative ways, the middle plate 23 may also be fixed to the frame 22 by splicing, welding, snap-fitting, or the like.
In an alternative manner, the rear cover 21 may be fixedly attached to the frame 22 by means of an adhesive. In another alternative, the rear cover 21 and the rim 22 are integrally formed, that is, the rear cover 21 and the rim 22 are a unitary structure.
Referring to fig. 3 in conjunction with fig. 2, fig. 3 is a partial cross-sectional view of the electronic device 100 shown in fig. 1 at a line a-a. The circuit board assembly 30 is located inside the housing 20. The circuit board assembly 30 is fixed to a side of the middle plate 23 facing the rear cover 21. When the housing 20 does not include the middle plate 23, the circuit board assembly 30 may be fixedly connected directly to the screen 10. Additionally, fig. 1 schematically shows the position of the circuit board assembly 30 inside the housing 20 by means of dashed lines. It should be understood that the location of the circuit board assembly 30 is not limited to the location illustrated in fig. 1.
In addition, the circuit board assembly 30 may be used to set up a chip and a Power Distribution Network (PDN). For example, the chip may be a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), or a Universal Flash Storage (UFS). The power distribution network comprises electronic components such as capacitors, inductors, resistors and the like. A power distribution network may be used to distribute power to the various chips.
Referring to fig. 4, fig. 4 is a top view of a circuit board assembly of a conventional electronic device. The circuit board assembly 200 includes a circuit board 201, a central processor 202, a general purpose memory 203, and a power distribution network 204. The cpu 202, the general memory 203, and the power distribution network 204 are dispersedly fixed on the circuit board 201. Fig. 4 schematically encloses a power distribution network 204 by means of a dashed line.
It can be appreciated that the circuit board assembly 201 of the conventional electronic device has the following drawbacks:
1. because the central processing unit 202, the universal memory 203 and the power distribution network 204 are dispersedly fixed on the circuit board 201, the central processing unit 202, the universal memory 203 and the power distribution network 204 occupy most of the area of the circuit board 201, so that it is difficult for the circuit board 201 to be provided with other electronic components, and thus, the electronic device is difficult to realize the multi-functionalization requirement.
2. The cpu 202, the universal memory 203 and the power distribution network 204 are disposed in a relatively dispersed manner on the circuit board 201, which results in a space between the cpu 202 and the universal memory 203, a space between the universal memory 203 and the power distribution network 204, and a space between the cpu 202 and the power distribution network 204 being wasted, and the space utilization of the circuit board 201 is low.
In the application, the electronic components of the circuit board assembly are arranged compactly by arranging the circuit board assembly structure, so that on one hand, the circuit board of the circuit board assembly can be provided with more electronic components, and the multifunctional requirement of electronic equipment can be met; on the other hand, the space of the circuit board assembly is not easy to waste, and the space utilization rate of the circuit board assembly can be greatly improved. Several arrangements of the circuit board assembly will be described in detail below with reference to the accompanying drawings.
The first alternative is: referring to fig. 5 and fig. 6, fig. 5 is a schematic structural diagram of the circuit board assembly 30 of the electronic device 100 shown in fig. 1. Fig. 6 is a partially exploded schematic view of the circuit board assembly 30 shown in fig. 5. The circuit board assembly 30 includes a circuit board 31, an elevated board 32 (mainly referring to fig. 6), a chip 33, and a first electronic component 34 (mainly referring to fig. 6). It should be understood that the number of the first electronic components 34 is not limited to four as illustrated in fig. 6.
The circuit board 31 may be a hard circuit board, a flexible circuit board, or a rigid-flex circuit board. The circuit board 31 may be an FR-4 dielectric board, a Rogers (Rogers) dielectric board, a hybrid FR-4 and Rogers dielectric board, or the like. Here, FR-4 is a code for a grade of flame-resistant material, and the Rogers dielectric plate is a high-frequency plate.
Referring to fig. 7 in conjunction with fig. 6, fig. 7 is a bottom view of one embodiment of the chip 33 of the circuit board assembly 30 shown in fig. 5. In this embodiment, the chip 33 is a general-purpose memory. The following general memory reference numbers are also identified consistently by 33. In other alternatives, the chip 33 may be of other types. The details of which are described below in connection with the associated drawings. And will not be described in detail herein.
The universal memory 33 includes a main body 331 and a plurality of solder balls 333. A plurality of solder balls 333 are disposed on a surface of the main body 331. It is to be understood that the general memory 33 is generally arranged in multiple layers, and in this case, a plurality of clock lines of the general memory 33 can share one address line. In this case, the number of address lines of the general memory 33 is small. The number of solder balls 333 electrically connected to the address line can be reduced accordingly. At this time, the plurality of solder balls 333 will not be able to fill up the surface of the main body 311. It can be understood that by collectively arranging the solder balls 333 on a partial area of the main body 331, an area on the surface of the main body 331 where the solder balls 333 are not arranged is made free.
In this embodiment, the solder balls 333 are arranged in the main body 331 in various ways. One embodiment will be described in detail below with reference to the accompanying drawings.
Referring to fig. 7 again, the main body 331 includes a first edge 3311, a second edge 3312, a third edge 3313, and a fourth edge 3314. The third and fourth edges 3313, 3314 are connected between the first and second edges 3311, 3312. The solder balls 333 are arranged on a surface of the main body 331 in n rows and n columns, where n is greater than 1. First row a of a plurality of solder balls 333 1 Disposed proximate the first edge 3311. First column a 1 The distance s1 from the first edge 3311 is greater than or equal to 1 millimeter. N column a of a plurality of solder balls n Disposed proximate the second edge 3312. N column a n The distance s2 from the second edge 3312 is greater than or equal to 1 millimeter. First row b of a plurality of solder balls 333 1 Disposed proximate the third edge 3313. First row b 1 The distance s3 from the third edge 3313 is greater than or equal to 1 millimeter. N-th row b of solder balls 333 n Disposed proximate the fourth edge 3314. N-th row b n The distance s4 from the fourth edge 3314 is greater than or equal to 1 millimeter. At this time, a plurality of solder balls 333 are located approximately in the middle of the main body 331.
It will be appreciated that when the plurality of solder balls 333 are arranged in the above-described manner, the first row a 1 The region between the first edge 3311 and the n-th column a n The region between the first and second edges 3312, the first row b 1 The area between the third edge 3313 and the area between the nth row b and the fourth edge 3314 can be vacated.
In other embodiments, each row or column of the plurality of solder balls 333 need not be arranged in a strictly straight line. In addition, every two rows of the plurality of solder balls 333 are not necessarily arranged strictly in parallel. Each two columns of the plurality of solder balls 333 may not be arranged strictly in parallel.
Referring to fig. 8 in conjunction with fig. 6, fig. 8 is a top view of one embodiment of the elevated plate 32 of the circuit board assembly 30 shown in fig. 5. The elevated board 32 includes a substrate 321 and a plurality of first conductive members 322.
The substrate 321 may be a hard substrate 321, a soft substrate 321, or a hard-soft substrate 321. The substrate 321 may be an FR-4 dielectric board, a Rogers (Rogers) dielectric board, or a mixed dielectric board of FR-4 and Rogers.
In addition, the first conductive member 322 is used for electrically connecting the solder balls 333 (see fig. 7). The number of the first conductive members 322 is the same as the number of the solder balls 333. The arrangement shape of the first conductive member 322 is the same as that of the solder balls 333. Of course, in other alternative ways, the number of the first conductive members 322 and the number of the solder balls 333 may be different. The arrangement shape of the plurality of first conductive members 322 on the substrate 321 may be different from the arrangement shape of the plurality of solder balls 333.
Referring to fig. 9, fig. 9 is a cross-sectional view of one embodiment of the circuit board assembly 30 shown in fig. 5 taken along line B-B. It should be noted that the position of the cross-sectional view shown in fig. 9 is also shown in the corresponding position in fig. 7 and 8, i.e., fig. 7 and 8 also illustrate the section line B-B. In addition, in order to make the cross-sectional view of fig. 9 more clear, a portion of the solder ball 333 and a portion of the first conductive member 322 are omitted from fig. 9. The elevated plate 32 is provided on the circuit board 31. The solder balls 333 of the universal memory 33 are fixed to the side of the elevating plate 32 remote from the circuit board 31. At this time, the elevated board 32 is located between the circuit board 31 and the general memory 33.
The base plate 321 of the raised plate 32 includes a top surface 3211 and a bottom surface 3212. The top surface 3211 of the substrate 321 faces the universal memory 33. The bottom surface 3212 of the substrate 321 faces the circuit board 31. It should be understood that the top surface 3211 of the base plate 321 is also the top surface 3211 of the elevated plate 32. The bottom surface 3212 of the base plate 321 is also the bottom surface 3212 of the elevated plate 32.
In addition, the first conductive members 322 are fixed to the substrate 321. Each first conductive member 322 includes a first end 3221 and a second end 3222. The first end 3221 is exposed relative to the top surface 3211 of the elevated plate 32. The first end 3221 is connected to one solder ball 333. The second end 3222 is exposed relative to a bottom surface 3212 of the elevated plate 32. The second end 3222 is connected to the circuit board 31. Thus, the general memory 33 is electrically connected to the circuit board 31 through the elevated plate 32.
In other alternatives, one end of the first conductive member 322 may be connected to a plurality of solder balls 333 at the same time.
In other alternatives, the structure of the first conductive member 322 is not limited to the solid pillar structure illustrated in fig. 9. The first conductive member 322 may also take other shapes, such as a hollow cylindrical structure.
Referring to fig. 9 again, a second end 3222 of each first conductive member 322 is provided with a fixing pad 3223. The fixing pad 3223 is used for soldering with a pad of the circuit board 31. At this time, the first conductive member 322 is electrically connected to the circuit board 31 through the fixing pad 3223. Thus, the signal of the general memory 33 can be transmitted to the circuit board 31 through the solder ball 333, the first conductive member 322, and the fixing pad 3223. The signal on the circuit board 31 can also be transmitted to the universal memory 33 through the fixing pad 3223, the first conductive member 322 and the solder ball 333.
In other alternatives, the first end 3221 of each first conductive member 322 may also be provided with a fixing pad 3223, and is connected to the solder ball 333 through the fixing pad 3223.
Referring again to fig. 9, the height of the elevating plate 32 in the Z-axis direction is in the range of 0.1 mm to 5mm, i.e., the distance between the top surface 3211 of the elevating plate 32 and the bottom surface 3212 of the elevating plate 32 is in the range of 0.1 mm to 5 mm. For example, the height of the elevated plate 32 may be equal to 0.1 millimeters, 0.2 millimeters, 0.3 millimeters, 0.5 millimeters, 1.3 millimeters, 2.3 millimeters, 3 millimeters, 4 millimeters, or 5 millimeters. It will be appreciated that at this size, the thickness of the circuit board assembly 30 does not increase significantly due to the height of the elevated plate 32, and at this time, the thickness of the electronic device 100 does not increase to a great extent when the circuit board assembly 30 is applied to the electronic device 100.
In other alternatives, the height of the elevated plate 32 in the Z-axis direction may not be within this dimension.
One arrangement of the elevated plate 32 is described in detail above. The manner in which the elevated plate 32 is disposed is not limited to the above-described configuration. For example, in other alternative embodiments, the elevated plate 32 may be a circuit board, an adapter plate, a connector, or the like. In other alternatives, the elevated plate 32 may not include the base plate 321. At this time, the universal memory 33 is directly connected to the circuit board 31 through the plurality of first conductive members 322.
Further, as is clear from the above, the elevated plate 32 of the present embodiment can function as both a support for the general-purpose memory 33 and an electrical connection for the general-purpose memory 33 to the circuit board 31. Therefore, the elevated plate 32 of the present embodiment has a function of "one object for multiple purposes".
Referring to fig. 9 again, the first electronic component 34 is fixed on the circuit board 31, and the first electronic component 34 is electrically connected to the circuit board 31. The first electronic component 34 is located on the same side of the circuit board 31 as the elevated plate 32. The first electronic component 34 is located at the periphery of the elevated plate 32. Further, the circuit board 31 includes a first surface 312. The first surface 312 faces the elevated plate 32. The orthographic projection of the general memory 33 on the first surface 312 is a first projection. The orthographic projection of the first electronic component 34 on the first surface 312 is a second projection. The second projection is located within the first projection. It is understood that orthographic projection means that the parallel projection lines are perpendicular to the plane of projection. Furthermore, the second projection may be partially or completely located within the first projection. At this time, in the Z-axis direction, the general memory 33 covers the first electronic component 34, that is, the first electronic component 34 is located between the circuit board 31 and the general memory 33.
Referring to fig. 10 in conjunction with fig. 9, fig. 10 is a top view of one embodiment of the circuit board assembly 30 shown in fig. 5. The elevated plate 32 also includes a peripheral side 3214. The peripheral side surface 3214 is connected between a top surface 3211 (see fig. 9) of the elevated plate 32 and a bottom surface 3212 (see fig. 9) of the elevated plate 32. In the present embodiment, an orthogonal projection of the peripheral side surface 3214 on the first surface 312 is a third projection. The third projection is located within the forward projection of the general memory 33 on the first surface 312. At this time, in the Z-axis direction, the general memory 33 covers the peripheral side surface 3214, that is, the peripheral side surface 3214 of the elevated plate 32 is located between the general memory 33 and the circuit board 31.
The plurality of first electronic components 34 are provided around the circumferential side surface 3214 of the elevated plate 32. In this case, the plurality of first electronic components 34 may be enclosed in a substantially ring-shaped configuration. It should be noted that, since the general memory 33 covers the elevated board 32 and the first electronic component 34, the elevated board 32 and the first electronic component 34 are schematically shown by dotted lines in fig. 10.
In other alternatives, a plurality of first electronic components 34 are disposed around a portion of the peripheral side surface 3214. In this case, the plurality of first electronic components 34 may be enclosed in an "L" type, an "Contraband" type, a "r" type, an "pi" type, or the like.
In the present embodiment, the first electronic component 34 may be an electronic component having a height of 0.1 mm to 5mm in terms of size. For example, the first electronic component 34 may include a package capacitor made of english 008004, 01005, 0201, 0402, or the like. For another example, the first electronic component 34 is a chip packaged with a glass body. It will be appreciated that by arranging the first electronic component 34 of this size between the general purpose memory 33 and the circuit board 31, the thickness of the circuit board assembly 30 can be prevented from increasing significantly due to the height of the elevated plate 32 being too high.
In this embodiment, the first electronic component 34 may include a part of the power distribution network in terms of function. The first electronic component 34 is electrically connected to the general-purpose memory 33 via the circuit board 31 and the elevated board 32. The first electronic component 34 is used for performing electric performance processing such as charging, filtering, voltage regulating and the like on the signal of the general memory 33.
For example, the first electronic component 34 may include a power chip. The power supply chip is electrically connected to the general memory 33. The power supply chip may be used to power the general memory 33. It is understood that when the power supply chip is located between the general memory 33 and the circuit board 31, the connection distance between the power supply chip and the general memory 33 is small, and at this time, the energy loss during the transmission is small.
In other alternatives, the number of power chips is plural. Different power chips can provide different voltages to different components of the universal memory 33.
For another example, the first electronic component 34 may also include a filter capacitor. One end of the filter capacitor is electrically connected between the power supply chip and the general memory 33, and the other end is grounded. It will be appreciated that when the power chip supplies power to the general-purpose memory 33, the filter capacitor can perform electrical processing such as filtering on the power supply signal. Further, since the filter capacitor is located between the general memory 33 and the circuit board 31, the connection distance between the filter capacitor and the general memory 33 is short. At this time, the filtering effect of the filter capacitor is better. In other alternative modes, the filter capacitor may be electrically connected to the general memory 33 at one end and grounded at the other end.
For another example, the first electronic component 34 may also include a voltage regulating resistor. One end of the voltage-regulating resistor is electrically connected to the power supply chip, and the other end is electrically connected to the general-purpose memory 33. The voltage regulating resistor can regulate the voltage flowing into the inside of the general memory 33 when the power supply chip supplies power to the general memory 33. Since the voltage-regulating resistor is located between the general-purpose memory 33 and the circuit board 31, the connection distance between the voltage-regulating resistor and the general-purpose memory 33 is short. The voltage regulating effect of the voltage regulating resistor is better, that is, the voltage flowing into the universal memory 33 is better and more accurate.
In other alternatives, the first electronic component 34 may also include a voltage regulator, an inductor, and other electronic components.
In other alternative manners, when the first electronic component 34 includes a part of the power distribution network, the first electronic component 34 may also perform electrical performance processing such as charging, filtering, or voltage regulating on signals of other chips of the circuit board assembly 30.
In other alternative manners, the first electronic component 34 may also include other chips with new functions, such as a compass chip, a Near Field Communication (NFC) chip, a fast charging chip, or a WiFi chip.
In the present embodiment, since the number of solder balls 333 electrically connected to the address line in the general-purpose memory 33 is reduced, the solder balls 333 are not able to fill the surface of the main body 331. At this time, the solder balls 333 of the universal storage 33 are collectively arranged in the middle of the main body 331, so that the first column a of the solder balls 333 1 The region between the first edge 3311 and the n-th column a n And the area between the second edge 3312, the first row b 1 The area between the third edge 3313 and the area between the nth row b and the fourth edge 3314 can be vacated. At this timeThen, the elevated plate 32 is disposed between the general memory 33 and the circuit board 31, and the peripheral side 3214 of the elevated plate 32 is located between the general memory 33 and the circuit board 31, so that a space capable of arranging devices is created in the region between the general memory 33 and the circuit board 31, that is, the region vacated in the general memory 33 and the region surrounded by the circuit board 31 and the elevated plate 32. In this way, when the first electronic components 34 provided at other positions on the circuit board 31 are arranged in the space, the space between the general-purpose memory 33 and the circuit board 31 is effectively utilized to improve the space utilization of the circuit board assembly 30, and the area for providing the first electronic components 34 can be made free at other positions on the circuit board 31. The vacated area can be used for arranging more electronic components with new functions, so that the electronic equipment can realize diversified functions. In this case, when the first electronic components 34 having new functions are arranged in the space, the space between the general-purpose memory 33 and the circuit board 31 is effectively used, and the electronic apparatus 100 can realize various functions.
In addition, when the first electronic component 34 is located between the circuit board 31 and the general-purpose memory 33, the arrangement of the first electronic component 34 and the general-purpose memory 33 on the circuit board 31 is more compact. The area on the circuit board 31 is not easily wasted.
Referring to fig. 9 again, the circuit board 31 may further include a plurality of grounding elements 311. The ground member 311 is disposed opposite to the orthographic projection of the general memory 33 on the first surface 312. The plurality of ground members 311 are all grounded. The number of the ground members 311 is not limited to two as illustrated in fig. 9. It is understood that, by providing the grounding member 311 that is grounded on the circuit board 31 and the universal storage 33 covers the grounding member 311, when static electricity is generated by the electronic components on the circuit board 31 and the static electricity approaches the universal storage 33 through the circuit board 31, the static electricity can be transmitted to the ground by the grounding member 311. Thus, the general-purpose memory 33 is less likely to be damaged by static electricity.
In other alternatives, the circuit board 31 may not include the ground member 311.
Referring again to fig. 8, the elevated plate 32 further includes a plurality of second conductive members 323. The second conductive members 323 are located between the first conductive members 322 and the peripheral side 3214 of the elevated plate 32, and the second conductive members 323 are disposed around the first conductive members 322. At this time, the plurality of second conductive members 323 substantially form a ring shape. Note that, in order to clearly distinguish the first conductive member 322 from the second conductive member 323. Fig. 8 simply distinguishes the first conductive element 322 from the second conductive element 323 by circles of different sizes. The actual size, number and shape of the first and second conductive members 322 and 323 are not limited by fig. 8. In other alternatives, the second conductive member 323 may also surround a portion of the first conductive member 322. At this time, the arrangement shape of the second conductive member 323 may also be "L" -shaped, "Contraband" -shaped, "r" -shaped, or ii-shaped.
Referring to fig. 9 again, the second conductive members 323 are fixed in the substrate 321. Each second conductive member 323 is connected to the first pad 3231 near an end of the general memory 33. The first pad 3231 protrudes with respect to the top surface 3211 of the elevated plate 32. Each second conductive member 323 is connected to a second pad 3232 near an end of the circuit board 31. The second pad 3232 protrudes from the bottom surface 3212 of the elevated plate 32, and the second pad 3232 is connected to the ground 311. At this time, the plurality of second conductive members 323 are connected to the plurality of ground members 311 in a one-to-one correspondence through the second pads 3232. The end of each second conductive member 323 adjacent to the circuit board 31 is grounded through the circuit board 31.
It is understood that when static electricity is generated in the first electronic component 34 and approaches the solder ball 333 through the space between the elevated plate 32 and the universal memory 33, the static electricity can be captured by the first pad 3231, transmitted to the ground member 311 through the first pad 3231, the second conductive member 323, and the second pad 3232, and transmitted to the ground through the ground member 311. Thus, the universal memory 33 is less likely to be damaged by static electricity generated in the first electronic component 34.
In addition, since the plurality of second conductive members 323 are formed in a substantially ring shape, when static electricity generated from the first electronic component 34 approaches the solder balls 333 from different directions, most of the static electricity can be captured by the first pads 3231 and transmitted to the ground through the second conductive members 323, thereby effectively preventing the universal memory 33 from being damaged.
In addition, the second conductive member 323 is connected to the grounding member 311, so that the connection between the raised board 32 and the circuit board 31 (see fig. 40) is better. When the electronic apparatus 100 falls or collides with another object, the connection point between the elevated plate 32 and the circuit board 31 and the connection point between the elevated plate 32 and the general-purpose memory 33 (see fig. 40) are not easily cracked.
In addition, the circuit board 31 is generally fixed inside the electronic device 100 by screws, and at this time, the screws may apply stress to the circuit board 31 during locking the screws on the circuit board 31 or detaching the screws from the circuit board 31. The stress is easily transmitted to the elevated board 32 and the general memory 33 via the circuit board 31. When the elevated board 32 and the circuit board 31 have better connection firmness, the elevated board 32 can effectively resist the part of the stress, so as to prevent the connection point between the elevated board 32 and the circuit board 31 from cracking, or prevent the connection point between the general-purpose memory 33 and the elevated board 32 from cracking.
In other alternatives, the end of the second conductive member 323 near the circuit board 31 may be grounded through other components or devices on the circuit board 31.
In other alternative manners, the end portion of the second conductive member 323 near the circuit board 31 may not be provided with the second pad 3232.
In other alternatives, the elevated plate 32 may not include the second conductive member 323.
Referring again to fig. 10, the peripheral side 3214 of the elevated plate 32 includes a first side 3215. The first side 3215 is disposed proximate the first edge 3311. The distance L1 between the first side 3215 and the first edge 3311 is in the range of 0.1 mm to 5 mm. For example, L1 may be equal to 0.1, 0.2, 0.3, 0.5, 1.3, 2.3, 3, 4, or 5 millimeters. It will be appreciated that at this size, the width of the elevated plate 32 is not so small as to reduce the strength of the elevated plate 32, thereby ensuring that the elevated plate 32 can stably support the universal memory 33. On the other hand, the space enclosed by the circuit board 31, the first side 3215, and the general-purpose memory 33 is large in volume. In this case, a large number of first electronic components 34 or first electronic components 34 having a large size can be arranged in the space.
In other alternatives, the distance d1 between the first side 3215 and the first edge 3311 may not be within the range.
In other alternatives, the dimensional relationship between the other edges of the universal store 33 and the peripheral side 3214 of the elevated plate 32 can also be referred to the dimension between the first edge 3311 and the first side 3215 of the universal store 33. And will not be described in detail herein.
In an alternative manner, the technical content same as that in the first alternative manner (see fig. 5 to 10) is not repeated: referring to fig. 11, fig. 11 is a cross-sectional view of another embodiment of the circuit board assembly 30 shown in fig. 5 taken along line B-B. The circuit board assembly 30 also includes a shield 35. The shield case 35 is fixed to the circuit board 31, and the shield case 35 covers the general-purpose memory 33. At this time, the shield case 35 also covers the elevated plate 32 and the first electronic component 34. In this way, when static electricity is generated in the electronic components around the universal memory 33 and the static electricity approaches the universal memory 33, the shield cover 35 can effectively shield the static electricity and prevent the universal memory 33 from being damaged by the static electricity.
In an alternative manner, the same technical contents as those in the first alternative manner (refer to fig. 5 to 10) are not described again: referring to fig. 12, fig. 12 is a cross-sectional view of another embodiment of the circuit board assembly 30 shown in fig. 5 taken along line B-B. The circuit board assembly 30 includes a second electronic component 391. The second electronic component 391 is disposed on the peripheral side 3214 of the elevated plate 32. The second electronic component 391 is electrically connected to the elevated plate 32. It should be noted that the number of the second electronic component 391 is not limited to two as illustrated in fig. 12. For example, the second electronic component 391 may also be disposed around the peripheral side 3214 of the elevated plate 32 with reference to the first electronic component 34 shown in fig. 10. At this time, the shape enclosed by the second electronic component 391 may be a ring shape, an "L" shape, an "Contraband" shape, a "r" shape, or an "pi" shape, or the like.
In an alternative, the second electronic component 391 may be electrically connected to the circuit board 31 via traces or conductive members within the elevated plate 32.
In an alternative, the second electronic component 391 may be electrically connected to the solder balls 333 of the universal memory 33 via traces or conductive elements within the elevated board 32.
In this embodiment, the second electronic component 391 may include a portion of an electronic component of the power distribution network. Specifically, the arrangement manner of the second electronic component 391 may refer to the arrangement manner of the first electronic component 34. And will not be described in detail herein.
It is understood that the area of the peripheral side surface 3214 is effectively used by providing the second electronic component 391 on the peripheral side surface 3214 of the elevated plate 32. At this time, the space between the universal memory 33 and the circuit board 31 is not easy to cause the number of the arranged first electronic components 34 to be less due to the smaller area of the circuit board 31 for fixing the first electronic components 34. In other words, the space between the general memory 33 and the circuit board 31 can be used for arranging more electronic components, and the utilization rate of the space of the circuit board assembly 30 is higher.
In addition, when the second electronic component 391 is disposed on the peripheral side 3214 of the elevated plate 32, the area of the second electronic component 391 can be made free at other positions on the circuit board 31. In this way, the vacated area may be used to arrange more electronic components with new functions to enable the electronic device 100 to implement diversified functions. Alternatively, when the second electronic component 391 is an electronic component having a new function, the electronic apparatus 100 can also realize various functions.
In an alternative manner, the technical content same as that in the first alternative manner (see fig. 5 to 10) is not repeated: referring to fig. 13 and 14, fig. 13 is a top view of another embodiment of the elevated plate 32 of the circuit board assembly 30 shown in fig. 5. Fig. 14 is a cross-sectional view of still another embodiment of the circuit board assembly 30 shown in fig. 5 taken along line B-B. It should be noted that the position of the cross-sectional view shown in fig. 14 is also shown in the corresponding position in fig. 13, i.e., fig. 13 also illustrates the section line B-B. Part of the second conductive member 323 is exposed relative to the peripheral side 3214 of the substrate 321.
It is understood that when static electricity is generated by the first electronic component 34 or other electronic components on the circuit board 31 and the static electricity is close to the universal memory 33, the static electricity can be easily captured by the second conductive member 323, and is transmitted to the grounding member 311 through the second conductive member 323 and the second pad 3232, and then is transmitted to the ground through the grounding member 311. Thus, the general-purpose memory 33 is not easily damaged by static electricity. In addition, since the second conductive member 323 is exposed relative to the peripheral side 3214 of the substrate 321, the exposed area of the second conductive member 323 relative to the substrate 321 is large. Thus, the second conductive member 323 can shield static electricity from more directions, i.e., the second conductive member 323 has better capability of shielding static electricity.
In addition, the second conductive member 323 may be formed using a conventional process of drilling plating. At this time, the second conductive member 323 has an arc structure. It is understood that the drilling plating process can eliminate the steps of electroless copper plating, electro-copper plating, etc. on the hole wall, thereby reducing the processing complexity and the processing cost of the raised plate 32, compared to the sidewall plating process.
In other alternative ways, the second conductive member 323 may also be provided with the first pad 3231 as illustrated in fig. 9.
In other alternative manners, when the second conductive member 323 is not disposed on the raised board 32, a portion of the first conductive member 322 may also be exposed relative to the peripheral side surface 3214 of the substrate 321. At this time, the first conductive member 322 may be formed using a conventional process of drilling plating.
It will be appreciated that the three alternative aspects of the present embodiment may also be combined with each other.
In the second alternative, the technical content same as that in the first alternative (see fig. 5 to 10) is not repeated: referring to fig. 15, fig. 15 is a cross-sectional view of another embodiment of the circuit board assembly 30 shown in fig. 5 taken along line B-B. The circuit board assembly 30 includes a glue layer 36. The adhesive layer 36 is disposed between the universal memory 33 and the elevating plate 32. At this time, the adhesive layer 36 may cover the solder balls 333. In the embodiment, a dispensing process may be adopted, and the underfil glue is dropped between the general memory 33 and the elevating plate 32, so that the underfil glue is cured to form the glue layer 36.
It is understood that when the glue layer 36 is disposed between the universal storage 33 and the raised plate 32, on one hand, the glue layer 36 can improve the connection between the universal storage 33 and the raised plate 32. When the electronic apparatus 100 is dropped or collides with another object, the universal storage 33 is not easily separated or cracked from the elevated plate 32. On the other hand, when static electricity is generated in the electronic components (including the first electronic component 34) on the circuit board 31 and the static electricity approaches the universal memory 33 through the circuit board 31, the static electricity can be shielded by the adhesive layer 36. At this time, the general-purpose memory 33 is not easily damaged by static electricity.
In other alternative ways, the glue layer 36 may not be disposed between the universal memory 33 and the elevated plate 32.
In other alternatives, an adhesive layer 36 may also be disposed between the elevated plate 32 and the circuit board 31. At this time, the adhesive layer 36 can improve the connection between the raised plate 32 and the circuit board 31, and the integrity of the circuit board assembly 30 is better.
In other alternatives, the second alternative may also be combined with any of the first alternatives.
In the third alternative, the same technical contents as those in the second alternative (see fig. 15) are not described again: referring to fig. 16 and 17, fig. 16 is a top view of another embodiment of the raised plate 32 of the circuit board assembly 30 shown in fig. 5. Fig. 17 is a cross-sectional view of still another embodiment of the circuit board assembly 30 shown in fig. 5 taken along line B-B. It should be noted that the position of the cross-sectional view shown in fig. 17 is also shown in the corresponding position in fig. 16, i.e., fig. 16 also illustrates the section line B-B.
Wherein the elevated plate 32 is provided with a glue groove 324. The glue groove 324 is disposed in a staggered manner with respect to the first conductive member 322, that is, the glue groove 324 does not occupy the space of the first conductive member 322. The opening of the glue slot 324 is located on the top surface 3211 of the elevated plate 32. A portion of the glue layer 36 is disposed in the glue groove 324. It should be understood that the number of glue slots 324 is not limited to the one illustrated in fig. 16. The shape of the opening of the glue groove 324 is not limited to the rectangular shape illustrated in fig. 16. For example, the opening of the glue groove 324 may also be circular, triangular, etc.
It will be appreciated that when the elevated plate 32 is provided with glue slots 324, the surface area of the elevated plate 32 can be increased. At this time, when a portion of the adhesive layer 36 is disposed in the adhesive groove 324, the connection area between the adhesive layer 36 and the raised plate 32 is larger, and the connection firmness between the universal memory 33 and the raised plate 32 is better.
In addition, compared with the method of forming the glue groove on the circuit board 31, the embodiment forms the glue groove 324 on the elevated plate 32, thereby effectively utilizing the advantage of small area of the elevated plate 32, significantly reducing the time for forming the glue groove 324, simplifying the process for forming the glue groove 324, further significantly reducing the cost, and avoiding the circuit board 31 from being damaged.
In an alternative, the glue groove 324 may have a depth in the range of 0.15mm to 2mm in the Z-axis direction. For example, the glue groove 324 may have a depth of 0.15mm, 0.2mm, 0.5mm, 0.7mm, 0.9mm, 1.3mm, 1.4mm, 1.7mm, 1.9mm, or 2 mm. It is understood that when the depth of the glue groove 324 satisfies the size, on one hand, the glue groove 324 has a small influence on the structural strength of the raised plate 32, and on the other hand, when a portion of the glue layer 36 is disposed in the glue groove 324, the thickness of the glue layer 36 can ensure a better connection between the universal storage 33 and the raised plate 32.
In an alternative manner, the same technical contents as those in the third alternative manner (see fig. 16 to 17) are not repeated: referring to fig. 18, fig. 18 is a top view of still another embodiment of the elevated plate 32 of the circuit board assembly 30 shown in fig. 5. The peripheral side 3214 includes first and second oppositely facing sides 3215, 3216. The opening of the glue slot 324 extends from the top surface 3211 of the elevated plate 32 to the first and second sides 3215, 3216 of the elevated plate 32.
It will be appreciated that during dispensing, glue between the universal store 33 (see fig. 17) and the elevated plate 32 can flow out through the openings in the first side 3215 and the openings in the second side 3216. At this time, less glue is left between the universal reservoir 33 and the elevated plate 32. When the glue between the universal memory 33 and the raised plate 32 is cured to form the glue layer 36 (see fig. 17), the thickness of the glue layer 36 in the Z-axis direction is not too thick. The glue layer 36 between the universal memory 33 and the elevated plate 32 is not easily expanded by heat to force the solder balls 333 of the universal memory 33 to separate from the elevated plate 32.
In other alternatives, the opening of the glue groove 324 may extend in other directions to other portions of the peripheral side surface 3214. At this time, during the dispensing process, the glue between the universal storage 33 and the raised plate 32 can also flow out through the openings of the other sides, thereby greatly reducing the glue staying between the middle portion 331 of the universal storage 33 and the raised plate 32.
In an alternative manner, the technical content same as that in the above alternative manner (see fig. 18) is not repeated: referring to fig. 19a and 19b, fig. 19a is a top view of still another embodiment of the elevated plate 32 of the circuit board assembly 30 shown in fig. 5. Fig. 19b is a schematic partial cross-sectional view of the elevated plate shown in fig. 19a taken along line C-C. In order to make the cross-sectional view of fig. 19b more clear, part of the first conductive member 322 is omitted from fig. 19 b. The shape of the middle portion of the glue groove 324 is not limited to the rectangular shape illustrated in fig. 18. The shape of the middle portion of the glue groove 324 may also be a ring structure as illustrated in fig. 19 a. In this case, the elevated plate 32 is not reduced in structural strength by the opening of the large-sized glue groove 324. Of course, in other alternative ways, the middle portion of the glue groove 324 may have other shapes.
In the fourth alternative, the same technical contents as those in the third alternative (see fig. 16 to 17) are not described again: referring to fig. 20, fig. 20 is a cross-sectional view of another embodiment of the circuit board assembly 30 shown in fig. 5 taken along line B-B. The elevating plate 32 is further provided with a diversion hole 325. The diversion hole 325 extends from the bottom wall of the glue groove 324 to the bottom surface 3212 of the elevated plate 32. Part of the adhesive layer 36 is disposed in the flow guide hole 325, and part of the adhesive layer 36 is disposed between the elevated plate 32 and the circuit board 31.
It will be appreciated that during dispensing, glue between the universal store 33 and the elevated plate 32 can flow between the circuit board 31 and the elevated plate 32 through the glue slot 324 and the flow guide holes 325. At this time, the glue remaining between the universal storage 33 and the elevated plate 32 is reduced to a large extent. When the glue between the universal memory 33 and the elevated plate 32 is cured to form the glue layer 36, the thickness of the glue layer 36 in the Z-axis direction is thinner. Thus, the glue layer 36 between the universal store 33 and the elevated plate 32 is not easily expanded by heat to force the universal store 33 and the elevated plate 32 apart.
In addition, when the glue between the universal storage 33 and the raised board 32 flows between the circuit board 31 and the raised board 32 through the glue groove 324 and the flow guiding hole 325, and is cured to form the glue layer 36, the glue layer 36 further bonds the circuit board 31 and the raised board 32. At this time, the connection between the raised board 32 and the circuit board 31 is more secure. When the electronic device 100 falls or collides with another object, the elevated plate 32 is not easily separated or cracked from the circuit board 31.
In addition, compared to the solution of dispensing between the universal storage 33 and the elevated board 32 and dispensing between the circuit board 31 and the elevated board 32, in the present embodiment, when the glue groove 324 and the flow guiding hole 325 are disposed on the elevated board 32, the glue can form the glue layer 36 between the universal storage 33 and the elevated board 32 and between the circuit board 31 and the elevated board 32 at the same time by dispensing between the universal storage 33 and the elevated board 32. In other words, the glue layer 36 can be formed at two positions simultaneously by dispensing at one position in the present embodiment. The dispensing frequency of the embodiment is less, the process steps can be saved, and the cost investment is reduced.
In an alternative manner, the same technical content as that in the fourth alternative manner (see fig. 20) is not repeated: referring to fig. 21, fig. 21 is a cross-sectional view of another embodiment of the circuit board assembly 30 shown in fig. 5 along line B-B. The shape of the orifice 325 is not limited to a straight orifice as illustrated in fig. 20. The diversion hole 325 may also be a stepped hole with a wide top and a narrow bottom as illustrated in fig. 21, that is, the size of the opening of the diversion hole 325 at the bottom wall of the glue groove 324 is larger than the size of the opening of the diversion hole 325 at the bottom surface 3212.
It will be appreciated that for a general purpose memory 33 with densely arranged solder balls 333, during dispensing, the glue between the solder balls 333 can flow out through the flow guide holes 325 quickly. At this time, the amount of glue remaining between the solder balls 333 is small. When the glue between the solder balls 333 is cured to form the glue layer 36, the thickness of the glue layer 36 is thinner. Thus, the glue layer 36 between the solder balls 333 is not easily expanded by heat to force the universal memory 33 from the elevated plate 32.
In an alternative manner, the same technical content as that in the fourth alternative manner (see fig. 20) is not repeated: referring to fig. 22, fig. 22 is a cross-sectional view of the circuit board assembly 30 shown in fig. 5 taken along line B-B in another embodiment. The diversion hole 325 may also be a stepped hole with a narrow top and a wide bottom, that is, the size of the opening of the diversion hole 325 in the glue groove 324 is smaller than the size of the opening of the diversion hole 325 in the bottom surface 3212.
It will be appreciated that for a universal reservoir 33 with sparsely arranged solder balls 333, during dispensing, glue between the solder balls 333 can flow out through the flow guide holes 325 at a slower rate. At this time, the amount of glue remaining between the solder balls 333 is moderate. The thickness of glue layer 36 is moderate when the glue between solder balls 333 is cured to form glue layer 36. Thus, the adhesive layer 36 between the solder balls 333 is not easy to reduce the connection strength between the universal memory 33 and the elevating plate 32 due to its small thickness.
In other alternatives, the diversion hole 325 can be a through hole with other shapes.
In a fifth alternative manner, the same technical contents as those of the first embodiment (see fig. 5 to 10) are not repeated: referring to fig. 23 and 24, fig. 23 is a top view of another embodiment of the raised plate 32 of the circuit board assembly 30 shown in fig. 5. Fig. 24 is a cross-sectional view of still another embodiment of the circuit board assembly 30 shown in fig. 5 taken along line B-B. It should be noted that the position of the cross-sectional view shown in fig. 24 is also shown in the corresponding position in fig. 23, i.e., fig. 23 also illustrates the section line B-B. The elevated plate 32 is provided with a recess 326. The opening of the groove 326 is located at the bottom surface 3212 of the elevated plate 32. It should be noted that, at the angle shown in fig. 23, the groove 326 is hidden by the top surface 3211 of the elevating plate 32, and the position of the groove 326 is schematically shown by a dotted line in fig. 23. It should be understood that the location, shape and size of the groove 326 is not limited to the location, shape and size illustrated in fig. 23. In this embodiment, compared to fig. 9, the recess 326 and the first conductive member 322 are not staggered. The recess 326 occupies a portion of the space of the first conductive member 322. At this time, the first conductive member 322 is electrically connected to the circuit board 31 by changing the shape of the first conductive member 322 such that the first conductive member 322 bypasses the groove 326. In an alternative arrangement, the recess 326 is offset from the first conductive member 322. At this time, the recess 326 may be disposed to avoid the first conductive member 322.
Circuit board assembly 30 includes a third electronic component 392. The third electronic component 392 is fixed to the circuit board 31 and electrically connected to the circuit board 31. A third electronic component 392 is positioned within recess 326. It should be noted that the third electronic component 392 is located in the recess 326 without considering the gap between the raised board 32 and the circuit board 31. In the case where the gap between the elevated plate 32 and the circuit board 31 is large, the third electronic component 392 is partially located in the recess 326 and partially located between the elevated plate 32 and the circuit board 31.
In this embodiment, the third electronic component 392 may include a portion of the power distribution network. Specifically, the arrangement of the third electronic component 392 can refer to the arrangement of the first electronic component 34. And will not be described in detail herein.
It can be understood that, in the present embodiment, the groove 326 is disposed on the raised board 32, and the opening of the groove 326 is located on the bottom surface 3212 of the raised board 32, so as to further create a space capable of arranging electronic components in the area between the universal memory 33 and the circuit board 31, that is, a space surrounded by the groove 326 and the circuit board 31. At this time, if the third electronic component 392 disposed at other positions on the circuit board 31 is disposed in the recess 326, the space between the universal memory 33 and the circuit board 31 is effectively utilized, and the space utilization rate of the circuit board assembly 30 is improved. In addition, other positions on the circuit board 31 can make up an area where the third electronic component 392 is disposed. Therefore, the vacated area can be used for arranging more electronic components with new functions, so that the electronic equipment can realize diversified functions. In this case, when the third electronic component 392 having a new function is arranged in the space, the space between the general-purpose memory 33 and the circuit board 31 is effectively used, and the electronic apparatus 100 can realize various functions.
In addition, the arrangement of the third electronic component 392 and the general-purpose memory 33 on the circuit board 31 is more compact. The area on the circuit board 31 is not easily wasted.
In other alternatives, when the recess 326 occupies most of the space of the raised plate 32, a portion of the first conductive member 322 may be exposed relative to the peripheral side surface 3214. Portions of the first conductive member 322 may also be exposed relative to the walls of the recess 326. At this time, the first conductive member 322 may be formed using a conventional process of drilling plating.
In other alternatives, a second alternative adhesive layer 326 may be disposed in the recess 326.
In other optional manners, the fifth optional manner may also be combined with any optional manner of the first optional manner, the second optional manner, the third optional manner, and any optional manner of the third optional manner.
In other optional manners, the fifth optional manner may also be combined with any one of the fourth optional manner and the fourth optional manner. It should be understood that the grooves 326 of the raised plate 32 are not located at the same positions as the flow guide holes 325 in the fourth alternative, and the grooves 326 may be located offset from the flow guide holes 325 or may be in communication with each other.
In an alternative manner, technical contents that are the same as those in the fifth alternative manner (see fig. 23 and fig. 24) are not repeated: referring to fig. 25, fig. 25 is a cross-sectional view of another embodiment of the circuit board assembly 30 shown in fig. 5 taken along line B-B. Circuit board assembly 30 includes a fourth electronic component 393. The fourth electronic component 393 is disposed on the sidewall 3261 of the groove 326. It should be noted that the number of the fourth electronic component 393 is not limited to two as illustrated in fig. 25. For example, a plurality of fourth electronic components 393 may also be disposed around the sidewalls 3261 of the recess 326. At this time, the plurality of fourth electronic components 393 form a ring shape, an "L" shape, an "Contraband" shape, a "r" shape, an "pi" shape, or the like.
In an alternative manner, the fourth electronic component 393 may be electrically connected to the circuit board 31 via traces or conductive members within the elevated plate 32.
In an alternative embodiment, fourth electronic component 393 may be electrically connected to solder balls 333 of universal memory 33 via traces or conductors within raised board 32.
In this embodiment, fourth electronic component 393 may include a portion of an electronic component of the power distribution network. Specifically, the arrangement of the fourth electronic component 393 may refer to the arrangement of the first electronic component 34. And will not be described in detail herein.
It is understood that the area of the side wall 3261 of the groove 326 is effectively used by disposing the fourth electronic component 393 on the side wall 3261 of the groove 326. At this time, the space between the universal memory 33 and the circuit board 31 is not easy to cause the smaller area of the third electronic component 392 on the circuit board 31, which results in the smaller number of the arranged third electronic components 392. In other words, the space between the general memory 33 and the circuit board 31 can be used for arranging more electronic components, and the utilization rate of the space of the circuit board assembly 30 is higher.
In addition, when the fourth electronic component 393 is disposed on the side wall 3261 of the groove 326, an area where the fourth electronic component 393 is disposed may be made free at another position on the circuit board 31. In this way, the vacated area may be used to arrange more electronic components with new functions, so that the electronic device 100 may implement diversified functions.
In an alternative manner, technical contents that are the same as those in the fifth alternative manner (see fig. 23 and fig. 24) are not repeated: referring to fig. 26, fig. 26 is a cross-sectional view of another embodiment of the circuit board assembly 30 shown in fig. 5 taken along line B-B. Circuit board assembly 30 includes a fifth electronic component 394. A fifth electronic component 394 is disposed on the bottom wall 3262 of the recess 326. It should be noted that the number of the fifth electronic components 394 is not limited to two as illustrated in fig. 26.
In an alternative, the fifth electronic component 394 may be electrically connected to the circuit board 31 by traces or conductive elements within the elevated plate 32.
Alternatively, the fifth electronic component 394 may be electrically connected to the solder balls 333 of the universal memory 33 via traces or conductors in the elevated board 32.
In this embodiment, the fifth electronic component 394 may comprise a portion of the power distribution network. Specifically, the arrangement of the fifth electronic component 394 may refer to the arrangement of the first electronic component 34. And will not be described in detail herein.
It is understood that the area of the bottom wall 3262 of the recess 326 is effectively utilized by disposing the fifth electronic component 394 on the bottom wall 3262 of the recess 326. At this time, the space between the universal memory 33 and the circuit board 31 is not easy to cause the smaller area for fixing the third electronic component 392 on the circuit board 31, which results in the smaller number of the arranged third electronic components 392. In other words, the space between the general-purpose memory 33 and the circuit board 31 enables more electronic components to be arranged, and the space utilization rate of the circuit board assembly 30 is higher.
In addition, when the fifth electronic component 394 is provided on the bottom wall 3262 of the recess 326, the area where the fifth electronic component 394 is provided can be made larger at other positions on the circuit board 31. In this way, the vacated area may be used to arrange more electronic components with new functions, so that the electronic device 100 may implement diversified functions.
In other alternatives, the present embodiment may be combined with any one of the fifth alternatives.
In an alternative manner, technical contents that are the same as those in the fifth alternative manner (see fig. 23 and fig. 24) are not repeated: referring to fig. 27 and 28, fig. 27 is a top view of yet another embodiment of the elevated plate 32 of the circuit board assembly 30 shown in fig. 5. Fig. 28 is a cross-sectional view of still another embodiment of the circuit board assembly 30 shown in fig. 5 taken along line B-B. It should be noted that the position of the cross-sectional view shown in fig. 28 is also shown in the corresponding position in fig. 27, i.e., fig. 27 also illustrates the section line B-B.
The opening of the groove 326 extends from the bottom surface 3212 to the first side surface 3215 of the elevated plate 32. It should be understood that the opening of the recess 326 may also extend to other sides of the elevated plate 32. In addition, the recess 326 is not offset from the first conductive member 322. The recess 326 occupies a portion of the space of the first conductive member 322. At this time, the first conductive member 322 is electrically connected to the circuit board 31 by changing the shape of the first conductive member 322 such that the first conductive member 322 bypasses the groove 326.
It is understood that the opening of the groove 326 extends to the first side 3215, thereby increasing the volume of the space enclosed by the groove 326 and the circuit board 31. At this time, the number of the third electronic components 392 arranged in the recess 326 is larger, or the size of the third electronic components 392 (e.g., a cpu) is larger. In this way, more area can be freed up elsewhere on the circuit board 31. The vacated area may be used to arrange more electronic components with new functions to enable the electronic device 100 to implement a variety of functions.
In other alternatives, the present embodiment may be combined with any one of the fifth alternatives.
In the sixth alternative, the technical contents that are the same as those in the fifth alternative (see fig. 23 and fig. 24) are not repeated: referring to fig. 29 and 30, fig. 29 is a top view of another embodiment of the elevated plate 32 of the circuit board assembly 30 shown in fig. 5. Fig. 30 is a schematic cross-sectional view of still another embodiment of the circuit board assembly 30 shown in fig. 5 taken along line B-B. It should be noted that the position of the cross-sectional view shown in fig. 30 is also shown in the corresponding position in fig. 29, i.e., fig. 29 also illustrates the section line B-B. The elevated plate 32 is provided with a first through hole 327. The first through hole 327 extends from the bottom wall 3262 of the groove 326 to the top surface 3211 of the elevated plate 32. In this embodiment, the first through hole 327 is staggered from the first conductive member 322. At this time, the first through holes 327 are disposed to be offset from the solder balls 333.
In addition, the circuit board assembly 30 includes a sixth electronic component. The sixth electronic component may comprise a portion of an electronic component of the power distribution network. Specifically, the arrangement of the sixth electronic component can refer to the arrangement of the first electronic component 34. And will not be described in detail herein.
In this embodiment, the sixth electronic component is the first filter capacitor 395. The first filter capacitor 395 is used for electrical performance processing such as filtering the power and signals of the general-purpose memory 33.
The first filter capacitor 395 is fixed on the circuit board 31, and the first filter capacitor 395 and the solder ball 333 are arranged in a staggered manner. The solder ball 333 without cross-hatching in fig. 30 is not on the same cross-section as the first filter capacitor 395, and the solder ball 333 is offset from the first filter capacitor 395. The first filter capacitor 395 is electrically connected to the circuit board 31. In addition, a portion of the first filter capacitor 395 is disposed within the recess 326 and a portion of the first filter capacitor 395 is disposed within the first via 327. In addition, a portion of the first filter capacitor 395 may also extend out of the first via 327.
It is understood that, by providing the first through hole 327 on the raised board 32, and the first through hole 327 penetrates from the bottom wall 3262 of the groove 326 to the top surface 3211 of the raised board 32, a new vacant space (including the space in the first through hole 327 and the space between the universal memory 33 and the first through hole 327) is further opened up in the region between the universal memory 33 and the circuit board 31. At this time, the first filter capacitors 395 disposed at other positions on the circuit board 31 are disposed in the empty space, thereby greatly utilizing the space between the general memory 33 and the circuit board 31 and improving the space utilization. In addition, other positions on the circuit board 31 can make up for the area where the first filter capacitor 395 is provided. In this way, the vacated area may be used to arrange more electronic components with new functions, so that the electronic device 100 may implement diversified functions.
In other alternatives, the number of first through holes 327 is not limited to the one illustrated in fig. 29.
In other alternative manners, the glue layer 326 in the second alternative manner may also be disposed in the first through hole 327.
In other alternatives, the sixth alternative may be combined with any one of the fifth alternative.
In other optional manners, the sixth optional manner may also be combined with any one of the fourth optional manner and the fourth optional manner. It should be understood that the first through hole 327 of the elevating plate 32 is located differently from the diversion hole 325 in the fourth alternative, and the first through hole 327 may be offset from the diversion hole 325 or may be communicated with each other.
The seventh alternative manner, the same technical contents as those of the sixth alternative manner (refer to fig. 29 and fig. 30) are not described again: referring to fig. 31 and 32, fig. 31 is a top view of another embodiment of the elevated plate 32 of the circuit board assembly 30 shown in fig. 5. Fig. 32 is a schematic cross-sectional view of still another embodiment of the circuit board assembly 30 shown in fig. 5 taken along line B-B. It should be noted that the position of the cross-sectional view shown in fig. 32 is also shown in the corresponding position in fig. 31, i.e., fig. 31 also illustrates the section line B-B. The solder balls 333 of the general memory 33 include first solder balls 3331. A portion of the first through holes 327 is disposed opposite to the first solder balls 3331. Note that the solder balls 333 without hatching in the middle are not disposed opposite to the first through holes 327. At this time, compared to fig. 29, the first through hole 327 occupies a space of the first conductive member 322. The elevated plate 32 is reduced by a first conductive member 322.
In addition, the sixth electronic component is a second filter capacitor 3971. The second filter capacitor 3971 may be used for electrical performance processing such as filtering the power and signals of the general memory 33. A portion of the second filter capacitor 3971 is disposed in the recess 326. A portion of second filter capacitor 3971 is disposed in first via 327. One end of the second filter capacitor 3971 is connected to the circuit board 31, and the other end is connected to the first solder ball 3331. The first solder ball 3331 is electrically connected to the circuit board 31 through the second filter capacitor 3971.
It will be appreciated that by providing the first through hole 327 in the elevated board 32, a new vacant space (including the space in the first through hole 327) is further opened up in the region between the universal memory 33 and the circuit board 31. At this time, the second filter capacitors 3971 disposed at other positions on the circuit board 31 are arranged in the empty space, so that the space between the general memory 33 and the circuit board 31 is largely used, and the space utilization rate is improved. In addition, other positions on the circuit board 31 can make up for the area where the second filter capacitor 3971 is disposed. In this way, the vacated area may be used to arrange more electronic components with new functions, so that the electronic device 100 may implement diversified functions.
In addition, one end of the second filter capacitor 3971 is electrically connected to the circuit board 31, and the other end is electrically connected to the first solder ball 3331 of the universal memory 33, so that the distance between the second filter capacitor 3971 and the first solder ball 3331 is greatly shortened, and the filtering effect of the second filter capacitor 3971 is better.
In other alternative manners, the first through hole 327 may be disposed opposite to the plurality of solder balls 333. At this time, the first through holes 327 occupy spaces of the plurality of first conductive members 322. Elevated plate 32 reduces the plurality of first conductive members 322. At this time, the number of the second filter capacitors 3971 is also plural.
In other alternative manners, when the size of the first via 327 is small, the first filter capacitor 395 may not be disposed in the first via 327.
The eighth alternative manner, the same technical contents as those of the sixth alternative manner (refer to fig. 29 and fig. 30) are not described again: referring to fig. 33a and 33b, fig. 33a is a top view of still another embodiment of an elevated plate of the circuit board assembly shown in fig. 5; fig. 33B is a schematic cross-sectional view of yet another embodiment of the circuit board assembly shown in fig. 5 taken along line B-B. It should be noted that the position of the cross-sectional view shown in fig. 33B is also shown in the corresponding position in fig. 33a, i.e., fig. 33a also illustrates the section line B-B.
The solder balls 333 of the general memory 33 include first solder balls 3331 and second solder balls 3332 that are arranged at intervals. A portion of the first through hole 327 is disposed opposite to the first solder ball 3331 and the second solder ball 3332. Note that the solder ball 333 without hatching in the middle is not disposed opposite to the first through hole 327. At this time, compared to fig. 29, the first through hole 327 occupies the space of the two first conductive members 322. Elevated plate 32 reduces the number of two first conductive members 322.
In addition, the sixth electronic component is a third filter capacitor 3972. The third filter capacitor 3972 may be used for electrical performance processing such as filtering the power and signals of the general memory 33. A portion of the third filter capacitor 3972 is disposed in the recess 326. A portion of third filter capacitor 3972 is disposed in first via 327. One end of the third filter capacitor 3972 is connected to the first solder ball 3331, and the other end is connected to the second solder ball 3332. The first solder ball 3331 is electrically connected to the second solder ball 3332 through the third filter capacitor 3972.
It can be understood that, by electrically connecting one end of the third filter capacitor 3972 to the first solder ball 3331 and the other end to the second solder ball 3332, the distance between the third filter capacitor 3972 and the first solder ball 3331 and the distance between the third filter capacitor 3972 and the second solder ball 3332 are greatly reduced, so that the filtering effect of the third filter capacitor 3972 is better.
In other alternatives, the first filter capacitor 395 of the sixth alternative may also be disposed in the first through hole 327.
In other alternative manners, the glue layer 326 in the second alternative manner may also be disposed in the first through hole 327.
In a ninth alternative manner, the same technical contents as those in the first alternative embodiment (see fig. 5 to 10) are not repeated: referring to fig. 34 and 35, fig. 34 is a top view of another embodiment of the elevated plate 32 of the circuit board assembly 30 shown in fig. 5. Fig. 35 is a schematic cross-sectional view of yet another embodiment of the circuit board assembly 30 shown in fig. 5 taken along line B-B. It should be noted that the position of the cross-sectional view shown in fig. 35 is also shown in the corresponding position in fig. 34, i.e., fig. 34 also illustrates the section line B-B. The elevated plate 32 is provided with a second through hole 328. The second through hole 328 extends from the top surface 3211 of the elevated plate 32 to the bottom surface 3212 of the elevated plate 32. In this embodiment, the second through hole 328 is offset from the first conductive member 322. At this time, the second through holes 328 are disposed to be offset from the solder balls 333. It should be understood that the shape, size and number of the second through holes 328 are not limited to the shape, size and number illustrated in fig. 34 and 35.
In addition, the circuit board assembly 30 includes a seventh electronic component. The seventh electronic component may comprise part of the electronic components of the power distribution network. Specifically, the arrangement of the seventh electronic component can refer to the arrangement of the first electronic component 34. And will not be described in detail herein.
In this embodiment, the seventh electronic component is the first filter capacitor 396. First filter capacitor 396 may be used to perform electrical performance processing such as filtering the power and signals of general purpose memory 33. In other alternative ways, the seventh electronic component may also include other electronic components of the power distribution network.
The first filter capacitor 396 is fixed to the circuit board 31, and the first filter capacitor 396 and the solder balls 333 are arranged in a staggered manner. The solder ball 333 without cross section in fig. 35 is not on the same cross section as the first filter capacitor 396, and the solder ball 333 is offset from the first filter capacitor 396. The first filter capacitor 396 is electrically connected to the circuit board 31. In addition, a first filter capacitor 396 is located within the second via 328. It should be noted that the first filter capacitor 396 may be entirely located within the second via 328 without regard to the gap between the elevated plate 32 and the circuit board 31. In the case of a large gap between the elevated plate 32 and the circuit board 31, the first filter capacitor 396 is partially located in the second through hole 328 and partially located between the elevated plate 32 and the circuit board 31. In addition, a portion of the first filter capacitor 396 may also extend out of the second via 328 and be located between the elevated plate 32 and the general memory 33.
It is understood that by providing the second through hole 328 on the raised board 32, and the second through hole 328 penetrates from the top surface 3211 of the raised board 32 to the bottom surface 3212 of the raised board 32, a new empty space (including the space inside the second through hole 328 and the space between the general purpose memory 33 and the second through hole 328) is further opened up in the area between the general purpose memory 33 and the circuit board 31. At this time, the first filter capacitors 396 disposed at other positions on the circuit board 31 are arranged in the empty space, so that the space between the general memory 33 and the circuit board 31 is largely utilized, and the space utilization rate is improved. In addition, other positions on the circuit board 31 can make up for the area where the first filter capacitor 396 is disposed. In this way, the vacated area may be used to arrange more electronic components with new functions, so that the electronic device 100 may implement diversified functions.
In other alternatives, the second alternative glue layer 326 may also be disposed in the second through hole 328.
In other alternatives, when the second through hole 328 occupies most of the space of the raised plate 32, a portion of the first conductive member 322 may be exposed relative to the peripheral side surface 3214. A portion of the first conductive member 322 may also be exposed relative to the wall of the second via 328. At this time, the first conductive member 322 may be formed using a conventional process of drilling plating.
In other optional manners, the ninth optional manner may also be combined with any one of the first optional manner, the second optional manner, the third optional manner, and each optional manner.
In the tenth alternative, the technical contents that are the same as those in the ninth alternative (see fig. 34 and 35) are not repeated: referring to fig. 36 and 37, fig. 36 is a top view of another embodiment of the elevated plate 32 of the circuit board assembly 30 shown in fig. 5. Fig. 37 is a cross-sectional view of still another embodiment of the circuit board assembly 30 shown in fig. 5 taken along line B-B. It should be noted that the position of the cross-sectional view shown in fig. 37 is also shown in the corresponding position in fig. 36, i.e., fig. 36 also illustrates the section line B-B. The solder balls 333 of the general memory 33 include first solder balls 3331. A portion of the second via 328 is disposed opposite the first solder ball 3331. Note that the solder balls 333 without hatching therebetween are not disposed opposite to the second through holes 328. At this time, compared to fig. 34, the second through hole 328 occupies a space of one first conductive member 322. Elevated plate 32 is reduced by a first conductive member 322.
In addition, the seventh electronic component is a second filter capacitor 3971. The second filter capacitor 3971 may be used for electrical performance processing such as filtering the power and signals of the general memory 33. A portion of the second filter capacitor 3971 is disposed in the second via 328.
One end of the second filter capacitor 3971 is connected to the circuit board 31, and the other end is connected to the first solder ball 3331 of the general-purpose memory 33.
The first solder ball 3331 is electrically connected to the circuit board 31 through the second filter capacitor 3971.
It is understood that by providing the second through hole 328 in the raised board 32, a space (including the space in the second through hole 328) capable of arranging electronic components is further opened up in the region between the general purpose memory 33 and the circuit board 31. At this time, the second filter capacitors 3971 disposed at other positions on the circuit board 31 are arranged in the space, so that the space between the general memory 33 and the circuit board 31 is largely used, and the space utilization rate is improved. In addition, other positions on the circuit board 31 can make up for an area where the second filter capacitor 3971 is provided. In this way, the vacated area may be used to arrange more electronic components with new functions, so that the electronic device 100 may implement diversified functions.
In addition, one end of the second filter capacitor 3971 is electrically connected to the circuit board 31, and the other end is electrically connected to the solder ball 333 of the universal memory 33, so that the distance between the second filter capacitor 3971 and the solder ball 333 is greatly shortened, and the filter effect of the second filter capacitor 3971 is better.
In other alternatives, the second via 328 may be disposed opposite the plurality of solder balls 333. At this time, the second through holes 328 occupy the space of the plurality of first conductive members 322. Elevated plate 32 reduces the plurality of first conductive members 322. At this time, the number of the second filter capacitors 3971 is also plural.
In other alternative manners, when the size of the second through hole 328 is small, the first filter capacitor 396 may not be disposed in the second through hole 328.
In other alternatives, the second alternative glue layer 326 may also be disposed in the second through hole 328.
In the eleventh alternative, the technical content same as that in the ninth alternative (see fig. 34 and 35) is not repeated: referring to fig. 38 and 39, fig. 38 is a top view of another embodiment of the elevated plate 32 of the circuit board assembly 30 shown in fig. 5. Fig. 39 is a schematic cross-sectional view of still another embodiment of the circuit board assembly 30 shown in fig. 5 taken along line B-B. It should be noted that the position of the cross-sectional view shown in fig. 39 is also shown in the corresponding position in fig. 38, i.e., fig. 38 also illustrates the section line B-B.
The solder balls 333 of the universal memory 33 include a first solder ball 3331 and a second solder ball 3332. A portion of the second through holes 328 is disposed opposite to the first solder balls 3331 and the second solder balls 3332. Note that the solder balls 333 without hatching therebetween are not disposed opposite to the second through holes 328. At this time, compared to fig. 34, the second through hole 328 occupies the space of the two first conductive members 322. Elevated plate 32 reduces the number of two first conductive members 322.
In addition, the seventh electronic component is a third filter capacitor 3972. The third filter capacitor 3972 may be used for performing electrical performance processing such as filtering on the power and signals of the general-purpose memory 33. A portion of the third filter capacitor 3972 is disposed in the second via 328. One end of the third filter capacitor 3972 is connected to the first solder ball 3331, and the other end is connected to the second solder ball 3332. The first solder ball 3331 is electrically connected to the second solder ball 3332 through the third filter capacitor 3972.
It can be understood that, by electrically connecting one end of the third filter capacitor 3972 to the first solder ball 3331 and the other end of the third filter capacitor 3972 to the second solder ball 3332, the distance between the third filter capacitor 3972 and the first solder ball 3331 and the distance between the third filter capacitor 3972 and the second solder ball 3332 are greatly reduced, so that the filtering effect of the third filter capacitor 3972 is better.
In other alternative manners, the first filter capacitor 396 of the ninth alternative manner may also be disposed in the second through hole 328.
In other alternatives, the second alternative glue layer 326 may also be disposed in the second through hole 328.
In the twelfth alternative, the technical content same as that in the first alternative (see fig. 5 to 10) is not repeated: referring to fig. 40, fig. 40 is a top view of another embodiment of the circuit board assembly 30 shown in fig. 5. The elevated plate 32 also includes first and second oppositely facing sides 3215 and 3216, and third and fourth oppositely facing sides 3217 and 3218. Third side 3217 and fourth side 3218 are connected between first side 3215 and second side 3216. The length between the third side 3217 and the fourth side 3218 is greater than the length between the first side 3215 and the second side 3216.
In this embodiment, orthographic projections of the first side surface 3215 and the second side surface 3216 on the first surface 312 are fourth projections. Part of the fourth projection is located within the first projection, that is, part of the first side 3215 and part of the second side 3216 are located between the general memory 33 and the circuit board 31. Third side 3217 and fourth side 3218 extend opposite the edges of universal store 33. In other alternatives, one of the third and fourth sides 3217, 3218 may extend beyond an edge of the universal store 33. Alternatively, the third side 3217 and the fourth side 3218 may both be flush with an edge of the universal store 33 or may not extend beyond the opposite edge.
The number of the first electronic components 34 is plural. A portion of the first electronic component 34 is disposed adjacent to the first side 3215. A portion of the first electronic component 34 is disposed proximate the second side 3216. At this time, the first electronic components 34 are distributed on both sides of the elevated plate 32.
It should be noted that, since the general-purpose memory 33 covers a part of the first side 3215, a part of the second side 3216, and the first electronic component 34 of the elevated plate 32, fig. 40 illustrates a part of the first side 3215, a part of the second side 3216, and the first electronic component 34 by dashed lines.
It is understood that the dimension of the elevated plate 32 in the X-axis direction is increased by providing a length between the third side 3217 and the fourth side 3218 that is greater than a length between the first side 3215 and the second side 3216. At this time, on the one hand, the overall strength of the elevated plate 32 is better. The elevated plate 32 can relatively stably support the general-purpose memory 33. On the other hand, the elevated plate 32 has a sufficient space for disposing a fastener (e.g., a screw, or a land) so that the elevated plate 32 is stably fixed to the circuit board 31 using the fastener.
In addition, by arranging the elevating plate 32 between the general memory 33 and the circuit board 31 and arranging part of the first side 3215 and part of the second side 3216 between the general memory 33 and the circuit board 31, a space (including a space surrounded by the general memory 33, the first side 3215 and the circuit board 31, and a space surrounded by the general memory 33, the second side 3216 and the circuit board 31) capable of arranging devices is created in an area between the general memory 33 and the circuit board 31. At this time, if the first electronic components 34 disposed at other positions on the circuit board 31 are arranged in the space, on one hand, the space between the general memory 33 and the circuit board 31 is utilized to a greater extent, so as to improve the space utilization rate of the circuit board assembly 30, and on the other hand, the other positions on the circuit board 31 can vacate the area for disposing the first electronic components 34, and the vacated area can be used for arranging more electronic components with new functions, so as to enable the electronic device 100 to realize diversified functions. In this case, when the first electronic components 34 having new functions are arranged in the space, the space between the general-purpose memory 33 and the circuit board 31 is largely used, and the electronic apparatus 100 can realize various functions.
In other alternatives, the number of the first electronic components 34 may also be one. The first electronic component 34 is disposed near the first side 3215 or near the second side 3216.
In other alternatives, the twelfth alternative may be combined with any one of the first to eleventh alternatives, and any one of the alternatives.
Referring to fig. 41, fig. 41 is a top view of another embodiment of the elevated plate 32 of the circuit board assembly 30 shown in fig. 5. The second conductive members 323 of the elevated plate 32 are positioned at both sides of the first conductive members 322. A portion of the second electrically-conductive member 323 is disposed between the first electrically-conductive member 322 and the third side 3217. A portion of the second conductive member 323 is located between the first conductive member 322 and the fourth side 3218. It should be noted that the number and the arrangement shape of the second conductive members 323 are not limited to those illustrated in fig. 41.
It is understood that, due to the large size of the elevating plate 32 in the X-axis direction, when the second conductive members 323 are arranged in the X-axis direction, the number of the second conductive members 323 can be arranged more. Thus, the connection between the raised board 32 and the circuit board 31 (see fig. 40) is better. When the electronic apparatus 100 is dropped or collides with another object, the connection point between the elevated plate 32 and the circuit board 31 and the connection point between the elevated plate 32 and the general-purpose memory 33 (see fig. 40) are not easily cracked.
In addition, the circuit board 31 is generally fixed inside the electronic device 100 by screws, and at this time, the screws may apply stress to the circuit board 31 during locking the screws on the circuit board 31 or detaching the screws from the circuit board 31. The stress is easily transmitted to the elevated board 32 and the general memory 33 via the circuit board 31. When the elevated board 32 and the circuit board 31 have better connection firmness, the elevated board 32 can effectively resist the part of the stress, so as to prevent the connection point between the elevated board 32 and the circuit board 31 from cracking, or prevent the connection point between the general-purpose memory 33 and the elevated board 32 from cracking.
The above description specifically describes an arrangement of the solder balls 333 of the chip 33. The arrangement of the solder balls 333 of the other chips 33 will be described in detail with reference to the related drawings. When the solder balls 333 of the chip 33 are arranged as described below, the chip 33 may also be elevated by the elevating plate 32, thereby opening up a new space between the chip 33 and the circuit board 31. This space may be used to arrange the first electronic component 34, thereby significantly improving the space utilization of the circuit board assembly 30.
In a thirteenth alternative manner, technical contents that are the same as those in the first alternative manner (see fig. 5 to 10) are not repeated: referring to fig. 42, fig. 42 is a bottom view of another embodiment of a chip of the circuit board assembly of fig. 5. The solder balls 333 are arranged on a surface of the main body 331 in n rows and n columns, where n is greater than 1. First column a of a plurality of solder balls 333 1 Disposed proximate the first edge 3311. First column a 1 The distance s1 from the first edge 3311 is greater than or equal to 1 millimeter. N column a of a plurality of solder balls n Disposed proximate the second edge 3312. N-th column a n The distance s2 from the second edge 3312 is less than 1 millimeter. First row b of a plurality of solder balls 333 1 Disposed proximate the third edge 3313. First row b 1 The distance s3 from the third edge 3313 is less than 1 millimeter. N-th row b of a plurality of solder balls 333 n Disposed proximate the fourth edge 3314. N-th row b n And the fourth edge 3314 is less than 1 mm. At this time, the plurality of solder balls 333 do not fill the surface of the main body 311.
It is understood that when the plurality of solder balls 333 are arranged in the above-described manner, the first column a 1 The area between the first edge 3311 can be vacated.
Referring to fig. 43, fig. 43 is a top view of still another embodiment of the circuit board assembly shown in fig. 5. The elevated plate 32 includes a first side 3215. The plurality of first electronic components 34 are disposed adjacent to the first side 3215. Note that, since the chip 33 covers the elevated plate 32 and the first electronic component 34, the elevated plate 32 and the first electronic component 34 are schematically shown by broken lines in fig. 43.
In other alternatives, the thirteenth alternative may be combined with any one of the first to twelfth alternatives, and any one of the alternatives.
In a fourteenth alternative manner, the same technical contents as those in the first alternative manner (refer to fig. 5 to 10) are not described again: referring to fig. 44, fig. 44 is a bottom view of still another embodiment of a chip of the circuit board assembly of fig. 5. The solder balls 333 are arranged on a surface of the main body 331 in n rows and n columns, where n is greater than 1. First column a of a plurality of solder balls 333 1 Disposed proximate the first edge 3311. First column a 1 The distance s1 from the first edge 3311 is greater than or equal to 1 millimeter. N column a of a plurality of solder balls n Disposed proximate the second edge 3312. N-th column a n The distance s2 from the second edge 3312 is greater than or equal to 1 millimeter. First row b of a plurality of solder balls 333 1 Disposed proximate the third edge 3313. First row b 1 The distance s3 from the third edge 3313 is less than 1 millimeter. N-th row b of solder balls 333 n Disposed proximate the fourth edge 3314. N-th row b n The distance s4 from the fourth edge 3314 is less than 1 mm. At this time, the plurality of solder balls 333 do not fill the surface of the main body 311.
It is understood that when the plurality of solder balls 333 are arranged in the above-described manner, the first column a 1 The region between the first edge 3311 and the n-th row a n The area between the second edge 3312 can be vacated.
In other embodiments, each row or column of the plurality of solder balls 333 does not have to be strictly linear. In addition, every two rows of the plurality of solder balls 333 are not necessarily arranged strictly in parallel. Each two columns of the plurality of solder balls 333 may not be arranged strictly in parallel.
Referring to fig. 45, fig. 45 is a top view of still another embodiment of the circuit board assembly shown in fig. 5. The elevated plate 32 includes first and second oppositely facing sides 3215 and 3216. A portion of the plurality of first electronic components 34 is disposed adjacent to the first side 3215, and another portion is disposed adjacent to the second side 3216. Note that, since the chip 33 covers the elevated plate 32 and the first electronic component 34, the elevated plate 32 and the first electronic component 34 are schematically shown by broken lines in fig. 45.
In other alternatives, the fourteenth alternative may be combined with any one of the first to twelfth alternatives, and any one of the alternatives.
In a fifteenth alternative, the same technical contents as those in the first alternative (see fig. 5 to 10) are not repeated: referring to fig. 46, fig. 46 is a schematic structural diagram of another embodiment of a chip of the circuit board assembly of fig. 5. The solder balls 333 are arranged on a surface of the main body 331 in n rows and n columns, where n is greater than 1. First column a of a plurality of solder balls 333 1 Disposed proximate the first edge 3311. First column a 1 The distance s1 from the first edge 3311 is greater than or equal to 1 millimeter. N column a of a plurality of solder balls n Disposed proximate the second edge 3312. N-th column a n The distance s2 from the second edge 3312 is greater than or equal to 1 millimeter. First row b of a plurality of solder balls 333 1 Disposed proximate the third edge 3313. First row b 1 The distance s3 from the third edge 3313 is greater than or equal to 1 millimeter. N-th row b of solder balls 333 n Disposed proximate the fourth edge 3314. N-th row b n The distance s4 from the fourth edge 3314 is less than 1 mm. At this time, the plurality of solder balls 333 do not fill the surface of the main body 311.
It is understood that when the plurality of solder balls 333 are arranged in the above-described manner, the first column a 1 The region between the first edge 3311 and the n-th column a n The region between the first and second edges 3312 and the first row b 1 The area between the third edge 3313 can be vacated.
In other embodiments, each row or column of the plurality of solder balls 333 does not have to be strictly linear. In addition, every two rows of the plurality of solder balls 333 are not necessarily arranged strictly in parallel. Each two columns of the plurality of solder balls 333 may not be arranged strictly in parallel.
Referring to fig. 47, fig. 47 is a top view of another embodiment of the circuit board assembly shown in fig. 5. The elevated plate 32 includes first and second oppositely facing sides 3215 and 3216, and third and fourth oppositely facing sides 3217 and 3218. Third side 3217 and fourth side 3218 are connected between first side 3215 and second side 3216. A part of the plurality of first electronic components 34 is disposed near the first side 3215, another part is disposed near the second side 3216, and another part is disposed near the third side 3217. Note that, since the chip 33 covers the elevated plate 3232 and the first electronic component 34, the elevated plate 3232 and the first electronic component 34 are schematically shown by a dotted line in fig. 47.
In other alternatives, the fifteenth alternative may be combined with any one of the first to twelfth alternatives, and any one of the alternatives.
In a sixteenth alternative, the same technical contents as those in the first alternative (see fig. 5 to 10) are not repeated: referring to fig. 48, fig. 48 is a bottom view of yet another embodiment of a chip of the circuit board assembly of fig. 5. A plurality of solder balls 333 are arranged around the periphery of the main body 331. The plurality of solder balls 333 have a ring shape. At this time, the plurality of solder balls 333 do not fill the surface of the main body 311. The central region of the body 331 can be vacated.
Referring to fig. 49 and 50, fig. 49 is a top view of another embodiment of an elevated plate of the circuit board assembly of fig. 5. Fig. 50 is a cross-sectional view of still another embodiment of the circuit board assembly 30 shown in fig. 5 taken along line B-B. It should be noted that the position of the cross-sectional view shown in fig. 50 is also shown in the corresponding position in fig. 48 and 49, i.e., fig. 48 and 49 also illustrate the section line B-B. The elevated plate 32 is provided with a third through-hole 329. The third through hole 329 penetrates from the top surface 3211 of the elevated plate 32 to the bottom surface 3212 of the elevated plate 32. The elevated plate 32 is annular. In addition, the first electronic component 34 is located within the third through hole 329, i.e., the first electronic component 34 is located within the area surrounded by the elevated plate 32. In addition, the first electronic component 34 may also extend out of the third through hole 329.
In this embodiment, the solder balls 333 in the chip 33 are not able to fully fill the surface of the main body 331. At this time, the plurality of solder balls 333 of the general memory 33 are collectively arranged in a partial area of the main body 331, thereby enabling the partial area of the main body 331 to be vacated.
Thus, by providing the elevating plate 32 between the chip 33 and the circuit board 31, and providing the third through hole 329 to the elevating plate 32, a new vacant space (including the space inside the third through hole 329 and the space between the chip 33 and the third through hole 329) is opened up in the region between the chip 33 and the circuit board 31. At this time, the first electronic components 34 disposed at other positions on the circuit board 31 are arranged in the empty space, so that the space between the chip 33 and the circuit board 31 is largely utilized, and the space utilization rate is improved. In addition, other positions on the circuit board 31 can make up an area where the first electronic component 34 is disposed. In this way, the vacated area may be used to arrange more electronic components with new functions, so that the electronic device 100 may implement diversified functions.
In other optional manners, the sixteenth optional manner may also be combined with any optional manner of the first optional manner, the second optional manner, the third optional manner, and the third optional manner.
In a seventeenth alternative, the same technical contents as those in the first alternative (see fig. 5 to 10) are not repeated: referring to fig. 51, fig. 51 is a bottom view of still another embodiment of a chip of the circuit board assembly of fig. 5. A plurality of solder balls 333 are arranged at one side of the body 331. And the plurality of solder balls 333 are divided into a plurality of parts. Each portion is arranged on a surface of the body 331 in n rows and n columns, where n is greater than or equal to 1. The area of each portion in the arrangement of the body 331 is equal to the length of each portion multiplied by the width of each portion. Each portion has a length that is the distance between the outermost edge of the solder ball 333 in the first row and the outermost edge of the solder ball 333 in the nth row. The width of each portion is the distance between the outermost edge of the solder ball 333 in the first column and the outermost edge of the solder ball 333 in the nth column. Fig. 51 illustrates the division of the plurality of solder balls 333 into four parts. The length of each part is c1, c2, c3 and c4 respectively. The width of each section is d1, d2, d3 and d4 respectively. At this time, each portion is R1, R2, R3 and R4 in order in the arrangement area of the main body 331.
Thus, the sum of all portions in the arrangement area of the body 331 is Rn, where Rn ═ R1+ R2+ R3+ R4. In addition, the surface area of one side of the body 331 is Rm. The ratio of Rn to Rm is less than or equal to 80%. At this time, the plurality of solder balls 333 do not fill the surface of the main body 331.
Referring to fig. 52 and 53 in conjunction with fig. 51, fig. 52 is a top view of still another embodiment of an elevated plate of the circuit board assembly of fig. 5. Fig. 53 is a top view of yet another embodiment of the circuit board assembly shown in fig. 5. The elevated plate 32 is provided with a third through-hole 329. The third through hole 329 is disposed to be offset from the first conductive member 322 and the second conductive member 323. At this time, when the chip 33 is fixed to the elevating plate 32, the third through holes 329 are arranged to be offset from the solder balls 333.
In addition, the first electronic component 34 is located in the third through hole 329.
In this embodiment, the solder balls 333 in the chip 33 are not able to fully fill the surface of the main body 331. At this time, the plurality of solder balls 333 of the general memory 33 are collectively arranged in a partial area of the main body 331, thereby enabling the partial area of the main body 331 to be vacated.
In this way, by providing the elevated plate 32 between the chip 33 and the circuit board 31, and providing the elevated plate 32 with the third through hole 329, a new vacant space (including the space within the third through hole 329 and the space between the chip 33 and the third through hole 329) is opened up in the region between the chip 33 and the circuit board 31. At this time, the first electronic components 34 disposed at other positions on the circuit board 31 are arranged in the empty space, so that the space between the chip 33 and the circuit board 31 is largely utilized, and the space utilization rate is improved. In addition, other positions on the circuit board 31 can make up an area where the first electronic component 34 is disposed. In this way, the vacated area may be used to arrange more electronic components with new functions, so that the electronic device 100 may implement diversified functions.
In other optional manners, the seventeenth optional manner may also be combined with any optional manner of the first optional manner, the second optional manner, the third optional manner, and the third optional manner.
The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims (23)

1. A circuit board assembly is characterized by comprising a circuit board, an elevating plate, a first electronic component and a chip;
the elevated plate comprises a substrate and a plurality of first conductive pieces, the first conductive pieces are fixed on the substrate, each first conductive piece comprises a first end and a second end, the first end is exposed relative to the top surface of the elevated plate, and the second end is exposed relative to the bottom surface of the elevated plate;
the elevated plate is arranged on the circuit board, and the second end of the elevated plate is connected to the circuit board;
the first electronic component is fixed on the circuit board, and the first electronic component and the elevated plate are positioned on the same side of the circuit board;
the chip comprises a plurality of solder balls, the solder balls are fixed on one side, far away from the circuit board, of the elevated plate, the solder balls are connected to the first end, the chip is electrically connected to the circuit board through the elevated plate, the orthographic projection of the chip on the first surface is a first projection, the orthographic projection of the first electronic component on the first surface is a second projection, the second projection is located within the first projection, the first surface is the surface, facing the elevated plate, of the circuit board, the top surface of the elevated plate is the surface, facing the chip, of the elevated plate, and the bottom surface of the elevated plate is the surface, facing the circuit board, of the elevated plate.
2. The circuit board assembly of claim 1, wherein an orthographic projection of the peripheral side surface of the elevated plate on the first surface is a third projection, the third projection being located within the first projection;
the number of the first electronic components is multiple, and the first electronic components are arranged around the peripheral side face of the elevated plate.
3. The circuit board assembly of claim 1, wherein the elevated board includes first and second oppositely facing sides, and third and fourth oppositely facing sides, the third and fourth sides being connected between the first and second sides, a length between the third and fourth sides being greater than a length between the first and second sides, an orthographic projection of the first and second sides on the first surface being a fourth projection, a portion of the fourth projection being within the first projection;
first electronic components's quantity is a plurality of, and is a plurality of first electronic components are close to first side sets up, perhaps, and is a plurality of first electronic components are close to the second side sets up, perhaps, part first electronic components are close to first side sets up and part first electronic components are close to the second side sets up.
4. The circuit board assembly of any one of claims 1 to 3, wherein the elevated board further comprises a plurality of second conductive elements each secured to the substrate, the plurality of second conductive elements being located between the plurality of first conductive elements and a peripheral side surface of the elevated board;
the end part of each second conductive piece close to the circuit board is connected to the circuit board, the end part of each second conductive piece close to the circuit board is grounded through the circuit board, the end part of each second conductive piece close to the chip is connected with a first bonding pad, and the first bonding pad extends out of the top surface of the elevated plate.
5. The circuit board assembly of claim 4, wherein the second electrically conductive member is exposed relative to a peripheral side surface of the elevated plate.
6. A circuit board assembly according to any one of claims 1 to 3, comprising a second electronic component disposed on a peripheral side of the elevated plate, the second electronic component being electrically connected to the elevated plate.
7. The circuit board assembly of any of claims 1-3, further comprising a glue layer, a portion of the glue layer disposed between the chip and the elevated plate.
8. The circuit board assembly of claim 7, wherein the elevated plate is provided with a glue groove, an opening of the glue groove is located on a top surface of the elevated plate, and a portion of the glue layer is disposed in the glue groove.
9. The circuit board assembly of claim 8, wherein the opening of the glue slot extends from the top surface of the elevated plate to a portion of the peripheral side surface of the elevated plate.
10. The circuit board assembly according to claim 8 or 9, wherein the elevated plate is provided with a flow guiding hole, the flow guiding hole penetrates from the bottom wall of the glue groove to the bottom surface of the elevated plate, a part of the glue layer is located in the flow guiding hole, and a part of the glue layer is disposed between the circuit board and the elevated plate.
11. A circuit board assembly according to any one of claims 1 to 3, wherein the elevated plate is provided with a recess, the opening of the recess being located at the bottom surface of the elevated plate;
the circuit board assembly comprises a third electronic component, the third electronic component is located in the groove and fixed on the circuit board, and the third electronic component is electrically connected to the circuit board.
12. The circuit board assembly of claim 11, wherein the opening of the recess extends from the bottom surface of the elevated plate to a portion of the peripheral side surface of the elevated plate.
13. The circuit board assembly of claim 11, further comprising a fourth electronic component disposed on a sidewall of the recess, the fourth electronic component being electrically connected to the elevated plate.
14. The circuit board assembly of claim 11, wherein the circuit board assembly comprises a fifth electronic component disposed on the bottom wall of the recess, the fifth electronic component being electrically connected to the elevated plate.
15. The circuit board assembly of claim 11, wherein the elevated plate is provided with a first through hole that extends from the bottom wall of the recess to the top surface of the elevated plate;
the circuit board assembly comprises a sixth electronic component, part of the sixth electronic component is located in the groove, and part of the sixth electronic component is located in the first through hole.
16. The circuit board assembly of claim 15, wherein the first through holes are staggered from the solder balls, the sixth electronic component comprises a first filter capacitor, the first filter capacitor is fixed to the circuit board, and the first filter capacitor is electrically connected to the circuit board.
17. The circuit board assembly of claim 15, wherein the solder ball comprises a first solder ball disposed opposite the first via;
the sixth electronic component comprises a second filter capacitor, one end of the second filter capacitor is connected to the first welding ball, the other end of the second filter capacitor is fixed on the circuit board, and the first welding ball is electrically connected to the circuit board through the second filter capacitor.
18. The circuit board assembly of claim 15, wherein the solder balls comprise first solder balls and second solder balls arranged at intervals, and the first solder balls and the second solder balls are arranged opposite to the first through holes;
the sixth electronic component comprises a third filter capacitor, one end of the third filter capacitor is connected to the first solder ball, the other end of the third filter capacitor is connected to the second solder ball, and the first solder ball is electrically connected to the second solder ball through the third filter capacitor.
19. The circuit board assembly of any one of claims 1 to 3, wherein the elevated plate is provided with a second through hole that passes through from a top surface of the elevated plate to a bottom surface of the elevated plate;
the circuit board assembly comprises a seventh electronic component, and the seventh electronic component is located in the second through hole.
20. The circuit board assembly of claim 1, wherein the elevated plate is ring-shaped, and the first electronic component is located within an area surrounded by the elevated plate.
21. The circuit board assembly of claim 1, wherein the chip is a universal memory, and the first electronic component comprises a power chip, a filter capacitor or a voltage regulating resistor;
the orthographic projection of the peripheral side surface of the elevated plate on the first surface is a third projection, the third projection is positioned in the first projection, the number of the first electronic components is multiple, and the multiple first electronic components are arranged around the peripheral side surface of the elevated plate;
the elevated plate comprises a substrate and a plurality of first conductive pieces, the first conductive pieces are fixed on the substrate, each first conductive piece comprises a first end and a second end, the first end is exposed relative to the top surface of the elevated plate, the first end is connected to the solder balls, the second end is exposed relative to the bottom surface of the elevated plate, the second end is connected to the circuit board, the top surface of the elevated plate is the surface of the elevated plate facing the chip, and the bottom surface of the elevated plate is the surface of the elevated plate facing the circuit board;
the circuit board comprises a grounding piece, the grounding piece is arranged opposite to the first projection, and the grounding piece is grounded;
the elevated plate further comprises a plurality of second conductive pieces, the plurality of second conductive pieces are all fixed on the substrate, the plurality of second conductive pieces are located between the plurality of first conductive pieces and the peripheral side surface of the elevated plate, the plurality of second conductive pieces are arranged around the first conductive pieces, the end part, close to the circuit board, of each second conductive piece is connected to the grounding piece and grounded through the grounding piece, the end part, close to the chip, of each second conductive piece is connected with a first bonding pad, and the first bonding pad extends out relative to the top surface of the elevated plate;
the circuit board assembly further comprises an adhesive layer, wherein a part of the adhesive layer is arranged between the chip and the elevated plate, and a part of the adhesive layer is arranged between the elevated plate and the circuit board;
the circuit board assembly further comprises a shielding cover, the shielding cover is fixed on the circuit board, and the shielding cover covers the chip.
22. The circuit board assembly of claim 1, wherein the chip is a universal memory, and the first electronic component comprises a power chip, a filter capacitor or a voltage regulating resistor;
the elevated plate comprises a first side and a second side facing oppositely, and a third side and a fourth side facing oppositely, the third side and the fourth side are connected between the first side and the second side, the length between the third side and the fourth side is greater than the length between the first side and the second side, and the orthographic projection of the first side and the second side on the first surface is a fourth projection, the fourth projection is positioned in the first projection, the number of the first electronic components is multiple, the multiple first electronic components are arranged close to the first side face, or a plurality of the first electronic components are arranged close to the second side surface, or a part of the first electronic components are arranged close to the first side surface and a part of the first electronic components are arranged close to the second side surface;
the elevated plate comprises a substrate and a plurality of first conductive pieces, the plurality of first conductive pieces are fixed on the substrate, each first conductive piece comprises a first end and a second end, the first end is exposed relative to the top surface of the elevated plate, the first end is connected to the solder ball, the second end is exposed relative to the bottom surface of the elevated plate, the second end is connected to the circuit board, the top surface of the elevated plate is the surface of the elevated plate facing the chip, and the bottom surface of the elevated plate is the surface of the elevated plate facing the circuit board;
the circuit board comprises a grounding piece, the grounding piece is arranged opposite to the first projection, and the grounding piece is grounded;
the elevated plate further comprises a plurality of second conductive members, wherein the plurality of second conductive members are fixed on the substrate, a part of the second conductive members are positioned between the first conductive members and the third side surface, a part of the second conductive members are positioned between the first conductive members and the fourth side surface, the end part, close to the circuit board, of each second conductive member is connected to the grounding member and grounded through the grounding member, the end part, close to the chip, of each second conductive member is connected to a first bonding pad, and the first bonding pad extends out relative to the top surface of the elevated plate;
the circuit board assembly further comprises an adhesive layer, wherein a part of the adhesive layer is arranged between the chip and the elevated plate, and a part of the adhesive layer is arranged between the elevated plate and the circuit board;
the circuit board assembly further comprises a shielding cover, the shielding cover is fixed on the circuit board, and the shielding cover covers the chip.
23. An electronic device comprising a housing and a circuit board assembly according to any one of claims 1 to 22, the circuit board assembly being secured to the interior of the housing.
CN202010837668.7A 2020-08-19 2020-08-19 Circuit board assembly and electronic equipment Active CN114080104B (en)

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