JP2006093178A - Method for manufacturing electronic equipment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem that it is impossible to mount efficiently and in a short time a flip chip mounted semiconductor and a solder mounted component on electronic equipment in a mixed manner and in close vicinity to each other, to propose a new flux applying method and a solder supplying method, and to provide a mounting method suitable for miniaturization of the electronic equipment. <P>SOLUTION: After a semiconductor chip is flip chip mounted on a circuit board, flux is applied to a component mounting land in one lot. Then, a solder chip structured to hold a plurality of solder pieces on a flux permeable base is placed thereon, and the chip component is placed on the solder chip and is connected to the circuit board by a reflow process. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a technique for manufacturing an electronic device in which a semiconductor chip or a circuit component is mounted on a circuit board.

  In recent years, there has been an increasing demand for electronic devices that are thinner and smaller, such as portable devices. In the component mounting method used for these devices, the so-called flip chip mounting method is adopted in which the semiconductor bare chip is directly bonded with the active blocking surface facing the substrate surface side without using a semiconductor package product. Realized area reduction and thinning.

  Since electronic devices include not only semiconductor chips but also passive components such as resistors and capacitors, the semiconductor chip and the passive components are mixedly mounted on the circuit board.

  Hereinafter, a process of manufacturing an electronic device in which such a semiconductor bare chip and a passive component are mounted on the same substrate will be described with reference to the drawings.

  A typical flip chip mounting method is a mounting method using a thermosetting adhesive.

  First, as shown in FIG. 5A, reference numeral 101 denotes a semiconductor chip, and bumps 102 made of gold protrusions are formed on connection pads. The semiconductor chip 101 is pressed and heated to a substrate land 105 provided on the circuit board 104 via a thermosetting adhesive 103 to cure the adhesive 103, and as shown in FIG. The substrate lands 105 are held in an electrically connected state. At this time, instead of the adhesive 103, a so-called anisotropic conductive film (ACF) in which a conductive filler such as gold plating particles is put in a film-like thermosetting adhesive may be used.

  Next, as shown in FIG. 5C, reference numeral 107 denotes a metal printing plate, and a convex portion 108 processed into a partially inflated shape in order to avoid interference with the semiconductor chip 101 previously mounted. It has. A solder paste 110 is supplied onto the passive component land 106 mounted around the semiconductor chip 101 using the metal printing plate 107.

  Next, as shown in FIG. 5 (d), reference numeral 109 denotes a squeegee made of cured rubber or the like, and printing is performed by using the squeegee 109 and the metal printing plate 107. As shown in FIG. A solder paste 110 is supplied.

  Next, as shown in FIG. 5F, reference numeral 111 denotes a chip resistor or the like which is a surface mount component. After mounting the chip resistor 111 on the solder paste 110, a reflow process is performed, and FIG. The solder fillet 112 is formed as shown in FIG.

  Further, as a solder supply method, a screen printing method using a metal printing plate 107 is generally used. As other methods, a solder paste 110 is supplied using a dispenser, or a solder piece is chipped. There are known a method of supplying with a mounter and a method of supplying solder balls with a mounter.

For example, Patent Documents 1 and 2 are known as prior art document information relating to the invention of this application.
JP 2001-44239 A JP-A-9-83122

  In the conventional mixed mounting method of a flip chip mounted semiconductor chip and a solder mounted passive component, there is a limit to the interval between the semiconductor chip and the passive components around it, and the process time is extended.

  In the method of supplying the solder paste 110 onto the substrate land using the printing plate 107 having a convex shape described in JP-A-2001-44239, as shown in FIG. 6, interference with the semiconductor chip 101 is caused. In order to avoid this, the plate 107 is provided with a convex portion 108 that is partially inflated into a convex shape.

  In the above publication, the shape of the convex portion 108 is not specifically defined as a shape in which the printing plate 107 is bulged into a convex shape, but printing is performed using the printing plate 107 provided with the convex portion 108 in the actual process. It has been found that a slope portion 113 having a gentle slope as shown in FIG. 6 is required to smoothly move the squeegee 109 when performing the above.

  In addition, a gap is required between the convex portion 108 and the semiconductor chip 101 to prevent contact, and as a result, the solder paste 110 can be printed only at a position at least a thickness of the semiconductor chip 101 plus 0.5 mm or more. It is known.

  Therefore, as shown in FIG. 7, since the solder mounting passive component can be placed only in the area where the solder paste 110 can be printed, the thickness of the semiconductor chip 101 is about 0.3 to 0.6 mm. In this case, the distance between the minimum parts is about 0.8 to 1.1 mm.

  Given that the state-of-the-art technology level in the distance between adjacent components between solder-mounted passive components is about 0.1 mm, the distance between the components of 0.8 to 1.1 mm is a major obstacle to downsizing of the entire device. I can say that.

  Although it is possible to further reduce the thickness of the semiconductor chip 101, a separate processing process is required, which increases costs and makes it difficult to handle the extremely thin semiconductor chip 101 in the mounting process, thereby reducing workability. The problem of doing will arise.

  As another method for supplying the solder paste 110 in proximity to the semiconductor chip 101 on the substrate 104, there is a method using a dispenser.

  In this method, the solder paste 110 is supplied using an air-type or pump-type dispenser. However, this is a process in which the highly viscous solder paste 110 is discharged point by point onto the substrate land, and the process time is longer than that of the printing method. The problem arises that is extremely long. The same applies to the method using solder balls.

  As another method for supplying solder, as described in JP-A-9-83122, a method is known in which solder pieces are formed into chips and supplied by a mounter.

  In this method, since the solder piece is supplied by the mounter, it can be supplied to the vicinity of the semiconductor chip 101. If a high-speed mounter is used, the solder can be supplied in a shorter time than the dispenser method. There is a problem in terms of the supply method.

  In other words, in the above publication, flux application is performed on solder pieces and surface-mounted components, an extra flux transfer process occurs at the time of each mounting, and the mounting time per component becomes long, and an electronic device having a large number of components. Devices have a problem in that the mounting speed is greatly reduced.

  The mounter, which is structured to move and place each component by vacuum suction, causes the solder to adhere to the nozzle when the flux adheres to the suction nozzle, or the nozzle becomes clogged and cannot be sucked. In addition, a countermeasure to reduce the mounting time by applying flux to the chip component in a separate process in advance is not effective.

  The present invention solves the above-described conventional problems, and can supply solder and flux at high speed to a passive component solder mounting board land in the immediate vicinity of a previously mounted semiconductor chip. The present invention provides a method of manufacturing a mixed mounting electronic device of a semiconductor chip and a solder mounting passive component that can achieve a reduction in process time.

  In order to solve the above-described conventional problems, the present invention includes a step of transferring and applying a flux to a board land portion on a circuit board, and mounting a solder chip having a structure in which a plurality of solder pieces are held on a base material on the flux applying portion. A step of placing the surface mount component on the solder chip, and a step of reflowing the solder chip to connect the surface mount component to the circuit board.

  The method for manufacturing an electronic device according to the present invention can supply flux and solder at high speed to the solder mounting board land of the passive component in the immediate vicinity of the semiconductor chip mounted in advance, so that between the semiconductor chip and the adjacent component This has the effect of achieving a significant distance reduction and reflow mounting of passive components with good yield, and obtaining a semiconductor chip and passive component mixed mounting electronic device excellent in miniaturization in a short time.

(Embodiment)
Hereinafter, a method for manufacturing an electronic device according to an embodiment of the present invention will be described with reference to the drawings.

  1 and 2 are diagrams for explaining a method of manufacturing an electronic device in the present embodiment.

  In FIG. 1A, reference numeral 1 denotes a semiconductor chip, on which a gold bump 2 as a plurality of protruding electrodes is provided on the bottom surface. Reference numeral 4 denotes a circuit board. A first land 5 is provided so as to face the gold bump 2 of the semiconductor chip 1, and a second land is provided so as to face the electrode of the chip resistor 9 as a surface mount component. It has been. Reference numeral 3 denotes a thermosetting adhesive, which is provided so as to fix the semiconductor chip 1 on the circuit board 4 through the thermosetting adhesive.

  Here, first, as shown in FIG. 1A, a thermosetting adhesive 3 is applied onto a first land 5 provided on a circuit board 4 (step a).

  Next, as shown in FIG. 1B, the semiconductor chip 1 is aligned so that the gold bumps 2 of the semiconductor chip 1 and the first lands 5 on the circuit board 4 coincide with each other. The substrate 4 is ripened while being pressurized. As a result, the thermosetting adhesive 3 is cured, the gold bumps 2 and the first lands 5 are electrically connected, and the semiconductor chip 1 is fixed on the circuit board 4 (step b).

  Note that the gold bump 2 in the semiconductor chip 1 is formed in advance by a so-called stud bump method or plating method using a gold wire, and the thermosetting adhesive 3 is the same in a film form or a paste form. Can be used.

  Next, as shown in FIG. 1C, a flux 7 is applied on the second land 6. This flux 7 is based on rosin or the like, and an activator is added. This makes it possible to clean the joint, prevent oxidation of the metal, further reduce the surface ability of the molten solder, and improve wettability. (Step c). Details of this process will be described later.

  Next, as shown in FIG.1 (d), the solder chip 8 is mounted on the flux 7 with a mounter etc. (process d).

  Thus, since the base material 14 of the solder chip 8 is formed so that the flux 7 penetrates, the flux 7 penetrates to the upper surface of the solder chip 8 after a while, and the upper surface is wetted with the flux 7 as shown in FIG. ) (Step e).

  Here, the solder chip 8 used in the step d will be described.

  As shown in FIG. 3A, the solder chip 8 is configured to sandwich a plurality of solder pieces 15 made of solder with two base materials 14, and the solder pieces 15 have a size and a distance between the circuit boards. It is created in accordance with the size of the second land 6 on 4. The base material 14 is made of a material that allows the flux 7 to permeate and dissolves during solder reflow. For example, a material mainly composed of wax, solid wax, rosin, rosin ester or the like is used.

  The use of this solder chip 8 creates a breakthrough that greatly improves mounting efficiency. Details of this technique will be described later.

  Next, as shown in FIG. 1F, 9 is a chip resistor, which is one of the surface mount components, and has electrode terminals at both ends of the chip. The chip resistor 9 is placed on the solder chip 8 whose upper surface is wetted by the flux 7 and is adhered and stabilized (step f).

  When the circuit board 4 shown in FIG. 1 (f) is passed through a reflow furnace, the solder chip 8 is heated, the base material 14 is first melted and mixed with the flux 7, and when the melting point of the solder is reached, the solder melts. The fillet 10 is formed by spreading on the electrode of the chip resistor 9 and the second land 6. As a result, as shown in FIG. 1G, the chip resistor 9 is joined to the substrate land 6 by the solder fillet 10, and the base material 14 is integrated with the residue of the flux 7 (step g). The residue of the flux 7 can be removed by a normal flux cleaning process.

  The solder mounting process is completed through steps a to g.

  Here, the transfer method, which is a method of applying the flux 7 in the step c, will be described.

  As shown in FIGS. 2A to 2D, reference numeral 13 denotes a plate for flux transfer made of resin or the like, which is supported by the support material 12 so that the portion to which the flux 7 is to be applied is convex. Has been processed. The height of the convex portion is made larger than the thickness of the mounted semiconductor chip 1. 11 is a container in which the flux 7 is thinly developed.

  Using these, the process of applying the flux 7 to the land 6 portion on which the components are mounted provided on the circuit board 4 will be described.

  2A and 2B, when the plate 13 pressed against the flux 7 thinly developed in the container 11 is pulled up, the flux 7 is attached to the convex portion. 2 (c) and 2 (d), when the plate 13 is pressed against the circuit board 4 on which the semiconductor chip 1 has been previously mounted, the flux 7 is transferred and applied to the vicinity of the component mounting lands 6 on the circuit board 4. The At this time, since the height of the convex portion of the plate 13 is formed larger than the thickness of the semiconductor chip 1, the plate 13 does not contact the semiconductor chip 1.

  According to this method, the flux 7 is applied to all the passive component mounting locations in a single transfer process without interfering with the semiconductor chip 1 regardless of the number of passive components and even in the very vicinity of the semiconductor chip 1. It has a technological leap in that it can be performed, and the effect of downsizing electronic devices is great.

  Moreover, it is possible to adjust the dimension of the projection part of the plate | board 13 with components, and to supply the optimal quantity of the flux 7. FIG. Further, when there are a plurality of types of semiconductor chips 1, the flux 7 can be applied in exactly the same process by setting the projection height to a height at which the thickest chip does not contact the plate.

  Further, the flux 7 can also be supplied by forming a cutout portion in which only a portion corresponding to the semiconductor chip 1 of the plate 13 is cut out. That is, any method may be used as long as the flux 7 can be applied to the mounting portion without the plate 13 being in contact with the semiconductor chip 1.

  Note that the material of the plate 13 is not limited to resin, and any material can be used as long as it can be shaped and the flux 7 adheres to it.

  Next, the solder chip 8 used in steps d, e, and f will be described.

  In a configuration in which a plurality of solder pieces 15 are sandwiched between two base materials 14, it is necessary to insulate between one solder piece 15 and the other solder piece 15, and an insulating method is to form a gap 15a. Alternatively, a method may be used, and an insulating material (not shown) such as a resin may be used for the gap 15a to be sandwiched by the base material 14 together with the solder pieces 15. By using this insulating material, the positional accuracy between the plurality of solder pieces 15 can be improved.

  Further, the size and interval of the solder pieces 15 in the solder chip 8 are not required to be exactly matched as long as conduction is ensured in the second land 6 on the circuit board 4 facing each other. By making the solder chip 8 slightly larger than the size of the chip component to be mounted thereafter, the required position accuracy when mounting the chip component by the mounter can be lowered.

  The base material 14 may be made of a porous material for allowing the flux 7 to permeate, and may be provided with at least one or more through holes 16 as shown in FIG. Any material other than those described above can be used as long as the material is solid at room temperature, melts below the solder melting temperature, becomes liquid, and is compatible with the flux 7. Even if the base material 14 is a material that dissolves in the solvent component contained in the flux 7 before it is heated in the solder reflow process, there is no problem because the solder piece once placed does not move.

  With the above configuration, the solder chip 8 having the two solder pieces 15 can mount two solder pieces 15 corresponding to one chip component in one mounting operation. The fact that the mounting efficiency twice that of mounting the solder piece 15 can be exhibited is a significant advance in technology, and greatly improves the mounting efficiency.

  This point has the same effect even when compared with a conventional method in which a solder ball is mounted on a mounter.

  Furthermore, in the case of a component called an array chip in which a large number of resistors and capacitors are combined to form a single component, the number of electrodes is the product of the number of combined elements and the number of electrodes per element. For example, the same number of solders as the product of the number of electrodes are required. However, according to the present embodiment, one solder piece 15 formed by the solder chip 8 is held on the base material 14 to obtain one piece. This solder tip can be used. However, a large number of solder chips 8 composed of two solder pieces 15 for normal components may be mounted to correspond to the array chip.

  Further, as shown in FIG. 3 (a), by adopting a configuration in which the solder piece 15 is sandwiched from both sides, there is no distinction between the front and back of the solder chip 8, and it is supplied to the mounter in bulk without being packed and placed on the substrate. It becomes possible to do.

  This mounter method does not require chip packaging, can mount a large number of chips without additional replenishment, and has the advantage of excellent mounter continuous operation. However, as shown in FIG. 4, even if the base material 14 is on one side, it can be used by taping or tray packing and supplying the mounter with the front and back sides distinguished.

  With the above configuration, the following effects can be obtained.

  In the conventional construction method, for example, in FIG. 5, when the solder paste 110 is printed and supplied, and the chip component 111 is placed thereon, the solder paste moves close to the solder paste of the adjacent component due to the movement of fine solder particles. Although a bridge short may occur, according to the embodiment of the present invention, in FIGS. 1D to 1F, the solder chip 8 is an individual piece having a shape close to a board land shape, so that the solder is deformed when the component is mounted. There is nothing, and it is possible to prevent the occurrence of defects due to the solder bridge.

  Therefore, for example, it can be said that it is an advantageous method even in the case of mounting a further smaller component in the future, such as a chip component having an outer shape of 0.4 mm × 0.2 mm, which will be used soon.

  As described above, in the present embodiment, by sequentially performing steps a to g, it is possible to mount a surface mount component such as a chip resistor 9 in close proximity to the flip chip mounted semiconductor chip 1.

  Further, in the present embodiment, by applying the flux 7 by the transfer method in the step c, the flux 7 can be applied all at once without interfering with the semiconductor chip 1, and the process time can be shortened. Can do.

  In the present embodiment, the solder chip 8 has a structure with no front and back surfaces, so that it is possible to supply the mounter device with a bulk having excellent continuous operability. Further, the solder chip 8 is melted during solder reflow and is compatible with the flux 7. By using the material 14, good solder wettability can be obtained at the time of solder reflow.

  As described above, the method for manufacturing an electronic device according to the present invention relates to an electronic device in which a semiconductor bare chip and a passive component are mixedly mounted, and mounts a solder-mounted component such as a chip resistor in close proximity to the flip-chip mounted semiconductor chip. Therefore, it is possible to obtain a device with a very small mounting area, and to suppress the influence on the process time and the component mounting yield as much as possible. Therefore, it is built in a portable electronic device or an electronic device. The utility value is great for further downsizing of functional modules.

(A)-(g) The schematic diagram explaining the process in embodiment of this invention The schematic diagram explaining the flux application | coating process in embodiment of this invention (A) Side view of solder chip in embodiment of the present invention, (b) Perspective view of solder chip in embodiment of the present invention Side view of solder chip in an embodiment of the present invention Schematic diagram showing an example of conventional mounting process Schematic diagram showing an example of conventional mounting process Schematic diagram of mounting state by conventional process

Explanation of symbols

DESCRIPTION OF SYMBOLS 1,101 Semiconductor chip 2,102 Gold bump 3,103 Thermosetting adhesive 4,104 Circuit board 5 1st land 6 2nd land 7 Flux 8 Solder chip 9,111 Chip resistance 10,112 Solder fillet 11 Container 12 Support Material 13 Plate for transfer 14 Base material 15 Solder piece 16 Through hole 105 Substrate land 106 Substrate land for passive component mounting 107 Metal printing plate 108 Convex part 109 Squeegee 110 Solder paste 113 Slope part

Claims (9)

In a method for manufacturing an electronic device having a semiconductor chip mounted on a circuit board and circuit components mounted around the semiconductor chip, the circuit component is mounted after the semiconductor chip is mounted on the circuit board. Forming a flux application portion by applying flux on the land portion to be formed, placing a solder chip having a structure in which a plurality of solder pieces are held on a base material on the flux application portion, and the circuit component. A method of manufacturing an electronic device, comprising: placing on the solder chip; and reflowing the circuit board to connect the circuit component to the land portion. In the process of forming a flux application part by applying flux on the land part on which the circuit component is mounted, the flux is provided using a plate provided with a prevention means for preventing contact with the semiconductor chip that has been mounted. The method for manufacturing an electronic device according to claim 1, wherein: is applied. 3. The method of manufacturing an electronic device according to claim 2, wherein the preventing means is a convex protrusion provided on the plate. 3. The method of manufacturing an electronic device according to claim 2, wherein the preventing means includes a cutout portion formed by cutting out a plate corresponding to the semiconductor chip. 2. The method of manufacturing an electronic device according to claim 1, wherein the solder chip has a structure in which a plurality of solder pieces are placed on a base material. 2. The method of manufacturing an electronic device according to claim 1, wherein the solder chip has a structure in which a plurality of solder pieces are sandwiched between two substrates. 7. The method of manufacturing an electronic device according to claim 5, wherein the solder chip base material is a material having flux permeability and melted during reflow. 7. The method of manufacturing an electronic device according to claim 5, wherein the solder chip base has at least one through hole. 7. The method of manufacturing an electronic device according to claim 5, wherein the plurality of solder pieces used in the solder chip have a structure in which each of the solder pieces is insulated.

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