CN114050134A

CN114050134A - Semiconductor circuit having a plurality of transistors

Info

Publication number: CN114050134A
Application number: CN202111272609.0A
Authority: CN
Inventors: 冯宇翔; 潘志坚; 谢荣才; 张土明; 左安超; 黄浩
Original assignee: Guangdong Huixin Semiconductor Co Ltd
Current assignee: Guangdong Huixin Semiconductor Co Ltd
Priority date: 2021-10-29
Filing date: 2021-10-29
Publication date: 2022-02-15

Abstract

The invention relates to a semiconductor circuit which comprises a first sub-semiconductor circuit, a second sub-semiconductor circuit, a supporting piece and a plastic package structure, wherein the first sub-semiconductor circuit and the second sub-semiconductor circuit are mutually stacked and arranged at intervals. The first sub-semiconductor circuit and the second sub-semiconductor circuit respectively comprise an installation base material and a plurality of electronic elements arranged on the installation surface of the installation base material, the supporting piece supports and is electrically connected with the first sub-semiconductor circuit and the second sub-semiconductor circuit, and the plastic package structure is connected with the first sub-semiconductor circuit and the second sub-semiconductor circuit in a plastic package mode. Wherein the mounting surface of the first sub-semiconductor circuit and the mounting surface of the second sub-semiconductor circuit are disposed oppositely. In the semiconductor circuit, the semiconductor circuit arranged in double layers achieves the effect of two-in-one, the occupied area is directly reduced by half under the condition that the total volume is basically unchanged, the effect that one module has two circuits and can drive two paths of motors is achieved, the structure is more novel, the function of product miniaturization is effectively achieved, and the satisfaction degree and the selectivity of users are improved.

Description

Semiconductor circuit having a plurality of transistors

Technical Field

The invention relates to a semiconductor circuit, and belongs to the technical field of power semiconductor devices.

Background

Semiconductor circuits, i.e. ipm (intelligent Power module), are Power-driven products that combine Power electronics with integrated circuit technology. The semiconductor circuit integrates a power switching device and a high-voltage driving circuit, and incorporates a fault detection circuit for detecting an overvoltage, an overcurrent, an overheat, and the like. The semiconductor circuit receives the control signal of the MCU to drive the subsequent circuit to work on one hand, and sends a state detection signal of the system back to the MCU on the other hand. Compared with the traditional discrete scheme, the semiconductor circuit gains a bigger and bigger market with the advantages of high integration degree, high reliability and the like, is particularly suitable for a frequency converter of a driving motor and various inverter power supplies, and is an ideal power electronic device for variable-frequency speed regulation, metallurgical machinery, electric traction, servo drive and variable-frequency household appliances.

In the internal structure of the current IPM, electronic components such as power devices and driving chips are tiled on a heat dissipation substrate, and these planar structures need a heat dissipation substrate and a wiring area with a large area besides the chips, and occupy a large area, which is not favorable for the miniaturization of the IPM module.

Disclosure of Invention

The technical problems to be solved by the invention are as follows: how to improve the layout structure of the IPM module and improve the miniaturization structure of the IPM module product.

Specifically, the present invention discloses a semiconductor circuit comprising:

a first sub-semiconductor circuit and a second sub-semiconductor circuit which are stacked and spaced from each other and each include a mounting base and a plurality of electronic components provided on a mounting surface of the mounting base,

a support member supporting and electrically connecting the first and second sub-semiconductor circuits, an

A plastic package structure for connecting the first sub-semiconductor circuit and the second sub-semiconductor circuit in a plastic package manner,

the pins of the first sub-semiconductor circuit and the second sub-semiconductor circuit respectively extend out from the side face of the plastic package structure, and the mounting face of the first sub-semiconductor circuit and the mounting face of the second sub-semiconductor circuit are oppositely arranged, so that the electronic elements of the first sub-semiconductor circuit and the electronic elements of the second sub-semiconductor circuit are arranged towards one side of the plastic package structure between the first sub-semiconductor circuit and the second sub-semiconductor circuit.

Optionally, the mounting substrate of the first sub-semiconductor circuit is a first heat dissipation substrate; the mounting base material of the second sub-semiconductor circuit is a second heat dissipation substrate, and the first heat dissipation substrate and the second heat dissipation substrate respectively comprise a group of power devices and driving chips which are used as the electronic elements; and is

The pin of the first sub-semiconductor circuit is a first pin, the pin of the first sub-semiconductor circuit is a second pin, the first pin is distributed on two sides of the first heat dissipation substrate, the second pin is distributed on two sides of the second heat dissipation substrate, the first pin and the second pin extend along the thickness direction of the plastic package structure, and the first pin is located on the outer side of the second pin and arranged at intervals.

Optionally, the support is disposed between the first heat dissipation substrate and the second heat dissipation substrate.

Optionally, the first heat dissipation substrate and the second heat dissipation substrate may have the same size or different thicknesses.

Optionally, the mounting substrate includes a first heat dissipation substrate and a second heat dissipation substrate that are disposed opposite to each other, and a first lead frame that is disposed side by side with the first heat dissipation substrate, and the electronic component includes a group of power devices that are disposed on the first heat dissipation substrate and the second heat dissipation substrate, respectively, and a driver chip that is disposed on the first lead frame; the driving chip on the first lead frame can drive the power devices of the first heat dissipation substrate and the second heat dissipation substrate respectively.

The first pin frame comprises a first pin substrate and a first pin, wherein the first pin substrate and the first pin are led out from one side face in the thickness direction of the plastic package structure, and a second pin is arranged on the second heat dissipation substrate and is led out from the other side face in the thickness direction of the plastic package structure.

Optionally, the support is disposed between the first heat dissipation substrate and the second heat dissipation substrate, and the first lead frame is electrically connected to the power device on the first heat dissipation substrate through a bonding wire.

Optionally, the mounting substrate includes a first lead frame and a second lead frame disposed opposite to each other, and the electronic component includes a group of power devices disposed on the first lead frame and the second lead frame, respectively, and a driving chip on the first lead frame; the driver chip of the first leadframe is capable of driving the power devices of the first and second leadframes respectively,

the first pin frame comprises a first pin substrate and first pins, the first pins comprise two rows of pins which are respectively connected with the first pin substrate and the first heat dissipation substrate, the two rows of the first pins are respectively led out from the side surface of the plastic package structure in the thickness direction,

the second lead frame comprises a second lead substrate and second leads, and the second leads are parallel to the first leads on one side of the first heat dissipation substrate and are arranged at intervals.

Optionally, the support is disposed between the first and second lead frames.

Optionally, the mounting substrate includes a mounting surface and a heat dissipation surface, and an auxiliary heat dissipation substrate is disposed on the heat dissipation surface of the first lead frame and/or the second lead frame.

Optionally, the electronic component is electrically connected to the pad or the lead of the mounting substrate by a bonding wire.

Therefore, in the semiconductor circuit, the first sub-semiconductor circuit and the second sub-semiconductor circuit are mutually overlapped and plastically packaged into a module, the semiconductor circuit arranged in a double-layer mode achieves the effect of two-in-one, the occupied area is directly reduced by half under the condition that the total volume is basically unchanged, the effect that one module has two circuits and can drive two motors is achieved, the structure is novel, the function of product miniaturization is effectively achieved, the total cost of the semiconductor circuit is reduced, and the satisfaction degree and the selectivity of users are improved. The mounting surface of the first sub-semiconductor circuit and the mounting surface of the second sub-semiconductor circuit are oppositely arranged, and the radiating surface of the mounting substrate is arranged outwards, so that the electronic element on the mounting surface of the mounting substrate is arranged on the inner side of the whole module, and a radiator and the like are conveniently mounted on the radiating surface of the mounting substrate. Therefore, even if a high-power electronic element with large heat productivity is arranged in the semiconductor circuit, the whole semiconductor circuit can normally operate, the structure is more reasonable, and the reliability is higher.

Drawings

FIGS. 1a, 1b and 1c are cross-sectional views of three semiconductor circuits in the prior art;

FIGS. 2a, 2b and 2c are schematic plan views of three semiconductor circuits corresponding to FIGS. 1a, 1b and 1 c;

fig. 2 is a cross-sectional view of a specific type of electronic component corresponding to each of the first electronic component and the second electronic component shown in fig. 1 according to an embodiment of the present invention;

fig. 3 is a cross-sectional view of a semiconductor circuit according to a first embodiment of the present invention;

fig. 4 is a cross-sectional view of a semiconductor circuit according to a second embodiment of the present invention;

fig. 5 is a cross-sectional view of a semiconductor circuit according to a third embodiment of the present invention;

fig. 6a and 6b mainly show circuit structures of the first heat dissipation substrate and the second heat dissipation substrate in fig. 3, respectively;

fig. 7a and 7b mainly show circuit structures of the first heat dissipation substrate, the first lead frame, and the second heat dissipation substrate in fig. 4, respectively;

fig. 8a and 8b are mainly shown as circuit structures of the first lead frame and the first lead frame in fig. 5, respectively;

FIG. 9 shows a schematic diagram of the circuit of FIG. 3;

FIG. 10 shows a schematic diagram of the circuit of FIG. 4;

fig. 11 shows the circuit schematic of fig. 5.

Reference numerals:

the semiconductor device comprises an IGBT/MOS 1, an electronic element 100, an FRD2, a driving chip 3, an HVIC31, an LVIC32, a heat dissipation substrate 5, a lead frame 6, a circuit wiring area 50, a bonding wire 4, a support 7, a plastic package structure 8, a first pin 63, a second pin 64, a first lead frame 61, a second lead frame 62, a first heat dissipation substrate 51 and a second heat dissipation substrate 52.

Detailed Description

It is to be noted that the embodiments and features of the embodiments may be combined with each other without conflict in structure or function. The present invention will be described in detail below with reference to examples.

In the conventional semiconductor circuit, a driving chip (e.g., HVIC) is soldered on a lead frame 6 or a heat dissipation substrate 5, and power devices (e.g., IGBT1/MOS and FRD2) are soldered on the lead frame 6 and then bonded on the heat dissipation substrate 5, or power devices (e.g., IGBT1/MOS and FRD2) are directly soldered on the heat dissipation substrate 5, wherein in the semiconductor circuit, the power devices with large heat generation are mainly IGBT (also called switching tube) and FRD2 (also called freewheeling diode), the switching tube is IGBT (Insulated Gate Bipolar Transistor), or MOS (metal oxide semiconductor), etc. As shown in fig. 1a, 1b, 1c and fig. 2a, 2b, 2 c. This planar structure requires a heat dissipating substrate 5, a circuit wiring region 50, and a lead frame 6 having a large area, as shown in fig. 2a, 2b, and 2c, in addition to the driver chip 3, and occupies a large area, and does not fully utilize the space, which limits the miniaturization of the semiconductor circuit. .

The plastic package structure 8 is used for coating the semiconductor circuit, namely coating the mounting surfaces of the heat dissipation substrate 5 and the lead frame 6 for mounting the electronic element and coating the electronic element, and coating the pin welding end arranged at one end of the lead frame 6, so as to form a plastic package semi-package structure; or, in the above-mentioned manner, the plastic package structure 8 further covers the heat dissipation surface of the heat dissipation substrate 5 and the outer surface of the lead frame 6 to form a structure in a plastic package full-covering manner, and finally a complete semiconductor circuit complete product is formed.

The present invention provides a novel semiconductor circuit, comprising:

a first sub-semiconductor circuit and a second sub-semiconductor circuit are stacked on each other and spaced apart from each other, each of the first sub-semiconductor circuit and the second sub-semiconductor circuit including a mounting substrate and a plurality of electronic components 100 provided on a mounting surface of the mounting substrate,

a support 7 for supporting and electrically connecting the first sub-semiconductor circuit and the second sub-semiconductor circuit, generally disposed so as to avoid the electronic component 100, and

a plastic package structure 8 for connecting the first sub-semiconductor circuit and the second sub-semiconductor circuit,

wherein the pins of the first sub-semiconductor circuit and the second sub-semiconductor circuit respectively extend outward from the side surface of the plastic package structure 8, and the mounting surface of the first sub-semiconductor circuit and the mounting surface of the second sub-semiconductor circuit are oppositely arranged, so that the plurality of electronic components 100 of the first sub-semiconductor circuit and the plurality of electronic components 100 of the second sub-semiconductor circuit are arranged toward the side of the plastic package structure 8 between the first sub-semiconductor circuit and the second sub-semiconductor circuit.

Therefore, in the semiconductor circuit, the first sub-semiconductor circuit and the second sub-semiconductor circuit are mutually superposed and plastically packaged into a module, the semiconductor circuit arranged in a double-layer mode achieves the effect of two-in-one, the occupied area of the module is directly reduced by half under the condition that the total volume is basically unchanged, the effect that one module has two circuits and can drive two motors is achieved, the structure is novel, the function of product miniaturization is effectively achieved, the total cost of the semiconductor circuit is reduced, and the satisfaction degree and the selectivity of users are improved.

The mounting surface of the first sub-semiconductor circuit and the mounting surface of the second sub-semiconductor circuit are arranged oppositely, and the heat dissipation surface of the mounting substrate is arranged outwards, so that the electronic element 100 on the mounting surface of the mounting substrate is arranged on the inner side of the whole module, and a heat radiator and the like are more conveniently mounted on the heat dissipation surface of the mounting substrate. Therefore, even if the high-power electronic element 100 with large heat productivity is arranged in the semiconductor circuit, the whole semiconductor circuit can normally operate, the structure is more reasonable, and the reliability is higher.

Generally, the heat dissipating substrate 5 generally includes a heat dissipating substrate body, an insulating layer, and a circuit wiring area 50, which are sequentially disposed, the heat dissipating substrate 5 may include a heat dissipating substrate body, the heat dissipating substrate body may be made of a metal material, such as a rectangular plate made of aluminum of 1100, 5052, etc., the thickness of the heat dissipating substrate body is much thicker than other layers, generally 0.8mm to 2mm, and the common thickness is 1.5mm, which mainly achieves heat conduction and heat dissipation, for example, the heat dissipating substrate body may be an IMS heat dissipating substrate. For another example, the heat dissipation substrate body may also be made of other metal materials with good thermal conductivity, for example, a rectangular plate made of copper material. For another example, the heat dissipation substrate body can also be made of a non-metal material and a metal sheet, for example, a plate made of epoxy resin is adopted, the metal sheet is arranged on the plate, and the metal sheet can be a copper sheet, so that a copper ring epoxy resin substrate is formed; the heat dissipation substrate body may also be made of other non-metallic materials with good thermal conductivity, for example, a rectangular plate made of ceramic material, and then Copper is disposed on the plate, thereby forming a DBC (Direct Bonding coater) heat dissipation substrate. The shape of the heat dissipating substrate body of the present invention is not limited to a rectangular shape, and may be a circular shape, a trapezoidal shape, or the like. The heat dissipation substrate 5 may be classified into different types according to the plate structure of the heat dissipation substrate body, wherein an IMS substrate, a DBC substrate, and a copper-prepreg resin substrate are commonly used. The IMS substrate is generally an IMS substrate, i.e., an aluminum substrate, and the main body thereof is made of an aluminum alloy material; the DBC substrate main body is a ceramic material, and the copper-semi-cured resin substrate main body is a copper material. The circuit wiring region 50 is formed of a metal such as copper, and includes a circuit wiring formed of an etched copper foil, and the thickness of the wiring layer is also thin, for example, about 70 um. A plurality of power devices disposed on the circuit wiring region 50, wherein the plurality of power devices or the power devices and the circuit wiring region 50 can be electrically connected through metal wires; the power element may be fixed to the circuit wiring region 50 by soldering. In the heat dissipation substrate 5, the insulating layer may be an epoxy resin, and is used for being fixed to the lead frame 6 through bonding of the epoxy resin. The insulating layer is disposed between the circuit wiring region 50 and the heat dissipating substrate body, and the insulating layer can be used to prevent the circuit wiring region 50 from being electrically conductive with the heat dissipating substrate body. The insulating layer is disposed on the surface of the heat-dissipating substrate body, and the thickness of the insulating layer is thinner than that of the substrate, generally 50um to 150um, and usually 110 um. The insulating layer covers at least one surface of the heat dissipation substrate body. And the resin material such as epoxy resin and the like forming the plastic package structure 8 can be filled with fillers such as alumina, silicon aluminum carbide and the like at high concentration to improve the thermal conductivity, the fillers can be angular in order to improve the thermal conductivity, and the fillers can be spherical in order to avoid the risk that the fillers damage the surface of the circuit element. The pins are generally made of metals such as copper, a nickel-tin alloy layer is formed on the surface of the copper through chemical plating and electroplating, the thickness of the alloy layer is generally 5 mu m, and the copper can be protected from corrosion and oxidation by the plating layer and the weldability can be improved. Finally, a thin layer of green oil may be applied to the circuit wiring region 50 to isolate the circuit and to electrically connect the circuit to the circuit.

The lead frame 6 is formed of a metal material such as an aluminum material or a copper material, on which pads for connecting electronic components such as a power device are provided, and its leads are formed integrally with the wiring of the lead frame 6 as a part of the lead frame 6. The pins can be made of C194(-1/2H) plates (chemical components are Cu (97.0), Fe (2.4), P (0.03) and Zn (0.12)) or KFC (-1/2H) plates (chemical components are Cu (99.6), Fe (0.1 (0.05-0.15) and P (0.03) (0.025-0.04)), the C194 or KFC plates with the thickness of 0.5mm are processed by a stamping or etching process, nickel plating thickness is 0.1-0.5um firstly, and tin plating thickness is 2-5um secondly; the excess connecting ribs of the pins 320 are cut off and shaped into the desired shape by special equipment.

The lead frame 6 is a key structural member for forming an electrical circuit by electrically connecting an internal circuit leading-out terminal of a semiconductor circuit with an external lead by means of bonding materials (gold wires, aluminum wires and copper wires), and the lead frame 6 plays a role of a bridge connected with an external lead. The lead frame 6 includes a lead frame body and leads arranged on the periphery of the lead frame body, and a mounting empty space is left in the center of the lead frame body to accommodate the mounting of the electronic component 100. Be provided with the pad on the lead frame body in order to make things convenient for and pass through bonding wire 4 electricity with electronic component 100 and be connected, lead frame 6 can be formed through modes such as etching or punching press by the copper product, it forms the pin that is the linear type that outwards stretches out in lead frame body both sides, these pins connect into whole through the lead frame body, lead frame 6 is before making semiconductor circuit module finished product, the free end of its pin passes through first connecting piece muscle interconnect, and be close to the pin and lead frame body junction and pass through second connecting muscle interconnect, make whole lead frame 6 form reliable whole like this. In the manufacture of the semiconductor circuit, the second connector rib is cut off, and the free end portions of the leads are cut off to cut off the first connector rib and shaped to form the individual leads.

It should be noted that, after the pins penetrate out of the side surface of the plastic package structure 8, the pins are bent with respect to the lead frame body through a bending process.

The bonding wires 4 are typically gold wires, copper wires, hybrid gold-copper wires, 38um or thin aluminum wires below 38 um.

According to different design requirements, plastic package molds with different shapes can be designed, and then plastic package structures 8 with different shapes and structures can be obtained through plastic package. For example, the plastic package structure 8 may be a rectangular parallelepiped structure. The mounting substrate, the plurality of electronic components 100, the lead frame 6, and the like are wrapped and protected by an injection molding method using a thermoplastic resin or a transfer molding method using a thermosetting resin.

Specifically, in the first embodiment of the present invention, referring to fig. 3, 6a, 6b and 9, the semiconductor circuit of the present invention is a module structure of an IMS substrate, wherein the mounting base material of the first sub-semiconductor circuit is a first heat dissipation substrate 51; the mounting base material of the second sub-semiconductor circuit is a second heat dissipation substrate 52, and the first heat dissipation substrate 51 and the second heat dissipation substrate 52 both include a group of power devices and driving chips 3 as the electronic elements 100; and the pins of the first sub-semiconductor circuit are first pins 63, the pins of the first sub-semiconductor circuit are second pins 64, the first pins 63 are distributed on two sides of the first heat dissipation substrate 51, the second pins 64 are distributed on two sides of the second heat dissipation substrate 52, the first pins 63 and the second pins 64 both extend along the thickness direction of the plastic package structure 8, and the first pins 63 are located on the outer sides of the second pins 64 and are arranged at intervals.

The IMS heat dissipation substrate is divided into a first heat dissipation substrate 51 and a second heat dissipation substrate 52 that are disposed up and down, and a direction from the first heat dissipation substrate 51 toward the second heat dissipation substrate 52 is a protruding direction of the pins, and conversely, the protruding direction of the pins is a reverse direction. The group of power devices comprises an IGBT1 and an FRD2, a driving chip 3 corresponds to the power devices, a group of power devices and driving chips 3 are uniformly arranged on a first heat dissipation substrate 51 and a second heat dissipation substrate 52, specifically 6

IGBTs

1, 6

FRDs

2 and 1 driving chip 3, the IGBT1, FRDs 2 and driving chips 3 pasted on the first heat dissipation substrate 51 are connected with the first heat dissipation substrate 51 by bonding wires 4, the IGBT1, FRDs 2 and driving chips 3 pasted on the second heat dissipation substrate 52 are connected with the second heat dissipation substrate 52 by bonding wires 4, and the power elements such as the IGBT1, the FRD2 and the like can be pasted on the first heat dissipation substrate 51 and the second heat dissipation substrate 52 by silver paste or soldering tin; power elements such as IGBT1 and FRD2 are connected to the circuit wiring region 50 by bonding wires 4 of gold, copper, aluminum, or the like.

The lead frame 6 of the first heat dissipation substrate 51 and the lead frame 6 of the second heat dissipation substrate 52 are designed differently, the lead frame 6 of the first heat dissipation substrate 51 is longer in lead-out portion to form an outer row of pins, and the lead frame 6 of the second heat dissipation substrate 52 is shorter in lead-out portion to form an inner row of pins. As described above, the first leads 63 are located outside the second leads 64. The other ends of the first lead 63 and the second lead 64 are exposed from the side surface of the plastic package structure 800, respectively, to form a semiconductor circuit.

Wherein, the supporting member 7 is disposed between the first heat dissipating substrate 51 and the second heat dissipating substrate 52. The support 7 can be copper pins, but not limited thereto, which can support and electrically connect the lead frame 6 to the upper substrate and the lower substrate. And the supporting members 7 are arranged in two rows and distributed on both sides of the first heat dissipation substrate 51 and the second heat dissipation substrate 52.

Specifically, with continued reference to fig. 3, 6a, 6b, and 9, since the semiconductor circuit of the present invention has two controllable first and second sub-semiconductor circuits, the internal circuit of the first heat dissipation substrate 51 includes 6

IGBTs

1, 6

FRDs

2, 1 driver chip 3, passive components (resistors and capacitors, the same applies hereinafter), connector pads, and wiring. The internal circuit of the second heat dissipation substrate 52 includes 6

IGBTs

1, 6

FRDs

2, 1 driver chip 3, a passive component, a connector pin base, and wiring. In the present embodiment, the sizes and thicknesses of the first heat dissipation substrate 51 and the second heat dissipation substrate 52 are the same or different, the electrical components on the first heat dissipation substrate 51 and the second heat dissipation substrate 52 may be the same or different, and the wiring layout or the pin definition on the first heat dissipation substrate 51 and the second heat dissipation substrate 52 may be the same or different. In the circuit schematic diagram of fig. 9, two six-channel driver chips 3 drive 12 IGBTs 1, six IGBTs 1 are upper arm, six IGBTs 1 are lower arm, and the C-poles of the IGBTs 1 of the 6 upper arm are connected together. The poles E of the six lower bridge arm IGBTs 1 are respectively and independently led out NU1\ NV1\ NW1\ NU2\ NV2\ NW2, the poles E of the upper bridge arm IGBTs 1 and the poles C of the lower bridge arm IGBTs 1 are connected together, and six paths of the poles form U1\ V1\ W1\ U2\ V2\ W2 respectively.

In a second embodiment of the present invention, referring to fig. 4, 7a, 7b and 10, the mounting substrate includes a first heat dissipation substrate 51 and a second heat dissipation substrate 52 disposed opposite to each other, and a first lead frame 61 disposed side by side with the first heat dissipation substrate 51, the electronic component 100 includes a group of power devices disposed on the first heat dissipation substrate 51 and the second heat dissipation substrate 52, respectively, and the driving chip 3 disposed on the first lead frame 61; the driver chip 3 on the first lead frame 61 can drive the power devices of the first heat dissipation substrate 51 and the second heat dissipation substrate 52, respectively.

The first lead frame 61 includes a first lead substrate and first leads 63 led out from one side surface in the thickness direction of the plastic package structure 8, and the second heat dissipation substrate 52 is provided with second leads 64 led out from the other side surface in the thickness direction of the plastic package structure 8.

The semiconductor circuit of the invention is a module structure of a DBC substrate, which comprises a DBC heat dissipation substrate and a lead frame, wherein the DBC heat dissipation substrate is divided into a first heat dissipation substrate 51 and a second heat dissipation substrate 52, the direction from the first heat dissipation substrate 51 to the second heat dissipation substrate 52 is the extending direction of pins, and on the contrary, the extending direction of the pins is the reverse direction. The IGBT1 and the FRD2 as power elements are attached to a first heat dissipating substrate 51 and a second heat dissipating substrate 52, respectively, the driver chip 3 is a combination of a plurality of high voltage chips (HVIC31) and low voltage chips (LVIC32), and the driver chip 3 is attached to a first lead frame 61 as a lead frame, the IGBT1 and the FRD2 attached to the first heat dissipating substrate 51 are connected to the first heat dissipating substrate 51 with bonding wires 4, the HVIC31 and the LVIC32 attached to the first lead frame 61 are connected to the first lead frame 61 with bonding wires 4, respectively, the IGBT1 and the FRD2 attached to the second heat dissipating substrate 52 are connected to the second heat dissipating substrate 52 with bonding wires 4, the HVIC31 and the LVIC32 attached to the first lead frame 61 are connected to the first lead frame 61 with bonding wires 4, respectively, the first heat dissipating substrate 51 and the second heat dissipating substrate 52 are soldered to the first heat dissipating substrate 51 and the second heat dissipating substrate 52, the lead frame 61 soldered to the first heat dissipating substrate 51 and the first heat dissipating substrate 51 are connected by bonding wires 4, and the lead frame soldered to the second heat dissipating substrate 52 and the second heat dissipating substrate 52 are connected by bonding wires 4. The lead frame design of the first lead frame 61 of the first heat dissipation substrate 51 is different from that of the second heat dissipation substrate 52, the lead frame 61 of the first heat dissipation substrate 51 is longer in lead-out part to form an outer row of first leads 63, only one side of the lead frame of the second heat dissipation substrate 52 is lead-out, and the lead frame of the second heat dissipation substrate 52 is shorter in lead-out part to form an inner row of second leads 64. The other ends of the first lead 63 and the second lead 64 are exposed from the side surface of the plastic package structure 800, respectively, to form a semiconductor circuit.

The support member 7 is disposed between the first heat dissipating substrate 51 and the second heat dissipating substrate 52, and is connected by copper pins serving as the support member 7, and the copper pins serve as support and electrical connection. The first lead frame 61 is electrically connected to the power device on the first heat dissipation substrate 51 through the bonding wire 4, wherein the first lead frame 61 is further connected to the pad on the circuit wiring region 50 of the first heat dissipation substrate 51.

The internal circuit of the first heat dissipation substrate 51 includes 6

IGBTs

1, 6 FRDs 2, connector pads, and wiring. The internal circuit of the second heat dissipation substrate 52 includes 6

IGBTs

1, 6 FRDs, connector pins, and wiring. The internal circuitry of the first lead frame 61 includes 1 HVIC31 and 1 LVIC32 and frame traces, and the second heatsink substrate 52 does not have HVIC31 and LVIC32 on its corresponding leadframe. The IGBT, FRD, and second heat dissipating substrate 52 used for the first heat dissipating substrate 51 may be the same or different, and the wiring of the first heat dissipating substrate 51 and the wiring of the second heat dissipating substrate 52 may be the same or different. The lead definition of the first heat dissipation substrate 51 and the lead definition of the second heat dissipation substrate 52 may be the same or different. The size and thickness of the first heat dissipation substrate 51 and the size and thickness of the second heat dissipation substrate 52 may be the same or different.

In the circuit schematic diagram of fig. 10, six IGBTs 1 are driven by one six-channel HVIC31 as an upper arm, six IGBTs 1 are driven by one six-channel LVIC32 as a lower arm, and the C-poles of the IGBTs 1 of the six upper arms are connected together. The poles E of the six lower bridge arm IGBTs 1 are respectively and independently led out NU1\ NV1\ NW1\ NU2\ NV2\ NW2, the poles E of the upper bridge arm IGBTs 1 and the poles C of the lower bridge arm IGBTs 1 are connected together, and six paths of the poles form U1\ V1\ W1\ U2\ V2\ W2 respectively.

Specifically, in the third embodiment of the present invention, referring to fig. 5, 8a, 8b and 11, the mounting substrate includes a first lead frame 61 and a second lead frame 62 disposed opposite to each other, the electronic component 100 includes a set of power devices disposed on the first lead frame 61 and the second lead frame 62, respectively, and the driving chip 3 on the first lead frame 61; the driver chip 3 of the first leadframe 61 is capable of driving the power devices of the first leadframe 61 and the second leadframe 62 respectively,

the first lead frame 61 comprises a first lead substrate and first leads 63, the first leads 63 comprise two rows of leads respectively connected with the first lead substrate and the first heat dissipation substrate 51, and the two rows of first leads 63 are respectively led out from the side surface of the plastic package structure 8 in the thickness direction,

the second lead frame 62 includes a second lead substrate and second leads 64, and the second leads 64 are parallel to and spaced apart from the first leads 63 on one side of the first heat sink substrate 51.

The semiconductor circuit of the invention is a module structure of a CIS substrate, the CIS lead frame is divided into a first lead frame 61 and a second lead frame 62, the direction from the first lead frame 61 to the second lead frame 62 is the lead extending direction, otherwise, the lead extending direction is the reverse direction. The IGBT1, FRD2 are attached to the first lead frame 61 and the second lead frame 62, respectively, the HVIC31 and LVIC32 are attached to the first lead frame 61, the IGBT1, FRD2 attached to the first lead frame 61 are connected to the first lead frame 61 with the bonding wire 4, the HVIC31 and LVIC32 attached to the first lead frame 61 are connected to the first lead frame 61 with the bonding wire 4, the IGBT1, FRD2 attached to the second lead frame 62 are connected to the second lead frame 62 with the bonding wire 4, respectively, the first lead frame 61 and the second lead frame 62 are connected to each other with the copper pin serving as the support 7, and the copper pins serve a supporting function and an electrical connection function. An auxiliary heat sink substrate is disposed on the heat sink surface of the first leadframe 61 and/or the second leadframe 62. As shown in fig. 5, the first lead frame 61 and the CIS substrate heat dissipation substrate 5 are bonded by using an insulating resin, the first lead frame 61 and the second lead frame 62 are designed differently, the lead-out portion of the first lead frame 61 is longer to form a first lead 63 of an outer row lead, only one side of the second lead frame 62 is lead-out, and the lead-out portion of the second lead frame 62 is shorter to form a second lead 64 of an inner row lead. The other ends of the first lead 63 and the second lead 64 are exposed from the side surface of the plastic package structure 800, respectively, to form a semiconductor circuit.

The internal circuitry of the first leadframe 61 includes 6 IGBT1, 6 FRD2, 1 HVIC31 and 1 LVIC32 connector pads, and wiring. The internal circuitry of second lead frame 62 includes 6

IGBTs

1, 6 FRDs 2, connector pins, and wiring. The second leadframe 62 has no HVIC. The IGBT, FRD, and second lead frame 62 used for the first lead frame 61 may be the same or different, and the wiring of the first lead frame 61 and the wiring of the second lead frame 62 may be the same or different. The lead definition of the first lead frame 61 is different from the lead definition of the second lead frame 62. The first leadframe 61 and the second leadframe 62 are of different designs. Fig. 11 is a circuit diagram of a CIS heat dissipation substrate, which is the same as the circuit of the second embodiment of the present disclosure, and is not repeated here.

In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

In the description of the present invention, it is to be understood that the terms "central," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," "circumferential," and the like are used in the orientations and positional relationships indicated in the drawings for convenience in describing the invention and to simplify the description, and are not intended to indicate or imply that the referenced devices or elements must have a particular orientation, be constructed and operated in a particular orientation, and are therefore not to be considered limiting of the invention.

Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present invention, "a plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.

In the present invention, unless otherwise expressly stated or limited, the terms "mounted," "connected," "secured," and the like are to be construed broadly and can, for example, be fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; they may be directly connected or indirectly connected through intervening media, or they may be connected internally or in any other suitable relationship, unless expressly stated otherwise. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.

In the present invention, unless otherwise expressly stated or limited, the first feature "on" or "under" the second feature may be directly contacting the first and second features or indirectly contacting the first and second features through an intermediate. Also, a first feature "on," "over," and "above" a second feature may be directly or diagonally above the second feature, or may simply indicate that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature may be directly under or obliquely under the first feature, or may simply mean that the first feature is at a lesser elevation than the second feature.

Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention, and that variations, modifications, substitutions and alterations can be made to the above embodiments by those of ordinary skill in the art within the scope of the present invention.

Claims

1. A semiconductor circuit, characterized in that the semiconductor circuit comprises:

a first sub-semiconductor circuit and a second sub-semiconductor circuit which are stacked and spaced from each other and each include a mounting substrate and a plurality of electronic components (100) provided on a mounting surface of the mounting substrate,

a support (7) supporting and electrically connecting the first and second sub-semiconductor circuits, an

A plastic package structure (8) which is connected with the first sub-semiconductor circuit and the second sub-semiconductor circuit in a plastic package way,

pins of the first sub-semiconductor circuit and the second sub-semiconductor circuit respectively extend outwards from the side face of the plastic package structure (8), and the mounting face of the first sub-semiconductor circuit and the mounting face of the second sub-semiconductor circuit are oppositely arranged, so that the electronic elements (100) of the first sub-semiconductor circuit and the electronic elements (100) of the second sub-semiconductor circuit are arranged towards one side of the plastic package structure (8) between the first sub-semiconductor circuit and the second sub-semiconductor circuit.

2. The semiconductor circuit according to claim 1, wherein the mounting base material of the first sub-semiconductor circuit is a first heat-dissipating substrate (51); the mounting base material of the second sub-semiconductor circuit is a second heat dissipation substrate (52), and the first heat dissipation substrate (51) and the second heat dissipation substrate (52) respectively comprise a group of power devices and driving chips (3) which are used as the electronic elements (100); and is

The pin of the first sub-semiconductor circuit is a first pin (63), the pin of the first sub-semiconductor circuit is a second pin (64), the first pin (63) is distributed on two sides of the first heat dissipation substrate (51), the second pin (64) is distributed on two sides of the second heat dissipation substrate (52), the first pin (63) and the second pin (64) extend along the thickness direction of the plastic package structure (8), and the first pin (63) is located on the outer side of the second pin (64) and arranged at intervals.

3. The semiconductor circuit according to claim 2, wherein the support (7) is disposed between the first heat-dissipating substrate (51) and the second heat-dissipating substrate (52).

4. The semiconductor circuit according to claim 2, wherein the first heat-dissipating substrate (51) and the second heat-dissipating substrate (52) are the same or different in size and thickness.

5. The semiconductor circuit according to claim 1, wherein the mounting substrate includes a first heat-dissipating substrate (51) and a second heat-dissipating substrate (52) which are oppositely disposed, and a first lead frame (61) which is disposed side by side with the first heat-dissipating substrate (51), and the electronic component (100) includes a group of power devices which are disposed on the first heat-dissipating substrate (51) and the second heat-dissipating substrate (52), respectively, and a driver chip (3) which is disposed on the first lead frame (61); a driver chip (3) on the first leadframe (61) is capable of driving the power devices of the first and second heat spreader substrates (51, 52), respectively.

First pin frame (61) are including following first pin base plate and first pin (63) that a side of the thickness direction of plastic envelope structure (8) was drawn forth, be provided with on second heat dissipation base plate (52) follow second pin (64) that another side of the thickness direction of plastic envelope structure (8) was drawn forth.

6. The semiconductor circuit of claim 5, wherein the support (7) is disposed between the first heat spreader substrate (51) and a second heat spreader substrate (52), and the first lead frame (61) is electrically connected to the power device on the first heat spreader substrate (51) by a bond wire (4).

7. The semiconductor circuit of claim 1, wherein the mounting substrate comprises first and second oppositely disposed lead frames (61, 62), the electronic component (100) comprises a set of power devices disposed on the first and second lead frames (61, 62), respectively, and a driver chip (3) on the first lead frame (61); a driver chip (3) of the first leadframe (61) is capable of driving the power devices of the first leadframe (61) and second leadframe (62), respectively,

the first pin frame (61) comprises a first pin substrate and first pins (63), the first pins (63) comprise two rows of pins which are respectively connected with the first pin substrate and the first heat dissipation substrate (51), the two rows of the first pins (63) are respectively led out from the side surface of the plastic package structure (8) in the thickness direction,

the second lead frame (62) comprises a second lead substrate and second leads (64), and the second leads (64) are parallel to the first leads (63) on one side of the first heat dissipation substrate (51) and are arranged at intervals.

8. The semiconductor circuit of claim 7, wherein the support (7) is disposed between the first leadframe (61) and the second leadframe (62).

9. The semiconductor circuit of claim 7, wherein the mounting substrate comprises a mounting surface and a heat-dissipating surface, and wherein the heat-dissipating surface of the first leadframe (61) and/or the second leadframe (62) has an auxiliary heat-dissipating substrate disposed thereon.

10. A semiconductor circuit according to claim 1, characterized in that the electronic component (100) is electrically connected to a pad or the pin of the mounting substrate by means of a bonding wire (4).