CN114038961B - Light emitting diode and display panel - Google Patents
Light emitting diode and display panel Download PDFInfo
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
- H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/14—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
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Abstract
The invention relates to a light emitting diode and a display panel, wherein the light emitting diode at least comprises an N-type semiconductor layer, a P-type semiconductor layer and an active layer, the active layer is formed between the N-type semiconductor layer and the P-type semiconductor layer, the active layer comprises a plurality of quantum well layers and a plurality of barrier layers, each quantum well and each barrier layer are alternately stacked, at least one barrier layer is a variable barrier layer, the variable barrier layer is along the direction from the N-type semiconductor layer to the P-type semiconductor layer, and the barrier height of part or all of the variable barrier layer is changed from high to low. According to the invention, the variable barrier layer is arranged on the active layer, and the barrier height of the variable barrier layer is partially or completely changed from high to low along the direction from the N-type semiconductor layer to the P-type semiconductor layer, so that the limiting capability of the active layer on electrons is enhanced, the recombination of electrons outside the active layer is reduced, the recombination probability of electrons and holes in the active region is increased, and the luminous efficiency is improved.
Description
Technical Field
The present invention relates to the field of semiconductors, and more particularly, to a light emitting diode and a display panel.
Background
Nowadays, the light emitting diode has wide application, which is an electronic component for directly converting electric energy into light energy by generating photons through radiation recombination of conduction band electrons and valence band holes in semiconductor materials, and has the advantages of high efficiency, energy saving, environmental protection, long service life and the like compared with the traditional light source.
In some existing light emitting diodes, the effective mass of electrons is smaller than that of holes, but the mobility of electrons is larger than that of holes, so that electrons which are not limited in an active region can generate compound luminescence outside the active region, other wave band light sources are generated, the number of carriers in the active region is further reduced, and the compound probability of electrons and holes in the active region is reduced, so that the luminous efficiency is influenced.
Therefore, how to enhance the electron confinement capability of the active region and reduce the recombination of electrons outside the active region is a problem to be solved.
Disclosure of Invention
In view of the above-mentioned shortcomings of the prior art, an object of the present application is to provide a light emitting diode and a display panel, which are aimed at enhancing the electron confinement capability of an active region, reducing recombination of electrons outside the active region, and improving luminous efficiency.
A light emitting diode comprising at least:
an N-type semiconductor layer;
a P-type semiconductor layer; and
the active layer is formed between the N-type semiconductor layer and the P-type semiconductor layer, and comprises a plurality of quantum well layers and a plurality of barrier layers, wherein each quantum well layer and each barrier layer are alternately stacked, at least one barrier layer is a barrier-changing layer, the barrier-changing layer is in the direction from the N-type semiconductor layer to the P-type semiconductor layer, and the barrier height of part or all of the barrier-changing layer is changed from high to low.
According to the light-emitting diode, the variable barrier layer is arranged on the active layer, and the barrier height of the variable barrier layer is partially or completely changed from high to low along the direction from the N-type semiconductor layer to the P-type semiconductor layer, so that the limiting capacity of the active layer on electrons is enhanced, the recombination of electrons outside the active layer is reduced, the recombination probability of electrons and holes in the active region is increased, and the light-emitting efficiency is improved.
Optionally, in the variable barrier layer, a highest barrier of the variable barrier layer is closest to the N-type semiconductor layer. The limiting capacity of the active layer to electrons is further enhanced, and the luminous efficiency is improved.
Optionally, the variable barrier layer includes a plurality of layers sequentially disposed along a direction from the N-type semiconductor layer to the P-type semiconductor layer:
a barrier gradation portion having a barrier height from high to low in a direction from the N-type semiconductor layer to the P-type semiconductor layer; and
a potential barrier constant portion whose potential barrier height is kept constant and whose potential barrier height is equal to the lowest potential barrier height of the gradation portion.
The potential barrier gradual change part is arranged on the variable potential barrier layer to improve the electron limiting capacity, and the potential barrier constant part is arranged on the variable potential barrier layer to ensure that the potential barrier gradual change part only occupies part of the thickness area of the variable potential barrier layer, but not all the thickness area, thereby being beneficial to reducing the oxidized amount of components related to the electron limiting capacity in the variable potential barrier layer and improving the stability of the variable potential barrier layer on the electron limiting capacity.
Optionally, at least one barrier layer of each barrier layer is a constant barrier layer, the barrier height of the constant barrier layer is kept constant, and the average barrier height of the variable barrier layer is higher than the barrier height of the constant barrier layer.
Optionally, the active layer includes:
a first sub-active layer including a plurality of the quantum well layers and a plurality of the constant barrier layers alternately stacked;
and a second sub-active layer including a plurality of the quantum well layers and a plurality of the variable barrier layers alternately stacked.
Optionally, along the direction from the N-type semiconductor layer to the P-type semiconductor layer, the constant barrier layer and the variable barrier layer are sequentially disposed, so that electrons pass through the first sub-active layer and then pass through the second sub-active layer in the process of moving from the N-type semiconductor layer to the P-type semiconductor layer, which is more beneficial to limiting electrons in the active layer.
Optionally, each variable barrier layer and each constant barrier layer are sequentially disposed along a direction from the N-type semiconductor layer to the P-type semiconductor layer.
Optionally, the quantum well layer of the second sub-active layer is thicker than the quantum well layer of the first sub-active layer. The moving path of electrons passing through the quantum well layer of the second sub-active layer is increased, so that the recombination probability of electrons and holes is improved, and the luminous efficiency is improved.
Optionally, the quantum well layer thickness range of the first sub-active layer includes 4-6nm, and the quantum well layer thickness range of the second sub-active layer includes 5-7nm.
Optionally, each variable barrier layer is located between two adjacent constant barrier layers along the direction from the N-type semiconductor layer to the P-type semiconductor layer.
Optionally, each constant barrier layer and each variable barrier layer are staggered along the direction from the N-type semiconductor layer to the P-type semiconductor layer.
Optionally, the barrier height of the constant barrier layer is equal to the lowest barrier height of the variable barrier layer.
Optionally, the constant barrier layer has a barrier height higher than a lowest barrier height of the variable barrier layer and lower than a highest barrier height of the variable barrier layer.
Optionally, the thickness range of the potential barrier gradual change part comprises 2-4nm, and the thickness range of the potential barrier constant part comprises 1-3nm.
Optionally, the quantum well layer is an aluminum gallium indium phosphorus well layer, the barrier layer is an aluminum gallium indium phosphorus barrier layer, and the ratio of the aluminum component in the barrier layer is higher than the ratio of the aluminum component in the quantum well layer.
Optionally, the quantum well layer is (Al A Ga 1-A ) 0.5 In 0.5 A P well layer, wherein A is more than or equal to 0.2 and less than or equal to 0.3, and the barrier layer is (Al B Ga 1-B ) 0.5 In 0.5 And a P barrier layer, wherein B is more than or equal to 0.6 and less than or equal to 0.8.
Optionally, the N-type semiconductor layer includes an N-type waveguide layer and an N-type confinement layer, and the N-type confinement layer is formed on the N-type waveguide layer;
the P-type semiconductor layer comprises a P-type waveguide layer and a P-type limiting layer, and the P-type waveguide layer is formed on the P-type limiting layer;
wherein the active layer is formed between the N-type waveguide layer and the P-type waveguide layer.
Optionally, the light emitting diode further includes:
a substrate;
a buffer layer formed on the substrate;
a reflective layer formed on the buffer layer, the N-type semiconductor layer being formed on the reflective layer; and
and the current expansion layer is formed on the P-type semiconductor layer.
Optionally, the light emitting diode further includes:
a first electrode connected to the N-type semiconductor layer; and
and the second electrode is connected with the P-type semiconductor layer.
Based on the same conception, the present invention also provides a display panel including:
a substrate;
the light emitting diode is arranged on the substrate, and the light emitting diode is any one of the light emitting diodes.
According to the display panel provided by the invention, through the arrangement of any one of the light emitting diodes, the limiting capability of the active layer on electrons can be enhanced, the recombination of electrons outside the active layer is reduced, the recombination probability of electrons and holes in the active region is increased, and the light emitting efficiency is improved.
Drawings
FIG. 1 is a schematic diagram of an exemplary LED of the present invention;
FIG. 2 is a schematic diagram of an exemplary structure of a first sub-active layer;
FIG. 3 is a schematic diagram of an exemplary structure of a second sub-active layer;
FIG. 4 is a schematic diagram of a partial barrier height distribution of an exemplary LED;
FIG. 5 shows a schematic diagram of a local barrier height distribution of another exemplary light emitting diode;
FIG. 6 shows a schematic diagram of a partial barrier height distribution of yet another exemplary light emitting diode;
FIG. 7 is a schematic diagram of a partial barrier height distribution of yet another exemplary light emitting diode;
FIG. 8 is a schematic diagram of a partial barrier height distribution of yet another exemplary light emitting diode;
FIG. 9 is a schematic diagram of a partial barrier height distribution of another exemplary LED;
FIG. 10 is a schematic diagram of a partial barrier height distribution of yet another exemplary light emitting diode;
FIG. 11 is a diagram showing the barrier height distribution of the variable barrier layer of FIGS. 4-8;
fig. 12 shows another exemplary barrier height distribution diagram for a varying barrier layer.
Reference numerals illustrate:
100-a substrate; 200-a buffer layer; 300-a reflective layer;
a 400-N type semiconductor layer; 410-N type confinement layer; 420-N type waveguide layer,
500-active layer; 510-a first sub-active layer; 511-a first quantum well layer; 512-constant barrier layer; 520-a second sub-active layer; 521-a second quantum well layer; 522—a variable barrier layer; 522 a-a barrier taper; 522 b-barrier constant portion;
a 600-P type semiconductor layer; 610-P type waveguide layer; a 620-P type confinement layer;
700—a current spreading layer; 800-a first electrode; 900-a second electrode.
Detailed Description
In order to facilitate an understanding of the present application, a more complete description of the present application will now be provided with reference to the relevant figures. Preferred embodiments of the present application are shown in the accompanying drawings. This application may, however, be embodied in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
In the existing light-emitting diode, the mobility of electrons is larger than that of holes, so that electrons which are not limited in an active region can generate compound luminescence outside the active region, light sources with other wave bands are generated, the number of carriers in the active region is further reduced, and the compound probability of the electrons and the holes in the active region is reduced, so that the luminous efficiency is influenced.
Based on this, the present application intends to provide a solution to the above technical problem, the details of which will be explained in the following embodiments.
The application provides a light emitting diode, which can be applied to a display panel, and when the light emitting diode is applied to the display panel, the corresponding display panel comprises a substrate and the light emitting diode, and the light emitting diode is arranged on the substrate.
Referring to fig. 1, the light emitting diode of the present application at least includes an N-type semiconductor layer 400, a P-type semiconductor layer 600, and an active layer 500 formed between the N-type semiconductor layer 400 and the P-type semiconductor layer 600, and referring to fig. 4 to 10 in combination, the active layer 500 includes a plurality of quantum well layers and a plurality of barrier layers, each quantum well and each barrier layer being alternately stacked, wherein at least one barrier layer is a variable barrier layer 522, and a barrier height of the variable barrier layer 522 is changed from high to low along a direction from the N-type semiconductor layer 400 to the P-type semiconductor layer 600. In fig. 2-10, reference numerals 511 and 521 each refer to a respective quantum well layer, and reference numerals 512 and 522 each refer to a respective barrier layer.
In the light emitting diode, the variable barrier layer 522 is disposed on the active layer 500, and the barrier height of the variable barrier layer 522 is changed from high to low partially or completely along the direction from the N-type semiconductor layer 400 to the P-type semiconductor layer 600, so that electrons are more easily blocked in the adjacent quantum wells by the variable barrier layer 522, which is beneficial to enhancing the limiting capability of the active layer 500 on electrons, reducing the recombination of electrons outside the active layer 500, increasing the recombination probability of electrons and holes in the active region, and improving the light emitting efficiency.
In some embodiments, referring to fig. 12, in the variable barrier layer 522, the highest barrier of the variable barrier layer 522 is located at the middle of the variable barrier layer in the direction of the N-type semiconductor layer 400 to the P-type semiconductor layer 600.
In other embodiments, referring to fig. 4-11, in the variable barrier layer 522, the highest barrier of the variable barrier layer 522 is closest to the N-type semiconductor layer, which is more beneficial to blocking electrons in the adjacent quantum well by the variable barrier layer 522, and is beneficial to further improving the light emitting efficiency.
For ease of understanding, the following embodiments will be described by taking a red light diode as an example, and in the light emitting diode of the red light diode, the quantum well layer is an algaindium phosphorus well layer (AlGaInP well layer), and the barrier layer is an algaindium phosphorus barrier layer (AlGaInP barrier layer).
In some embodiments, the ratio of the aluminum component in the barrier layer is higher than the ratio of the aluminum component in the quantum well layer such that the barrier layer has a higher electron confinement capability than the quantum well layer. For example, the quantum well layer may be (Al A Ga 1-A ) 0.5 In 0.5 A P well layer, wherein A is more than or equal to 0.2 and less than or equal to 0.3, and the barrier layer can be (Al B Ga 1-B ) 0.5 In 0.5 And a P barrier layer, wherein B is more than or equal to 0.6 and less than or equal to 0.8. In the above and the following embodiments, the barrier layer and the quantum well layer are described by taking aluminide as an example; in the implementation processIn light emitting diodes of different colors or types, the main components influencing the barrier are different, and therefore the barrier layer and the quantum well layer are not limited to aluminides either, but corresponding magnesium compounds or other types of compounds may be used.
In some embodiments, referring to fig. 9 and 10, the barrier height of the variable barrier layer 522 is changed from high to low in the direction of the N-type semiconductor layer 400 to the P-type semiconductor layer 600, that is, the barrier height of the variable barrier layer 522 is changed in a manner of changing from high to low in all.
In other embodiments, referring to fig. 4 to 8, the variable barrier layer 522 includes a barrier gradual change portion 522a and a barrier constant portion 522b sequentially disposed in the direction of the N-type semiconductor layer 400 to the P-type semiconductor layer 600, the barrier height of the barrier gradual change portion 522a is changed from high to low, the barrier height of the barrier constant portion 522b is kept constant, and the barrier height of the barrier constant portion 522b is equal to the lowest barrier height of the barrier gradual change portion 522 a. That is, in the variable barrier layer 522, the barrier height of the variable barrier layer 522 is first changed from high to low and then is kept constant along the direction from the N-type semiconductor layer 400 to the P-type semiconductor layer 600, and the barrier height of the variable barrier layer 522 is locally changed from high to low.
In this way, the barrier graded portion 522a does not occupy the entire variable barrier layer 522, which is advantageous in reducing the amount of oxidation of the components of the variable barrier layer 522 associated with the electron confinement ability and in improving the stability of the variable barrier layer 522 to the electron confinement ability.
For example, when the variable barrier layer 522 is an AlGaInP barrier layer (AlGaInP barrier layer), the greater the content of the aluminum component in the variable barrier layer 522, the greater the electron confinement ability, but if the aluminum component is oxidized, the greater the electron confinement ability will be impaired to some extent, since the barrier height of the barrier graded portion 522a is greater than the barrier height of other non-graded portions (including the barrier constant portion 522b and other forms of barrier layers), that is, the greater the content of the aluminum component in the barrier graded portion, the greater the tendency of the barrier graded portion 522a to oxidize than other non-graded portions, that is, the greater the barrier height of the barrier graded portion 522a is not, the greater the tendency of the barrier to oxidize, and the greater the barrier potential may affect the stability of the active layer to electron confinement ability. Here, the barrier layer 522 has only a partial region as the barrier graded portion 522a, which can make the thickness occupied by the barrier graded portion 522a smaller, which is advantageous for reducing the amount of aluminum to be oxidized and for improving the stability of the active layer against electron confinement ability.
In some embodiments, the thickness range of the barrier graded portion 522a includes 2-4nm and the thickness range of the barrier constant portion 522b includes 1-3nm.
In some embodiments, the thickness of the barrier graded portion 522a is thicker than the thickness of the barrier constant portion 522b, which is advantageous to ensure that the varying barrier layer 522 has sufficient electron confinement capability.
In some embodiments, referring to fig. 4-10, at least one of the barrier layers is a constant barrier layer 512, the barrier height of the constant barrier layer 512 remains constant, and the average barrier height of the variable barrier layer 522 is higher than the barrier height of the Yu Heng barrier layer 512.
In some embodiments, referring to fig. 1 to 5, 8 to 10 in combination, the active layer 500 includes:
a first sub-active layer 510 including a plurality of quantum well layers and a plurality of constant barrier layers 512 alternately stacked;
the second sub-active layer 520 includes a plurality of quantum well layers and a plurality of variable barrier layers 522 alternately stacked.
In some embodiments, referring to fig. 8, each variable barrier 522 and each constant barrier 512 are disposed in sequence along the direction of the N-type semiconductor layer 400 to the P-type semiconductor layer 600. In other embodiments, referring to fig. 4, 5, 9, and 10, the constant barrier layer 512 and the variable barrier layer 522 are sequentially disposed along the direction from the N-type semiconductor layer 400 to the P-type semiconductor layer 600, so that electrons pass through the first sub-active layer 510 and then pass through the second sub-active layer 520 during the movement from the N-type semiconductor layer 400 to the P-type semiconductor layer 600, which is more beneficial to confining electrons to the active layers.
In some embodiments, the quantum well layer of the second sub-active layer 520 is thicker than the quantum well layer of the first sub-active layer 510. The movement path of electrons through the quantum well layer of the second sub-active layer 520 is increased, which is advantageous to improve the recombination probability of electrons and holes, and thus to improve the light emitting efficiency.
In some embodiments, the quantum well layer thickness range of the first sub-active layer 510 includes 4-6nm and the quantum well layer thickness range of the second sub-active layer 520 includes 5-7nm.
If the quantum well layer of the first sub-active layer 510 is defined as the first quantum well layer 511, the quantum well layer of the second sub-active layer 520 is defined as the second quantum well layer 521, that is, the thickness 522 of the second quantum well layer is thicker than the thickness of the first quantum well layer 511. For example, the thickness of the first quantum well layer 511 may be 5nm, and the thickness of the second quantum well layer 521 may be 6nm.
In practice, the constant barrier layer 512 and the variable barrier layer 522 may be arranged in other orders or manners. For example, referring to fig. 6, along the direction of the N-type semiconductor layer 400 to the P-type semiconductor layer 600, each variable barrier layer 522 is located between two adjacent constant barrier layers 512; for another example, referring to fig. 7, the constant barrier layers 512 and the variable barrier layers 522 are staggered in the direction of the N-type semiconductor layer 400 to the P-type semiconductor layer 600. Of course, in an implementation (not shown), the barrier layer in the active layer 500 may also include only the variable barrier layer 522, without the constant barrier layer 512.
In some embodiments, referring to fig. 5, 10, the barrier height of the constant barrier layer 512 is higher than the lowest barrier height of the varying barrier layer 522 and lower than the highest barrier height of the varying barrier layer 522. In other embodiments, referring to fig. 4, 6-9, the constant barrier layer 512 has a barrier height equal to the lowest barrier height of the variable barrier layer 522, which is advantageous for maintaining the wavelength of the light emitting diode in a relatively stable range when the variable barrier layer 522 is provided.
In some embodiments, referring to fig. 1 through 3 in combination, N-type semiconductor layer 400 includes N-type waveguide layer 420 and N-type confinement layer 410, N-type confinement layer 410 being formed on N-type waveguide layer 420; referring to fig. 3, the P-type semiconductor layer 600 includes a P-type waveguide layer 610 and a P-type confinement layer 620, the P-type waveguide layer 610 being formed on the P-type confinement layer 620; the active layer 500 is formed between the N-type waveguide layer 420 and the P-type waveguide layer 610. The N-type waveguide layer 420 may be an N-type waveguide layer, the N-type confinement layer 410 may be an N-type confinement layer, the P-type waveguide layer 610 may be a P-type waveguide layer, and the P-type confinement layer 620 may be a P-type confinement layer.
In some embodiments, referring to fig. 1, the light emitting diode further includes a substrate 100, a buffer layer 200 formed on the substrate 100, a reflective layer 300 formed on the buffer layer 200, and a current spreading layer 700 formed on the P-type semiconductor layer 600, and an N-type semiconductor layer 400 formed on the reflective layer 300.
In some embodiments, referring to fig. 1, the light emitting diode further includes a first electrode 800 connected to the N-type semiconductor layer 400 and a second electrode 900 connected to the P-type semiconductor layer 600. In fig. 1, a first electrode 800 is formed on a current spreading layer 700, and a second electrode 900 is connected to a P-type semiconductor layer 600 by being connected to a substrate 100.
For ease of understanding, in one embodiment, referring to fig. 1, the light emitting diode comprises:
a substrate 100, the substrate 100 being a GaAs substrate;
a buffer layer 200 formed on the substrate 100, the buffer layer 200 being a GaAs buffer layer having a thickness of 0.4-0.6 μm;
a reflection layer 300 formed on the buffer layer 200, the reflection layer 300 being an AlGaAa/AlAs DBR reflection layer having a thickness of 2.0-4.0 μm;
an N-type confinement layer 410 formed on the reflective layer 300, the N-type confinement layer 410 being an N-AlInP confinement layer having a thickness of 0.25-0.45 μm;
an N-type waveguide layer 420 formed on the N-type confinement layer 410, wherein the N-type waveguide layer 420 is an N-AlGaInP waveguide layer, and has a thickness of 0.06-0.1 μm;
an active layer 500 formed on the N-type waveguide layer 420;
a P-type waveguide layer 610 formed on the active layer 500, the P-type waveguide layer 610 being a P-AlGaInP waveguide layer having a thickness of 0.07-0.1 μm;
a P-type confinement layer 620 formed on the P-type waveguide layer 610, the P-type waveguide layer 610 being a P-AlInP confinement layer having a thickness of 0.3-1 μm;
and a current spreading layer 700 formed on the P-type confinement layer 620, wherein the current spreading layer 700 is a P-GaP current spreading layer having a thickness of 5-6 μm.
Wherein the active layer 500 includes a plurality of quantum well layers and a plurality of barrier layers alternately stacked, referring to fig. 1, the active layer 500 may be divided into a first sub-active layer 510 and a second sub-active layer 520, referring to fig. 2 in combination, the first sub-active layer 510 includes 18 first quantum well layers 511 and 17 constant barrier layers 512, and referring to fig. 3 in combination, the second sub-active layer 520 includes 5 second quantum well layers 521 and 5 variable barrier layers 522; the first sub-active layer 510 is formed on the N-type waveguide layer 420, and the P-type waveguide layer 610 is formed on the second sub-active layer 520. The thickness of each first quantum well layer 511 is 5nm, and the thickness of each second quantum well layer 521 is 6nm; the thicknesses of the single constant barrier layer 512 and the single variable barrier layer 522 are 5nm, that is, the thickness of the first sub-active layer 510 is 175nm and the thickness of the second sub-active layer 520 is 55nm.
Wherein the first quantum well layer 511 and the second quantum well layer 521 are both (Al A Ga 1-A ) 0.5 In 0.5 The P well layer is that A is more than or equal to 0.2 and less than or equal to 0.3; the constant barrier layer 512 and the variable barrier layer 522 are both (Al B Ga 1-B ) 0.5 In 0.5 And a P layer, B is more than or equal to 0.6 and less than or equal to 0.8, and referring to fig. 4-11, each variable barrier layer 522 comprises a barrier gradual change part 522a and a barrier constant part 522B which are sequentially formed along the direction from the N-type waveguide layer 420 to the P-type waveguide layer 610, the barrier height of the barrier gradual change part 522a is from high to low, the thickness of the barrier gradual change part 522a is 3nm, the barrier height of the barrier constant part 522B is equal to the lowest barrier height of the barrier gradual change part 522a, and the thickness of the barrier constant part 522B is 2nm.
Accordingly, the light emitting diode may be grown on the substrate 100 by means of Metal organic chemical vapor deposition (MOVCD, metal-Organic Chemical Vapour Deposition), and the entire manufacturing process may include the following steps;
forming the buffer layer 200 on the substrate 100;
forming the reflective layer 300 on the buffer layer 200, wherein the reflective layer 300 includes alternately arranged first and second reflective layers (AlAs) and (AlGaAa), the first reflective layer having a reflectivity less than that of the second reflective layer, and growing the reflective layer 300 starting with a reflective layer (AlAs) and ending with the first reflective layer (AlAs);
forming the N-type confinement layer 410 on the reflective layer 300;
growing the N-type waveguide layer 420 on the N-type confinement layer 410;
the active layer 500 is formed by growing on the N-type waveguide layer 420, specifically, the active layer 500 is formed by alternately growing multiple quantum well layers and barrier layers, when the active layer 500 is grown, a first sub-active layer 510 is formed by first growing on the N-type waveguide layer 420 and then a second sub-active layer 520 is formed by growing on the first sub-active layer 510, the first sub-active layer 510 and the second sub-active layer 520 both comprise multiple layers of alternate quantum well layers and barrier layers, the growth pressures of the first sub-active layer 510 and the second sub-active layer 520 are 45-65mbar, and the growth temperatures are 650-750 ℃;
forming the P-type waveguide layer 610 on the active layer 500;
forming the P-type confinement layer 620 on the P-type waveguide layer 610;
the current spreading layer 700 is grown on the P-type confinement layer 620.
Of course, the substrate 100 needs to be cleaned or purged prior to growing the buffer layer 200, for example, the substrate 100 may be purged with H2; meanwhile, the temperature of the reaction chamber needs to be adjusted to 650-750 ℃, which is favorable for removing water vapor in the reaction chamber in a high-temperature environment.
Wherein, when the first sub-active layer 510 and the second sub-active layer 520 are grown, the flow rate of Trimethylaluminum (TMAL) and trimethylgallium (TMGa) which are introduced into the reaction chamber is controlled by the MFC, and the PH is controlled 3 And the amount of TMIn introduced, so that the ratio of the aluminum component to the gallium component in each of the quantum well layers and barrier layers of the active layer 500 can be controlled, and the control of the variation in the barrier heights in each of the quantum well layers and barrier layers can be realized. When the first quantum well layer 511 and the constant barrier layer 512 of the first sub-active layer 510 are grown, the TMAl flow rate introduced into the first quantum well layer and the constant barrier layer is respectively a corresponding constant value; the TMAl flow rate passing through the second quantum well layer 521 of the second sub-active layer 520 is also a fixed value, but when the variable barrier layer 522 of the second sub-active layer 520 is grown, the TMAl flow rate is required to be kept unchanged after gradually decreasing, B is a variable value, and the TMGa flow rate is required to be gradually increasedAnd remains unchanged after growing to form the variable barrier 522.
It is to be understood that the invention is not limited in its application to the examples described above, but is capable of modification and variation in light of the above teachings by those skilled in the art, and that all such modifications and variations are intended to be included within the scope of the appended claims.
Claims (9)
1. A light emitting diode comprising at least:
an N-type semiconductor layer;
a P-type semiconductor layer; and
the active layer comprises a plurality of quantum well layers and a plurality of barrier layers, and each quantum well layer and each barrier layer are alternately stacked, wherein at least one barrier layer is a variable barrier layer, the variable barrier layer is formed along the direction from the N-type semiconductor layer to the P-type semiconductor layer, and the barrier height of part or all of the variable barrier layer is changed from high to low; at least one barrier layer is a constant barrier layer, and the barrier height of the constant barrier layer is kept constant;
and each variable barrier layer is positioned between two adjacent constant barrier layers along the direction from the N-type semiconductor layer to the P-type semiconductor layer, or each constant barrier layer and each variable barrier layer are staggered.
2. A light emitting diode according to claim 1 wherein: in the variable barrier layer, a highest barrier of the variable barrier layer is closest to the N-type semiconductor layer.
3. A light emitting diode according to claim 2 wherein: the variable barrier layer comprises the following components sequentially arranged along the direction from the N-type semiconductor layer to the P-type semiconductor layer:
a barrier gradation portion having a barrier height from high to low in a direction from the N-type semiconductor layer to the P-type semiconductor layer; and
barrier constant portion: the barrier height of the barrier constant portion is kept constant, and the barrier height of the barrier constant portion is equal to the lowest barrier height of the gradation portion.
4. A light emitting diode according to claim 2 wherein: the variable barrier layer has an average barrier height that is higher than the barrier height of the constant barrier layer.
5. The light emitting diode of claim 4, wherein the active layer comprises:
a first sub-active layer including a plurality of the quantum well layers and a plurality of the constant barrier layers alternately stacked;
and a second sub-active layer including a plurality of the quantum well layers and a plurality of the variable barrier layers alternately stacked.
6. A light emitting diode according to claim 5 wherein: the quantum well layer of the second sub-active layer is thicker than the quantum well layer of the first sub-active layer.
7. A light emitting diode according to claim 4 wherein: the constant barrier layer has a barrier height equal to the lowest barrier height of the variable barrier layer.
8. A light emitting diode according to any one of claims 1-7 wherein:
the N-type semiconductor layer comprises an N-type waveguide layer and an N-type limiting layer, and the N-type limiting layer is formed on the N-type waveguide layer;
the P-type semiconductor layer comprises a P-type waveguide layer and a P-type limiting layer, and the P-type waveguide layer is formed on the P-type limiting layer;
wherein the active layer is formed between the N-type waveguide layer and the P-type waveguide layer.
9. A display panel, comprising:
a substrate;
a light emitting diode disposed on the substrate, the light emitting diode being as set forth in any one of claims 1-8.
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