CN114002602A - VPX power battery monomer voltage acquisition blade based on FPGA - Google Patents
VPX power battery monomer voltage acquisition blade based on FPGA Download PDFInfo
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- CN114002602A CN114002602A CN202111282586.1A CN202111282586A CN114002602A CN 114002602 A CN114002602 A CN 114002602A CN 202111282586 A CN202111282586 A CN 202111282586A CN 114002602 A CN114002602 A CN 114002602A
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- 239000000178 monomer Substances 0.000 title claims abstract description 14
- 238000006243 chemical reaction Methods 0.000 claims abstract description 16
- 238000002955 isolation Methods 0.000 claims abstract description 9
- 238000005070 sampling Methods 0.000 claims description 11
- 101000798707 Homo sapiens Transmembrane protease serine 13 Proteins 0.000 claims description 2
- 102100032467 Transmembrane protease serine 13 Human genes 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 4
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/36—Arrangements for testing, measuring or monitoring the electrical condition of accumulators or electric batteries, e.g. capacity or state of charge [SoC]
- G01R31/385—Arrangements for measuring battery or accumulator variables
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/25—Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques
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Abstract
The invention relates to a VPX power battery monomer voltage acquisition blade based on an FPGA (field programmable gate array), and belongs to the technical field of design data acquisition. The acquisition blade comprises a VPX connector, a single battery voltage digital-to-analog conversion module and an FPGA; the FPGA comprises a data receiving module, a data processing module, a data caching module, a data output module, a serial port control module and a VPX board card enabling control module which realize functions; the battery monomer voltage digital-to-analog conversion module comprises an analog signal attenuation module, a multi-channel high-speed ADC and a multi-channel digital signal isolation module. The invention has high safety and real-time performance, supports various output modes and is convenient for popularizing the FPGA for application in the field of power battery data acquisition.
Description
Technical Field
The invention relates to a VPX power battery monomer voltage acquisition blade based on an FPGA (field programmable gate array), and belongs to the technical field of design data acquisition.
Background
The market share of the domestic FPGA in the FPGA application field is gradually increased, but the domestic FPGA has few applications in the data acquisition field, particularly the single voltage acquisition direction of the power battery. The VPX interface is widely applied to the fields of military industry and industrial control since the time of the coming of the world due to the characteristics of severe environment resistance and high-performance computing, but is rarely used in the field of power battery data acquisition.
Disclosure of Invention
The technical problem to be solved by the invention is as follows: the VPX power battery single voltage acquisition blade based on the FPGA is provided.
In order to solve the technical problems, the technical scheme provided by the invention is as follows: a VPX power battery monomer voltage acquisition blade based on FPGA comprises a VPX connector, a battery monomer voltage digital-to-analog conversion module and the FPGA; the FPGA comprises a data receiving module, a data processing module, a data caching module, a data output module, a serial port control module and a VPX board card enabling control module which realize functions; the data caching module is arranged between the processing module and the data output module;
the data receiving module receives the sampling data output by the battery monomer voltage digital-to-analog conversion module and is controlled by a serial port control module to control the working mode of the data receiving module;
the battery monomer voltage digital-to-analog conversion module comprises an analog signal attenuation module, a multi-channel high-speed ADC and a multi-channel digital signal isolation module; the analog signal attenuation module is used for attenuating the amplitude of the measured signal so that the amplitude can be matched with the voltage input range of the ADC; the multi-channel high-speed ADC is used for supporting multi-channel differential input and multi-channel LVDS output; the multi-channel digital signal isolation module is used for avoiding crosstalk formed between digital signal outputs of all channels of the multi-channel high-speed ADC;
the improvement of the technical scheme is as follows: and the data received by the data processing module is filtered, so that the power frequency interference of 50Hz/60Hz is filtered.
The improvement of the technical scheme is as follows: the maximum sampling rate of the multichannel high-speed ADC is 50 MSPS.
The improvement of the technical scheme is as follows: the multichannel high-speed ADC adopts TI ADS5281 and supports 8-channel differential input and 8-channel LVDS output.
The improvement of the technical scheme is as follows: the VPX connector is a MultiGig RT2 connector of the 3U standard.
The invention has the beneficial effects that: the invention has high safety and real-time performance, supports various output modes and is convenient for popularizing the FPGA for application in the field of power battery data acquisition.
Drawings
Fig. 1 is a block diagram of a VPX power battery cell voltage acquisition blade based on an FPGA according to an embodiment of the present invention.
Fig. 2 is a control logic diagram of an FPGA of the VPX power battery cell voltage acquisition blade based on the FPGA according to an embodiment of the present invention.
Fig. 3 is a cell voltage analog-to-digital conversion module architecture diagram of a VPX power cell voltage acquisition blade based on an FPGA according to an embodiment of the present invention.
Fig. 4 is a schematic diagram of a front panel status indicator lamp of a VPX power battery cell voltage acquisition blade based on an FPGA according to an embodiment of the present invention.
Detailed Description
Example one
The blade for collecting the single voltage of the VPX power battery based on the FPGA of the embodiment is shown in fig. 1 and comprises a VPX connector, a single voltage digital-to-analog conversion module and an FPGA; the FPGA comprises a data receiving module, a data processing module, a data caching module, a data output module, a serial port control module and a VPX board card enabling control module which realize functions; the data caching module is arranged between the processing module and the data output module;
the data receiving module receives the sampling data output by the battery monomer voltage digital-to-analog conversion module and is controlled by a serial port control module to control the working mode of the data receiving module;
the battery monomer voltage digital-to-analog conversion module comprises an analog signal attenuation module, a multi-channel high-speed ADC and a multi-channel digital signal isolation module; the analog signal attenuation module is used for attenuating the amplitude of the measured signal so that the amplitude can be matched with the voltage input range of the ADC; the multi-channel high-speed ADC is used for supporting multi-channel differential input and multi-channel LVDS output; the multi-channel digital signal isolation module is used for avoiding crosstalk formed between digital signal outputs of all channels of the multi-channel high-speed ADC;
the front panel of the device of the embodiment is provided with 8 differential analog signal interfaces which are respectively connected to the voltage analog-to-digital conversion module of the single battery, and the 8 interfaces are externally connected to the single power battery through connecting wires. The status indicator lamps of the front panel indicate the operating status of the VPX board card, and as shown in fig. 4, 5 indicator lamps respectively indicate whether the power supply is normal, whether data acquisition is in operation, whether data is encrypted, whether data is output through the SRIO interface, and whether data is output through the PCIe interface. The control key is connected to the FPGA and controls the running state of the VPX board card. And pressing the key for a short time indicates starting to run data acquisition, and pressing the key for a long time indicates stopping the data acquisition. And after the data acquisition is stopped, the key is pressed for a short time again, and the data acquisition can be started again.
The VPX connector of this embodiment is a MultiGig RT2 connector of 3U standard, PO is used for supplying power, P1 is used for deploying PCIe 1.1X 4 interface and uart interface, and P2 is used for deploying SRIO 2.0X 4 interface and 8-pair LVDS interface.
The domestic FPGA of this embodiment is CWQ2P690T of the china win core, the module realized by the FPGA is as shown in fig. 2, the data receiving module mainly receives 8-channel sampling data output by the analog-to-digital conversion module, and completes control of the ADC chip, and what kind of control mode is adopted is also controlled by the serial port control module. After entering the data processing module, the data is firstly subjected to 8-channel digital filtering, and the power frequency interference of 50Hz/60Hz is mainly filtered. After data is filtered, a flag bit needs to be added according to the channel number of data acquisition, which indicates that the data is the data of the sampling channel. And then entering an 8-channel AES encryption module to ensure the security of the sampled data. The key of AES encryption is stored in the MRAM, so that the safety and reliability of sampling are improved. And a data caching module is arranged between the data processing module and the data output module. When high-speed serial interfaces such as SRIO, PCIe and the like are adopted to output sampling data, conversion of multi-channel data and serial data is required to be carried out in a data processing module, and at the moment, in order to guarantee real-time performance and rapidity of data acquisition, the QDR is adopted to carry out ping-pong operation to carry out data caching. When LVDS is adopted for data output, data directly enters 8-channel FIFO for data caching after AES encryption and then is output through an LVDS interface. In the data output module, three interface forms of SRIO 2.0X 4, PCIe 1.1X 4, LVDS and the like are realized.
The battery cell voltage analog-to-digital conversion module of the present embodiment, as shown in fig. 3, includes an analog signal attenuation module, a multi-channel high-speed ADC, and a multi-channel digital signal isolation module. The analog signal attenuation module is used for attenuating the amplitude of the measured signal, so that the amplitude can be matched with the voltage input range of the ADC. ADS5281 of the multi-channel high-speed ADC sampling TI, and the ADC supports 8-channel differential input and 8-channel LVDS output. And the maximum sampling rate of the ADC is 50MSPS, so that the requirements on real-time performance and rapidity of data acquisition are met. The multi-channel digital signal isolation module is used for avoiding crosstalk between digital signal outputs of all channels of the ADC.
The present invention is not limited to the specific technical solutions described in the above embodiments, and other embodiments may be made in the present invention in addition to the above embodiments. It will be understood by those skilled in the art that various changes, substitutions of equivalents, and alterations can be made without departing from the spirit and scope of the invention.
Claims (5)
1. The utility model provides a VPX power battery monomer voltage acquisition blade based on FPGA which characterized in that: the device comprises a VPX connector, a single battery voltage digital-to-analog conversion module and an FPGA; the FPGA comprises a data receiving module, a data processing module, a data caching module, a data output module, a serial port control module and a VPX board card enabling control module which realize functions; the data caching module is arranged between the processing module and the data output module;
the data receiving module receives the sampling data output by the battery monomer voltage digital-to-analog conversion module and is controlled by a serial port control module to control the working mode of the data receiving module;
the battery monomer voltage digital-to-analog conversion module comprises an analog signal attenuation module, a multi-channel high-speed ADC and a multi-channel digital signal isolation module; the analog signal attenuation module is used for attenuating the amplitude of the measured signal so that the amplitude can be matched with the voltage input range of the ADC; the multi-channel high-speed ADC is used for supporting multi-channel differential input and multi-channel LVDS output; the multi-channel digital signal isolation module is used for avoiding crosstalk formed between digital signal outputs of all channels of the multi-channel high-speed ADC.
2. The FPGA-based VPX power cell voltage acquisition blade of claim 1, wherein: and the data received by the data processing module is filtered, so that the power frequency interference of 50Hz/60Hz is filtered.
3. The FPGA-based VPX power cell voltage acquisition blade of claim 1, wherein: the maximum sampling rate of the multichannel high-speed ADC is 50 MSPS.
4. The FPGA-based VPX power cell voltage acquisition blade of claim 1, wherein: the multichannel high-speed ADC adopts TI ADS5281 and supports 8-channel differential input and 8-channel LVDS output.
5. The FPGA-based VPX power cell voltage acquisition blade of claim 1, wherein: the VPX connector is a MultiGig RT2 connector of the 3U standard.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202111282586.1A CN114002602A (en) | 2021-11-01 | 2021-11-01 | VPX power battery monomer voltage acquisition blade based on FPGA |
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| CN202111282586.1A CN114002602A (en) | 2021-11-01 | 2021-11-01 | VPX power battery monomer voltage acquisition blade based on FPGA |
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Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2011002358A1 (en) * | 2009-06-30 | 2011-01-06 | Scandinova Systems Ab | Capacitor charger system and digital control module and isolated acquisition module for such a capacitor charger system |
| CN103297055A (en) * | 2013-03-19 | 2013-09-11 | 中国科学院声学研究所 | Device for achieving multipath serial ADC synchronization by adopting FPGA |
| CN103353725A (en) * | 2013-03-19 | 2013-10-16 | 中国科学院声学研究所 | PCI interface protocol based array expandable data collection system realized by adopting FPGA (field programmable gate array) |
| CN106095334A (en) * | 2016-06-03 | 2016-11-09 | 江苏科技大学 | A kind of high-speed data acquisition storage system based on FPGA |
| CN107323291A (en) * | 2017-07-05 | 2017-11-07 | 山东大学 | Electrokinetic cell high accuracy data synchronous acquisition and real time processing system and its method |
| CN111736517A (en) * | 2020-08-07 | 2020-10-02 | 成都谱信通科技有限公司 | Synchronous acquisition and processing card system based on multichannel ADC and FPGA |
| CN112764372A (en) * | 2020-12-25 | 2021-05-07 | 天津大学 | Multi-channel signal acquisition system based on VPX framework |
-
2021
- 2021-11-01 CN CN202111282586.1A patent/CN114002602A/en active Pending
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2011002358A1 (en) * | 2009-06-30 | 2011-01-06 | Scandinova Systems Ab | Capacitor charger system and digital control module and isolated acquisition module for such a capacitor charger system |
| CN103297055A (en) * | 2013-03-19 | 2013-09-11 | 中国科学院声学研究所 | Device for achieving multipath serial ADC synchronization by adopting FPGA |
| CN103353725A (en) * | 2013-03-19 | 2013-10-16 | 中国科学院声学研究所 | PCI interface protocol based array expandable data collection system realized by adopting FPGA (field programmable gate array) |
| CN106095334A (en) * | 2016-06-03 | 2016-11-09 | 江苏科技大学 | A kind of high-speed data acquisition storage system based on FPGA |
| CN107323291A (en) * | 2017-07-05 | 2017-11-07 | 山东大学 | Electrokinetic cell high accuracy data synchronous acquisition and real time processing system and its method |
| CN111736517A (en) * | 2020-08-07 | 2020-10-02 | 成都谱信通科技有限公司 | Synchronous acquisition and processing card system based on multichannel ADC and FPGA |
| CN112764372A (en) * | 2020-12-25 | 2021-05-07 | 天津大学 | Multi-channel signal acquisition system based on VPX framework |
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